T417 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw_evict.3088292485 |
|
|
Oct 09 08:16:43 PM UTC 24 |
Oct 09 08:17:46 PM UTC 24 |
221779000 ps |
T646 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_read_seed_err.2304384920 |
|
|
Oct 09 08:17:21 PM UTC 24 |
Oct 09 08:17:48 PM UTC 24 |
15467200 ps |
T647 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_alert_test.726533037 |
|
|
Oct 09 08:17:25 PM UTC 24 |
Oct 09 08:17:57 PM UTC 24 |
35018600 ps |
T648 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_ro.1647076163 |
|
|
Oct 09 08:16:08 PM UTC 24 |
Oct 09 08:17:59 PM UTC 24 |
3199707600 ps |
T649 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_sec_info_access.2848381775 |
|
|
Oct 09 08:16:58 PM UTC 24 |
Oct 09 08:18:03 PM UTC 24 |
1641769500 ps |
T650 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_prog_rma_wipe_err.2825423110 |
|
|
Oct 09 08:15:28 PM UTC 24 |
Oct 09 08:18:10 PM UTC 24 |
10012182200 ps |
T138 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_mp_regions.2078046290 |
|
|
Oct 09 08:11:21 PM UTC 24 |
Oct 09 08:18:21 PM UTC 24 |
13770987000 ps |
T325 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd.151454981 |
|
|
Oct 09 08:16:13 PM UTC 24 |
Oct 09 08:18:49 PM UTC 24 |
2552579200 ps |
T158 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_otp_reset.650335385 |
|
|
Oct 09 08:15:43 PM UTC 24 |
Oct 09 08:18:50 PM UTC 24 |
35593500 ps |
T651 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd_slow_flash.2940937857 |
|
|
Oct 09 08:16:22 PM UTC 24 |
Oct 09 08:19:15 PM UTC 24 |
6580410300 ps |
T652 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rw.1061873531 |
|
|
Oct 09 08:09:29 PM UTC 24 |
Oct 09 08:19:31 PM UTC 24 |
19287603500 ps |
T653 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_sec_otp.1729544730 |
|
|
Oct 09 08:17:38 PM UTC 24 |
Oct 09 08:19:41 PM UTC 24 |
3604482800 ps |
T654 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict.690971809 |
|
|
Oct 09 08:18:51 PM UTC 24 |
Oct 09 08:19:41 PM UTC 24 |
39711900 ps |
T655 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_invalid_op.2815988971 |
|
|
Oct 09 08:17:49 PM UTC 24 |
Oct 09 08:19:48 PM UTC 24 |
3578748500 ps |
T150 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_mp_regions.4023166878 |
|
|
Oct 09 08:13:35 PM UTC 24 |
Oct 09 08:19:49 PM UTC 24 |
20039653900 ps |
T272 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_error_mp.3805098234 |
|
|
Oct 09 07:19:54 PM UTC 24 |
Oct 09 08:19:52 PM UTC 24 |
23441297100 ps |
T656 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict_all_en.1479169357 |
|
|
Oct 09 08:19:16 PM UTC 24 |
Oct 09 08:19:53 PM UTC 24 |
29543100 ps |
T657 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_rma_reset.40782563 |
|
|
Oct 09 08:04:27 PM UTC 24 |
Oct 09 08:19:53 PM UTC 24 |
110158852600 ps |
T658 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_wo.651366391 |
|
|
Oct 09 08:15:57 PM UTC 24 |
Oct 09 08:19:57 PM UTC 24 |
2312435700 ps |
T333 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_intr_rd_slow_flash.202189280 |
|
|
Oct 09 08:14:19 PM UTC 24 |
Oct 09 08:20:00 PM UTC 24 |
66806864300 ps |
T659 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_ro.510663035 |
|
|
Oct 09 08:18:00 PM UTC 24 |
Oct 09 08:20:03 PM UTC 24 |
5826416000 ps |
T660 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_connect.1062917137 |
|
|
Oct 09 08:19:42 PM UTC 24 |
Oct 09 08:20:03 PM UTC 24 |
91543400 ps |
T661 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_disable.4022999752 |
|
|
Oct 09 08:19:34 PM UTC 24 |
Oct 09 08:20:06 PM UTC 24 |
10492100 ps |
T662 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_lcmgr_intg.1355959992 |
|
|
Oct 09 08:19:50 PM UTC 24 |
Oct 09 08:20:07 PM UTC 24 |
16332300 ps |
T663 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw.1260256186 |
|
|
Oct 09 08:11:50 PM UTC 24 |
Oct 09 08:20:11 PM UTC 24 |
9543602700 ps |
T664 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_read_seed_err.4016254698 |
|
|
Oct 09 08:19:51 PM UTC 24 |
Oct 09 08:20:16 PM UTC 24 |
46309200 ps |
T139 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_mp_regions.4129622727 |
|
|
Oct 09 07:56:59 PM UTC 24 |
Oct 09 08:20:19 PM UTC 24 |
167430748000 ps |
T665 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_alert_test.4136011259 |
|
|
Oct 09 08:19:54 PM UTC 24 |
Oct 09 08:20:23 PM UTC 24 |
327335300 ps |
T666 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_re_evict.1516675659 |
|
|
Oct 09 08:19:33 PM UTC 24 |
Oct 09 08:20:24 PM UTC 24 |
155637400 ps |
T667 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_smoke.1831867557 |
|
|
Oct 09 08:17:28 PM UTC 24 |
Oct 09 08:20:43 PM UTC 24 |
23784100 ps |
T365 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_sec_info_access.1435780842 |
|
|
Oct 09 08:19:42 PM UTC 24 |
Oct 09 08:20:56 PM UTC 24 |
735682800 ps |
T668 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_prog_reset.1200189409 |
|
|
Oct 09 08:20:44 PM UTC 24 |
Oct 09 08:21:10 PM UTC 24 |
56262900 ps |
T669 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_sec_otp.3260040315 |
|
|
Oct 09 08:20:04 PM UTC 24 |
Oct 09 08:21:11 PM UTC 24 |
682525200 ps |
T670 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd_slow_flash.2586254981 |
|
|
Oct 09 08:18:23 PM UTC 24 |
Oct 09 08:21:26 PM UTC 24 |
11727826100 ps |
T671 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_invalid_op.545246929 |
|
|
Oct 09 08:20:12 PM UTC 24 |
Oct 09 08:21:29 PM UTC 24 |
1481470000 ps |
T672 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_error_prog_win.2732507296 |
|
|
Oct 09 08:05:14 PM UTC 24 |
Oct 09 08:21:34 PM UTC 24 |
1080826400 ps |
T673 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict.1327963917 |
|
|
Oct 09 08:20:57 PM UTC 24 |
Oct 09 08:21:35 PM UTC 24 |
126655000 ps |
T171 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_otp_reset.3871431837 |
|
|
Oct 09 08:17:48 PM UTC 24 |
Oct 09 08:21:45 PM UTC 24 |
149182600 ps |
T674 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_wo.3300231104 |
|
|
Oct 09 08:17:58 PM UTC 24 |
Oct 09 08:21:46 PM UTC 24 |
2632247100 ps |
T140 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_full_mem_access.874652369 |
|
|
Oct 09 07:39:59 PM UTC 24 |
Oct 09 08:21:48 PM UTC 24 |
159045360100 ps |
T675 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_re_evict.1309049898 |
|
|
Oct 09 08:21:12 PM UTC 24 |
Oct 09 08:22:00 PM UTC 24 |
70248000 ps |
T676 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_connect.4275562968 |
|
|
Oct 09 08:21:35 PM UTC 24 |
Oct 09 08:22:01 PM UTC 24 |
16716000 ps |
T677 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_lcmgr_intg.2905396212 |
|
|
Oct 09 08:21:36 PM UTC 24 |
Oct 09 08:22:01 PM UTC 24 |
47468100 ps |
T678 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict_all_en.2923467289 |
|
|
Oct 09 08:21:11 PM UTC 24 |
Oct 09 08:22:01 PM UTC 24 |
191137700 ps |
T389 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_disable.1052332435 |
|
|
Oct 09 08:21:27 PM UTC 24 |
Oct 09 08:22:02 PM UTC 24 |
12737800 ps |
T679 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_read_seed_err.2730225485 |
|
|
Oct 09 08:21:46 PM UTC 24 |
Oct 09 08:22:06 PM UTC 24 |
106220200 ps |
T680 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_alert_test.3113241108 |
|
|
Oct 09 08:21:57 PM UTC 24 |
Oct 09 08:22:16 PM UTC 24 |
38107400 ps |
T681 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_wo.345076009 |
|
|
Oct 09 08:20:17 PM UTC 24 |
Oct 09 08:22:19 PM UTC 24 |
2731560100 ps |
T682 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd.1202751435 |
|
|
Oct 09 08:18:11 PM UTC 24 |
Oct 09 08:22:20 PM UTC 24 |
11881508000 ps |
T683 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_error_prog_win.1936938581 |
|
|
Oct 09 08:00:36 PM UTC 24 |
Oct 09 08:22:24 PM UTC 24 |
2450467900 ps |
T684 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw.2717809927 |
|
|
Oct 09 08:14:09 PM UTC 24 |
Oct 09 08:22:25 PM UTC 24 |
8638948300 ps |
T685 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_ro.3838002873 |
|
|
Oct 09 08:20:20 PM UTC 24 |
Oct 09 08:22:36 PM UTC 24 |
6410332500 ps |
T686 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_mp_regions.1082671197 |
|
|
Oct 09 08:20:08 PM UTC 24 |
Oct 09 08:22:38 PM UTC 24 |
5225611800 ps |
T151 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_full_mem_access.215252040 |
|
|
Oct 09 07:18:41 PM UTC 24 |
Oct 09 08:22:43 PM UTC 24 |
116407723700 ps |
T687 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_sec_info_access.3190123288 |
|
|
Oct 09 08:21:30 PM UTC 24 |
Oct 09 08:22:47 PM UTC 24 |
5206616300 ps |
T688 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_prog_reset.2584535688 |
|
|
Oct 09 08:18:50 PM UTC 24 |
Oct 09 08:22:51 PM UTC 24 |
2994119400 ps |
T689 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_smoke.2607805696 |
|
|
Oct 09 08:22:02 PM UTC 24 |
Oct 09 08:23:05 PM UTC 24 |
23765100 ps |
T106 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_prog_rma_wipe_err.61161263 |
|
|
Oct 09 08:17:24 PM UTC 24 |
Oct 09 08:23:16 PM UTC 24 |
10013480100 ps |
T690 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict.2542962444 |
|
|
Oct 09 08:22:50 PM UTC 24 |
Oct 09 08:23:30 PM UTC 24 |
70049000 ps |
T691 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_invalid_op.176213663 |
|
|
Oct 09 08:22:20 PM UTC 24 |
Oct 09 08:23:38 PM UTC 24 |
854392400 ps |
T107 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_prog_rma_wipe_err.2152509732 |
|
|
Oct 09 08:19:52 PM UTC 24 |
Oct 09 08:23:40 PM UTC 24 |
10014879600 ps |
T692 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_smoke.4220843658 |
|
|
Oct 09 08:19:55 PM UTC 24 |
Oct 09 08:23:41 PM UTC 24 |
24852800 ps |
T116 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_disable.3511475713 |
|
|
Oct 09 08:23:17 PM UTC 24 |
Oct 09 08:23:48 PM UTC 24 |
20891100 ps |
T693 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict_all_en.1598605999 |
|
|
Oct 09 08:22:53 PM UTC 24 |
Oct 09 08:23:48 PM UTC 24 |
93813600 ps |
T694 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_connect.2300953109 |
|
|
Oct 09 08:23:39 PM UTC 24 |
Oct 09 08:23:58 PM UTC 24 |
13467700 ps |
T169 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_otp_reset.3528335510 |
|
|
Oct 09 08:20:07 PM UTC 24 |
Oct 09 08:24:00 PM UTC 24 |
240802200 ps |
T201 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_re_evict.1699209825 |
|
|
Oct 09 08:23:07 PM UTC 24 |
Oct 09 08:24:01 PM UTC 24 |
428873600 ps |
T304 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_rma_reset.2568866877 |
|
|
Oct 09 08:08:42 PM UTC 24 |
Oct 09 08:24:03 PM UTC 24 |
160196104000 ps |
T695 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_read_seed_err.3976652049 |
|
|
Oct 09 08:23:42 PM UTC 24 |
Oct 09 08:24:07 PM UTC 24 |
15509400 ps |
T696 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_phy_arb.3331923193 |
|
|
Oct 09 08:17:33 PM UTC 24 |
Oct 09 08:24:09 PM UTC 24 |
59248800 ps |
T697 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_lcmgr_intg.883820281 |
|
|
Oct 09 08:23:41 PM UTC 24 |
Oct 09 08:24:11 PM UTC 24 |
15696300 ps |
T698 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_prog_rma_wipe_err.2523065237 |
|
|
Oct 09 08:21:47 PM UTC 24 |
Oct 09 08:24:11 PM UTC 24 |
10012147900 ps |
T699 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_alert_test.123087666 |
|
|
Oct 09 08:23:49 PM UTC 24 |
Oct 09 08:24:15 PM UTC 24 |
178699800 ps |
T700 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_mp_regions.3960626493 |
|
|
Oct 09 08:15:44 PM UTC 24 |
Oct 09 08:24:16 PM UTC 24 |
68247321300 ps |
T701 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_sec_otp.248346172 |
|
|
Oct 09 08:22:03 PM UTC 24 |
Oct 09 08:24:25 PM UTC 24 |
6314696300 ps |
T702 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd_slow_flash.3313006029 |
|
|
Oct 09 08:20:36 PM UTC 24 |
Oct 09 08:24:28 PM UTC 24 |
20945710400 ps |
T703 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rand_ops.170301016 |
|
|
Oct 09 08:08:38 PM UTC 24 |
Oct 09 08:24:39 PM UTC 24 |
11758655900 ps |
T704 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd.2301829987 |
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|
Oct 09 08:22:37 PM UTC 24 |
Oct 09 08:24:43 PM UTC 24 |
579570300 ps |
T705 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_ro.2879011464 |
|
|
Oct 09 08:22:25 PM UTC 24 |
Oct 09 08:24:43 PM UTC 24 |
1067061200 ps |
T706 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd.1807118317 |
|
|
Oct 09 08:20:26 PM UTC 24 |
Oct 09 08:24:55 PM UTC 24 |
1826348200 ps |
T707 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_rma_reset.4220139954 |
|
|
Oct 09 08:11:18 PM UTC 24 |
Oct 09 08:25:01 PM UTC 24 |
380259711000 ps |
T708 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_prog_reset.754962497 |
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|
Oct 09 08:24:44 PM UTC 24 |
Oct 09 08:25:08 PM UTC 24 |
20551800 ps |
T709 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_otp_reset.3372648399 |
|
|
Oct 09 08:22:07 PM UTC 24 |
Oct 09 08:25:09 PM UTC 24 |
41313600 ps |
T361 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_sec_info_access.3387076661 |
|
|
Oct 09 08:23:31 PM UTC 24 |
Oct 09 08:25:12 PM UTC 24 |
8849970500 ps |
T141 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_mp_regions.4101271231 |
|
|
Oct 09 08:17:48 PM UTC 24 |
Oct 09 08:25:13 PM UTC 24 |
33236573100 ps |
T710 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict.506556353 |
|
|
Oct 09 08:24:44 PM UTC 24 |
Oct 09 08:25:31 PM UTC 24 |
76634700 ps |
T711 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict_all_en.2699635278 |
|
|
Oct 09 08:24:55 PM UTC 24 |
Oct 09 08:25:34 PM UTC 24 |
205051500 ps |
T712 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_disable.3002035125 |
|
|
Oct 09 08:25:08 PM UTC 24 |
Oct 09 08:25:34 PM UTC 24 |
12474000 ps |
T713 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_lcmgr_intg.1438225101 |
|
|
Oct 09 08:25:14 PM UTC 24 |
Oct 09 08:25:40 PM UTC 24 |
45919800 ps |
T714 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_wo.1171302872 |
|
|
Oct 09 08:22:22 PM UTC 24 |
Oct 09 08:25:40 PM UTC 24 |
3905310400 ps |
T715 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_connect.206751486 |
|
|
Oct 09 08:25:13 PM UTC 24 |
Oct 09 08:25:46 PM UTC 24 |
62255500 ps |
T716 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_invalid_op.1602182343 |
|
|
Oct 09 08:24:12 PM UTC 24 |
Oct 09 08:25:48 PM UTC 24 |
2549721100 ps |
T717 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rand_ops.226174959 |
|
|
Oct 09 08:17:29 PM UTC 24 |
Oct 09 08:26:01 PM UTC 24 |
154537700 ps |
T718 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_alert_test.2330827451 |
|
|
Oct 09 08:25:36 PM UTC 24 |
Oct 09 08:26:02 PM UTC 24 |
52329200 ps |
T719 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_read_seed_err.2858721303 |
|
|
Oct 09 08:25:32 PM UTC 24 |
Oct 09 08:26:04 PM UTC 24 |
23023600 ps |
T720 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_re_evict.256965739 |
|
|
Oct 09 08:25:02 PM UTC 24 |
Oct 09 08:26:05 PM UTC 24 |
65067800 ps |
T721 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_smoke.765244490 |
|
|
Oct 09 08:23:59 PM UTC 24 |
Oct 09 08:26:10 PM UTC 24 |
76484800 ps |
T722 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rand_ops.2837632147 |
|
|
Oct 09 08:00:15 PM UTC 24 |
Oct 09 08:26:17 PM UTC 24 |
3034503600 ps |
T723 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_rma_reset.469762771 |
|
|
Oct 09 08:13:26 PM UTC 24 |
Oct 09 08:26:19 PM UTC 24 |
120165822600 ps |
T724 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_sec_otp.1741688516 |
|
|
Oct 09 08:24:04 PM UTC 24 |
Oct 09 08:26:22 PM UTC 24 |
4360452100 ps |
T725 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_prog_rma_wipe_err.1698906726 |
|
|
Oct 09 08:23:49 PM UTC 24 |
Oct 09 08:26:24 PM UTC 24 |
10012184700 ps |
T726 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_phy_arb.309552894 |
|
|
Oct 09 08:15:38 PM UTC 24 |
Oct 09 08:26:33 PM UTC 24 |
735866000 ps |
T727 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_prog_rma_wipe_err.2562413773 |
|
|
Oct 09 08:25:34 PM UTC 24 |
Oct 09 08:26:39 PM UTC 24 |
10026939200 ps |
T728 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_sec_info_access.146968183 |
|
|
Oct 09 08:25:09 PM UTC 24 |
Oct 09 08:26:41 PM UTC 24 |
3810004100 ps |
T729 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_mp_regions.4120035933 |
|
|
Oct 09 08:22:17 PM UTC 24 |
Oct 09 08:26:45 PM UTC 24 |
22802906400 ps |
T730 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw.3584842424 |
|
|
Oct 09 08:16:11 PM UTC 24 |
Oct 09 08:26:46 PM UTC 24 |
4010020200 ps |
T731 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_ro.3899543980 |
|
|
Oct 09 08:24:17 PM UTC 24 |
Oct 09 08:26:50 PM UTC 24 |
1115557500 ps |
T732 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_prog_reset.1334159232 |
|
|
Oct 09 08:22:48 PM UTC 24 |
Oct 09 08:26:50 PM UTC 24 |
2477212800 ps |
T733 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_wo.3714409153 |
|
|
Oct 09 08:24:16 PM UTC 24 |
Oct 09 08:26:51 PM UTC 24 |
3818544200 ps |
T734 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_prog_reset.1205102067 |
|
|
Oct 09 08:26:34 PM UTC 24 |
Oct 09 08:26:59 PM UTC 24 |
59800000 ps |
T735 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rand_ops.847168514 |
|
|
Oct 09 08:15:37 PM UTC 24 |
Oct 09 08:27:05 PM UTC 24 |
207601400 ps |
T736 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_otp_reset.1569115997 |
|
|
Oct 09 08:24:10 PM UTC 24 |
Oct 09 08:27:13 PM UTC 24 |
72662100 ps |
T737 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd_slow_flash.2036963253 |
|
|
Oct 09 08:24:40 PM UTC 24 |
Oct 09 08:27:14 PM UTC 24 |
12025700000 ps |
T738 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_connect.2367246113 |
|
|
Oct 09 08:26:51 PM UTC 24 |
Oct 09 08:27:15 PM UTC 24 |
39998200 ps |
T739 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_lcmgr_intg.2892240669 |
|
|
Oct 09 08:26:52 PM UTC 24 |
Oct 09 08:27:15 PM UTC 24 |
26305600 ps |
T740 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_disable.839971963 |
|
|
Oct 09 08:26:48 PM UTC 24 |
Oct 09 08:27:16 PM UTC 24 |
66054300 ps |
T741 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict_all_en.1351795025 |
|
|
Oct 09 08:26:42 PM UTC 24 |
Oct 09 08:27:18 PM UTC 24 |
69410600 ps |
T742 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_read_seed_err.55125559 |
|
|
Oct 09 08:27:00 PM UTC 24 |
Oct 09 08:27:22 PM UTC 24 |
24461000 ps |
T743 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict.281290518 |
|
|
Oct 09 08:26:40 PM UTC 24 |
Oct 09 08:27:23 PM UTC 24 |
69127300 ps |
T744 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_invalid_op.487735682 |
|
|
Oct 09 08:26:06 PM UTC 24 |
Oct 09 08:27:26 PM UTC 24 |
2591961400 ps |
T745 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_re_evict.2404650576 |
|
|
Oct 09 08:26:47 PM UTC 24 |
Oct 09 08:27:28 PM UTC 24 |
267380600 ps |
T746 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_alert_test.323443844 |
|
|
Oct 09 08:27:15 PM UTC 24 |
Oct 09 08:27:34 PM UTC 24 |
38156400 ps |
T108 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_error_prog_type.1238317399 |
|
|
Oct 09 07:40:20 PM UTC 24 |
Oct 09 08:27:34 PM UTC 24 |
326303400 ps |
T747 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_sec_otp.3256372787 |
|
|
Oct 09 08:25:49 PM UTC 24 |
Oct 09 08:27:57 PM UTC 24 |
24824959100 ps |
T748 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw.4063097112 |
|
|
Oct 09 08:18:04 PM UTC 24 |
Oct 09 08:27:58 PM UTC 24 |
7158263600 ps |
T749 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd.749330787 |
|
|
Oct 09 08:24:29 PM UTC 24 |
Oct 09 08:28:01 PM UTC 24 |
1830087100 ps |
T750 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_phy_arb.489770671 |
|
|
Oct 09 08:24:02 PM UTC 24 |
Oct 09 08:28:02 PM UTC 24 |
44909500 ps |
T751 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_ro.1966358413 |
|
|
Oct 09 08:26:18 PM UTC 24 |
Oct 09 08:28:02 PM UTC 24 |
819763500 ps |
T752 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_sec_info_access.1933428036 |
|
|
Oct 09 08:26:51 PM UTC 24 |
Oct 09 08:28:05 PM UTC 24 |
587380700 ps |
T753 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd_slow_flash.3640937673 |
|
|
Oct 09 08:22:40 PM UTC 24 |
Oct 09 08:28:09 PM UTC 24 |
63379484200 ps |
T754 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_sec_otp.1315242487 |
|
|
Oct 09 08:27:17 PM UTC 24 |
Oct 09 08:28:20 PM UTC 24 |
3629830300 ps |
T755 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_prog_reset.811143384 |
|
|
Oct 09 08:28:02 PM UTC 24 |
Oct 09 08:28:21 PM UTC 24 |
56641100 ps |
T756 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_smoke.1288793233 |
|
|
Oct 09 08:25:41 PM UTC 24 |
Oct 09 08:28:28 PM UTC 24 |
73420400 ps |
T109 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_prog_type.3078863227 |
|
|
Oct 09 07:36:26 PM UTC 24 |
Oct 09 08:28:43 PM UTC 24 |
2997568200 ps |
T757 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict.612235736 |
|
|
Oct 09 08:28:03 PM UTC 24 |
Oct 09 08:28:47 PM UTC 24 |
99396200 ps |
T758 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_connect.4053094716 |
|
|
Oct 09 08:28:22 PM UTC 24 |
Oct 09 08:28:49 PM UTC 24 |
41918100 ps |
T392 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_disable.3170071005 |
|
|
Oct 09 08:28:10 PM UTC 24 |
Oct 09 08:28:50 PM UTC 24 |
104562900 ps |
T759 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_lcmgr_intg.2839595896 |
|
|
Oct 09 08:28:29 PM UTC 24 |
Oct 09 08:28:56 PM UTC 24 |
44407500 ps |
T760 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_invalid_op.1234759243 |
|
|
Oct 09 08:27:27 PM UTC 24 |
Oct 09 08:28:58 PM UTC 24 |
14625850000 ps |
T761 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_re_evict.2318699745 |
|
|
Oct 09 08:28:06 PM UTC 24 |
Oct 09 08:28:58 PM UTC 24 |
135631700 ps |
T762 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_prog_rma_wipe_err.850961464 |
|
|
Oct 09 08:27:05 PM UTC 24 |
Oct 09 08:29:01 PM UTC 24 |
10019541500 ps |
T763 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_smoke.3699340579 |
|
|
Oct 09 08:27:15 PM UTC 24 |
Oct 09 08:29:04 PM UTC 24 |
30932400 ps |
T764 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_read_seed_err.456663310 |
|
|
Oct 09 08:28:44 PM UTC 24 |
Oct 09 08:29:05 PM UTC 24 |
93686200 ps |
T765 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict_all_en.1517825479 |
|
|
Oct 09 08:28:03 PM UTC 24 |
Oct 09 08:29:06 PM UTC 24 |
39423500 ps |
T766 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_host_ctrl_arb.4070857943 |
|
|
Oct 09 07:39:49 PM UTC 24 |
Oct 09 08:29:15 PM UTC 24 |
246082271600 ps |
T767 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_mp_regions.333973560 |
|
|
Oct 09 08:26:05 PM UTC 24 |
Oct 09 08:29:17 PM UTC 24 |
24796586300 ps |
T768 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_alert_test.3510632729 |
|
|
Oct 09 08:28:50 PM UTC 24 |
Oct 09 08:29:18 PM UTC 24 |
259721300 ps |
T769 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_phy_arb.1712040747 |
|
|
Oct 09 08:20:01 PM UTC 24 |
Oct 09 08:29:25 PM UTC 24 |
1421783400 ps |
T770 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd_slow_flash.2297181189 |
|
|
Oct 09 08:26:26 PM UTC 24 |
Oct 09 08:29:26 PM UTC 24 |
5986848800 ps |
T771 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_prog_reset.3059141431 |
|
|
Oct 09 08:29:05 PM UTC 24 |
Oct 09 08:29:29 PM UTC 24 |
69338700 ps |
T772 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_wo.581020006 |
|
|
Oct 09 08:26:11 PM UTC 24 |
Oct 09 08:29:32 PM UTC 24 |
2694894500 ps |
T773 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_hw_sec_otp.3058083247 |
|
|
Oct 09 08:28:57 PM UTC 24 |
Oct 09 08:29:37 PM UTC 24 |
3074783700 ps |
T774 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_ro.1110463156 |
|
|
Oct 09 08:27:35 PM UTC 24 |
Oct 09 08:29:40 PM UTC 24 |
1078523800 ps |
T775 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict.425611487 |
|
|
Oct 09 08:29:06 PM UTC 24 |
Oct 09 08:29:42 PM UTC 24 |
28013200 ps |
T776 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_connect.1015799408 |
|
|
Oct 09 08:29:18 PM UTC 24 |
Oct 09 08:29:44 PM UTC 24 |
25803900 ps |
T393 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_disable.3407504660 |
|
|
Oct 09 08:29:16 PM UTC 24 |
Oct 09 08:29:45 PM UTC 24 |
13208500 ps |
T170 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_otp_reset.4058894677 |
|
|
Oct 09 08:26:02 PM UTC 24 |
Oct 09 08:29:49 PM UTC 24 |
487415600 ps |
T777 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rand_ops.2836459249 |
|
|
Oct 09 08:13:15 PM UTC 24 |
Oct 09 08:29:51 PM UTC 24 |
128116800 ps |
T778 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_phy_arb.1956923431 |
|
|
Oct 09 08:22:02 PM UTC 24 |
Oct 09 08:29:52 PM UTC 24 |
95110500 ps |
T375 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_sec_info_access.1079595392 |
|
|
Oct 09 08:28:20 PM UTC 24 |
Oct 09 08:29:54 PM UTC 24 |
27286294100 ps |
T779 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_alert_test.522605049 |
|
|
Oct 09 08:29:25 PM UTC 24 |
Oct 09 08:29:56 PM UTC 24 |
119304800 ps |
T780 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict_all_en.4285310380 |
|
|
Oct 09 08:29:07 PM UTC 24 |
Oct 09 08:29:59 PM UTC 24 |
69250500 ps |
T781 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_prog_reset.62504441 |
|
|
Oct 09 08:29:43 PM UTC 24 |
Oct 09 08:30:01 PM UTC 24 |
18382500 ps |
T782 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_rma_reset.3281874995 |
|
|
Oct 09 08:15:43 PM UTC 24 |
Oct 09 08:30:06 PM UTC 24 |
200179795000 ps |
T273 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_mp.1083883423 |
|
|
Oct 09 07:36:26 PM UTC 24 |
Oct 09 08:30:06 PM UTC 24 |
17162016400 ps |
T783 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_connect.3950578500 |
|
|
Oct 09 08:29:53 PM UTC 24 |
Oct 09 08:30:21 PM UTC 24 |
50258800 ps |
T784 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd.3398576343 |
|
|
Oct 09 08:26:23 PM UTC 24 |
Oct 09 08:30:24 PM UTC 24 |
5637681800 ps |
T785 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_alert_test.71643742 |
|
|
Oct 09 08:29:55 PM UTC 24 |
Oct 09 08:30:25 PM UTC 24 |
43178700 ps |
T786 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw.3429449512 |
|
|
Oct 09 08:22:26 PM UTC 24 |
Oct 09 08:30:27 PM UTC 24 |
12759861600 ps |
T787 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict_all_en.3867841886 |
|
|
Oct 09 08:29:46 PM UTC 24 |
Oct 09 08:30:28 PM UTC 24 |
28312800 ps |
T788 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_otp_reset.246293378 |
|
|
Oct 09 08:27:23 PM UTC 24 |
Oct 09 08:30:30 PM UTC 24 |
71967200 ps |
T789 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw.2777266719 |
|
|
Oct 09 08:20:23 PM UTC 24 |
Oct 09 08:30:35 PM UTC 24 |
11702894200 ps |
T117 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_disable.3646903519 |
|
|
Oct 09 08:29:50 PM UTC 24 |
Oct 09 08:30:36 PM UTC 24 |
11294400 ps |
T790 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict.987310233 |
|
|
Oct 09 08:29:45 PM UTC 24 |
Oct 09 08:30:36 PM UTC 24 |
48015800 ps |
T374 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_sec_info_access.2132493882 |
|
|
Oct 09 08:29:18 PM UTC 24 |
Oct 09 08:30:38 PM UTC 24 |
7622107200 ps |
T791 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rand_ops.3236139775 |
|
|
Oct 09 08:19:58 PM UTC 24 |
Oct 09 08:30:39 PM UTC 24 |
20227118300 ps |
T792 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_prog_reset.3422690972 |
|
|
Oct 09 08:30:22 PM UTC 24 |
Oct 09 08:30:41 PM UTC 24 |
35081700 ps |
T793 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_wo.458353843 |
|
|
Oct 09 08:27:29 PM UTC 24 |
Oct 09 08:30:52 PM UTC 24 |
4794065500 ps |
T794 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd.1412444151 |
|
|
Oct 09 08:27:58 PM UTC 24 |
Oct 09 08:30:52 PM UTC 24 |
1273858900 ps |
T795 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_hw_sec_otp.1866494997 |
|
|
Oct 09 08:29:30 PM UTC 24 |
Oct 09 08:30:57 PM UTC 24 |
1658586800 ps |
T796 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_connect.3851878029 |
|
|
Oct 09 08:30:30 PM UTC 24 |
Oct 09 08:30:57 PM UTC 24 |
64954400 ps |
T797 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_disable.1025201068 |
|
|
Oct 09 08:30:28 PM UTC 24 |
Oct 09 08:31:02 PM UTC 24 |
171758500 ps |
T798 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict.1759481401 |
|
|
Oct 09 08:30:25 PM UTC 24 |
Oct 09 08:31:02 PM UTC 24 |
44729800 ps |
T799 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_sec_info_access.2924173350 |
|
|
Oct 09 08:29:52 PM UTC 24 |
Oct 09 08:31:06 PM UTC 24 |
1767031900 ps |
T800 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_alert_test.1952788993 |
|
|
Oct 09 08:30:36 PM UTC 24 |
Oct 09 08:31:07 PM UTC 24 |
326881700 ps |
T801 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_hw_sec_otp.3931440878 |
|
|
Oct 09 08:30:37 PM UTC 24 |
Oct 09 08:31:10 PM UTC 24 |
565739100 ps |
T802 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict_all_en.2749094655 |
|
|
Oct 09 08:30:26 PM UTC 24 |
Oct 09 08:31:17 PM UTC 24 |
35778400 ps |
T803 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_mp_regions.3625576781 |
|
|
Oct 09 08:27:23 PM UTC 24 |
Oct 09 08:31:19 PM UTC 24 |
10691425800 ps |
T804 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_disable.1707175299 |
|
|
Oct 09 08:30:58 PM UTC 24 |
Oct 09 08:31:28 PM UTC 24 |
10965000 ps |
T805 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_connect.2976494199 |
|
|
Oct 09 08:31:03 PM UTC 24 |
Oct 09 08:31:32 PM UTC 24 |
17204900 ps |
T806 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict_all_en.3848505666 |
|
|
Oct 09 08:30:58 PM UTC 24 |
Oct 09 08:31:37 PM UTC 24 |
66758200 ps |
T807 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_alert_test.1146536292 |
|
|
Oct 09 08:31:07 PM UTC 24 |
Oct 09 08:31:39 PM UTC 24 |
87394400 ps |
T808 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict.2391486118 |
|
|
Oct 09 08:30:54 PM UTC 24 |
Oct 09 08:31:42 PM UTC 24 |
30972800 ps |
T809 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_sec_info_access.996158622 |
|
|
Oct 09 08:30:28 PM UTC 24 |
Oct 09 08:31:45 PM UTC 24 |
2279973100 ps |
T810 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd_slow_flash.3048459075 |
|
|
Oct 09 08:29:02 PM UTC 24 |
Oct 09 08:31:47 PM UTC 24 |
5989749100 ps |
T301 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_hw_sec_otp.2504307722 |
|
|
Oct 09 08:30:00 PM UTC 24 |
Oct 09 08:31:50 PM UTC 24 |
3064954200 ps |
T811 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_smoke.2055313161 |
|
|
Oct 09 08:29:27 PM UTC 24 |
Oct 09 08:31:52 PM UTC 24 |
94167200 ps |
T812 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_prog_reset.2671519076 |
|
|
Oct 09 08:31:33 PM UTC 24 |
Oct 09 08:31:56 PM UTC 24 |
19301600 ps |
T813 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd.468742261 |
|
|
Oct 09 08:28:59 PM UTC 24 |
Oct 09 08:32:10 PM UTC 24 |
1491183800 ps |
T814 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_disable.186417397 |
|
|
Oct 09 08:31:43 PM UTC 24 |
Oct 09 08:32:16 PM UTC 24 |
10837600 ps |
T815 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_alert_test.3809741693 |
|
|
Oct 09 08:31:51 PM UTC 24 |
Oct 09 08:32:16 PM UTC 24 |
41733100 ps |
T816 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_connect.1680717481 |
|
|
Oct 09 08:31:48 PM UTC 24 |
Oct 09 08:32:18 PM UTC 24 |
27544000 ps |
T817 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_hw_sec_otp.3966487783 |
|
|
Oct 09 08:31:10 PM UTC 24 |
Oct 09 08:32:25 PM UTC 24 |
1816957700 ps |
T818 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_smoke.1995473666 |
|
|
Oct 09 08:29:57 PM UTC 24 |
Oct 09 08:32:27 PM UTC 24 |
32998700 ps |
T819 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict_all_en.3802156129 |
|
|
Oct 09 08:31:40 PM UTC 24 |
Oct 09 08:32:30 PM UTC 24 |
76040500 ps |
T820 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_sec_info_access.3867596112 |
|
|
Oct 09 08:31:03 PM UTC 24 |
Oct 09 08:32:36 PM UTC 24 |
1428655800 ps |
T821 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_prog_rma_wipe_err.3783036149 |
|
|
Oct 09 08:28:48 PM UTC 24 |
Oct 09 08:32:37 PM UTC 24 |
10012152400 ps |
T822 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_otp_reset.3120566425 |
|
|
Oct 09 08:28:59 PM UTC 24 |
Oct 09 08:32:37 PM UTC 24 |
278822000 ps |
T823 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd_slow_flash.2179076946 |
|
|
Oct 09 08:29:41 PM UTC 24 |
Oct 09 08:32:37 PM UTC 24 |
11294420600 ps |
T824 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict.4189250105 |
|
|
Oct 09 08:31:38 PM UTC 24 |
Oct 09 08:32:42 PM UTC 24 |
43012500 ps |
T825 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_otp_reset.1699513859 |
|
|
Oct 09 08:29:33 PM UTC 24 |
Oct 09 08:32:44 PM UTC 24 |
39734900 ps |
T826 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd.704997136 |
|
|
Oct 09 08:29:38 PM UTC 24 |
Oct 09 08:32:50 PM UTC 24 |
1412687700 ps |
T827 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_smoke.2792074961 |
|
|
Oct 09 08:30:37 PM UTC 24 |
Oct 09 08:32:55 PM UTC 24 |
24935900 ps |
T828 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_rma_reset.3079758006 |
|
|
Oct 09 08:17:47 PM UTC 24 |
Oct 09 08:32:57 PM UTC 24 |
40123454600 ps |
T829 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_connect.1370552609 |
|
|
Oct 09 08:32:38 PM UTC 24 |
Oct 09 08:32:58 PM UTC 24 |
21021300 ps |
T830 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_sec_info_access.855545935 |
|
|
Oct 09 08:31:46 PM UTC 24 |
Oct 09 08:32:59 PM UTC 24 |
4394977200 ps |
T831 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_disable.3237973166 |
|
|
Oct 09 08:32:31 PM UTC 24 |
Oct 09 08:33:01 PM UTC 24 |
17035600 ps |
T832 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_alert_test.1686283558 |
|
|
Oct 09 08:32:38 PM UTC 24 |
Oct 09 08:33:03 PM UTC 24 |
111389100 ps |
T172 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_otp_reset.1672408646 |
|
|
Oct 09 08:30:02 PM UTC 24 |
Oct 09 08:33:09 PM UTC 24 |
51787500 ps |
T833 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_smoke.178501063 |
|
|
Oct 09 08:28:51 PM UTC 24 |
Oct 09 08:33:10 PM UTC 24 |
34816300 ps |
T834 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_intr_rd_slow_flash.871897458 |
|
|
Oct 09 08:30:42 PM UTC 24 |
Oct 09 08:33:15 PM UTC 24 |
6008273300 ps |
T835 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict.3250546654 |
|
|
Oct 09 08:32:25 PM UTC 24 |
Oct 09 08:33:17 PM UTC 24 |
29116800 ps |
T836 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict_all_en.648079964 |
|
|
Oct 09 08:32:29 PM UTC 24 |
Oct 09 08:33:24 PM UTC 24 |
30122100 ps |
T837 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_prog_reset.17352566 |
|
|
Oct 09 08:32:58 PM UTC 24 |
Oct 09 08:33:27 PM UTC 24 |
32251200 ps |
T838 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_disable.3674947879 |
|
|
Oct 09 08:33:01 PM UTC 24 |
Oct 09 08:33:30 PM UTC 24 |
12093900 ps |
T839 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_alert_test.2128430396 |
|
|
Oct 09 08:33:12 PM UTC 24 |
Oct 09 08:33:30 PM UTC 24 |
121579500 ps |
T840 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd.1920869242 |
|
|
Oct 09 08:31:20 PM UTC 24 |
Oct 09 08:33:35 PM UTC 24 |
568462300 ps |
T841 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_hw_sec_otp.1677101510 |
|
|
Oct 09 08:32:43 PM UTC 24 |
Oct 09 08:33:36 PM UTC 24 |
2177452200 ps |
T842 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_connect.2493070255 |
|
|
Oct 09 08:33:11 PM UTC 24 |
Oct 09 08:33:36 PM UTC 24 |
44099300 ps |
T843 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw.1451486787 |
|
|
Oct 09 08:24:26 PM UTC 24 |
Oct 09 08:33:38 PM UTC 24 |
19557594400 ps |
T844 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_smoke.2481193218 |
|
|
Oct 09 08:31:53 PM UTC 24 |
Oct 09 08:33:40 PM UTC 24 |
20080300 ps |
T845 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_hw_sec_otp.3847792074 |
|
|
Oct 09 08:31:57 PM UTC 24 |
Oct 09 08:33:41 PM UTC 24 |
789742400 ps |
T846 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw.3567484908 |
|
|
Oct 09 08:26:20 PM UTC 24 |
Oct 09 08:33:47 PM UTC 24 |
29906511000 ps |
T847 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict_all_en.3575805500 |
|
|
Oct 09 08:33:00 PM UTC 24 |
Oct 09 08:33:52 PM UTC 24 |
42004800 ps |
T848 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_rma_reset.1956460837 |
|
|
Oct 09 08:20:04 PM UTC 24 |
Oct 09 08:33:53 PM UTC 24 |
40124323600 ps |
T849 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_connect.3974220546 |
|
|
Oct 09 08:33:41 PM UTC 24 |
Oct 09 08:34:00 PM UTC 24 |
40857200 ps |
T850 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_prog_reset.2421546344 |
|
|
Oct 09 08:33:32 PM UTC 24 |
Oct 09 08:34:01 PM UTC 24 |
196528500 ps |
T851 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd_slow_flash.1508826851 |
|
|
Oct 09 08:28:00 PM UTC 24 |
Oct 09 08:34:02 PM UTC 24 |
25811836400 ps |
T852 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict.2042643903 |
|
|
Oct 09 08:32:59 PM UTC 24 |
Oct 09 08:34:02 PM UTC 24 |
30958200 ps |
T853 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_otp_reset.3152979082 |
|
|
Oct 09 08:30:39 PM UTC 24 |
Oct 09 08:34:02 PM UTC 24 |
43415000 ps |
T854 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_full_mem_access.4227202607 |
|
|
Oct 09 07:43:49 PM UTC 24 |
Oct 09 08:34:05 PM UTC 24 |
181603300700 ps |
T855 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_hw_sec_otp.2137654684 |
|
|
Oct 09 08:33:18 PM UTC 24 |
Oct 09 08:34:06 PM UTC 24 |
6943258600 ps |
T856 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_alert_test.1403874196 |
|
|
Oct 09 08:33:42 PM UTC 24 |
Oct 09 08:34:10 PM UTC 24 |
59065000 ps |
T857 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_prog_reset.4013614978 |
|
|
Oct 09 08:30:53 PM UTC 24 |
Oct 09 08:34:12 PM UTC 24 |
8669832400 ps |
T858 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_disable.1866958050 |
|
|
Oct 09 08:33:37 PM UTC 24 |
Oct 09 08:34:12 PM UTC 24 |
13315100 ps |
T859 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict.2848528926 |
|
|
Oct 09 08:33:36 PM UTC 24 |
Oct 09 08:34:15 PM UTC 24 |
60042800 ps |
T860 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_sec_info_access.548915093 |
|
|
Oct 09 08:32:37 PM UTC 24 |
Oct 09 08:34:19 PM UTC 24 |
1300996300 ps |
T861 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict_all_en.4079327441 |
|
|
Oct 09 08:33:37 PM UTC 24 |
Oct 09 08:34:21 PM UTC 24 |
70060300 ps |
T862 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd_slow_flash.3419445779 |
|
|
Oct 09 08:31:28 PM UTC 24 |
Oct 09 08:34:25 PM UTC 24 |
11809495900 ps |
T863 |
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1723713900 ps |