| T669 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_invalid_op.1393442737 |
|
|
Feb 09 05:57:48 AM UTC 25 |
Feb 09 05:59:36 AM UTC 25 |
9859745200 ps |
| T670 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_connect.1465274501 |
|
|
Feb 09 05:59:13 AM UTC 25 |
Feb 09 05:59:38 AM UTC 25 |
98072300 ps |
| T671 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_read_seed_err.955000989 |
|
|
Feb 09 05:59:24 AM UTC 25 |
Feb 09 05:59:49 AM UTC 25 |
42595300 ps |
| T173 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_rma_reset.4023956237 |
|
|
Feb 09 05:46:26 AM UTC 25 |
Feb 09 05:59:53 AM UTC 25 |
40121685300 ps |
| T672 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_alert_test.953262053 |
|
|
Feb 09 05:59:28 AM UTC 25 |
Feb 09 06:00:00 AM UTC 25 |
139144000 ps |
| T146 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_full_mem_access.1527964291 |
|
|
Feb 09 05:18:20 AM UTC 25 |
Feb 09 06:00:08 AM UTC 25 |
91890875500 ps |
| T673 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_ro.1847948596 |
|
|
Feb 09 05:57:54 AM UTC 25 |
Feb 09 06:00:09 AM UTC 25 |
576196100 ps |
| T674 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_wo.1301228446 |
|
|
Feb 09 05:57:49 AM UTC 25 |
Feb 09 06:00:12 AM UTC 25 |
1798121500 ps |
| T675 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw.1805383822 |
|
|
Feb 09 05:53:11 AM UTC 25 |
Feb 09 06:00:16 AM UTC 25 |
8758142000 ps |
| T676 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_prog_rma_wipe_err.1767906738 |
|
|
Feb 09 05:59:26 AM UTC 25 |
Feb 09 06:00:19 AM UTC 25 |
10035140000 ps |
| T677 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_sec_otp.3461131941 |
|
|
Feb 09 05:57:39 AM UTC 25 |
Feb 09 06:00:22 AM UTC 25 |
2223411100 ps |
| T678 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_mp_regions.3131298067 |
|
|
Feb 09 05:57:46 AM UTC 25 |
Feb 09 06:00:23 AM UTC 25 |
1429554300 ps |
| T679 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_sec_info_access.372505930 |
|
|
Feb 09 05:59:08 AM UTC 25 |
Feb 09 06:00:24 AM UTC 25 |
1695779500 ps |
| T164 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_mp_regions.3592660515 |
|
|
Feb 09 05:52:31 AM UTC 25 |
Feb 09 06:00:31 AM UTC 25 |
6314998600 ps |
| T188 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_otp_reset.2827924775 |
|
|
Feb 09 05:57:46 AM UTC 25 |
Feb 09 06:00:31 AM UTC 25 |
38848400 ps |
| T680 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd.2488390098 |
|
|
Feb 09 05:58:16 AM UTC 25 |
Feb 09 06:00:36 AM UTC 25 |
803701700 ps |
| T681 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_phy_arb.2253215033 |
|
|
Feb 09 05:57:37 AM UTC 25 |
Feb 09 06:00:41 AM UTC 25 |
32104900 ps |
| T682 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_smoke.2922930387 |
|
|
Feb 09 05:57:37 AM UTC 25 |
Feb 09 06:00:44 AM UTC 25 |
109730400 ps |
| T683 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_prog_reset.1455354401 |
|
|
Feb 09 06:00:26 AM UTC 25 |
Feb 09 06:00:52 AM UTC 25 |
34119100 ps |
| T199 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_host_ctrl_arb.386718765 |
|
|
Feb 09 05:17:59 AM UTC 25 |
Feb 09 06:01:00 AM UTC 25 |
384426966500 ps |
| T684 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_stress_all.1408041478 |
|
|
Feb 09 05:23:10 AM UTC 25 |
Feb 09 06:01:03 AM UTC 25 |
680979600 ps |
| T685 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict.4033774199 |
|
|
Feb 09 06:00:26 AM UTC 25 |
Feb 09 06:01:05 AM UTC 25 |
41474200 ps |
| T431 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_re_evict.2272323933 |
|
|
Feb 09 06:00:33 AM UTC 25 |
Feb 09 06:01:11 AM UTC 25 |
147710100 ps |
| T686 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_connect.403272209 |
|
|
Feb 09 06:00:45 AM UTC 25 |
Feb 09 06:01:11 AM UTC 25 |
16471600 ps |
| T687 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict_all_en.1343901034 |
|
|
Feb 09 06:00:33 AM UTC 25 |
Feb 09 06:01:18 AM UTC 25 |
29041100 ps |
| T688 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_disable.2136379841 |
|
|
Feb 09 06:00:37 AM UTC 25 |
Feb 09 06:01:19 AM UTC 25 |
21940800 ps |
| T689 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_lcmgr_intg.3419120495 |
|
|
Feb 09 06:00:53 AM UTC 25 |
Feb 09 06:01:21 AM UTC 25 |
27405700 ps |
| T165 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_full_mem_access.1353682367 |
|
|
Feb 09 05:04:42 AM UTC 25 |
Feb 09 06:01:25 AM UTC 25 |
62607132100 ps |
| T690 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_read_seed_err.924938897 |
|
|
Feb 09 06:01:01 AM UTC 25 |
Feb 09 06:01:27 AM UTC 25 |
25586800 ps |
| T147 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_mp_regions.1676050775 |
|
|
Feb 09 05:46:35 AM UTC 25 |
Feb 09 06:01:29 AM UTC 25 |
12275289800 ps |
| T691 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_alert_test.869588297 |
|
|
Feb 09 06:01:05 AM UTC 25 |
Feb 09 06:01:31 AM UTC 25 |
92291100 ps |
| T692 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_invalid_op.3732484758 |
|
|
Feb 09 06:00:24 AM UTC 25 |
Feb 09 06:01:32 AM UTC 25 |
2246846200 ps |
| T412 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_sec_info_access.635094684 |
|
|
Feb 09 06:00:42 AM UTC 25 |
Feb 09 06:01:50 AM UTC 25 |
772587400 ps |
| T693 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_sec_otp.1747432285 |
|
|
Feb 09 05:59:39 AM UTC 25 |
Feb 09 06:01:53 AM UTC 25 |
24406013100 ps |
| T694 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_prog_rma_wipe_err.2550580569 |
|
|
Feb 09 06:01:04 AM UTC 25 |
Feb 09 06:02:13 AM UTC 25 |
10032618300 ps |
| T695 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_ro.14334 |
|
|
Feb 09 06:00:24 AM UTC 25 |
Feb 09 06:02:22 AM UTC 25 |
5504740600 ps |
| T696 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw.3228976398 |
|
|
Feb 09 05:55:26 AM UTC 25 |
Feb 09 06:02:28 AM UTC 25 |
15620599500 ps |
| T697 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_smoke.3347598080 |
|
|
Feb 09 05:59:35 AM UTC 25 |
Feb 09 06:02:37 AM UTC 25 |
27632400 ps |
| T698 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_wo.1915362348 |
|
|
Feb 09 06:00:24 AM UTC 25 |
Feb 09 06:02:40 AM UTC 25 |
7899689500 ps |
| T189 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_otp_reset.4225119255 |
|
|
Feb 09 05:59:54 AM UTC 25 |
Feb 09 06:02:48 AM UTC 25 |
75877300 ps |
| T699 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_prog_reset.3154013378 |
|
|
Feb 09 06:02:23 AM UTC 25 |
Feb 09 06:02:50 AM UTC 25 |
34850100 ps |
| T148 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_mp_regions.2130340503 |
|
|
Feb 09 05:55:08 AM UTC 25 |
Feb 09 06:03:01 AM UTC 25 |
8077666100 ps |
| T700 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_invalid_op.4155007093 |
|
|
Feb 09 06:01:32 AM UTC 25 |
Feb 09 06:03:02 AM UTC 25 |
4051671000 ps |
| T701 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict_all_en.3479013498 |
|
|
Feb 09 06:02:38 AM UTC 25 |
Feb 09 06:03:19 AM UTC 25 |
29861000 ps |
| T702 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_lcmgr_intg.2026998491 |
|
|
Feb 09 06:03:02 AM UTC 25 |
Feb 09 06:03:26 AM UTC 25 |
31002200 ps |
| T703 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_re_evict.2394069279 |
|
|
Feb 09 06:02:41 AM UTC 25 |
Feb 09 06:03:26 AM UTC 25 |
122182100 ps |
| T704 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_connect.79007178 |
|
|
Feb 09 06:03:02 AM UTC 25 |
Feb 09 06:03:26 AM UTC 25 |
46259100 ps |
| T705 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_ro.1892078531 |
|
|
Feb 09 06:01:33 AM UTC 25 |
Feb 09 06:03:32 AM UTC 25 |
4881691300 ps |
| T119 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_disable.2931613896 |
|
|
Feb 09 06:02:50 AM UTC 25 |
Feb 09 06:03:34 AM UTC 25 |
11246400 ps |
| T706 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_mp_regions.2669678398 |
|
|
Feb 09 06:00:01 AM UTC 25 |
Feb 09 06:03:36 AM UTC 25 |
4875211200 ps |
| T707 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_read_seed_err.1378372124 |
|
|
Feb 09 06:03:21 AM UTC 25 |
Feb 09 06:03:42 AM UTC 25 |
15187200 ps |
| T708 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_error_prog_win.3857816403 |
|
|
Feb 09 05:43:07 AM UTC 25 |
Feb 09 06:03:43 AM UTC 25 |
323831400 ps |
| T709 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_alert_test.1030312871 |
|
|
Feb 09 06:03:27 AM UTC 25 |
Feb 09 06:03:45 AM UTC 25 |
213724900 ps |
| T710 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_mp_regions.2295218055 |
|
|
Feb 09 06:01:32 AM UTC 25 |
Feb 09 06:03:51 AM UTC 25 |
5697199500 ps |
| T711 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_sec_otp.3834733680 |
|
|
Feb 09 06:01:20 AM UTC 25 |
Feb 09 06:03:56 AM UTC 25 |
24571265200 ps |
| T712 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rand_ops.3965199256 |
|
|
Feb 09 05:59:36 AM UTC 25 |
Feb 09 06:04:02 AM UTC 25 |
131476500 ps |
| T713 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd_slow_flash.101567423 |
|
|
Feb 09 06:00:26 AM UTC 25 |
Feb 09 06:04:06 AM UTC 25 |
46622642000 ps |
| T425 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_sec_info_access.3390067246 |
|
|
Feb 09 06:02:52 AM UTC 25 |
Feb 09 06:04:11 AM UTC 25 |
2446691800 ps |
| T714 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_otp_reset.847809432 |
|
|
Feb 09 06:01:30 AM UTC 25 |
Feb 09 06:04:21 AM UTC 25 |
45719600 ps |
| T193 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_rma_reset.726343189 |
|
|
Feb 09 05:49:53 AM UTC 25 |
Feb 09 06:04:31 AM UTC 25 |
270228591600 ps |
| T715 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_prog_reset.823342801 |
|
|
Feb 09 06:04:22 AM UTC 25 |
Feb 09 06:04:46 AM UTC 25 |
32282600 ps |
| T360 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd.936287850 |
|
|
Feb 09 06:00:26 AM UTC 25 |
Feb 09 06:04:52 AM UTC 25 |
2395773700 ps |
| T716 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_smoke.2366381322 |
|
|
Feb 09 06:01:11 AM UTC 25 |
Feb 09 06:05:00 AM UTC 25 |
61185600 ps |
| T282 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_mp.4149532105 |
|
|
Feb 09 05:11:49 AM UTC 25 |
Feb 09 06:05:02 AM UTC 25 |
7105261900 ps |
| T717 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_wo.2664657545 |
|
|
Feb 09 06:01:32 AM UTC 25 |
Feb 09 06:05:09 AM UTC 25 |
8399042500 ps |
| T718 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_invalid_op.3385675473 |
|
|
Feb 09 06:03:46 AM UTC 25 |
Feb 09 06:05:12 AM UTC 25 |
3424480400 ps |
| T719 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_smoke.15147288 |
|
|
Feb 09 06:05:35 AM UTC 25 |
Feb 09 06:10:45 AM UTC 25 |
127800200 ps |
| T720 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd_slow_flash.4281072970 |
|
|
Feb 09 05:58:20 AM UTC 25 |
Feb 09 06:05:20 AM UTC 25 |
193992871700 ps |
| T721 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict_all_en.465919880 |
|
|
Feb 09 06:04:46 AM UTC 25 |
Feb 09 06:05:27 AM UTC 25 |
46894700 ps |
| T722 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict.3556078384 |
|
|
Feb 09 06:04:32 AM UTC 25 |
Feb 09 06:05:32 AM UTC 25 |
138025900 ps |
| T723 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_connect.3231760378 |
|
|
Feb 09 06:05:10 AM UTC 25 |
Feb 09 06:05:34 AM UTC 25 |
47804800 ps |
| T724 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_lcmgr_intg.1702288668 |
|
|
Feb 09 06:05:13 AM UTC 25 |
Feb 09 06:05:37 AM UTC 25 |
64593700 ps |
| T725 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_disable.3001551583 |
|
|
Feb 09 06:05:01 AM UTC 25 |
Feb 09 06:05:40 AM UTC 25 |
43104600 ps |
| T726 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_read_seed_err.1810430317 |
|
|
Feb 09 06:05:21 AM UTC 25 |
Feb 09 06:05:44 AM UTC 25 |
25385700 ps |
| T727 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_ro.273779618 |
|
|
Feb 09 06:03:58 AM UTC 25 |
Feb 09 06:05:51 AM UTC 25 |
2213000200 ps |
| T728 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_rma_reset.611889346 |
|
|
Feb 09 05:52:18 AM UTC 25 |
Feb 09 06:05:53 AM UTC 25 |
40124488600 ps |
| T729 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_sec_otp.295515927 |
|
|
Feb 09 06:03:35 AM UTC 25 |
Feb 09 06:05:57 AM UTC 25 |
13816466100 ps |
| T730 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_alert_test.1031835497 |
|
|
Feb 09 06:05:33 AM UTC 25 |
Feb 09 06:05:57 AM UTC 25 |
99025900 ps |
| T731 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_re_evict.4214426912 |
|
|
Feb 09 06:04:53 AM UTC 25 |
Feb 09 06:06:01 AM UTC 25 |
101889400 ps |
| T732 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_smoke.96433639 |
|
|
Feb 09 06:03:27 AM UTC 25 |
Feb 09 06:06:04 AM UTC 25 |
190100500 ps |
| T733 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw.1159247373 |
|
|
Feb 09 05:58:01 AM UTC 25 |
Feb 09 06:06:05 AM UTC 25 |
49657261100 ps |
| T734 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_prog_rma_wipe_err.986298905 |
|
|
Feb 09 06:03:23 AM UTC 25 |
Feb 09 06:06:16 AM UTC 25 |
10013935800 ps |
| T735 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_phy_arb.2941691755 |
|
|
Feb 09 06:01:19 AM UTC 25 |
Feb 09 06:06:17 AM UTC 25 |
701503700 ps |
| T349 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd.153965669 |
|
|
Feb 09 06:01:54 AM UTC 25 |
Feb 09 06:06:29 AM UTC 25 |
8368201100 ps |
| T736 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_error_prog_win.1477827207 |
|
|
Feb 09 05:46:51 AM UTC 25 |
Feb 09 06:06:37 AM UTC 25 |
731716100 ps |
| T422 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_sec_info_access.2397573073 |
|
|
Feb 09 06:05:03 AM UTC 25 |
Feb 09 06:06:38 AM UTC 25 |
2532461000 ps |
| T737 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd.1674480627 |
|
|
Feb 09 06:04:07 AM UTC 25 |
Feb 09 06:06:41 AM UTC 25 |
453317000 ps |
| T738 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_wo.7218785 |
|
|
Feb 09 06:03:52 AM UTC 25 |
Feb 09 06:06:54 AM UTC 25 |
3752440800 ps |
| T739 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_invalid_op.3670511778 |
|
|
Feb 09 06:05:58 AM UTC 25 |
Feb 09 06:06:54 AM UTC 25 |
1581539600 ps |
| T122 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_disable.1478009153 |
|
|
Feb 09 06:06:42 AM UTC 25 |
Feb 09 06:07:21 AM UTC 25 |
11152800 ps |
| T740 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_phy_arb.3845398116 |
|
|
Feb 09 05:54:56 AM UTC 25 |
Feb 09 06:07:21 AM UTC 25 |
2784759400 ps |
| T741 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_connect.451872677 |
|
|
Feb 09 06:06:55 AM UTC 25 |
Feb 09 06:07:24 AM UTC 25 |
17098900 ps |
| T742 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict.1633875527 |
|
|
Feb 09 06:06:30 AM UTC 25 |
Feb 09 06:07:25 AM UTC 25 |
31773900 ps |
| T743 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict_all_en.322110182 |
|
|
Feb 09 06:06:38 AM UTC 25 |
Feb 09 06:07:32 AM UTC 25 |
32152900 ps |
| T432 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_re_evict.1357698936 |
|
|
Feb 09 06:06:39 AM UTC 25 |
Feb 09 06:07:35 AM UTC 25 |
66740600 ps |
| T744 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rand_ops.301163234 |
|
|
Feb 09 05:46:15 AM UTC 25 |
Feb 09 06:07:39 AM UTC 25 |
136244300 ps |
| T745 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_read_seed_err.3990463085 |
|
|
Feb 09 06:07:22 AM UTC 25 |
Feb 09 06:07:49 AM UTC 25 |
14940600 ps |
| T746 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_lcmgr_intg.2676833281 |
|
|
Feb 09 06:07:22 AM UTC 25 |
Feb 09 06:07:50 AM UTC 25 |
15327300 ps |
| T747 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_ro.4142709138 |
|
|
Feb 09 06:06:01 AM UTC 25 |
Feb 09 06:07:51 AM UTC 25 |
989248900 ps |
| T748 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_alert_test.4269215113 |
|
|
Feb 09 06:07:26 AM UTC 25 |
Feb 09 06:07:52 AM UTC 25 |
33171800 ps |
| T749 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_otp_reset.299469327 |
|
|
Feb 09 06:03:43 AM UTC 25 |
Feb 09 06:07:56 AM UTC 25 |
139576000 ps |
| T750 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rand_ops.223137679 |
|
|
Feb 09 05:52:05 AM UTC 25 |
Feb 09 06:07:57 AM UTC 25 |
786304600 ps |
| T330 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_sec_otp.2788188523 |
|
|
Feb 09 06:05:45 AM UTC 25 |
Feb 09 06:08:02 AM UTC 25 |
13988797500 ps |
| T356 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd_slow_flash.411469059 |
|
|
Feb 09 06:02:14 AM UTC 25 |
Feb 09 06:08:12 AM UTC 25 |
73265632300 ps |
| T751 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rand_ops.479807901 |
|
|
Feb 09 06:03:27 AM UTC 25 |
Feb 09 06:08:13 AM UTC 25 |
91246100 ps |
| T752 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw.1482247625 |
|
|
Feb 09 06:00:26 AM UTC 25 |
Feb 09 06:08:14 AM UTC 25 |
7270533100 ps |
| T753 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_wo.4290650366 |
|
|
Feb 09 06:05:58 AM UTC 25 |
Feb 09 06:08:15 AM UTC 25 |
7720635700 ps |
| T754 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rand_ops.522844961 |
|
|
Feb 09 05:37:47 AM UTC 25 |
Feb 09 06:08:31 AM UTC 25 |
7719202400 ps |
| T755 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_rma_reset.4232631166 |
|
|
Feb 09 05:55:04 AM UTC 25 |
Feb 09 06:08:31 AM UTC 25 |
40126368700 ps |
| T180 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_otp_reset.3132571977 |
|
|
Feb 09 06:05:52 AM UTC 25 |
Feb 09 06:08:38 AM UTC 25 |
75487600 ps |
| T756 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_prog_rma_wipe_err.1243549115 |
|
|
Feb 09 06:07:25 AM UTC 25 |
Feb 09 06:08:38 AM UTC 25 |
10139162100 ps |
| T757 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_phy_arb.3246956981 |
|
|
Feb 09 06:03:32 AM UTC 25 |
Feb 09 06:08:39 AM UTC 25 |
392682100 ps |
| T758 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw.769118437 |
|
|
Feb 09 06:01:51 AM UTC 25 |
Feb 09 06:08:44 AM UTC 25 |
3296673300 ps |
| T759 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_prog_reset.2831778393 |
|
|
Feb 09 06:08:15 AM UTC 25 |
Feb 09 06:08:46 AM UTC 25 |
45001100 ps |
| T416 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_sec_info_access.1177234556 |
|
|
Feb 09 06:06:55 AM UTC 25 |
Feb 09 06:08:49 AM UTC 25 |
2206723300 ps |
| T760 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_full_mem_access.1429161098 |
|
|
Feb 09 05:25:14 AM UTC 25 |
Feb 09 06:08:58 AM UTC 25 |
193639998300 ps |
| T761 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_smoke.3996940449 |
|
|
Feb 09 06:07:33 AM UTC 25 |
Feb 09 06:09:02 AM UTC 25 |
48838000 ps |
| T762 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd_slow_flash.2931325369 |
|
|
Feb 09 06:06:17 AM UTC 25 |
Feb 09 06:09:03 AM UTC 25 |
23524677400 ps |
| T763 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_connect.3638391260 |
|
|
Feb 09 06:08:45 AM UTC 25 |
Feb 09 06:09:07 AM UTC 25 |
44439900 ps |
| T764 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_phy_arb.1529344768 |
|
|
Feb 09 06:07:40 AM UTC 25 |
Feb 09 06:09:10 AM UTC 25 |
49223500 ps |
| T765 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_lcmgr_intg.384873911 |
|
|
Feb 09 06:08:46 AM UTC 25 |
Feb 09 06:09:13 AM UTC 25 |
80704000 ps |
| T766 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd_slow_flash.704841197 |
|
|
Feb 09 06:04:12 AM UTC 25 |
Feb 09 06:09:14 AM UTC 25 |
10876568100 ps |
| T767 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_read_seed_err.3942707007 |
|
|
Feb 09 06:08:50 AM UTC 25 |
Feb 09 06:09:15 AM UTC 25 |
27936900 ps |
| T106 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_prog_type.3377382530 |
|
|
Feb 09 05:11:37 AM UTC 25 |
Feb 09 06:09:16 AM UTC 25 |
949534600 ps |
| T120 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_disable.749946460 |
|
|
Feb 09 06:08:39 AM UTC 25 |
Feb 09 06:09:19 AM UTC 25 |
39676200 ps |
| T458 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict.3728959204 |
|
|
Feb 09 06:08:32 AM UTC 25 |
Feb 09 06:09:19 AM UTC 25 |
51778200 ps |
| T768 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_re_evict.4237428175 |
|
|
Feb 09 06:08:39 AM UTC 25 |
Feb 09 06:09:19 AM UTC 25 |
56262900 ps |
| T769 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_invalid_op.845993206 |
|
|
Feb 09 06:07:57 AM UTC 25 |
Feb 09 06:09:20 AM UTC 25 |
5937617300 ps |
| T770 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_alert_test.79734363 |
|
|
Feb 09 06:09:08 AM UTC 25 |
Feb 09 06:09:25 AM UTC 25 |
210885100 ps |
| T771 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict_all_en.3387758220 |
|
|
Feb 09 06:08:32 AM UTC 25 |
Feb 09 06:09:26 AM UTC 25 |
31392700 ps |
| T772 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_prog_reset.1292461959 |
|
|
Feb 09 06:06:18 AM UTC 25 |
Feb 09 06:09:39 AM UTC 25 |
2146584900 ps |
| T773 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_ro.3434129919 |
|
|
Feb 09 06:08:02 AM UTC 25 |
Feb 09 06:09:41 AM UTC 25 |
1175402400 ps |
| T774 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_prog_rma_wipe_err.1949107857 |
|
|
Feb 09 06:05:28 AM UTC 25 |
Feb 09 06:09:47 AM UTC 25 |
10011639900 ps |
| T775 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_sec_otp.3143273604 |
|
|
Feb 09 06:07:49 AM UTC 25 |
Feb 09 06:09:52 AM UTC 25 |
3115984800 ps |
| T411 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_sec_info_access.3912078055 |
|
|
Feb 09 06:08:40 AM UTC 25 |
Feb 09 06:10:02 AM UTC 25 |
2175627300 ps |
| T776 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_prog_reset.3256334448 |
|
|
Feb 09 06:09:40 AM UTC 25 |
Feb 09 06:10:09 AM UTC 25 |
101560200 ps |
| T777 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd.1210914363 |
|
|
Feb 09 06:06:06 AM UTC 25 |
Feb 09 06:10:13 AM UTC 25 |
3394820200 ps |
| T778 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_smoke.1957324212 |
|
|
Feb 09 06:09:08 AM UTC 25 |
Feb 09 06:10:18 AM UTC 25 |
63577900 ps |
| T779 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict.1884296316 |
|
|
Feb 09 06:09:42 AM UTC 25 |
Feb 09 06:10:26 AM UTC 25 |
76532400 ps |
| T214 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_host_ctrl_arb.83138875 |
|
|
Feb 09 05:25:09 AM UTC 25 |
Feb 09 06:10:29 AM UTC 25 |
570928844000 ps |
| T123 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_disable.1092422740 |
|
|
Feb 09 06:10:02 AM UTC 25 |
Feb 09 06:10:32 AM UTC 25 |
16044300 ps |
| T780 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_re_evict.892924035 |
|
|
Feb 09 06:09:53 AM UTC 25 |
Feb 09 06:10:33 AM UTC 25 |
74617800 ps |
| T781 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_lcmgr_intg.4161387653 |
|
|
Feb 09 06:10:19 AM UTC 25 |
Feb 09 06:10:44 AM UTC 25 |
29947800 ps |
| T149 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_mp_regions.2208885526 |
|
|
Feb 09 06:03:44 AM UTC 25 |
Feb 09 06:10:35 AM UTC 25 |
31606199600 ps |
| T782 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_prog_rma_wipe_err.2504599344 |
|
|
Feb 09 06:09:06 AM UTC 25 |
Feb 09 06:10:35 AM UTC 25 |
10048720100 ps |
| T783 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_connect.2456148874 |
|
|
Feb 09 06:10:14 AM UTC 25 |
Feb 09 06:10:38 AM UTC 25 |
13672700 ps |
| T784 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_invalid_op.1996385963 |
|
|
Feb 09 06:09:19 AM UTC 25 |
Feb 09 06:10:39 AM UTC 25 |
1554110900 ps |
| T785 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_error_mp.1280216722 |
|
|
Feb 09 05:18:49 AM UTC 25 |
Feb 09 06:10:41 AM UTC 25 |
3036280900 ps |
| T786 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_read_seed_err.2673345980 |
|
|
Feb 09 06:10:27 AM UTC 25 |
Feb 09 06:10:47 AM UTC 25 |
47004500 ps |
| T787 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_alert_test.2656572859 |
|
|
Feb 09 06:10:33 AM UTC 25 |
Feb 09 06:10:58 AM UTC 25 |
220489300 ps |
| T788 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rand_ops.2617149772 |
|
|
Feb 09 05:49:42 AM UTC 25 |
Feb 09 06:11:00 AM UTC 25 |
913276600 ps |
| T789 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw.839956596 |
|
|
Feb 09 06:04:03 AM UTC 25 |
Feb 09 06:11:01 AM UTC 25 |
9537961700 ps |
| T790 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_wo.2330609796 |
|
|
Feb 09 06:07:58 AM UTC 25 |
Feb 09 06:11:04 AM UTC 25 |
4559882000 ps |
| T107 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_ro.2503754744 |
|
|
Feb 09 06:09:21 AM UTC 25 |
Feb 09 06:11:05 AM UTC 25 |
1116715700 ps |
| T791 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_prog_reset.2269687279 |
|
|
Feb 09 06:10:40 AM UTC 25 |
Feb 09 06:11:06 AM UTC 25 |
21428500 ps |
| T181 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_otp_reset.843144646 |
|
|
Feb 09 06:07:52 AM UTC 25 |
Feb 09 06:11:12 AM UTC 25 |
37436300 ps |
| T792 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_sec_otp.4247399021 |
|
|
Feb 09 06:09:14 AM UTC 25 |
Feb 09 06:11:12 AM UTC 25 |
4250195800 ps |
| T793 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rand_ops.4128452690 |
|
|
Feb 09 05:54:55 AM UTC 25 |
Feb 09 06:11:18 AM UTC 25 |
219303700 ps |
| T794 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict.164821938 |
|
|
Feb 09 06:10:41 AM UTC 25 |
Feb 09 06:11:18 AM UTC 25 |
30051800 ps |
| T795 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_alert_test.3296726261 |
|
|
Feb 09 06:11:01 AM UTC 25 |
Feb 09 06:11:24 AM UTC 25 |
334305500 ps |
| T408 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_sec_info_access.3863207568 |
|
|
Feb 09 06:10:10 AM UTC 25 |
Feb 09 06:11:26 AM UTC 25 |
359231300 ps |
| T796 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_disable.154661620 |
|
|
Feb 09 06:10:47 AM UTC 25 |
Feb 09 06:11:27 AM UTC 25 |
10080400 ps |
| T797 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_phy_arb.2488124951 |
|
|
Feb 09 05:59:37 AM UTC 25 |
Feb 09 06:11:28 AM UTC 25 |
171733800 ps |
| T798 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_connect.2149948149 |
|
|
Feb 09 06:10:59 AM UTC 25 |
Feb 09 06:11:29 AM UTC 25 |
14386400 ps |
| T799 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_mp_regions.95540244 |
|
|
Feb 09 06:05:53 AM UTC 25 |
Feb 09 06:11:34 AM UTC 25 |
42648147800 ps |
| T800 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_prog_rma_wipe_err.1975148122 |
|
|
Feb 09 06:10:30 AM UTC 25 |
Feb 09 06:11:36 AM UTC 25 |
10062144400 ps |
| T801 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_prog_reset.1250276689 |
|
|
Feb 09 06:11:13 AM UTC 25 |
Feb 09 06:11:38 AM UTC 25 |
119560900 ps |
| T802 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_phy_arb.1149491319 |
|
|
Feb 09 06:09:11 AM UTC 25 |
Feb 09 06:11:38 AM UTC 25 |
63216200 ps |
| T803 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict_all_en.3612243533 |
|
|
Feb 09 06:10:45 AM UTC 25 |
Feb 09 06:11:39 AM UTC 25 |
54043400 ps |
| T419 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_sec_info_access.2763656999 |
|
|
Feb 09 06:10:48 AM UTC 25 |
Feb 09 06:11:50 AM UTC 25 |
566794600 ps |
| T804 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd_slow_flash.1427670837 |
|
|
Feb 09 06:08:15 AM UTC 25 |
Feb 09 06:11:55 AM UTC 25 |
23856228100 ps |
| T805 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_alert_test.368943772 |
|
|
Feb 09 06:11:29 AM UTC 25 |
Feb 09 06:11:57 AM UTC 25 |
48086300 ps |
| T806 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_connect.3047095300 |
|
|
Feb 09 06:11:28 AM UTC 25 |
Feb 09 06:11:57 AM UTC 25 |
50718500 ps |
| T357 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd.1890485879 |
|
|
Feb 09 06:08:13 AM UTC 25 |
Feb 09 06:11:59 AM UTC 25 |
3850117700 ps |
| T807 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict.2925925183 |
|
|
Feb 09 06:11:19 AM UTC 25 |
Feb 09 06:12:02 AM UTC 25 |
39902400 ps |
| T808 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_disable.2983129652 |
|
|
Feb 09 06:11:24 AM UTC 25 |
Feb 09 06:12:03 AM UTC 25 |
19258600 ps |
| T809 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd_slow_flash.397469268 |
|
|
Feb 09 06:09:27 AM UTC 25 |
Feb 09 06:12:07 AM UTC 25 |
24201175500 ps |
| T810 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_otp_reset.115415979 |
|
|
Feb 09 06:09:16 AM UTC 25 |
Feb 09 06:12:11 AM UTC 25 |
165105700 ps |
| T811 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict_all_en.3493289505 |
|
|
Feb 09 06:11:19 AM UTC 25 |
Feb 09 06:12:12 AM UTC 25 |
110839500 ps |
| T812 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_connect.3749363796 |
|
|
Feb 09 06:12:00 AM UTC 25 |
Feb 09 06:12:20 AM UTC 25 |
15528000 ps |
| T813 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_hw_sec_otp.2049815296 |
|
|
Feb 09 06:11:05 AM UTC 25 |
Feb 09 06:12:23 AM UTC 25 |
1547273600 ps |
| T814 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_mp_regions.2106991752 |
|
|
Feb 09 06:07:53 AM UTC 25 |
Feb 09 06:12:23 AM UTC 25 |
12095368700 ps |
| T815 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_alert_test.1886528934 |
|
|
Feb 09 06:12:03 AM UTC 25 |
Feb 09 06:12:26 AM UTC 25 |
220846500 ps |
| T816 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_prog_reset.3063423282 |
|
|
Feb 09 06:11:39 AM UTC 25 |
Feb 09 06:12:30 AM UTC 25 |
558588900 ps |
| T817 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_hw_sec_otp.390261346 |
|
|
Feb 09 06:10:34 AM UTC 25 |
Feb 09 06:12:32 AM UTC 25 |
8803805600 ps |
| T818 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_disable.1308889449 |
|
|
Feb 09 06:11:58 AM UTC 25 |
Feb 09 06:12:33 AM UTC 25 |
19760900 ps |
| T819 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_rma_reset.301163251 |
|
|
Feb 09 05:59:50 AM UTC 25 |
Feb 09 06:12:41 AM UTC 25 |
40122841600 ps |
| T820 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict.270360577 |
|
|
Feb 09 06:11:51 AM UTC 25 |
Feb 09 06:12:46 AM UTC 25 |
166476000 ps |
| T821 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict_all_en.3627401626 |
|
|
Feb 09 06:11:56 AM UTC 25 |
Feb 09 06:12:47 AM UTC 25 |
70194100 ps |
| T822 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_prog_reset.2881012179 |
|
|
Feb 09 06:12:23 AM UTC 25 |
Feb 09 06:12:49 AM UTC 25 |
20787800 ps |
| T823 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd.4172520632 |
|
|
Feb 09 06:09:26 AM UTC 25 |
Feb 09 06:12:50 AM UTC 25 |
1447953800 ps |
| T824 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_phy_arb.3626019063 |
|
|
Feb 09 06:05:41 AM UTC 25 |
Feb 09 06:12:53 AM UTC 25 |
1422553500 ps |
| T825 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_wo.94516282 |
|
|
Feb 09 06:09:19 AM UTC 25 |
Feb 09 06:12:55 AM UTC 25 |
17083577700 ps |
| T826 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_connect.1453740693 |
|
|
Feb 09 06:12:33 AM UTC 25 |
Feb 09 06:12:56 AM UTC 25 |
14635500 ps |
| T190 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_otp_reset.4249819545 |
|
|
Feb 09 06:10:37 AM UTC 25 |
Feb 09 06:13:01 AM UTC 25 |
143729000 ps |
| T827 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd.2626479352 |
|
|
Feb 09 06:10:37 AM UTC 25 |
Feb 09 06:13:02 AM UTC 25 |
2599734300 ps |
| T828 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_sec_info_access.4167991777 |
|
|
Feb 09 06:11:27 AM UTC 25 |
Feb 09 06:13:03 AM UTC 25 |
1250726000 ps |
| T829 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict.882708560 |
|
|
Feb 09 06:12:25 AM UTC 25 |
Feb 09 06:13:07 AM UTC 25 |
65513900 ps |
| T403 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_disable.3615049656 |
|
|
Feb 09 06:12:30 AM UTC 25 |
Feb 09 06:13:08 AM UTC 25 |
16589700 ps |
| T830 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_connect.2967943083 |
|
|
Feb 09 06:14:20 AM UTC 25 |
Feb 09 06:14:46 AM UTC 25 |
18877000 ps |
| T831 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_alert_test.1572832883 |
|
|
Feb 09 06:12:42 AM UTC 25 |
Feb 09 06:13:11 AM UTC 25 |
34993200 ps |
| T832 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_hw_sec_otp.1225468021 |
|
|
Feb 09 06:11:35 AM UTC 25 |
Feb 09 06:13:12 AM UTC 25 |
8267794900 ps |
| T833 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_rma_reset.4271019492 |
|
|
Feb 09 05:57:39 AM UTC 25 |
Feb 09 06:13:20 AM UTC 25 |
260225585900 ps |
| T834 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict_all_en.3276261528 |
|
|
Feb 09 06:12:27 AM UTC 25 |
Feb 09 06:13:21 AM UTC 25 |
26913300 ps |
| T835 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_sec_info_access.3993241652 |
|
|
Feb 09 06:11:58 AM UTC 25 |
Feb 09 06:13:27 AM UTC 25 |
2912033200 ps |
| T836 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_hw_sec_otp.3639996713 |
|
|
Feb 09 06:12:08 AM UTC 25 |
Feb 09 06:13:28 AM UTC 25 |
1877750800 ps |
| T837 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw.2343361118 |
|
|
Feb 09 06:06:05 AM UTC 25 |
Feb 09 06:13:32 AM UTC 25 |
6928189700 ps |
| T838 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_alert_test.965049257 |
|
|
Feb 09 06:13:09 AM UTC 25 |
Feb 09 06:13:35 AM UTC 25 |
35391400 ps |
| T839 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_disable.365640221 |
|
|
Feb 09 06:13:02 AM UTC 25 |
Feb 09 06:13:38 AM UTC 25 |
14337700 ps |
| T840 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_connect.692692090 |
|
|
Feb 09 06:13:08 AM UTC 25 |
Feb 09 06:13:38 AM UTC 25 |
17031400 ps |
| T841 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_smoke.3429976732 |
|
|
Feb 09 06:10:33 AM UTC 25 |
Feb 09 06:13:45 AM UTC 25 |
1595853400 ps |
| T436 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict_all_en.3293051600 |
|
|
Feb 09 06:13:02 AM UTC 25 |
Feb 09 06:13:47 AM UTC 25 |
105959800 ps |
| T842 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict.989205571 |
|
|
Feb 09 06:12:56 AM UTC 25 |
Feb 09 06:13:49 AM UTC 25 |
31438400 ps |
| T329 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_prog_reset.2540775030 |
|
|
Feb 09 06:13:28 AM UTC 25 |
Feb 09 06:13:53 AM UTC 25 |
36666600 ps |
| T413 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_sec_info_access.3381891919 |
|
|
Feb 09 06:12:32 AM UTC 25 |
Feb 09 06:13:58 AM UTC 25 |
2314526300 ps |
| T843 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_smoke.2322674044 |
|
|
Feb 09 06:12:04 AM UTC 25 |
Feb 09 06:14:00 AM UTC 25 |
116763800 ps |
| T844 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict.416066198 |
|
|
Feb 09 06:13:28 AM UTC 25 |
Feb 09 06:14:05 AM UTC 25 |
45126100 ps |
| T427 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_sec_info_access.1935680614 |
|
|
Feb 09 06:13:03 AM UTC 25 |
Feb 09 06:14:05 AM UTC 25 |
354809000 ps |
| T845 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_connect.3714294383 |
|
|
Feb 09 06:13:39 AM UTC 25 |
Feb 09 06:14:06 AM UTC 25 |
55339700 ps |
| T846 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_alert_test.3168466649 |
|
|
Feb 09 06:13:46 AM UTC 25 |
Feb 09 06:14:11 AM UTC 25 |
107935900 ps |
| T847 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_smoke.660313996 |
|
|
Feb 09 06:11:29 AM UTC 25 |
Feb 09 06:14:14 AM UTC 25 |
25178500 ps |
| T121 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_disable.2189222317 |
|
|
Feb 09 06:13:36 AM UTC 25 |
Feb 09 06:14:19 AM UTC 25 |
33643600 ps |
| T848 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_intr_rd.189641122 |
|
|
Feb 09 06:12:12 AM UTC 25 |
Feb 09 06:14:21 AM UTC 25 |
1716524000 ps |
| T849 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict_all_en.2074689979 |
|
|
Feb 09 06:13:32 AM UTC 25 |
Feb 09 06:14:26 AM UTC 25 |
64897300 ps |
| T850 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_prog_reset.4120193896 |
|
|
Feb 09 06:14:05 AM UTC 25 |
Feb 09 06:14:27 AM UTC 25 |
17588000 ps |
| T851 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd_slow_flash.4102606284 |
|
|
Feb 09 06:11:13 AM UTC 25 |
Feb 09 06:14:38 AM UTC 25 |
23345886100 ps |
| T852 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_alert_test.603433224 |
|
|
Feb 09 06:14:21 AM UTC 25 |
Feb 09 06:14:39 AM UTC 25 |
103641700 ps |
| T853 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_hw_sec_otp.3674458002 |
|
|
Feb 09 06:13:13 AM UTC 25 |
Feb 09 06:14:43 AM UTC 25 |
2620860100 ps |
| T854 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd.2491112075 |
|
|
Feb 09 06:11:07 AM UTC 25 |
Feb 09 06:14:44 AM UTC 25 |
16068451600 ps |
| T178 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_otp_reset.2817324920 |
|
|
Feb 09 06:11:06 AM UTC 25 |
Feb 09 06:14:47 AM UTC 25 |
81980200 ps |
| T388 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_disable.85396196 |
|
|
Feb 09 06:14:13 AM UTC 25 |
Feb 09 06:14:49 AM UTC 25 |
11959300 ps |
| T855 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict.243986840 |
|
|
Feb 09 06:14:06 AM UTC 25 |
Feb 09 06:14:57 AM UTC 25 |
29069000 ps |
| T437 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict_all_en.1762059329 |
|
|
Feb 09 06:14:08 AM UTC 25 |
Feb 09 06:15:00 AM UTC 25 |
59582200 ps |
| T856 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_prog_reset.3642275722 |
|
|
Feb 09 06:12:56 AM UTC 25 |
Feb 09 06:15:01 AM UTC 25 |
1572617300 ps |
| T857 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_otp_reset.1485252420 |
|
|
Feb 09 06:11:37 AM UTC 25 |
Feb 09 06:15:02 AM UTC 25 |
41571700 ps |
| T409 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_sec_info_access.1199772338 |
|
|
Feb 09 06:13:39 AM UTC 25 |
Feb 09 06:15:04 AM UTC 25 |
1676399900 ps |
| T858 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_otp_reset.1750578319 |
|
|
Feb 09 06:12:50 AM UTC 25 |
Feb 09 06:15:05 AM UTC 25 |
41837400 ps |
| T859 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_prog_reset.2552158836 |
|
|
Feb 09 06:14:45 AM UTC 25 |
Feb 09 06:15:08 AM UTC 25 |
55114300 ps |
| T197 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_otp_reset.938164269 |
|
|
Feb 09 06:12:11 AM UTC 25 |
Feb 09 06:15:11 AM UTC 25 |
211644400 ps |
| T860 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd_slow_flash.628913534 |
|
|
Feb 09 06:10:39 AM UTC 25 |
Feb 09 06:15:12 AM UTC 25 |
46972916400 ps |
| T150 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_full_mem_access.204705169 |
|
|
Feb 09 05:11:29 AM UTC 25 |
Feb 09 06:15:17 AM UTC 25 |
65545372600 ps |
| T861 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_connect.2786662903 |
|
|
Feb 09 06:15:01 AM UTC 25 |
Feb 09 06:15:27 AM UTC 25 |
14774200 ps |
| T862 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd_slow_flash.200898802 |
|
|
Feb 09 06:12:54 AM UTC 25 |
Feb 09 06:15:28 AM UTC 25 |
22689291500 ps |
| T863 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict_all_en.2736845720 |
|
|
Feb 09 06:14:48 AM UTC 25 |
Feb 09 06:15:30 AM UTC 25 |
74904000 ps |
| T864 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict.4277063181 |
|
|
Feb 09 06:14:47 AM UTC 25 |
Feb 09 06:15:31 AM UTC 25 |
162425500 ps |
| T865 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_alert_test.1323945961 |
|
|
Feb 09 06:15:02 AM UTC 25 |
Feb 09 06:15:32 AM UTC 25 |
105813700 ps |
| T866 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_hw_sec_otp.1359035488 |
|
|
Feb 09 06:13:50 AM UTC 25 |
Feb 09 06:15:33 AM UTC 25 |
1281682300 ps |
| T867 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_disable.2965079904 |
|
|
Feb 09 06:14:50 AM UTC 25 |
Feb 09 06:15:33 AM UTC 25 |
30682900 ps |
| T868 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_prog_reset.2206007466 |
|
|
Feb 09 06:15:14 AM UTC 25 |
Feb 09 06:15:43 AM UTC 25 |
20386200 ps |
| T869 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_intr_rd_slow_flash.3951531518 |
|
|
Feb 09 06:12:20 AM UTC 25 |
Feb 09 06:15:47 AM UTC 25 |
6068206400 ps |