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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.96 95.25 93.98 98.31 91.84 97.18 96.99 98.18


Total test records in report: 1268
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T636 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_read_seed_err.1640109340 Sep 11 06:20:53 PM UTC 24 Sep 11 06:21:12 PM UTC 24 26368400 ps
T637 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_lcmgr_intg.4200741865 Sep 11 06:20:52 PM UTC 24 Sep 11 06:21:15 PM UTC 24 27883300 ps
T638 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_prog_rma_wipe_err.2191799337 Sep 11 06:18:39 PM UTC 24 Sep 11 06:21:17 PM UTC 24 10012776200 ps
T639 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_ro.4106731732 Sep 11 06:19:33 PM UTC 24 Sep 11 06:21:18 PM UTC 24 1973909000 ps
T640 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_re_evict.2992404161 Sep 11 06:20:17 PM UTC 24 Sep 11 06:21:22 PM UTC 24 217756700 ps
T641 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_alert_test.1696495704 Sep 11 06:20:57 PM UTC 24 Sep 11 06:21:28 PM UTC 24 72975300 ps
T642 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_intr_rd_slow_flash.991859557 Sep 11 06:17:06 PM UTC 24 Sep 11 06:21:42 PM UTC 24 17038099500 ps
T643 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rand_ops.1777410493 Sep 11 06:13:45 PM UTC 24 Sep 11 06:21:47 PM UTC 24 68564500 ps
T644 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_sec_info_access.126330696 Sep 11 06:20:32 PM UTC 24 Sep 11 06:21:51 PM UTC 24 3525435300 ps
T645 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_smoke.2545143727 Sep 11 06:18:49 PM UTC 24 Sep 11 06:21:55 PM UTC 24 118079200 ps
T646 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw.2482949316 Sep 11 06:14:41 PM UTC 24 Sep 11 06:21:58 PM UTC 24 3905352900 ps
T647 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rand_ops.1137375772 Sep 11 06:21:04 PM UTC 24 Sep 11 06:22:14 PM UTC 24 26763400 ps
T648 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_sec_otp.2238730238 Sep 11 06:21:05 PM UTC 24 Sep 11 06:22:15 PM UTC 24 8469898800 ps
T649 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_otp_reset.2500467248 Sep 11 06:19:09 PM UTC 24 Sep 11 06:22:17 PM UTC 24 67884100 ps
T342 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd.3574455757 Sep 11 06:19:49 PM UTC 24 Sep 11 06:22:18 PM UTC 24 1198808700 ps
T295 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_error_mp.2517947402 Sep 11 05:30:13 PM UTC 24 Sep 11 06:22:20 PM UTC 24 10022073100 ps
T650 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_prog_reset.1622832123 Sep 11 06:21:52 PM UTC 24 Sep 11 06:22:22 PM UTC 24 64540300 ps
T651 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_rma_reset.772007937 Sep 11 06:07:32 PM UTC 24 Sep 11 06:22:35 PM UTC 24 90155348800 ps
T413 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict_all_en.3642343930 Sep 11 06:21:59 PM UTC 24 Sep 11 06:22:37 PM UTC 24 69221700 ps
T652 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict.196935422 Sep 11 06:21:56 PM UTC 24 Sep 11 06:22:40 PM UTC 24 253166700 ps
T653 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_disable.776717392 Sep 11 06:22:16 PM UTC 24 Sep 11 06:22:42 PM UTC 24 11085300 ps
T654 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_invalid_op.1609040424 Sep 11 06:21:18 PM UTC 24 Sep 11 06:22:43 PM UTC 24 891529500 ps
T655 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_connect.4274487650 Sep 11 06:22:19 PM UTC 24 Sep 11 06:22:44 PM UTC 24 40723800 ps
T656 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_read_seed_err.3832161537 Sep 11 06:22:22 PM UTC 24 Sep 11 06:22:47 PM UTC 24 48779900 ps
T657 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_phy_arb.908395515 Sep 11 06:21:05 PM UTC 24 Sep 11 06:22:49 PM UTC 24 27357400 ps
T658 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_lcmgr_intg.3959257889 Sep 11 06:22:21 PM UTC 24 Sep 11 06:22:50 PM UTC 24 15614800 ps
T659 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_wo.3135356176 Sep 11 06:19:30 PM UTC 24 Sep 11 06:22:55 PM UTC 24 5216386400 ps
T660 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_alert_test.2605795880 Sep 11 06:22:39 PM UTC 24 Sep 11 06:22:58 PM UTC 24 18678600 ps
T661 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_ro.1252792676 Sep 11 06:21:23 PM UTC 24 Sep 11 06:23:08 PM UTC 24 536815900 ps
T141 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_mp.819488847 Sep 11 05:35:23 PM UTC 24 Sep 11 06:23:15 PM UTC 24 5569657400 ps
T662 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_smoke.3259850914 Sep 11 06:20:58 PM UTC 24 Sep 11 06:23:19 PM UTC 24 34663500 ps
T663 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_re_evict.2553043953 Sep 11 06:22:15 PM UTC 24 Sep 11 06:23:20 PM UTC 24 61121700 ps
T664 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_prog_reset.3001677411 Sep 11 06:19:58 PM UTC 24 Sep 11 06:23:37 PM UTC 24 4804615600 ps
T665 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_sec_otp.2551800935 Sep 11 06:22:44 PM UTC 24 Sep 11 06:23:44 PM UTC 24 1363797900 ps
T666 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_prog_rma_wipe_err.754553300 Sep 11 06:20:56 PM UTC 24 Sep 11 06:23:50 PM UTC 24 10012805300 ps
T185 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_otp_reset.537266077 Sep 11 06:21:13 PM UTC 24 Sep 11 06:23:54 PM UTC 24 74661900 ps
T400 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_sec_info_access.3597822040 Sep 11 06:22:18 PM UTC 24 Sep 11 06:23:56 PM UTC 24 2129202500 ps
T667 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rand_ops.1299820173 Sep 11 06:22:43 PM UTC 24 Sep 11 06:24:14 PM UTC 24 111826400 ps
T668 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_invalid_op.652192007 Sep 11 06:22:56 PM UTC 24 Sep 11 06:24:21 PM UTC 24 4096422900 ps
T111 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_disable.3709503333 Sep 11 06:23:57 PM UTC 24 Sep 11 06:24:24 PM UTC 24 12907600 ps
T669 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict_all_en.3789852983 Sep 11 06:23:52 PM UTC 24 Sep 11 06:24:25 PM UTC 24 119812100 ps
T332 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_connect.1173334276 Sep 11 06:24:21 PM UTC 24 Sep 11 06:24:39 PM UTC 24 85715100 ps
T670 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict.146683320 Sep 11 06:23:44 PM UTC 24 Sep 11 06:24:46 PM UTC 24 37664200 ps
T155 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_mp_regions.798594827 Sep 11 06:19:11 PM UTC 24 Sep 11 06:24:46 PM UTC 24 37393643700 ps
T671 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_read_seed_err.3563368803 Sep 11 06:24:26 PM UTC 24 Sep 11 06:24:48 PM UTC 24 47693700 ps
T672 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_wo.326702842 Sep 11 06:21:19 PM UTC 24 Sep 11 06:24:51 PM UTC 24 2411532800 ps
T673 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_re_evict.2308454709 Sep 11 06:23:55 PM UTC 24 Sep 11 06:24:53 PM UTC 24 231676400 ps
T674 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_lcmgr_intg.2405048623 Sep 11 06:24:24 PM UTC 24 Sep 11 06:24:55 PM UTC 24 34712200 ps
T675 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd_slow_flash.138481901 Sep 11 06:19:52 PM UTC 24 Sep 11 06:24:55 PM UTC 24 25712984900 ps
T676 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_phy_arb.1817059034 Sep 11 06:22:44 PM UTC 24 Sep 11 06:24:59 PM UTC 24 1189136900 ps
T677 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_alert_test.3112869263 Sep 11 06:24:47 PM UTC 24 Sep 11 06:25:06 PM UTC 24 26538200 ps
T678 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd_slow_flash.4190877422 Sep 11 06:21:48 PM UTC 24 Sep 11 06:25:07 PM UTC 24 8787602300 ps
T679 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_ro.3417450218 Sep 11 06:23:09 PM UTC 24 Sep 11 06:25:11 PM UTC 24 866665400 ps
T156 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_full_mem_access.3286171765 Sep 11 05:41:53 PM UTC 24 Sep 11 06:25:14 PM UTC 24 351146123100 ps
T680 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_error_prog_win.246930716 Sep 11 06:07:37 PM UTC 24 Sep 11 06:25:28 PM UTC 24 641929400 ps
T681 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd.3580372984 Sep 11 06:21:42 PM UTC 24 Sep 11 06:25:33 PM UTC 24 1969169200 ps
T682 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_otp_reset.4252412007 Sep 11 06:22:50 PM UTC 24 Sep 11 06:25:39 PM UTC 24 150649200 ps
T683 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw.3500289526 Sep 11 06:17:01 PM UTC 24 Sep 11 06:25:39 PM UTC 24 16002509600 ps
T142 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_mp_regions.2502510050 Sep 11 06:16:25 PM UTC 24 Sep 11 06:25:48 PM UTC 24 24805762300 ps
T396 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_sec_info_access.734359358 Sep 11 06:24:15 PM UTC 24 Sep 11 06:25:55 PM UTC 24 6541038500 ps
T684 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_phy_arb.887475027 Sep 11 06:16:12 PM UTC 24 Sep 11 06:25:59 PM UTC 24 7144924500 ps
T685 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd.2238351498 Sep 11 06:23:20 PM UTC 24 Sep 11 06:26:03 PM UTC 24 1345229100 ps
T686 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_prog_reset.654806684 Sep 11 06:25:39 PM UTC 24 Sep 11 06:26:09 PM UTC 24 61173400 ps
T687 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_wo.2224979698 Sep 11 06:22:59 PM UTC 24 Sep 11 06:26:12 PM UTC 24 17698419900 ps
T688 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_prog_reset.1785848868 Sep 11 06:23:38 PM UTC 24 Sep 11 06:26:12 PM UTC 24 1828460400 ps
T290 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_prog_rma_wipe_err.1129191463 Sep 11 06:22:36 PM UTC 24 Sep 11 06:26:19 PM UTC 24 10018120800 ps
T689 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_lcmgr_intg.2617633352 Sep 11 06:26:10 PM UTC 24 Sep 11 06:26:27 PM UTC 24 66021700 ps
T690 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict_all_en.1399621872 Sep 11 06:25:49 PM UTC 24 Sep 11 06:26:30 PM UTC 24 44594000 ps
T691 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_connect.3343509963 Sep 11 06:26:09 PM UTC 24 Sep 11 06:26:35 PM UTC 24 23023900 ps
T692 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_read_seed_err.1862904492 Sep 11 06:26:13 PM UTC 24 Sep 11 06:26:37 PM UTC 24 45452800 ps
T693 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict.600223566 Sep 11 06:25:39 PM UTC 24 Sep 11 06:26:38 PM UTC 24 44738900 ps
T112 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_disable.2639225620 Sep 11 06:26:00 PM UTC 24 Sep 11 06:26:40 PM UTC 24 29251000 ps
T694 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_alert_test.4275451617 Sep 11 06:26:19 PM UTC 24 Sep 11 06:26:44 PM UTC 24 60263000 ps
T411 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_re_evict.1782848664 Sep 11 06:25:55 PM UTC 24 Sep 11 06:26:45 PM UTC 24 359332300 ps
T695 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_sec_otp.1302887908 Sep 11 06:24:54 PM UTC 24 Sep 11 06:26:48 PM UTC 24 3993498200 ps
T696 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_smoke.1826640789 Sep 11 06:22:41 PM UTC 24 Sep 11 06:26:51 PM UTC 24 97155200 ps
T697 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_invalid_op.3147967592 Sep 11 06:25:07 PM UTC 24 Sep 11 06:26:53 PM UTC 24 1698182600 ps
T698 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_ro.1084303585 Sep 11 06:25:12 PM UTC 24 Sep 11 06:27:09 PM UTC 24 1613221400 ps
T395 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_sec_info_access.1802539209 Sep 11 06:26:03 PM UTC 24 Sep 11 06:27:18 PM UTC 24 2037253700 ps
T699 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_rma_reset.1908137784 Sep 11 06:13:56 PM UTC 24 Sep 11 06:27:26 PM UTC 24 40127849000 ps
T700 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_prog_rma_wipe_err.144475422 Sep 11 06:24:41 PM UTC 24 Sep 11 06:27:28 PM UTC 24 10012725400 ps
T701 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_rma_reset.634932855 Sep 11 06:11:29 PM UTC 24 Sep 11 06:27:40 PM UTC 24 120174472400 ps
T702 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw.4216335087 Sep 11 06:19:40 PM UTC 24 Sep 11 06:27:42 PM UTC 24 5076230900 ps
T703 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_sec_otp.3990788177 Sep 11 06:26:38 PM UTC 24 Sep 11 06:27:47 PM UTC 24 1486382100 ps
T704 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_prog_reset.2428933106 Sep 11 06:27:27 PM UTC 24 Sep 11 06:27:49 PM UTC 24 163375900 ps
T705 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_mp_regions.2260598562 Sep 11 06:25:00 PM UTC 24 Sep 11 06:27:54 PM UTC 24 8144980100 ps
T706 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_invalid_op.1118736152 Sep 11 06:26:45 PM UTC 24 Sep 11 06:27:58 PM UTC 24 876017200 ps
T707 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict.3376863317 Sep 11 06:35:58 PM UTC 24 Sep 11 06:36:46 PM UTC 24 269824600 ps
T181 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_otp_reset.2417262159 Sep 11 06:24:56 PM UTC 24 Sep 11 06:28:08 PM UTC 24 150595800 ps
T708 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_prog_rma_wipe_err.1765929353 Sep 11 06:26:13 PM UTC 24 Sep 11 06:28:16 PM UTC 24 10018630000 ps
T709 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_connect.978959994 Sep 11 06:27:55 PM UTC 24 Sep 11 06:28:20 PM UTC 24 24395000 ps
T200 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_disable.3643746628 Sep 11 06:27:48 PM UTC 24 Sep 11 06:28:21 PM UTC 24 18610900 ps
T710 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_wo.2650804402 Sep 11 06:25:08 PM UTC 24 Sep 11 06:28:21 PM UTC 24 2156138800 ps
T711 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_lcmgr_intg.3505750764 Sep 11 06:28:00 PM UTC 24 Sep 11 06:28:23 PM UTC 24 25367400 ps
T712 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_re_evict.1954006007 Sep 11 06:27:42 PM UTC 24 Sep 11 06:28:23 PM UTC 24 65796900 ps
T713 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_read_seed_err.337298838 Sep 11 06:28:09 PM UTC 24 Sep 11 06:28:26 PM UTC 24 49833100 ps
T714 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_full_mem_access.2380056285 Sep 11 05:46:58 PM UTC 24 Sep 11 06:28:32 PM UTC 24 123602834700 ps
T715 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rand_ops.3903838423 Sep 11 06:16:06 PM UTC 24 Sep 11 06:28:32 PM UTC 24 1077310600 ps
T716 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict_all_en.4263604519 Sep 11 06:27:40 PM UTC 24 Sep 11 06:28:33 PM UTC 24 28086400 ps
T717 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_alert_test.2969241428 Sep 11 06:28:17 PM UTC 24 Sep 11 06:28:36 PM UTC 24 90563100 ps
T718 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd_slow_flash.4068127625 Sep 11 06:23:21 PM UTC 24 Sep 11 06:28:43 PM UTC 24 14308145600 ps
T719 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rand_ops.4069074653 Sep 11 05:55:14 PM UTC 24 Sep 11 06:28:47 PM UTC 24 1491443400 ps
T720 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd.810775656 Sep 11 06:25:28 PM UTC 24 Sep 11 06:29:02 PM UTC 24 702505900 ps
T721 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_smoke.2989236076 Sep 11 06:24:47 PM UTC 24 Sep 11 06:29:09 PM UTC 24 368054000 ps
T722 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_sec_info_access.2020967920 Sep 11 06:27:50 PM UTC 24 Sep 11 06:29:14 PM UTC 24 8223882000 ps
T723 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_ro.2849724284 Sep 11 06:26:51 PM UTC 24 Sep 11 06:29:14 PM UTC 24 2035135400 ps
T724 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw.3580085684 Sep 11 06:21:28 PM UTC 24 Sep 11 06:29:19 PM UTC 24 3417515700 ps
T725 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_error_prog_win.227816973 Sep 11 06:04:03 PM UTC 24 Sep 11 06:29:20 PM UTC 24 1622087800 ps
T726 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_prog_reset.3582533841 Sep 11 06:29:10 PM UTC 24 Sep 11 06:29:31 PM UTC 24 34834100 ps
T727 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_smoke.389044624 Sep 11 06:26:28 PM UTC 24 Sep 11 06:29:44 PM UTC 24 99954300 ps
T728 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_otp_reset.1500466283 Sep 11 06:26:41 PM UTC 24 Sep 11 06:29:48 PM UTC 24 72306000 ps
T729 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_rma_reset.4246003692 Sep 11 06:16:13 PM UTC 24 Sep 11 06:29:48 PM UTC 24 50131964300 ps
T730 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict.533062353 Sep 11 06:29:15 PM UTC 24 Sep 11 06:29:52 PM UTC 24 37074600 ps
T731 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_sec_otp.3799517860 Sep 11 06:28:23 PM UTC 24 Sep 11 06:29:55 PM UTC 24 961261200 ps
T348 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd.73109619 Sep 11 06:27:10 PM UTC 24 Sep 11 06:29:57 PM UTC 24 6736979000 ps
T373 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_disable.2460525331 Sep 11 06:29:21 PM UTC 24 Sep 11 06:29:57 PM UTC 24 17252200 ps
T732 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_invalid_op.4115578889 Sep 11 06:28:38 PM UTC 24 Sep 11 06:30:03 PM UTC 24 1916717400 ps
T733 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_phy_arb.1831159717 Sep 11 06:26:37 PM UTC 24 Sep 11 06:30:03 PM UTC 24 7524587600 ps
T734 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict_all_en.2567646924 Sep 11 06:29:15 PM UTC 24 Sep 11 06:30:03 PM UTC 24 329209100 ps
T735 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_read_seed_err.1898866069 Sep 11 06:29:50 PM UTC 24 Sep 11 06:30:09 PM UTC 24 25761000 ps
T736 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_re_evict.3396758435 Sep 11 06:29:20 PM UTC 24 Sep 11 06:30:11 PM UTC 24 80094500 ps
T737 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_connect.2186561401 Sep 11 06:29:44 PM UTC 24 Sep 11 06:30:13 PM UTC 24 14397200 ps
T738 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_lcmgr_intg.3091923456 Sep 11 06:29:49 PM UTC 24 Sep 11 06:30:16 PM UTC 24 15895700 ps
T289 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_prog_rma_wipe_err.962584370 Sep 11 06:28:09 PM UTC 24 Sep 11 06:30:22 PM UTC 24 10012242400 ps
T739 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_wo.3889851884 Sep 11 06:26:49 PM UTC 24 Sep 11 06:30:22 PM UTC 24 4377044400 ps
T740 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_alert_test.3508956062 Sep 11 06:29:56 PM UTC 24 Sep 11 06:30:25 PM UTC 24 70664100 ps
T741 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_sec_info_access.3335239460 Sep 11 06:29:31 PM UTC 24 Sep 11 06:30:38 PM UTC 24 2153941000 ps
T742 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_full_mem_access.3418142267 Sep 11 05:35:00 PM UTC 24 Sep 11 06:30:40 PM UTC 24 53803998200 ps
T743 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_ro.547241341 Sep 11 06:28:38 PM UTC 24 Sep 11 06:30:44 PM UTC 24 1377340500 ps
T744 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd_slow_flash.2016714903 Sep 11 06:27:18 PM UTC 24 Sep 11 06:30:48 PM UTC 24 6058173900 ps
T745 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_wo.3767324830 Sep 11 06:28:38 PM UTC 24 Sep 11 06:30:53 PM UTC 24 5163065500 ps
T746 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_invalid_op.1834129900 Sep 11 06:30:12 PM UTC 24 Sep 11 06:31:15 PM UTC 24 3389736800 ps
T747 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_re_evict.3860991265 Sep 11 06:30:48 PM UTC 24 Sep 11 06:31:28 PM UTC 24 92334100 ps
T748 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict.1704966421 Sep 11 06:30:48 PM UTC 24 Sep 11 06:31:28 PM UTC 24 287742200 ps
T749 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_disable.1800970837 Sep 11 06:30:54 PM UTC 24 Sep 11 06:31:34 PM UTC 24 20791200 ps
T750 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict_all_en.1411167474 Sep 11 06:30:48 PM UTC 24 Sep 11 06:31:38 PM UTC 24 27361000 ps
T751 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_phy_arb.1360123638 Sep 11 06:24:51 PM UTC 24 Sep 11 06:31:47 PM UTC 24 332520600 ps
T752 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_phy_arb.2392357048 Sep 11 06:28:22 PM UTC 24 Sep 11 06:31:48 PM UTC 24 714361800 ps
T753 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_otp_reset.439501810 Sep 11 06:28:27 PM UTC 24 Sep 11 06:31:49 PM UTC 24 78084300 ps
T754 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_connect.1482201932 Sep 11 06:31:29 PM UTC 24 Sep 11 06:31:52 PM UTC 24 24071000 ps
T755 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_read_seed_err.1641328015 Sep 11 06:31:34 PM UTC 24 Sep 11 06:31:55 PM UTC 24 15751000 ps
T756 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw.1727666352 Sep 11 06:23:16 PM UTC 24 Sep 11 06:31:56 PM UTC 24 4010427800 ps
T757 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_lcmgr_intg.4126649114 Sep 11 06:31:29 PM UTC 24 Sep 11 06:31:56 PM UTC 24 15730000 ps
T758 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw.2218732859 Sep 11 06:25:23 PM UTC 24 Sep 11 06:32:03 PM UTC 24 5903857100 ps
T759 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_alert_test.2713041537 Sep 11 06:31:48 PM UTC 24 Sep 11 06:32:07 PM UTC 24 56769300 ps
T760 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_prog_reset.3334132086 Sep 11 06:31:57 PM UTC 24 Sep 11 06:32:17 PM UTC 24 20993300 ps
T761 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_mp_regions.4255223733 Sep 11 06:21:16 PM UTC 24 Sep 11 06:32:19 PM UTC 24 9487038200 ps
T762 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_ro.3867906185 Sep 11 06:30:17 PM UTC 24 Sep 11 06:32:26 PM UTC 24 1795290000 ps
T763 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd.4288038610 Sep 11 06:30:23 PM UTC 24 Sep 11 06:32:29 PM UTC 24 528064400 ps
T764 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_prog_rma_wipe_err.1078889219 Sep 11 06:31:39 PM UTC 24 Sep 11 06:32:30 PM UTC 24 10061418600 ps
T765 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd.2936285888 Sep 11 06:28:48 PM UTC 24 Sep 11 06:32:36 PM UTC 24 7758885600 ps
T766 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_sec_info_access.373240779 Sep 11 06:31:16 PM UTC 24 Sep 11 06:32:40 PM UTC 24 2362004300 ps
T100 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_error_prog_type.2332033600 Sep 11 05:47:07 PM UTC 24 Sep 11 06:32:44 PM UTC 24 1357834100 ps
T767 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd_slow_flash.2708301376 Sep 11 06:25:34 PM UTC 24 Sep 11 06:32:45 PM UTC 24 60539768000 ps
T768 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_disable.1582259433 Sep 11 06:32:18 PM UTC 24 Sep 11 06:32:48 PM UTC 24 13201500 ps
T769 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_connect.1483092359 Sep 11 06:32:27 PM UTC 24 Sep 11 06:32:49 PM UTC 24 50664900 ps
T770 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_alert_test.3867511806 Sep 11 06:32:30 PM UTC 24 Sep 11 06:32:52 PM UTC 24 226576600 ps
T771 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_smoke.3517632119 Sep 11 06:29:58 PM UTC 24 Sep 11 06:33:00 PM UTC 24 263735000 ps
T772 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict_all_en.1329984337 Sep 11 06:32:08 PM UTC 24 Sep 11 06:33:01 PM UTC 24 171859900 ps
T773 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rand_ops.540205874 Sep 11 06:18:55 PM UTC 24 Sep 11 06:33:04 PM UTC 24 3004330400 ps
T774 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_smoke.3208684737 Sep 11 06:31:50 PM UTC 24 Sep 11 06:33:05 PM UTC 24 23124700 ps
T775 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict.379223575 Sep 11 06:32:04 PM UTC 24 Sep 11 06:33:09 PM UTC 24 228092700 ps
T776 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_prog_reset.1190591490 Sep 11 06:30:39 PM UTC 24 Sep 11 06:33:13 PM UTC 24 4865991400 ps
T777 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_prog_reset.1357785558 Sep 11 06:32:49 PM UTC 24 Sep 11 06:33:16 PM UTC 24 21347100 ps
T187 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_host_ctrl_arb.1310192729 Sep 11 05:41:41 PM UTC 24 Sep 11 06:33:18 PM UTC 24 264427431400 ps
T778 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rand_ops.374944225 Sep 11 06:24:49 PM UTC 24 Sep 11 06:33:19 PM UTC 24 79746700 ps
T779 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_hw_sec_otp.39875986 Sep 11 06:31:50 PM UTC 24 Sep 11 06:33:23 PM UTC 24 4799801000 ps
T780 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_wo.2728960952 Sep 11 06:30:14 PM UTC 24 Sep 11 06:33:31 PM UTC 24 2695914600 ps
T781 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_disable.120924141 Sep 11 06:33:01 PM UTC 24 Sep 11 06:33:31 PM UTC 24 56095300 ps
T782 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_otp_reset.1404281308 Sep 11 06:30:10 PM UTC 24 Sep 11 06:33:32 PM UTC 24 215968600 ps
T783 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_alert_test.4219420894 Sep 11 06:33:07 PM UTC 24 Sep 11 06:33:33 PM UTC 24 57859600 ps
T784 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_connect.82284417 Sep 11 06:33:04 PM UTC 24 Sep 11 06:33:33 PM UTC 24 107975200 ps
T785 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_sec_info_access.1500041965 Sep 11 06:32:20 PM UTC 24 Sep 11 06:33:34 PM UTC 24 5091462500 ps
T786 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict_all_en.3569625798 Sep 11 06:32:53 PM UTC 24 Sep 11 06:33:35 PM UTC 24 70717900 ps
T787 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict.3314271715 Sep 11 06:32:50 PM UTC 24 Sep 11 06:33:44 PM UTC 24 65824800 ps
T788 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_sec_otp.616128466 Sep 11 06:30:04 PM UTC 24 Sep 11 06:33:57 PM UTC 24 12627257200 ps
T789 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd.3080890744 Sep 11 06:31:56 PM UTC 24 Sep 11 06:34:05 PM UTC 24 760370100 ps
T790 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_alert_test.3406778993 Sep 11 06:33:35 PM UTC 24 Sep 11 06:34:05 PM UTC 24 97298100 ps
T791 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_connect.3669120754 Sep 11 06:33:34 PM UTC 24 Sep 11 06:34:06 PM UTC 24 24456800 ps
T371 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_disable.1099795342 Sep 11 06:33:33 PM UTC 24 Sep 11 06:34:09 PM UTC 24 37757000 ps
T792 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_smoke.2658755362 Sep 11 06:28:21 PM UTC 24 Sep 11 06:34:14 PM UTC 24 2807299700 ps
T793 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_rma_reset.472511079 Sep 11 06:19:06 PM UTC 24 Sep 11 06:34:23 PM UTC 24 80145858000 ps
T402 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_sec_info_access.1609852419 Sep 11 06:33:02 PM UTC 24 Sep 11 06:34:23 PM UTC 24 1490210700 ps
T794 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict.498076260 Sep 11 06:33:31 PM UTC 24 Sep 11 06:34:24 PM UTC 24 100981900 ps
T795 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict_all_en.2342912991 Sep 11 06:33:33 PM UTC 24 Sep 11 06:34:27 PM UTC 24 27277700 ps
T796 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd_slow_flash.1381328120 Sep 11 06:31:57 PM UTC 24 Sep 11 06:34:35 PM UTC 24 23217227100 ps
T797 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_prog_reset.1317682478 Sep 11 06:34:06 PM UTC 24 Sep 11 06:34:36 PM UTC 24 32729300 ps
T798 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_hw_sec_otp.746227206 Sep 11 06:33:14 PM UTC 24 Sep 11 06:34:39 PM UTC 24 7675597900 ps
T799 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_sec_info_access.2114502216 Sep 11 06:33:34 PM UTC 24 Sep 11 06:34:40 PM UTC 24 1223505700 ps
T800 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_disable.2808157572 Sep 11 06:34:14 PM UTC 24 Sep 11 06:34:42 PM UTC 24 30343500 ps
T801 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_alert_test.3058649036 Sep 11 06:34:25 PM UTC 24 Sep 11 06:34:42 PM UTC 24 92026200 ps
T802 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd_slow_flash.2916203593 Sep 11 06:29:03 PM UTC 24 Sep 11 06:34:43 PM UTC 24 48451007600 ps
T803 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_connect.1049733844 Sep 11 06:34:25 PM UTC 24 Sep 11 06:34:48 PM UTC 24 17198800 ps
T804 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_hw_sec_otp.1856722106 Sep 11 06:32:36 PM UTC 24 Sep 11 06:34:50 PM UTC 24 31366499800 ps
T805 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_mp_regions.2053867037 Sep 11 06:28:38 PM UTC 24 Sep 11 06:34:55 PM UTC 24 52726860600 ps
T806 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict.4269037813 Sep 11 06:34:07 PM UTC 24 Sep 11 06:35:00 PM UTC 24 66064500 ps
T807 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_error_mp.336080385 Sep 11 05:42:08 PM UTC 24 Sep 11 06:35:01 PM UTC 24 18659143400 ps
T389 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_otp_reset.1668518823 Sep 11 06:31:53 PM UTC 24 Sep 11 06:35:04 PM UTC 24 38187400 ps
T808 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_prog_reset.653306250 Sep 11 06:34:42 PM UTC 24 Sep 11 06:35:05 PM UTC 24 135698900 ps
T809 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict_all_en.3891145894 Sep 11 06:34:09 PM UTC 24 Sep 11 06:35:09 PM UTC 24 34121200 ps
T810 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_smoke.601070115 Sep 11 06:33:10 PM UTC 24 Sep 11 06:35:12 PM UTC 24 78640900 ps
T811 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_prog_rma_wipe_err.3164950463 Sep 11 06:29:53 PM UTC 24 Sep 11 06:35:14 PM UTC 24 10012630900 ps
T812 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_connect.3949873351 Sep 11 06:34:56 PM UTC 24 Sep 11 06:35:18 PM UTC 24 27861900 ps
T813 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict_all_en.1788068966 Sep 11 06:34:45 PM UTC 24 Sep 11 06:35:24 PM UTC 24 29948200 ps
T814 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_disable.3431615722 Sep 11 06:34:49 PM UTC 24 Sep 11 06:35:27 PM UTC 24 10645100 ps
T815 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_alert_test.2284775127 Sep 11 06:35:02 PM UTC 24 Sep 11 06:35:33 PM UTC 24 123338900 ps
T816 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict.1934107826 Sep 11 06:34:43 PM UTC 24 Sep 11 06:35:33 PM UTC 24 66450100 ps
T817 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_rma_reset.1272842813 Sep 11 06:21:13 PM UTC 24 Sep 11 06:35:36 PM UTC 24 80148371200 ps
T818 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_prog_reset.3610201471 Sep 11 06:35:12 PM UTC 24 Sep 11 06:35:39 PM UTC 24 19692800 ps
T182 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_otp_reset.2684050754 Sep 11 06:32:42 PM UTC 24 Sep 11 06:35:44 PM UTC 24 42985000 ps
T819 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_hw_sec_otp.3672629773 Sep 11 06:33:45 PM UTC 24 Sep 11 06:35:47 PM UTC 24 9423531900 ps
T415 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw.3359505738 Sep 11 06:26:55 PM UTC 24 Sep 11 06:35:54 PM UTC 24 15445819100 ps
T820 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_alert_test.1477532688 Sep 11 06:35:34 PM UTC 24 Sep 11 06:35:55 PM UTC 24 48844400 ps
T821 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_disable.2817032866 Sep 11 06:35:25 PM UTC 24 Sep 11 06:35:57 PM UTC 24 74220200 ps
T414 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict.661933801 Sep 11 06:35:15 PM UTC 24 Sep 11 06:35:59 PM UTC 24 30800300 ps
T822 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_connect.377244233 Sep 11 06:35:33 PM UTC 24 Sep 11 06:36:01 PM UTC 24 44092900 ps
T823 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_sec_info_access.1099004636 Sep 11 06:34:51 PM UTC 24 Sep 11 06:36:05 PM UTC 24 1636512800 ps
T824 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd_slow_flash.2738767597 Sep 11 06:30:25 PM UTC 24 Sep 11 06:36:12 PM UTC 24 12933519300 ps
T392 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_sec_info_access.197157848 Sep 11 06:34:23 PM UTC 24 Sep 11 06:36:13 PM UTC 24 20221198600 ps
T825 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict_all_en.3829432433 Sep 11 06:35:20 PM UTC 24 Sep 11 06:36:14 PM UTC 24 80909400 ps
T826 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_otp_reset.3041574493 Sep 11 06:33:17 PM UTC 24 Sep 11 06:36:16 PM UTC 24 127254300 ps
T827 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw.4254926152 Sep 11 06:28:44 PM UTC 24 Sep 11 06:36:18 PM UTC 24 4191379200 ps
T828 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_hw_sec_otp.2470946769 Sep 11 06:34:35 PM UTC 24 Sep 11 06:36:20 PM UTC 24 5955103900 ps
T829 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rand_ops.1385928227 Sep 11 06:29:58 PM UTC 24 Sep 11 06:36:25 PM UTC 24 225567300 ps
T830 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_smoke.129682952 Sep 11 06:34:28 PM UTC 24 Sep 11 06:36:27 PM UTC 24 21301200 ps
T831 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_prog_reset.1640246530 Sep 11 06:33:23 PM UTC 24 Sep 11 06:36:29 PM UTC 24 6519203400 ps
T832 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_connect.3078181380 Sep 11 06:36:14 PM UTC 24 Sep 11 06:36:38 PM UTC 24 45928900 ps
T833 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_alert_test.299528362 Sep 11 06:36:14 PM UTC 24 Sep 11 06:36:41 PM UTC 24 255567700 ps
T834 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_disable.3612701475 Sep 11 06:36:01 PM UTC 24 Sep 11 06:36:42 PM UTC 24 42143400 ps
T835 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict_all_en.3398261303 Sep 11 06:36:00 PM UTC 24 Sep 11 06:36:47 PM UTC 24 70689900 ps
T836 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_prog_reset.3881207210 Sep 11 06:36:27 PM UTC 24 Sep 11 06:36:52 PM UTC 24 65482500 ps
T837 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_sec_info_access.3872618266 Sep 11 06:35:28 PM UTC 24 Sep 11 06:36:53 PM UTC 24 7521051800 ps
T838 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_otp_reset.196725682 Sep 11 06:33:47 PM UTC 24 Sep 11 06:36:57 PM UTC 24 45203700 ps
T839 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd.1751354349 Sep 11 06:32:46 PM UTC 24 Sep 11 06:36:57 PM UTC 24 1613532300 ps
T102 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_intr_rd.4040632657 Sep 11 06:33:19 PM UTC 24 Sep 11 06:36:58 PM UTC 24 1633545800 ps
T840 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_intr_rd_slow_flash.2268169484 Sep 11 06:34:06 PM UTC 24 Sep 11 06:37:01 PM UTC 24 26840410600 ps
T841 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_intr_rd.4247321010 Sep 11 06:33:58 PM UTC 24 Sep 11 06:37:05 PM UTC 24 1184988100 ps
T842 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_connect.3072171052 Sep 11 06:36:47 PM UTC 24 Sep 11 06:37:08 PM UTC 24 15059700 ps
T843 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_alert_test.541384206 Sep 11 06:36:48 PM UTC 24 Sep 11 06:37:09 PM UTC 24 336140600 ps
T844 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_sec_info_access.1151610378 Sep 11 06:36:05 PM UTC 24 Sep 11 06:37:09 PM UTC 24 1860284500 ps
T325 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_hw_sec_otp.1915245654 Sep 11 06:35:05 PM UTC 24 Sep 11 06:37:10 PM UTC 24 5389712200 ps
T845 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_mp_regions.1203236390 Sep 11 06:26:45 PM UTC 24 Sep 11 06:37:15 PM UTC 24 10484355800 ps
T846 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict.2947982921 Sep 11 06:36:30 PM UTC 24 Sep 11 06:37:20 PM UTC 24 34362800 ps
T847 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd_slow_flash.3923974673 Sep 11 06:32:46 PM UTC 24 Sep 11 06:37:21 PM UTC 24 11741499200 ps
T372 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_disable.3746850483 Sep 11 06:36:42 PM UTC 24 Sep 11 06:37:24 PM UTC 24 10767400 ps
T848 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd_slow_flash.762454142 Sep 11 06:34:41 PM UTC 24 Sep 11 06:37:24 PM UTC 24 31657493100 ps
T849 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_mp_regions.3600258331 Sep 11 06:22:52 PM UTC 24 Sep 11 06:37:27 PM UTC 24 13420065500 ps
T850 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_hw_sec_otp.1240068628 Sep 11 06:36:17 PM UTC 24 Sep 11 06:37:30 PM UTC 24 8963143400 ps
T851 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_alert_test.658181689 Sep 11 06:37:16 PM UTC 24 Sep 11 06:37:38 PM UTC 24 252247300 ps
T852 /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_connect.2679398185 Sep 11 06:37:11 PM UTC 24 Sep 11 06:37:39 PM UTC 24 49415800 ps
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