| T649 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_prog_reset.1725338511 |
|
|
Oct 15 09:07:51 AM UTC 24 |
Oct 15 09:11:38 AM UTC 24 |
9487366300 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_otp_reset.489310620 |
|
|
Oct 15 09:09:02 AM UTC 24 |
Oct 15 09:11:38 AM UTC 24 |
134428700 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_alert_test.1298025542 |
|
|
Oct 15 09:11:21 AM UTC 24 |
Oct 15 09:11:41 AM UTC 24 |
63951900 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rand_ops.748834178 |
|
|
Oct 15 09:01:26 AM UTC 24 |
Oct 15 09:11:46 AM UTC 24 |
139651400 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd.2002919105 |
|
|
Oct 15 09:09:37 AM UTC 24 |
Oct 15 09:11:50 AM UTC 24 |
726203100 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rand_ops.4261630088 |
|
|
Oct 15 09:08:50 AM UTC 24 |
Oct 15 09:12:10 AM UTC 24 |
25313900 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_sec_otp.917642554 |
|
|
Oct 15 09:08:57 AM UTC 24 |
Oct 15 09:12:16 AM UTC 24 |
30497201300 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_sec_info_access.2594143881 |
|
|
Oct 15 09:10:58 AM UTC 24 |
Oct 15 09:12:27 AM UTC 24 |
31914980000 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_prog_reset.2036117306 |
|
|
Oct 15 09:12:10 AM UTC 24 |
Oct 15 09:12:29 AM UTC 24 |
40835400 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd_slow_flash.1090480706 |
|
|
Oct 15 09:10:10 AM UTC 24 |
Oct 15 09:12:42 AM UTC 24 |
5559599000 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_host_ctrl_arb.1320157969 |
|
|
Oct 15 08:31:57 AM UTC 24 |
Oct 15 09:12:55 AM UTC 24 |
577926611500 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_intr_rd_slow_flash.249086952 |
|
|
Oct 15 09:07:44 AM UTC 24 |
Oct 15 09:12:59 AM UTC 24 |
47597394000 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict.3257306 |
|
|
Oct 15 09:12:17 AM UTC 24 |
Oct 15 09:13:05 AM UTC 24 |
66257600 ps |
| T162 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_full_mem_access.475801514 |
|
|
Oct 15 08:23:25 AM UTC 24 |
Oct 15 09:13:06 AM UTC 24 |
216085910700 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict_all_en.3417983107 |
|
|
Oct 15 09:12:28 AM UTC 24 |
Oct 15 09:13:11 AM UTC 24 |
41473700 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_disable.3936698551 |
|
|
Oct 15 09:12:43 AM UTC 24 |
Oct 15 09:13:18 AM UTC 24 |
39744700 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_connect.2746920426 |
|
|
Oct 15 09:13:00 AM UTC 24 |
Oct 15 09:13:24 AM UTC 24 |
15452600 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_re_evict.3413299109 |
|
|
Oct 15 09:12:30 AM UTC 24 |
Oct 15 09:13:27 AM UTC 24 |
236237000 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_invalid_op.3984572755 |
|
|
Oct 15 09:11:39 AM UTC 24 |
Oct 15 09:13:27 AM UTC 24 |
1746195900 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_smoke.494083574 |
|
|
Oct 15 09:11:22 AM UTC 24 |
Oct 15 09:13:29 AM UTC 24 |
30959800 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_error_prog_win.2478148321 |
|
|
Oct 15 08:54:27 AM UTC 24 |
Oct 15 09:13:30 AM UTC 24 |
1476136300 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_ro.1337929866 |
|
|
Oct 15 09:11:39 AM UTC 24 |
Oct 15 09:13:31 AM UTC 24 |
587789900 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_lcmgr_intg.1173045761 |
|
|
Oct 15 09:13:14 AM UTC 24 |
Oct 15 09:13:34 AM UTC 24 |
38865400 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_read_seed_err.1094083501 |
|
|
Oct 15 09:13:14 AM UTC 24 |
Oct 15 09:13:36 AM UTC 24 |
45100300 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_alert_test.386889911 |
|
|
Oct 15 09:13:18 AM UTC 24 |
Oct 15 09:13:39 AM UTC 24 |
34867900 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_phy_arb.227981296 |
|
|
Oct 15 09:04:06 AM UTC 24 |
Oct 15 09:13:39 AM UTC 24 |
1563963500 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw.485537549 |
|
|
Oct 15 09:04:59 AM UTC 24 |
Oct 15 09:13:47 AM UTC 24 |
3811812400 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_wo.4006887203 |
|
|
Oct 15 09:09:15 AM UTC 24 |
Oct 15 09:13:47 AM UTC 24 |
2545593600 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_prog_rma_wipe_err.3019092470 |
|
|
Oct 15 09:11:16 AM UTC 24 |
Oct 15 09:14:10 AM UTC 24 |
10019871500 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_otp_reset.3215065249 |
|
|
Oct 15 09:11:37 AM UTC 24 |
Oct 15 09:14:33 AM UTC 24 |
246187200 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_full_mem_access.113785389 |
|
|
Oct 15 08:32:10 AM UTC 24 |
Oct 15 09:14:34 AM UTC 24 |
190955190600 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_sec_otp.1057600137 |
|
|
Oct 15 09:11:30 AM UTC 24 |
Oct 15 09:14:36 AM UTC 24 |
67850935400 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_phy_arb.1119823616 |
|
|
Oct 15 09:06:35 AM UTC 24 |
Oct 15 09:14:41 AM UTC 24 |
144222300 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_sec_info_access.2919356729 |
|
|
Oct 15 09:12:56 AM UTC 24 |
Oct 15 09:14:43 AM UTC 24 |
1679103700 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_prog_rma_wipe_err.427942054 |
|
|
Oct 15 09:13:15 AM UTC 24 |
Oct 15 09:14:44 AM UTC 24 |
10039450300 ps |
| T295 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_error_mp.3174247464 |
|
|
Oct 15 08:32:23 AM UTC 24 |
Oct 15 09:14:47 AM UTC 24 |
9433335000 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_mp_regions.3658107349 |
|
|
Oct 15 09:11:38 AM UTC 24 |
Oct 15 09:14:50 AM UTC 24 |
4874496700 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd.1387904477 |
|
|
Oct 15 09:11:47 AM UTC 24 |
Oct 15 09:14:51 AM UTC 24 |
1704544500 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_prog_reset.1633399096 |
|
|
Oct 15 09:14:34 AM UTC 24 |
Oct 15 09:14:59 AM UTC 24 |
61869000 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_mp.1165123986 |
|
|
Oct 15 08:27:46 AM UTC 24 |
Oct 15 09:15:00 AM UTC 24 |
20803861400 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_lcmgr_intg.1549952023 |
|
|
Oct 15 09:14:52 AM UTC 24 |
Oct 15 09:15:08 AM UTC 24 |
15294700 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_phy_arb.416162126 |
|
|
Oct 15 09:08:55 AM UTC 24 |
Oct 15 09:15:10 AM UTC 24 |
1382175200 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_read_seed_err.552493937 |
|
|
Oct 15 09:14:52 AM UTC 24 |
Oct 15 09:15:11 AM UTC 24 |
15486200 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_disable.3220864505 |
|
|
Oct 15 09:14:44 AM UTC 24 |
Oct 15 09:15:12 AM UTC 24 |
37006000 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw.283269423 |
|
|
Oct 15 09:07:20 AM UTC 24 |
Oct 15 09:15:16 AM UTC 24 |
35897495100 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_full_mem_access.2953790858 |
|
|
Oct 15 08:17:34 AM UTC 24 |
Oct 15 09:15:18 AM UTC 24 |
108583595400 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_connect.1899753669 |
|
|
Oct 15 09:14:47 AM UTC 24 |
Oct 15 09:15:18 AM UTC 24 |
139631500 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict_all_en.2633955464 |
|
|
Oct 15 09:14:40 AM UTC 24 |
Oct 15 09:15:22 AM UTC 24 |
60930400 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_rma_reset.3433090785 |
|
|
Oct 15 09:01:31 AM UTC 24 |
Oct 15 09:15:25 AM UTC 24 |
160188534300 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_invalid_op.2698196994 |
|
|
Oct 15 09:13:37 AM UTC 24 |
Oct 15 09:15:25 AM UTC 24 |
3626068700 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_alert_test.570917152 |
|
|
Oct 15 09:15:00 AM UTC 24 |
Oct 15 09:15:26 AM UTC 24 |
126511100 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict.3944415689 |
|
|
Oct 15 09:14:39 AM UTC 24 |
Oct 15 09:15:30 AM UTC 24 |
29135400 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_re_evict.696249614 |
|
|
Oct 15 09:14:42 AM UTC 24 |
Oct 15 09:15:37 AM UTC 24 |
1272199700 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_ro.302084407 |
|
|
Oct 15 09:13:40 AM UTC 24 |
Oct 15 09:15:40 AM UTC 24 |
2281977100 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_wo.2655563871 |
|
|
Oct 15 09:11:39 AM UTC 24 |
Oct 15 09:15:48 AM UTC 24 |
4734645200 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd_slow_flash.1622018059 |
|
|
Oct 15 09:11:50 AM UTC 24 |
Oct 15 09:16:03 AM UTC 24 |
11716191300 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_sec_otp.3280897964 |
|
|
Oct 15 09:13:30 AM UTC 24 |
Oct 15 09:16:10 AM UTC 24 |
8411220800 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw.2029576564 |
|
|
Oct 15 09:09:29 AM UTC 24 |
Oct 15 09:16:21 AM UTC 24 |
16479050200 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_smoke.4179209899 |
|
|
Oct 15 09:13:24 AM UTC 24 |
Oct 15 09:16:22 AM UTC 24 |
261076300 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_sec_info_access.3347293453 |
|
|
Oct 15 09:14:45 AM UTC 24 |
Oct 15 09:16:27 AM UTC 24 |
2376069700 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict.2677935020 |
|
|
Oct 15 09:15:50 AM UTC 24 |
Oct 15 09:16:35 AM UTC 24 |
108086200 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_smoke.1249793238 |
|
|
Oct 15 09:15:09 AM UTC 24 |
Oct 15 09:16:36 AM UTC 24 |
39919600 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_phy_arb.651732642 |
|
|
Oct 15 09:13:28 AM UTC 24 |
Oct 15 09:16:38 AM UTC 24 |
40963700 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_invalid_op.77861676 |
|
|
Oct 15 09:15:28 AM UTC 24 |
Oct 15 09:16:49 AM UTC 24 |
3491308200 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_connect.24668702 |
|
|
Oct 15 09:16:27 AM UTC 24 |
Oct 15 09:16:49 AM UTC 24 |
23340900 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_prog_rma_wipe_err.3004022405 |
|
|
Oct 15 09:15:00 AM UTC 24 |
Oct 15 09:16:55 AM UTC 24 |
10019018400 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_read_seed_err.2836751876 |
|
|
Oct 15 09:16:36 AM UTC 24 |
Oct 15 09:16:59 AM UTC 24 |
30119800 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_re_evict.1755816124 |
|
|
Oct 15 09:16:11 AM UTC 24 |
Oct 15 09:17:00 AM UTC 24 |
308437800 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict_all_en.3653677690 |
|
|
Oct 15 09:16:04 AM UTC 24 |
Oct 15 09:17:03 AM UTC 24 |
34668200 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_lcmgr_intg.1130146171 |
|
|
Oct 15 09:16:36 AM UTC 24 |
Oct 15 09:17:06 AM UTC 24 |
15854900 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_disable.2527216020 |
|
|
Oct 15 09:16:22 AM UTC 24 |
Oct 15 09:17:07 AM UTC 24 |
10834000 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_wo.3491721711 |
|
|
Oct 15 09:13:40 AM UTC 24 |
Oct 15 09:17:12 AM UTC 24 |
42514040100 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd.914769334 |
|
|
Oct 15 09:13:48 AM UTC 24 |
Oct 15 09:17:15 AM UTC 24 |
2010265900 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_alert_test.1247732891 |
|
|
Oct 15 09:16:50 AM UTC 24 |
Oct 15 09:17:17 AM UTC 24 |
31146700 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_sec_otp.2980897166 |
|
|
Oct 15 09:15:14 AM UTC 24 |
Oct 15 09:17:24 AM UTC 24 |
3341160700 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd.1332273481 |
|
|
Oct 15 09:15:30 AM UTC 24 |
Oct 15 09:17:26 AM UTC 24 |
1040889600 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_otp_reset.3397678689 |
|
|
Oct 15 09:13:32 AM UTC 24 |
Oct 15 09:17:28 AM UTC 24 |
311413500 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_error_prog_win.302943240 |
|
|
Oct 15 08:58:01 AM UTC 24 |
Oct 15 09:17:28 AM UTC 24 |
623997900 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_ro.3273399904 |
|
|
Oct 15 09:15:28 AM UTC 24 |
Oct 15 09:17:39 AM UTC 24 |
653915700 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_sec_info_access.3245516009 |
|
|
Oct 15 09:16:23 AM UTC 24 |
Oct 15 09:17:40 AM UTC 24 |
619974900 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_rma_reset.1066829388 |
|
|
Oct 15 09:04:16 AM UTC 24 |
Oct 15 09:17:44 AM UTC 24 |
80139037800 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_prog_reset.2140445880 |
|
|
Oct 15 09:17:29 AM UTC 24 |
Oct 15 09:17:55 AM UTC 24 |
81431600 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_prog_rma_wipe_err.2332041562 |
|
|
Oct 15 09:16:38 AM UTC 24 |
Oct 15 09:18:02 AM UTC 24 |
10019780000 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_connect.2250361100 |
|
|
Oct 15 09:17:56 AM UTC 24 |
Oct 15 09:18:15 AM UTC 24 |
35975000 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict.3283223608 |
|
|
Oct 15 09:17:30 AM UTC 24 |
Oct 15 09:18:17 AM UTC 24 |
48267000 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_disable.1926819046 |
|
|
Oct 15 09:17:41 AM UTC 24 |
Oct 15 09:18:18 AM UTC 24 |
11537400 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict_all_en.1098537975 |
|
|
Oct 15 09:17:41 AM UTC 24 |
Oct 15 09:18:20 AM UTC 24 |
46001500 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw.3283644441 |
|
|
Oct 15 09:11:42 AM UTC 24 |
Oct 15 09:18:21 AM UTC 24 |
45044796900 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_prog_reset.1101388006 |
|
|
Oct 15 09:15:40 AM UTC 24 |
Oct 15 09:18:21 AM UTC 24 |
4354984900 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_phy_arb.1715004829 |
|
|
Oct 15 09:15:11 AM UTC 24 |
Oct 15 09:18:26 AM UTC 24 |
35605700 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_lcmgr_intg.2456147765 |
|
|
Oct 15 09:18:00 AM UTC 24 |
Oct 15 09:18:29 AM UTC 24 |
19869000 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_read_seed_err.2957244543 |
|
|
Oct 15 09:18:03 AM UTC 24 |
Oct 15 09:18:30 AM UTC 24 |
25778600 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_alert_test.3801233038 |
|
|
Oct 15 09:18:17 AM UTC 24 |
Oct 15 09:18:34 AM UTC 24 |
41498500 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_full_mem_access.1707365881 |
|
|
Oct 15 08:37:16 AM UTC 24 |
Oct 15 09:18:40 AM UTC 24 |
350770913000 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd_slow_flash.2644996943 |
|
|
Oct 15 09:14:11 AM UTC 24 |
Oct 15 09:18:41 AM UTC 24 |
12619943300 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_smoke.1436012965 |
|
|
Oct 15 09:16:50 AM UTC 24 |
Oct 15 09:18:43 AM UTC 24 |
33203800 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_re_evict.2459701799 |
|
|
Oct 15 09:17:41 AM UTC 24 |
Oct 15 09:18:48 AM UTC 24 |
293703900 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_wo.941481379 |
|
|
Oct 15 09:15:28 AM UTC 24 |
Oct 15 09:18:51 AM UTC 24 |
5186387000 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_invalid_op.427540138 |
|
|
Oct 15 09:17:13 AM UTC 24 |
Oct 15 09:18:51 AM UTC 24 |
3968456300 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd_slow_flash.2810288290 |
|
|
Oct 15 09:15:38 AM UTC 24 |
Oct 15 09:18:52 AM UTC 24 |
16140633800 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_otp_reset.199965351 |
|
|
Oct 15 09:15:27 AM UTC 24 |
Oct 15 09:18:59 AM UTC 24 |
82326300 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_prog_reset.3527281878 |
|
|
Oct 15 09:18:52 AM UTC 24 |
Oct 15 09:19:10 AM UTC 24 |
20423200 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_sec_info_access.2924258908 |
|
|
Oct 15 09:17:45 AM UTC 24 |
Oct 15 09:19:12 AM UTC 24 |
3549939000 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_sec_otp.3141256670 |
|
|
Oct 15 09:17:00 AM UTC 24 |
Oct 15 09:19:13 AM UTC 24 |
3866595500 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_mp_regions.31749759 |
|
|
Oct 15 09:13:35 AM UTC 24 |
Oct 15 09:19:31 AM UTC 24 |
14635464400 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict.2876914990 |
|
|
Oct 15 09:18:53 AM UTC 24 |
Oct 15 09:19:32 AM UTC 24 |
30633800 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_wo.2929009473 |
|
|
Oct 15 09:17:16 AM UTC 24 |
Oct 15 09:19:34 AM UTC 24 |
1869547600 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_host_ctrl_arb.2664014542 |
|
|
Oct 15 08:23:02 AM UTC 24 |
Oct 15 09:19:40 AM UTC 24 |
264659551300 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_disable.4240394366 |
|
|
Oct 15 09:19:12 AM UTC 24 |
Oct 15 09:19:43 AM UTC 24 |
13408000 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict_all_en.1000552402 |
|
|
Oct 15 09:19:00 AM UTC 24 |
Oct 15 09:19:45 AM UTC 24 |
43939800 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_connect.3307366976 |
|
|
Oct 15 09:19:33 AM UTC 24 |
Oct 15 09:20:01 AM UTC 24 |
58081700 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_alert_test.1325440023 |
|
|
Oct 15 09:19:44 AM UTC 24 |
Oct 15 09:20:01 AM UTC 24 |
103982000 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_lcmgr_intg.1440712024 |
|
|
Oct 15 09:19:33 AM UTC 24 |
Oct 15 09:20:02 AM UTC 24 |
25828100 ps |
| T194 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_otp_reset.2965342883 |
|
|
Oct 15 09:17:07 AM UTC 24 |
Oct 15 09:20:02 AM UTC 24 |
67877300 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_read_seed_err.1721005494 |
|
|
Oct 15 09:19:35 AM UTC 24 |
Oct 15 09:20:05 AM UTC 24 |
47539300 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_invalid_op.2897471715 |
|
|
Oct 15 09:18:35 AM UTC 24 |
Oct 15 09:20:08 AM UTC 24 |
862072600 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_re_evict.539813022 |
|
|
Oct 15 09:19:11 AM UTC 24 |
Oct 15 09:20:08 AM UTC 24 |
217619300 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_sec_otp.3701026762 |
|
|
Oct 15 09:18:23 AM UTC 24 |
Oct 15 09:20:26 AM UTC 24 |
2873663300 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_ro.4212625609 |
|
|
Oct 15 09:18:48 AM UTC 24 |
Oct 15 09:20:29 AM UTC 24 |
2011870800 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_rma_reset.4014768219 |
|
|
Oct 15 09:06:41 AM UTC 24 |
Oct 15 09:20:29 AM UTC 24 |
160195402100 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_smoke.223779921 |
|
|
Oct 15 09:18:18 AM UTC 24 |
Oct 15 09:20:31 AM UTC 24 |
101566600 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_prog_rma_wipe_err.1144008026 |
|
|
Oct 15 09:18:15 AM UTC 24 |
Oct 15 09:20:37 AM UTC 24 |
10012310600 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_prog_rma_wipe_err.1211914143 |
|
|
Oct 15 09:19:42 AM UTC 24 |
Oct 15 09:20:42 AM UTC 24 |
10031572000 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_sec_info_access.594294319 |
|
|
Oct 15 09:19:15 AM UTC 24 |
Oct 15 09:20:45 AM UTC 24 |
4516052600 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_otp_reset.48587934 |
|
|
Oct 15 09:18:30 AM UTC 24 |
Oct 15 09:21:04 AM UTC 24 |
66772800 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_prog_reset.956193502 |
|
|
Oct 15 09:20:43 AM UTC 24 |
Oct 15 09:21:10 AM UTC 24 |
24629300 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_host_ctrl_arb.3222853362 |
|
|
Oct 15 08:27:21 AM UTC 24 |
Oct 15 09:21:13 AM UTC 24 |
1757032810200 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd.3706648314 |
|
|
Oct 15 09:17:27 AM UTC 24 |
Oct 15 09:21:22 AM UTC 24 |
8175502100 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_sec_otp.3551915557 |
|
|
Oct 15 09:20:03 AM UTC 24 |
Oct 15 09:21:38 AM UTC 24 |
4680628400 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd_slow_flash.908107668 |
|
|
Oct 15 09:18:52 AM UTC 24 |
Oct 15 09:21:39 AM UTC 24 |
12234951500 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict.4283384585 |
|
|
Oct 15 09:20:45 AM UTC 24 |
Oct 15 09:21:41 AM UTC 24 |
57119000 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict_all_en.3004878445 |
|
|
Oct 15 09:21:05 AM UTC 24 |
Oct 15 09:21:41 AM UTC 24 |
29325100 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_disable.433948201 |
|
|
Oct 15 09:21:14 AM UTC 24 |
Oct 15 09:21:50 AM UTC 24 |
11974500 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rand_ops.129303641 |
|
|
Oct 15 08:57:39 AM UTC 24 |
Oct 15 09:21:53 AM UTC 24 |
1506845700 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd_slow_flash.1853876505 |
|
|
Oct 15 09:17:29 AM UTC 24 |
Oct 15 09:21:55 AM UTC 24 |
12864808900 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_invalid_op.3220590022 |
|
|
Oct 15 09:20:09 AM UTC 24 |
Oct 15 09:21:55 AM UTC 24 |
1579572200 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_connect.2675324863 |
|
|
Oct 15 09:21:39 AM UTC 24 |
Oct 15 09:21:57 AM UTC 24 |
68994200 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw.1515533032 |
|
|
Oct 15 09:13:47 AM UTC 24 |
Oct 15 09:21:59 AM UTC 24 |
62145317800 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_lcmgr_intg.1626049270 |
|
|
Oct 15 09:21:40 AM UTC 24 |
Oct 15 09:22:03 AM UTC 24 |
54495400 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_read_seed_err.3419898751 |
|
|
Oct 15 09:21:41 AM UTC 24 |
Oct 15 09:22:07 AM UTC 24 |
153697100 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_wo.48940642 |
|
|
Oct 15 09:18:48 AM UTC 24 |
Oct 15 09:22:09 AM UTC 24 |
19304279800 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_phy_arb.644162148 |
|
|
Oct 15 09:11:30 AM UTC 24 |
Oct 15 09:22:09 AM UTC 24 |
5510485600 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_re_evict.2036231956 |
|
|
Oct 15 09:21:11 AM UTC 24 |
Oct 15 09:22:11 AM UTC 24 |
199370900 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_alert_test.2650591300 |
|
|
Oct 15 09:21:50 AM UTC 24 |
Oct 15 09:22:13 AM UTC 24 |
106771000 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_ro.1926631078 |
|
|
Oct 15 09:20:29 AM UTC 24 |
Oct 15 09:22:19 AM UTC 24 |
5198593900 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_mp_regions.3101803693 |
|
|
Oct 15 09:15:27 AM UTC 24 |
Oct 15 09:22:28 AM UTC 24 |
16570909100 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_prog_reset.3785672033 |
|
|
Oct 15 09:22:03 AM UTC 24 |
Oct 15 09:22:29 AM UTC 24 |
22414800 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_sec_info_access.413831850 |
|
|
Oct 15 09:21:23 AM UTC 24 |
Oct 15 09:22:29 AM UTC 24 |
4037812200 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_disable.1413007853 |
|
|
Oct 15 09:22:10 AM UTC 24 |
Oct 15 09:22:40 AM UTC 24 |
21838100 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_connect.4040427707 |
|
|
Oct 15 09:22:14 AM UTC 24 |
Oct 15 09:22:42 AM UTC 24 |
28694600 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_alert_test.854446290 |
|
|
Oct 15 09:22:20 AM UTC 24 |
Oct 15 09:22:45 AM UTC 24 |
113431400 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict_all_en.3289944814 |
|
|
Oct 15 09:22:10 AM UTC 24 |
Oct 15 09:22:47 AM UTC 24 |
44793400 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_otp_reset.641435281 |
|
|
Oct 15 09:20:06 AM UTC 24 |
Oct 15 09:22:58 AM UTC 24 |
40104700 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_hw_sec_otp.2811373137 |
|
|
Oct 15 09:21:56 AM UTC 24 |
Oct 15 09:23:01 AM UTC 24 |
4614022400 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict.1031877285 |
|
|
Oct 15 09:22:09 AM UTC 24 |
Oct 15 09:23:02 AM UTC 24 |
308418400 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_prog_reset.3589534089 |
|
|
Oct 15 09:22:45 AM UTC 24 |
Oct 15 09:23:11 AM UTC 24 |
19484800 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rand_ops.758354670 |
|
|
Oct 15 09:16:56 AM UTC 24 |
Oct 15 09:23:22 AM UTC 24 |
76961800 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd.1520292164 |
|
|
Oct 15 09:18:48 AM UTC 24 |
Oct 15 09:23:24 AM UTC 24 |
1937834400 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_mp_regions.1385014984 |
|
|
Oct 15 09:18:31 AM UTC 24 |
Oct 15 09:23:31 AM UTC 24 |
9547494000 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_disable.3439014406 |
|
|
Oct 15 09:23:02 AM UTC 24 |
Oct 15 09:23:34 AM UTC 24 |
10768200 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_phy_arb.447281366 |
|
|
Oct 15 09:17:00 AM UTC 24 |
Oct 15 09:23:41 AM UTC 24 |
329694600 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_mp_regions.2025075283 |
|
|
Oct 15 09:09:02 AM UTC 24 |
Oct 15 09:23:42 AM UTC 24 |
53682111200 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_sec_info_access.3487002985 |
|
|
Oct 15 09:22:12 AM UTC 24 |
Oct 15 09:23:42 AM UTC 24 |
790805800 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_alert_test.3657412678 |
|
|
Oct 15 09:23:23 AM UTC 24 |
Oct 15 09:23:44 AM UTC 24 |
182793700 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_connect.864668616 |
|
|
Oct 15 09:23:12 AM UTC 24 |
Oct 15 09:23:45 AM UTC 24 |
15329900 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd.3672662676 |
|
|
Oct 15 09:20:32 AM UTC 24 |
Oct 15 09:23:45 AM UTC 24 |
1988631500 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict.204956783 |
|
|
Oct 15 09:22:48 AM UTC 24 |
Oct 15 09:23:48 AM UTC 24 |
75273500 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_prog_rma_wipe_err.3355981959 |
|
|
Oct 15 09:21:42 AM UTC 24 |
Oct 15 09:23:59 AM UTC 24 |
10012237500 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_prog_reset.1474280431 |
|
|
Oct 15 09:23:44 AM UTC 24 |
Oct 15 09:24:08 AM UTC 24 |
37395500 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd.565485393 |
|
|
Oct 15 09:21:58 AM UTC 24 |
Oct 15 09:24:11 AM UTC 24 |
798306500 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_smoke.378533429 |
|
|
Oct 15 09:19:46 AM UTC 24 |
Oct 15 09:24:11 AM UTC 24 |
30014300 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_connect.778415194 |
|
|
Oct 15 09:23:49 AM UTC 24 |
Oct 15 09:24:16 AM UTC 24 |
16877600 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_hw_sec_otp.4094396998 |
|
|
Oct 15 09:22:30 AM UTC 24 |
Oct 15 09:24:16 AM UTC 24 |
1933992800 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_disable.3138902885 |
|
|
Oct 15 09:23:46 AM UTC 24 |
Oct 15 09:24:23 AM UTC 24 |
53438200 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_smoke.2317207628 |
|
|
Oct 15 09:21:54 AM UTC 24 |
Oct 15 09:24:25 AM UTC 24 |
20663400 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict.224187715 |
|
|
Oct 15 09:23:44 AM UTC 24 |
Oct 15 09:24:25 AM UTC 24 |
88480300 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_sec_info_access.3483632957 |
|
|
Oct 15 09:23:03 AM UTC 24 |
Oct 15 09:24:26 AM UTC 24 |
1603588600 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_alert_test.4109599578 |
|
|
Oct 15 09:24:00 AM UTC 24 |
Oct 15 09:24:27 AM UTC 24 |
262267700 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw.3944030627 |
|
|
Oct 15 09:15:28 AM UTC 24 |
Oct 15 09:24:36 AM UTC 24 |
3853758400 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw.844917563 |
|
|
Oct 15 09:17:25 AM UTC 24 |
Oct 15 09:24:44 AM UTC 24 |
7256884600 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_prog_reset.2447791249 |
|
|
Oct 15 09:24:24 AM UTC 24 |
Oct 15 09:24:53 AM UTC 24 |
33179100 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_phy_arb.2709746457 |
|
|
Oct 15 09:20:02 AM UTC 24 |
Oct 15 09:24:56 AM UTC 24 |
182244200 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_alert_test.2513048129 |
|
|
Oct 15 09:24:38 AM UTC 24 |
Oct 15 09:24:57 AM UTC 24 |
31520500 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_connect.599564085 |
|
|
Oct 15 09:24:37 AM UTC 24 |
Oct 15 09:25:02 AM UTC 24 |
16379400 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_disable.4196618073 |
|
|
Oct 15 09:24:26 AM UTC 24 |
Oct 15 09:25:04 AM UTC 24 |
29031300 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rand_ops.2013555471 |
|
|
Oct 15 09:15:11 AM UTC 24 |
Oct 15 09:25:04 AM UTC 24 |
1497564600 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_smoke.2451207142 |
|
|
Oct 15 09:22:30 AM UTC 24 |
Oct 15 09:25:10 AM UTC 24 |
37055000 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_hw_sec_otp.3416496464 |
|
|
Oct 15 09:24:12 AM UTC 24 |
Oct 15 09:25:14 AM UTC 24 |
4762955100 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict_all_en.2349464042 |
|
|
Oct 15 09:24:26 AM UTC 24 |
Oct 15 09:25:16 AM UTC 24 |
79646500 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_sec_info_access.77942347 |
|
|
Oct 15 09:23:46 AM UTC 24 |
Oct 15 09:25:16 AM UTC 24 |
7953406900 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict.2717459768 |
|
|
Oct 15 09:24:25 AM UTC 24 |
Oct 15 09:25:18 AM UTC 24 |
29480500 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_otp_reset.2411050668 |
|
|
Oct 15 09:21:56 AM UTC 24 |
Oct 15 09:25:20 AM UTC 24 |
72152900 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd_slow_flash.1037045631 |
|
|
Oct 15 09:22:43 AM UTC 24 |
Oct 15 09:25:24 AM UTC 24 |
38631049900 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_otp_reset.4201982256 |
|
|
Oct 15 09:22:30 AM UTC 24 |
Oct 15 09:25:25 AM UTC 24 |
145940300 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_hw_sec_otp.2071275793 |
|
|
Oct 15 09:23:32 AM UTC 24 |
Oct 15 09:25:31 AM UTC 24 |
8577058800 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rand_ops.3446741818 |
|
|
Oct 15 09:20:02 AM UTC 24 |
Oct 15 09:25:34 AM UTC 24 |
635742800 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_alert_test.2066496951 |
|
|
Oct 15 09:25:19 AM UTC 24 |
Oct 15 09:25:37 AM UTC 24 |
271819300 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_host_ctrl_arb.3890171274 |
|
|
Oct 15 08:37:09 AM UTC 24 |
Oct 15 09:25:40 AM UTC 24 |
252242189700 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_smoke.2645058651 |
|
|
Oct 15 09:23:24 AM UTC 24 |
Oct 15 09:25:42 AM UTC 24 |
30997800 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_sec_info_access.2611995051 |
|
|
Oct 15 09:24:27 AM UTC 24 |
Oct 15 09:25:43 AM UTC 24 |
2571769600 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_connect.2104508241 |
|
|
Oct 15 09:25:17 AM UTC 24 |
Oct 15 09:25:44 AM UTC 24 |
37817600 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict.3454742879 |
|
|
Oct 15 09:25:06 AM UTC 24 |
Oct 15 09:25:44 AM UTC 24 |
44943900 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict_all_en.3970260395 |
|
|
Oct 15 09:25:11 AM UTC 24 |
Oct 15 09:25:46 AM UTC 24 |
29598700 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_intr_rd.1569794997 |
|
|
Oct 15 09:23:38 AM UTC 24 |
Oct 15 09:25:48 AM UTC 24 |
820442800 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_rma_reset.1964517340 |
|
|
Oct 15 09:08:59 AM UTC 24 |
Oct 15 09:25:51 AM UTC 24 |
160172219200 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw.3076719118 |
|
|
Oct 15 09:18:48 AM UTC 24 |
Oct 15 09:25:52 AM UTC 24 |
3574074000 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_disable.821773066 |
|
|
Oct 15 09:25:15 AM UTC 24 |
Oct 15 09:25:54 AM UTC 24 |
35730600 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd.623642535 |
|
|
Oct 15 09:22:40 AM UTC 24 |
Oct 15 09:25:59 AM UTC 24 |
1726438900 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_prog_reset.4049837579 |
|
|
Oct 15 09:25:38 AM UTC 24 |
Oct 15 09:26:00 AM UTC 24 |
18169600 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_connect.3136337931 |
|
|
Oct 15 09:25:46 AM UTC 24 |
Oct 15 09:26:01 AM UTC 24 |
22762400 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_disable.2147856482 |
|
|
Oct 15 09:25:44 AM UTC 24 |
Oct 15 09:26:08 AM UTC 24 |
10126500 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_intr_rd_slow_flash.964866549 |
|
|
Oct 15 09:23:42 AM UTC 24 |
Oct 15 09:26:13 AM UTC 24 |
5709137500 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_mp_regions.1147572818 |
|
|
Oct 15 09:20:09 AM UTC 24 |
Oct 15 09:26:14 AM UTC 24 |
4944730300 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_alert_test.1019978885 |
|
|
Oct 15 09:25:47 AM UTC 24 |
Oct 15 09:26:16 AM UTC 24 |
127800400 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_otp_reset.1181566246 |
|
|
Oct 15 09:23:35 AM UTC 24 |
Oct 15 09:26:19 AM UTC 24 |
44209900 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict.3654209024 |
|
|
Oct 15 09:25:41 AM UTC 24 |
Oct 15 09:26:19 AM UTC 24 |
43378600 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_smoke.1963765273 |
|
|
Oct 15 09:25:21 AM UTC 24 |
Oct 15 09:26:20 AM UTC 24 |
41622800 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd_slow_flash.1994314202 |
|
|
Oct 15 09:21:59 AM UTC 24 |
Oct 15 09:26:29 AM UTC 24 |
11812647200 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_prog_reset.2796332590 |
|
|
Oct 15 09:26:01 AM UTC 24 |
Oct 15 09:26:32 AM UTC 24 |
1798291100 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict_all_en.1356107197 |
|
|
Oct 15 09:25:42 AM UTC 24 |
Oct 15 09:26:34 AM UTC 24 |
56442900 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_alert_test.3833539338 |
|
|
Oct 15 09:26:20 AM UTC 24 |
Oct 15 09:26:42 AM UTC 24 |
172198800 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict.3966456102 |
|
|
Oct 15 09:26:02 AM UTC 24 |
Oct 15 09:26:42 AM UTC 24 |
69137000 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_smoke.3500612125 |
|
|
Oct 15 09:24:08 AM UTC 24 |
Oct 15 09:26:44 AM UTC 24 |
71303300 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_disable.4127236443 |
|
|
Oct 15 09:26:14 AM UTC 24 |
Oct 15 09:26:47 AM UTC 24 |
14782400 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_sec_info_access.528037625 |
|
|
Oct 15 09:25:17 AM UTC 24 |
Oct 15 09:26:49 AM UTC 24 |
1832549600 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_connect.1670555795 |
|
|
Oct 15 09:26:17 AM UTC 24 |
Oct 15 09:26:49 AM UTC 24 |
37101300 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_rma_reset.2844732020 |
|
|
Oct 15 09:13:31 AM UTC 24 |
Oct 15 09:26:56 AM UTC 24 |
40125030600 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict_all_en.820001427 |
|
|
Oct 15 09:26:09 AM UTC 24 |
Oct 15 09:26:57 AM UTC 24 |
38898400 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd_slow_flash.974390809 |
|
|
Oct 15 09:20:38 AM UTC 24 |
Oct 15 09:27:04 AM UTC 24 |
11347578600 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_sec_info_access.2070913804 |
|
|
Oct 15 09:25:44 AM UTC 24 |
Oct 15 09:27:06 AM UTC 24 |
9639696100 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_prog_reset.4007610135 |
|
|
Oct 15 09:26:42 AM UTC 24 |
Oct 15 09:27:06 AM UTC 24 |
19051200 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_smoke.3935138608 |
|
|
Oct 15 09:24:45 AM UTC 24 |
Oct 15 09:27:06 AM UTC 24 |
77413100 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_phy_arb.1524712196 |
|
|
Oct 15 09:18:23 AM UTC 24 |
Oct 15 09:27:10 AM UTC 24 |
1376280000 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_error_mp.2847302561 |
|
|
Oct 15 08:37:27 AM UTC 24 |
Oct 15 09:27:11 AM UTC 24 |
14002639200 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_connect.378789352 |
|
|
Oct 15 09:26:50 AM UTC 24 |
Oct 15 09:27:13 AM UTC 24 |
46097600 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_alert_test.1104452081 |
|
|
Oct 15 09:26:57 AM UTC 24 |
Oct 15 09:27:18 AM UTC 24 |
139965300 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_hw_sec_otp.4086501161 |
|
|
Oct 15 09:25:24 AM UTC 24 |
Oct 15 09:27:18 AM UTC 24 |
10214103900 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_otp_reset.3601267650 |
|
|
Oct 15 09:24:57 AM UTC 24 |
Oct 15 09:27:23 AM UTC 24 |
126082300 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_sec_info_access.2966019743 |
|
|
Oct 15 09:26:15 AM UTC 24 |
Oct 15 09:27:24 AM UTC 24 |
2196524500 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_intr_rd_slow_flash.3561897066 |
|
|
Oct 15 09:24:17 AM UTC 24 |
Oct 15 09:27:25 AM UTC 24 |
24101205600 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_intr_rd.488991958 |
|
|
Oct 15 09:24:17 AM UTC 24 |
Oct 15 09:27:28 AM UTC 24 |
1954453300 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict_all_en.3937522603 |
|
|
Oct 15 09:26:45 AM UTC 24 |
Oct 15 09:27:29 AM UTC 24 |
53754300 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_otp_reset.3139446730 |
|
|
Oct 15 09:24:13 AM UTC 24 |
Oct 15 09:27:29 AM UTC 24 |
46588800 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_disable.2835011070 |
|
|
Oct 15 09:26:48 AM UTC 24 |
Oct 15 09:27:30 AM UTC 24 |
18176300 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict.3397597900 |
|
|
Oct 15 09:26:43 AM UTC 24 |
Oct 15 09:27:35 AM UTC 24 |
37186700 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_hw_sec_otp.1356100474 |
|
|
Oct 15 09:24:54 AM UTC 24 |
Oct 15 09:27:36 AM UTC 24 |
8055711000 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_alert_test.2353116155 |
|
|
Oct 15 09:27:25 AM UTC 24 |
Oct 15 09:27:44 AM UTC 24 |
33405100 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_disable.1661647197 |
|
|
Oct 15 09:27:18 AM UTC 24 |
Oct 15 09:27:46 AM UTC 24 |
30643500 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd.287790935 |
|
|
Oct 15 09:24:57 AM UTC 24 |
Oct 15 09:27:46 AM UTC 24 |
1594390600 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_connect.1235241450 |
|
|
Oct 15 09:27:24 AM UTC 24 |
Oct 15 09:27:49 AM UTC 24 |
60556200 ps |