| T870 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_smoke.3641530927 |
|
|
Feb 09 06:12:47 AM UTC 25 |
Feb 09 06:15:49 AM UTC 25 |
56030700 ps |
| T871 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_disable.3669646286 |
|
|
Feb 09 06:17:21 AM UTC 25 |
Feb 09 06:18:03 AM UTC 25 |
36018800 ps |
| T872 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_smoke.781045035 |
|
|
Feb 09 06:13:48 AM UTC 25 |
Feb 09 06:15:52 AM UTC 25 |
49866200 ps |
| T873 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_smoke.1767143511 |
|
|
Feb 09 06:13:12 AM UTC 25 |
Feb 09 06:15:54 AM UTC 25 |
18180800 ps |
| T874 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_intr_rd_slow_flash.1719324021 |
|
|
Feb 09 06:13:22 AM UTC 25 |
Feb 09 06:15:54 AM UTC 25 |
11690220800 ps |
| T875 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_alert_test.941362144 |
|
|
Feb 09 06:15:33 AM UTC 25 |
Feb 09 06:15:55 AM UTC 25 |
251432900 ps |
| T876 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_hw_sec_otp.4228694329 |
|
|
Feb 09 06:12:48 AM UTC 25 |
Feb 09 06:15:55 AM UTC 25 |
2465336300 ps |
| T877 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_sec_info_access.1650655699 |
|
|
Feb 09 06:14:15 AM UTC 25 |
Feb 09 06:15:59 AM UTC 25 |
12781826300 ps |
| T878 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_rw_evict_all_en.1896017446 |
|
|
Feb 09 06:15:28 AM UTC 25 |
Feb 09 06:16:04 AM UTC 25 |
69432600 ps |
| T879 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_connect.3766571886 |
|
|
Feb 09 06:15:32 AM UTC 25 |
Feb 09 06:16:05 AM UTC 25 |
25631700 ps |
| T387 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_disable.1943043195 |
|
|
Feb 09 06:15:29 AM UTC 25 |
Feb 09 06:16:08 AM UTC 25 |
13069200 ps |
| T880 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_sec_info_access.2859315034 |
|
|
Feb 09 06:14:57 AM UTC 25 |
Feb 09 06:16:09 AM UTC 25 |
2226206400 ps |
| T881 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_hw_sec_otp.3896632602 |
|
|
Feb 09 06:15:04 AM UTC 25 |
Feb 09 06:16:11 AM UTC 25 |
2045684000 ps |
| T882 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_sec_info_access.362842218 |
|
|
Feb 09 06:16:20 AM UTC 25 |
Feb 09 06:18:01 AM UTC 25 |
608580200 ps |
| T883 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_prog_reset.2850228403 |
|
|
Feb 09 06:15:53 AM UTC 25 |
Feb 09 06:16:14 AM UTC 25 |
38547000 ps |
| T884 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_smoke.2793809981 |
|
|
Feb 09 06:11:02 AM UTC 25 |
Feb 09 06:16:14 AM UTC 25 |
11250286800 ps |
| T885 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_rw_evict.1195692465 |
|
|
Feb 09 06:15:26 AM UTC 25 |
Feb 09 06:16:17 AM UTC 25 |
81254400 ps |
| T886 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_intr_rd.3297053802 |
|
|
Feb 09 06:13:59 AM UTC 25 |
Feb 09 06:16:20 AM UTC 25 |
2030366500 ps |
| T887 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_disable.1375763461 |
|
|
Feb 09 06:15:56 AM UTC 25 |
Feb 09 06:16:20 AM UTC 25 |
15546100 ps |
| T888 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_alert_test.4019023237 |
|
|
Feb 09 06:16:05 AM UTC 25 |
Feb 09 06:16:25 AM UTC 25 |
186479400 ps |
| T889 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_otp_reset.635851975 |
|
|
Feb 09 06:13:15 AM UTC 25 |
Feb 09 06:16:26 AM UTC 25 |
472262200 ps |
| T890 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_connect.2251991612 |
|
|
Feb 09 06:16:00 AM UTC 25 |
Feb 09 06:16:29 AM UTC 25 |
51769100 ps |
| T891 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_error_prog_type.1370877644 |
|
|
Feb 09 05:18:26 AM UTC 25 |
Feb 09 06:16:35 AM UTC 25 |
2043493600 ps |
| T108 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd.2847472598 |
|
|
Feb 09 06:12:51 AM UTC 25 |
Feb 09 06:16:38 AM UTC 25 |
2843976700 ps |
| T892 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_otp_reset.1942107713 |
|
|
Feb 09 06:13:54 AM UTC 25 |
Feb 09 06:16:46 AM UTC 25 |
163119000 ps |
| T893 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_connect.155399039 |
|
|
Feb 09 06:16:21 AM UTC 25 |
Feb 09 06:16:49 AM UTC 25 |
30295400 ps |
| T894 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_alert_test.481543489 |
|
|
Feb 09 06:16:25 AM UTC 25 |
Feb 09 06:16:53 AM UTC 25 |
70073800 ps |
| T895 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_rw_evict_all_en.2650052405 |
|
|
Feb 09 06:15:55 AM UTC 25 |
Feb 09 06:16:53 AM UTC 25 |
69015400 ps |
| T896 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_rw_evict.189909815 |
|
|
Feb 09 06:15:55 AM UTC 25 |
Feb 09 06:16:53 AM UTC 25 |
35191300 ps |
| T897 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_rw_evict.3063303729 |
|
|
Feb 09 06:16:15 AM UTC 25 |
Feb 09 06:16:55 AM UTC 25 |
195590800 ps |
| T898 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_error_prog_type.3854164279 |
|
|
Feb 09 05:25:18 AM UTC 25 |
Feb 09 06:16:55 AM UTC 25 |
1469267500 ps |
| T899 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_rma_reset.2801952497 |
|
|
Feb 09 06:03:37 AM UTC 25 |
Feb 09 06:17:00 AM UTC 25 |
40119376700 ps |
| T385 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_disable.4086185382 |
|
|
Feb 09 06:16:18 AM UTC 25 |
Feb 09 06:17:00 AM UTC 25 |
29216200 ps |
| T900 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_rw_evict_all_en.2580522555 |
|
|
Feb 09 06:16:15 AM UTC 25 |
Feb 09 06:17:03 AM UTC 25 |
115264300 ps |
| T901 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_intr_rd.4095348497 |
|
|
Feb 09 06:14:39 AM UTC 25 |
Feb 09 06:17:06 AM UTC 25 |
759923100 ps |
| T902 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_intr_rd_slow_flash.4201402441 |
|
|
Feb 09 06:14:00 AM UTC 25 |
Feb 09 06:17:09 AM UTC 25 |
25437525300 ps |
| T903 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_alert_test.813412429 |
|
|
Feb 09 06:16:56 AM UTC 25 |
Feb 09 06:17:14 AM UTC 25 |
39582700 ps |
| T904 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_connect.837629011 |
|
|
Feb 09 06:16:56 AM UTC 25 |
Feb 09 06:17:18 AM UTC 25 |
43839800 ps |
| T905 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_sec_info_access.4145256931 |
|
|
Feb 09 06:15:56 AM UTC 25 |
Feb 09 06:17:21 AM UTC 25 |
419366900 ps |
| T906 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_hw_sec_otp.606088588 |
|
|
Feb 09 06:15:33 AM UTC 25 |
Feb 09 06:17:21 AM UTC 25 |
2516956700 ps |
| T418 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_sec_info_access.3233867261 |
|
|
Feb 09 06:15:31 AM UTC 25 |
Feb 09 06:17:21 AM UTC 25 |
3197758800 ps |
| T907 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_disable.3973656510 |
|
|
Feb 09 06:16:54 AM UTC 25 |
Feb 09 06:17:22 AM UTC 25 |
18331400 ps |
| T908 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_intr_rd.702400285 |
|
|
Feb 09 06:15:09 AM UTC 25 |
Feb 09 06:17:23 AM UTC 25 |
701426300 ps |
| T909 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_rma_reset.4151232460 |
|
|
Feb 09 06:01:22 AM UTC 25 |
Feb 09 06:17:24 AM UTC 25 |
50128440600 ps |
| T910 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_otp_reset.1871939907 |
|
|
Feb 09 06:14:39 AM UTC 25 |
Feb 09 06:17:25 AM UTC 25 |
285539500 ps |
| T911 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_intr_rd_slow_flash.148299525 |
|
|
Feb 09 06:11:39 AM UTC 25 |
Feb 09 06:17:26 AM UTC 25 |
37895931000 ps |
| T912 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_intr_rd_slow_flash.119655394 |
|
|
Feb 09 06:14:43 AM UTC 25 |
Feb 09 06:17:32 AM UTC 25 |
46809779400 ps |
| T913 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_connect.1042047328 |
|
|
Feb 09 06:17:22 AM UTC 25 |
Feb 09 06:17:39 AM UTC 25 |
24028700 ps |
| T454 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_rw_evict_all_en.172966794 |
|
|
Feb 09 06:16:53 AM UTC 25 |
Feb 09 06:17:42 AM UTC 25 |
117347700 ps |
| T914 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_rw_evict.2138657180 |
|
|
Feb 09 06:16:50 AM UTC 25 |
Feb 09 06:17:44 AM UTC 25 |
211291700 ps |
| T915 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_smoke.2112279931 |
|
|
Feb 09 06:16:26 AM UTC 25 |
Feb 09 06:17:44 AM UTC 25 |
28685200 ps |
| T916 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw.3406162805 |
|
|
Feb 09 06:08:13 AM UTC 25 |
Feb 09 06:17:46 AM UTC 25 |
19213330600 ps |
| T446 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw.457330005 |
|
|
Feb 09 06:09:21 AM UTC 25 |
Feb 09 06:17:47 AM UTC 25 |
53375815700 ps |
| T917 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_hw_sec_otp.3220229619 |
|
|
Feb 09 06:16:09 AM UTC 25 |
Feb 09 06:17:49 AM UTC 25 |
2639345100 ps |
| T918 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_hw_sec_otp.1954076823 |
|
|
Feb 09 06:14:27 AM UTC 25 |
Feb 09 06:17:50 AM UTC 25 |
11218896000 ps |
| T919 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_alert_test.3006384283 |
|
|
Feb 09 06:17:24 AM UTC 25 |
Feb 09 06:17:51 AM UTC 25 |
50686800 ps |
| T920 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_rw_evict_all_en.2130308084 |
|
|
Feb 09 06:17:19 AM UTC 25 |
Feb 09 06:17:54 AM UTC 25 |
28568600 ps |
| T921 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_alert_test.203039675 |
|
|
Feb 09 06:17:49 AM UTC 25 |
Feb 09 06:18:06 AM UTC 25 |
33314900 ps |
| T922 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_smoke.4266005390 |
|
|
Feb 09 06:15:33 AM UTC 25 |
Feb 09 06:18:08 AM UTC 25 |
34983600 ps |
| T923 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_connect.4059951656 |
|
|
Feb 09 06:17:47 AM UTC 25 |
Feb 09 06:18:13 AM UTC 25 |
46266000 ps |
| T924 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_rw_evict.1182871175 |
|
|
Feb 09 06:17:15 AM UTC 25 |
Feb 09 06:18:14 AM UTC 25 |
31750600 ps |
| T925 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_sec_info_access.3609282262 |
|
|
Feb 09 06:16:54 AM UTC 25 |
Feb 09 06:18:17 AM UTC 25 |
11850003800 ps |
| T926 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_rw_evict.2283008861 |
|
|
Feb 09 06:17:39 AM UTC 25 |
Feb 09 06:18:18 AM UTC 25 |
75191900 ps |
| T198 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_otp_reset.2216698862 |
|
|
Feb 09 06:15:05 AM UTC 25 |
Feb 09 06:18:21 AM UTC 25 |
77777600 ps |
| T927 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_rw_evict_all_en.2698623031 |
|
|
Feb 09 06:17:43 AM UTC 25 |
Feb 09 06:18:22 AM UTC 25 |
30085300 ps |
| T928 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_sec_info_access.1976108899 |
|
|
Feb 09 06:17:22 AM UTC 25 |
Feb 09 06:18:27 AM UTC 25 |
1446729000 ps |
| T929 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_mp_regions.3429880682 |
|
|
Feb 09 06:09:17 AM UTC 25 |
Feb 09 06:18:29 AM UTC 25 |
115244506200 ps |
| T930 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_disable.378588060 |
|
|
Feb 09 06:17:44 AM UTC 25 |
Feb 09 06:18:30 AM UTC 25 |
31281300 ps |
| T931 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_otp_reset.1049320 |
|
|
Feb 09 06:15:44 AM UTC 25 |
Feb 09 06:18:37 AM UTC 25 |
546180400 ps |
| T932 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rand_ops.4016523138 |
|
|
Feb 09 06:05:38 AM UTC 25 |
Feb 09 06:18:38 AM UTC 25 |
373800600 ps |
| T933 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_intr_rd_slow_flash.1221558763 |
|
|
Feb 09 06:16:15 AM UTC 25 |
Feb 09 06:18:41 AM UTC 25 |
12060747400 ps |
| T934 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_alert_test.3906295639 |
|
|
Feb 09 06:18:18 AM UTC 25 |
Feb 09 06:18:43 AM UTC 25 |
104685800 ps |
| T935 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_intr_rd.2747468226 |
|
|
Feb 09 06:16:12 AM UTC 25 |
Feb 09 06:18:44 AM UTC 25 |
640372400 ps |
| T936 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_connect.1830091063 |
|
|
Feb 09 06:18:15 AM UTC 25 |
Feb 09 06:18:46 AM UTC 25 |
74522900 ps |
| T405 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_disable.1543429225 |
|
|
Feb 09 06:18:10 AM UTC 25 |
Feb 09 06:18:47 AM UTC 25 |
13784500 ps |
| T937 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_smoke.227578640 |
|
|
Feb 09 06:14:26 AM UTC 25 |
Feb 09 06:18:48 AM UTC 25 |
70223800 ps |
| T938 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_rw_evict.3006361797 |
|
|
Feb 09 06:18:04 AM UTC 25 |
Feb 09 06:18:56 AM UTC 25 |
100189000 ps |
| T428 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_sec_info_access.1005664350 |
|
|
Feb 09 06:17:45 AM UTC 25 |
Feb 09 06:19:01 AM UTC 25 |
1545628000 ps |
| T939 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_rw_evict_all_en.2126806313 |
|
|
Feb 09 06:18:06 AM UTC 25 |
Feb 09 06:19:03 AM UTC 25 |
87173300 ps |
| T333 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_hw_sec_otp.3710317825 |
|
|
Feb 09 06:16:30 AM UTC 25 |
Feb 09 06:19:06 AM UTC 25 |
8239476600 ps |
| T940 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_smoke.3627901637 |
|
|
Feb 09 06:16:06 AM UTC 25 |
Feb 09 06:19:07 AM UTC 25 |
8450320100 ps |
| T941 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_connect.2984294650 |
|
|
Feb 09 06:18:43 AM UTC 25 |
Feb 09 06:19:08 AM UTC 25 |
25870700 ps |
| T942 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_alert_test.2964408691 |
|
|
Feb 09 06:18:45 AM UTC 25 |
Feb 09 06:19:13 AM UTC 25 |
45916400 ps |
| T943 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_disable.990293072 |
|
|
Feb 09 06:18:39 AM UTC 25 |
Feb 09 06:19:18 AM UTC 25 |
15024200 ps |
| T331 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_hw_sec_otp.1879049457 |
|
|
Feb 09 06:17:25 AM UTC 25 |
Feb 09 06:19:19 AM UTC 25 |
1731286500 ps |
| T944 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_intr_rd.2090597679 |
|
|
Feb 09 06:15:49 AM UTC 25 |
Feb 09 06:19:19 AM UTC 25 |
3396750400 ps |
| T945 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_intr_rd.2331413613 |
|
|
Feb 09 06:17:07 AM UTC 25 |
Feb 09 06:19:23 AM UTC 25 |
4986568000 ps |
| T946 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_intr_rd.2025352458 |
|
|
Feb 09 06:16:39 AM UTC 25 |
Feb 09 06:19:23 AM UTC 25 |
1360414300 ps |
| T947 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_rw_evict.1087990313 |
|
|
Feb 09 06:18:31 AM UTC 25 |
Feb 09 06:19:24 AM UTC 25 |
45016500 ps |
| T948 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_otp_reset.722280048 |
|
|
Feb 09 06:16:10 AM UTC 25 |
Feb 09 06:19:24 AM UTC 25 |
132237100 ps |
| T949 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_smoke.2609306776 |
|
|
Feb 09 06:17:50 AM UTC 25 |
Feb 09 06:19:26 AM UTC 25 |
25761200 ps |
| T950 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_rw_evict_all_en.2701204541 |
|
|
Feb 09 06:18:38 AM UTC 25 |
Feb 09 06:19:28 AM UTC 25 |
29666200 ps |
| T951 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rand_ops.1370839755 |
|
|
Feb 09 05:57:37 AM UTC 25 |
Feb 09 06:19:30 AM UTC 25 |
8652034000 ps |
| T406 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_sec_info_access.3944648374 |
|
|
Feb 09 06:18:14 AM UTC 25 |
Feb 09 06:19:36 AM UTC 25 |
1837395000 ps |
| T952 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_intr_rd.3997299838 |
|
|
Feb 09 06:17:27 AM UTC 25 |
Feb 09 06:19:39 AM UTC 25 |
1195442800 ps |
| T953 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_hw_sec_otp.3350985716 |
|
|
Feb 09 06:17:51 AM UTC 25 |
Feb 09 06:19:41 AM UTC 25 |
3055610900 ps |
| T954 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_hw_sec_otp.1169589258 |
|
|
Feb 09 06:18:21 AM UTC 25 |
Feb 09 06:19:42 AM UTC 25 |
4745478400 ps |
| T955 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_connect.2545233538 |
|
|
Feb 09 06:19:14 AM UTC 25 |
Feb 09 06:19:42 AM UTC 25 |
23425300 ps |
| T956 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_disable.4192555457 |
|
|
Feb 09 06:19:08 AM UTC 25 |
Feb 09 06:19:42 AM UTC 25 |
10085400 ps |
| T957 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_alert_test.4046416546 |
|
|
Feb 09 06:19:18 AM UTC 25 |
Feb 09 06:19:45 AM UTC 25 |
50939400 ps |
| T958 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_rw_evict_all_en.3958739013 |
|
|
Feb 09 06:19:07 AM UTC 25 |
Feb 09 06:19:45 AM UTC 25 |
73384400 ps |
| T959 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_rw_evict.3837464950 |
|
|
Feb 09 06:19:04 AM UTC 25 |
Feb 09 06:19:47 AM UTC 25 |
195104500 ps |
| T960 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_smoke.3829714726 |
|
|
Feb 09 06:17:24 AM UTC 25 |
Feb 09 06:19:51 AM UTC 25 |
44322400 ps |
| T961 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_intr_rd_slow_flash.1261517778 |
|
|
Feb 09 06:15:50 AM UTC 25 |
Feb 09 06:19:54 AM UTC 25 |
13646616000 ps |
| T962 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_disable.1958482099 |
|
|
Feb 09 06:19:29 AM UTC 25 |
Feb 09 06:19:56 AM UTC 25 |
31930400 ps |
| T963 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_smoke.2943864869 |
|
|
Feb 09 06:15:03 AM UTC 25 |
Feb 09 06:19:59 AM UTC 25 |
1934728600 ps |
| T964 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_smoke.1251369316 |
|
|
Feb 09 06:18:19 AM UTC 25 |
Feb 09 06:20:02 AM UTC 25 |
135729100 ps |
| T332 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_hw_sec_otp.3114420205 |
|
|
Feb 09 06:17:01 AM UTC 25 |
Feb 09 06:20:03 AM UTC 25 |
29451524900 ps |
| T965 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_connect.431776487 |
|
|
Feb 09 06:19:37 AM UTC 25 |
Feb 09 06:20:04 AM UTC 25 |
14043000 ps |
| T966 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_intr_rd_slow_flash.4036415056 |
|
|
Feb 09 06:15:12 AM UTC 25 |
Feb 09 06:20:07 AM UTC 25 |
47909033000 ps |
| T967 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_intr_rd_slow_flash.2241986770 |
|
|
Feb 09 06:17:33 AM UTC 25 |
Feb 09 06:20:08 AM UTC 25 |
23783765700 ps |
| T968 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_otp_reset.85657453 |
|
|
Feb 09 06:17:05 AM UTC 25 |
Feb 09 06:20:09 AM UTC 25 |
308111500 ps |
| T969 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_alert_test.2936992036 |
|
|
Feb 09 06:19:41 AM UTC 25 |
Feb 09 06:20:10 AM UTC 25 |
128301000 ps |
| T970 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_rw_evict_all_en.2880515271 |
|
|
Feb 09 06:19:27 AM UTC 25 |
Feb 09 06:20:14 AM UTC 25 |
40151900 ps |
| T971 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_hw_sec_otp.2562677279 |
|
|
Feb 09 06:18:48 AM UTC 25 |
Feb 09 06:20:18 AM UTC 25 |
2112840400 ps |
| T972 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_connect.2917005910 |
|
|
Feb 09 06:19:57 AM UTC 25 |
Feb 09 06:20:18 AM UTC 25 |
53395700 ps |
| T973 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_rw_evict.913697755 |
|
|
Feb 09 06:19:25 AM UTC 25 |
Feb 09 06:20:19 AM UTC 25 |
78744400 ps |
| T974 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_alert_test.2620758543 |
|
|
Feb 09 06:20:00 AM UTC 25 |
Feb 09 06:20:20 AM UTC 25 |
53985900 ps |
| T975 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_rw_evict.1956941165 |
|
|
Feb 09 06:19:46 AM UTC 25 |
Feb 09 06:20:23 AM UTC 25 |
96640000 ps |
| T423 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_sec_info_access.1192597242 |
|
|
Feb 09 06:18:41 AM UTC 25 |
Feb 09 06:20:24 AM UTC 25 |
1470528700 ps |
| T976 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_hw_sec_otp.1442188978 |
|
|
Feb 09 06:19:20 AM UTC 25 |
Feb 09 06:20:24 AM UTC 25 |
1042544900 ps |
| T977 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_rma_reset.40280172 |
|
|
Feb 09 06:05:51 AM UTC 25 |
Feb 09 06:20:29 AM UTC 25 |
160193398000 ps |
| T978 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_otp_reset.479272704 |
|
|
Feb 09 06:17:26 AM UTC 25 |
Feb 09 06:20:29 AM UTC 25 |
78184800 ps |
| T191 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_otp_reset.3847061267 |
|
|
Feb 09 06:16:36 AM UTC 25 |
Feb 09 06:20:29 AM UTC 25 |
36065200 ps |
| T979 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_disable.3397828388 |
|
|
Feb 09 06:19:51 AM UTC 25 |
Feb 09 06:20:31 AM UTC 25 |
11390800 ps |
| T980 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_otp_reset.4189511142 |
|
|
Feb 09 06:18:23 AM UTC 25 |
Feb 09 06:20:38 AM UTC 25 |
39990200 ps |
| T981 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_rw_evict_all_en.575374909 |
|
|
Feb 09 06:19:48 AM UTC 25 |
Feb 09 06:20:39 AM UTC 25 |
48914600 ps |
| T982 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_otp_reset.1017953422 |
|
|
Feb 09 06:17:52 AM UTC 25 |
Feb 09 06:20:40 AM UTC 25 |
72835500 ps |
| T983 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_alert_test.395094303 |
|
|
Feb 09 06:20:20 AM UTC 25 |
Feb 09 06:20:40 AM UTC 25 |
244508100 ps |
| T984 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_connect.3228787049 |
|
|
Feb 09 06:20:19 AM UTC 25 |
Feb 09 06:20:42 AM UTC 25 |
19442000 ps |
| T396 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_disable.2169019393 |
|
|
Feb 09 06:20:14 AM UTC 25 |
Feb 09 06:20:44 AM UTC 25 |
23170600 ps |
| T420 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_sec_info_access.1502754529 |
|
|
Feb 09 06:19:30 AM UTC 25 |
Feb 09 06:20:46 AM UTC 25 |
527505300 ps |
| T985 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_alert_test.1727752774 |
|
|
Feb 09 06:20:30 AM UTC 25 |
Feb 09 06:20:50 AM UTC 25 |
91419400 ps |
| T986 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_connect.3588282287 |
|
|
Feb 09 06:20:29 AM UTC 25 |
Feb 09 06:20:57 AM UTC 25 |
44723300 ps |
| T389 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_disable.2692808740 |
|
|
Feb 09 06:20:25 AM UTC 25 |
Feb 09 06:21:02 AM UTC 25 |
158675700 ps |
| T421 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_sec_info_access.526786404 |
|
|
Feb 09 06:19:09 AM UTC 25 |
Feb 09 06:21:03 AM UTC 25 |
3488252500 ps |
| T987 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_intr_rd.1378278982 |
|
|
Feb 09 06:18:57 AM UTC 25 |
Feb 09 06:21:03 AM UTC 25 |
678664000 ps |
| T988 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_alert_test.3681408221 |
|
|
Feb 09 06:20:45 AM UTC 25 |
Feb 09 06:21:04 AM UTC 25 |
433101400 ps |
| T989 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_rw_evict_all_en.2490303697 |
|
|
Feb 09 06:20:10 AM UTC 25 |
Feb 09 06:21:04 AM UTC 25 |
30484600 ps |
| T990 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_rw_evict.287981906 |
|
|
Feb 09 06:20:10 AM UTC 25 |
Feb 09 06:21:06 AM UTC 25 |
30603100 ps |
| T991 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_connect.3872594278 |
|
|
Feb 09 06:20:43 AM UTC 25 |
Feb 09 06:21:08 AM UTC 25 |
151934800 ps |
| T992 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_disable.4261367786 |
|
|
Feb 09 06:20:41 AM UTC 25 |
Feb 09 06:21:13 AM UTC 25 |
14980400 ps |
| T993 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rand_ops.945470121 |
|
|
Feb 09 06:09:08 AM UTC 25 |
Feb 09 06:21:16 AM UTC 25 |
1004266400 ps |
| T994 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_alert_test.3322092408 |
|
|
Feb 09 06:21:05 AM UTC 25 |
Feb 09 06:21:26 AM UTC 25 |
29991700 ps |
| T995 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_intr_rd.2018428250 |
|
|
Feb 09 06:17:55 AM UTC 25 |
Feb 09 06:21:26 AM UTC 25 |
1124210100 ps |
| T996 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_sec_info_access.392699685 |
|
|
Feb 09 06:19:55 AM UTC 25 |
Feb 09 06:21:28 AM UTC 25 |
545086900 ps |
| T997 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_smoke.1643379968 |
|
|
Feb 09 06:17:01 AM UTC 25 |
Feb 09 06:21:29 AM UTC 25 |
244745900 ps |
| T998 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_intr_rd.179451159 |
|
|
Feb 09 06:18:27 AM UTC 25 |
Feb 09 06:21:30 AM UTC 25 |
5142502000 ps |
| T999 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_otp_reset.2193330455 |
|
|
Feb 09 06:18:49 AM UTC 25 |
Feb 09 06:21:34 AM UTC 25 |
219992600 ps |
| T1000 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_connect.1936861677 |
|
|
Feb 09 06:21:05 AM UTC 25 |
Feb 09 06:21:39 AM UTC 25 |
45457300 ps |
| T1001 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_sec_info_access.2050623805 |
|
|
Feb 09 06:20:19 AM UTC 25 |
Feb 09 06:21:40 AM UTC 25 |
1603560500 ps |
| T399 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_disable.3844570554 |
|
|
Feb 09 06:21:02 AM UTC 25 |
Feb 09 06:21:42 AM UTC 25 |
46206200 ps |
| T1002 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_error_mp.3332025372 |
|
|
Feb 09 05:25:28 AM UTC 25 |
Feb 09 06:21:44 AM UTC 25 |
3927894600 ps |
| T1003 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_hw_sec_otp.4068070010 |
|
|
Feb 09 06:19:43 AM UTC 25 |
Feb 09 06:21:44 AM UTC 25 |
14067328600 ps |
| T1004 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_connect.3189187316 |
|
|
Feb 09 06:21:27 AM UTC 25 |
Feb 09 06:21:45 AM UTC 25 |
24391700 ps |
| T1005 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_disable.887854759 |
|
|
Feb 09 06:21:14 AM UTC 25 |
Feb 09 06:21:47 AM UTC 25 |
10782600 ps |
| T1006 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_alert_test.1846766384 |
|
|
Feb 09 06:21:28 AM UTC 25 |
Feb 09 06:21:47 AM UTC 25 |
79211500 ps |
| T1007 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_intr_rd_slow_flash.201775404 |
|
|
Feb 09 06:16:47 AM UTC 25 |
Feb 09 06:21:50 AM UTC 25 |
19262775800 ps |
| T1008 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_intr_rd_slow_flash.1291852421 |
|
|
Feb 09 06:17:10 AM UTC 25 |
Feb 09 06:21:56 AM UTC 25 |
21722174000 ps |
| T1009 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_intr_rd_slow_flash.226623476 |
|
|
Feb 09 06:19:25 AM UTC 25 |
Feb 09 06:21:58 AM UTC 25 |
12981541000 ps |
| T1010 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_otp_reset.1486980154 |
|
|
Feb 09 06:19:24 AM UTC 25 |
Feb 09 06:22:03 AM UTC 25 |
42258500 ps |
| T1011 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_connect.105128865 |
|
|
Feb 09 06:21:40 AM UTC 25 |
Feb 09 06:22:03 AM UTC 25 |
26984000 ps |
| T1012 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_sec_info_access.2986199286 |
|
|
Feb 09 06:20:41 AM UTC 25 |
Feb 09 06:22:04 AM UTC 25 |
4036544400 ps |
| T1013 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_alert_test.2396505037 |
|
|
Feb 09 06:21:43 AM UTC 25 |
Feb 09 06:22:06 AM UTC 25 |
54017300 ps |
| T1014 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_sec_info_access.4220240462 |
|
|
Feb 09 06:20:29 AM UTC 25 |
Feb 09 06:22:10 AM UTC 25 |
11528353400 ps |
| T1015 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_smoke.2482678532 |
|
|
Feb 09 06:20:31 AM UTC 25 |
Feb 09 06:22:10 AM UTC 25 |
27831500 ps |
| T1016 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_connect.3663591830 |
|
|
Feb 09 06:21:51 AM UTC 25 |
Feb 09 06:22:10 AM UTC 25 |
25581300 ps |
| T390 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_disable.424092374 |
|
|
Feb 09 06:21:35 AM UTC 25 |
Feb 09 06:22:11 AM UTC 25 |
22631200 ps |
| T1017 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_disable.2777427691 |
|
|
Feb 09 06:21:48 AM UTC 25 |
Feb 09 06:22:14 AM UTC 25 |
26056100 ps |
| T1018 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_hw_sec_otp.3598028372 |
|
|
Feb 09 06:20:39 AM UTC 25 |
Feb 09 06:22:18 AM UTC 25 |
6981333100 ps |
| T1019 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_sec_info_access.1118539930 |
|
|
Feb 09 06:21:04 AM UTC 25 |
Feb 09 06:22:20 AM UTC 25 |
3683998000 ps |
| T1020 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_alert_test.2169032228 |
|
|
Feb 09 06:21:57 AM UTC 25 |
Feb 09 06:22:21 AM UTC 25 |
131781800 ps |
| T1021 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_hw_sec_otp.2184386221 |
|
|
Feb 09 06:20:04 AM UTC 25 |
Feb 09 06:22:23 AM UTC 25 |
3423600800 ps |
| T1022 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_smoke.2067670257 |
|
|
Feb 09 06:18:46 AM UTC 25 |
Feb 09 06:22:24 AM UTC 25 |
35617500 ps |
| T1023 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_smoke.428563487 |
|
|
Feb 09 06:19:20 AM UTC 25 |
Feb 09 06:22:26 AM UTC 25 |
64431500 ps |
| T1024 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_connect.3075253418 |
|
|
Feb 09 06:22:11 AM UTC 25 |
Feb 09 06:22:33 AM UTC 25 |
14337700 ps |
| T1025 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_hw_sec_otp.823416937 |
|
|
Feb 09 06:21:07 AM UTC 25 |
Feb 09 06:22:34 AM UTC 25 |
1277642600 ps |
| T1026 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_alert_test.1696473493 |
|
|
Feb 09 06:22:11 AM UTC 25 |
Feb 09 06:22:35 AM UTC 25 |
52239800 ps |
| T1027 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_intr_rd.3586674360 |
|
|
Feb 09 06:19:24 AM UTC 25 |
Feb 09 06:22:39 AM UTC 25 |
1687364000 ps |
| T1028 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_smoke.740330000 |
|
|
Feb 09 06:20:03 AM UTC 25 |
Feb 09 06:22:41 AM UTC 25 |
21013400 ps |
| T397 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_otp_reset.2905736057 |
|
|
Feb 09 06:20:05 AM UTC 25 |
Feb 09 06:22:43 AM UTC 25 |
105215000 ps |
| T1029 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_otp_reset.2218477037 |
|
|
Feb 09 06:19:43 AM UTC 25 |
Feb 09 06:22:45 AM UTC 25 |
73426500 ps |
| T1030 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_intr_rd_slow_flash.1699336357 |
|
|
Feb 09 06:18:31 AM UTC 25 |
Feb 09 06:22:45 AM UTC 25 |
51736470700 ps |
| T1031 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_disable.4122658775 |
|
|
Feb 09 06:22:05 AM UTC 25 |
Feb 09 06:22:47 AM UTC 25 |
10990400 ps |
| T1032 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_alert_test.1846172377 |
|
|
Feb 09 06:22:24 AM UTC 25 |
Feb 09 06:22:48 AM UTC 25 |
27757900 ps |
| T386 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_disable.1924545277 |
|
|
Feb 09 06:22:19 AM UTC 25 |
Feb 09 06:22:50 AM UTC 25 |
10742300 ps |
| T1033 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_rma_reset.1387108364 |
|
|
Feb 09 06:07:50 AM UTC 25 |
Feb 09 06:22:50 AM UTC 25 |
40124183300 ps |
| T1034 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_connect.2396979369 |
|
|
Feb 09 06:22:22 AM UTC 25 |
Feb 09 06:22:51 AM UTC 25 |
48232400 ps |
| T1035 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_alert_test.3623095045 |
|
|
Feb 09 06:22:42 AM UTC 25 |
Feb 09 06:22:59 AM UTC 25 |
135299700 ps |
| T1036 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_sec_info_access.101334310 |
|
|
Feb 09 06:21:17 AM UTC 25 |
Feb 09 06:23:00 AM UTC 25 |
3619921100 ps |
| T1037 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_intr_rd.2968969753 |
|
|
Feb 09 06:20:08 AM UTC 25 |
Feb 09 06:23:00 AM UTC 25 |
6414320500 ps |
| T1038 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_sec_info_access.620327444 |
|
|
Feb 09 06:21:39 AM UTC 25 |
Feb 09 06:23:02 AM UTC 25 |
6513379500 ps |
| T1039 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_connect.3320727452 |
|
|
Feb 09 06:22:40 AM UTC 25 |
Feb 09 06:23:04 AM UTC 25 |
49784300 ps |
| T1040 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_rma_reset.3076944268 |
|
|
Feb 09 06:09:15 AM UTC 25 |
Feb 09 06:23:10 AM UTC 25 |
80139927500 ps |
| T424 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_sec_info_access.1178249750 |
|
|
Feb 09 06:21:48 AM UTC 25 |
Feb 09 06:23:16 AM UTC 25 |
9289510900 ps |
| T1041 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_alert_test.2250942329 |
|
|
Feb 09 06:22:51 AM UTC 25 |
Feb 09 06:23:17 AM UTC 25 |
21169100 ps |
| T1042 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_connect.3190916744 |
|
|
Feb 09 06:22:51 AM UTC 25 |
Feb 09 06:23:19 AM UTC 25 |
13817400 ps |
| T1043 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_disable.2230921039 |
|
|
Feb 09 06:22:35 AM UTC 25 |
Feb 09 06:23:19 AM UTC 25 |
16245300 ps |
| T1044 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_disable.2848182163 |
|
|
Feb 09 06:22:48 AM UTC 25 |
Feb 09 06:23:19 AM UTC 25 |
26697000 ps |
| T1045 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_sec_info_access.3143275678 |
|
|
Feb 09 06:22:06 AM UTC 25 |
Feb 09 06:23:22 AM UTC 25 |
1473010200 ps |
| T1046 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_otp_reset.4011634477 |
|
|
Feb 09 06:20:25 AM UTC 25 |
Feb 09 06:23:24 AM UTC 25 |
78372800 ps |
| T1047 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_hw_sec_otp.3042450400 |
|
|
Feb 09 06:22:12 AM UTC 25 |
Feb 09 06:23:26 AM UTC 25 |
2010253900 ps |
| T1048 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/52.flash_ctrl_connect.756470275 |
|
|
Feb 09 06:23:05 AM UTC 25 |
Feb 09 06:23:26 AM UTC 25 |
16001400 ps |
| T1049 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/50.flash_ctrl_connect.3140848905 |
|
|
Feb 09 06:23:01 AM UTC 25 |
Feb 09 06:23:28 AM UTC 25 |
40774200 ps |
| T1050 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_intr_rd_slow_flash.2109568033 |
|
|
Feb 09 06:19:02 AM UTC 25 |
Feb 09 06:23:28 AM UTC 25 |
51622807400 ps |
| T1051 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/51.flash_ctrl_connect.4273909266 |
|
|
Feb 09 06:23:01 AM UTC 25 |
Feb 09 06:23:28 AM UTC 25 |
14481000 ps |
| T1052 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_otp_reset.1140909712 |
|
|
Feb 09 06:20:58 AM UTC 25 |
Feb 09 06:23:39 AM UTC 25 |
165500400 ps |
| T1053 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/54.flash_ctrl_connect.2059085416 |
|
|
Feb 09 06:23:19 AM UTC 25 |
Feb 09 06:23:39 AM UTC 25 |
14760300 ps |
| T1054 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_hw_sec_otp.1843927417 |
|
|
Feb 09 06:20:24 AM UTC 25 |
Feb 09 06:23:39 AM UTC 25 |
5172441400 ps |
| T1055 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_error_mp.447554003 |
|
|
Feb 09 05:31:17 AM UTC 25 |
Feb 09 06:23:40 AM UTC 25 |
7785815700 ps |
| T1056 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_intr_rd_slow_flash.3514587734 |
|
|
Feb 09 06:18:02 AM UTC 25 |
Feb 09 06:23:41 AM UTC 25 |
35109674300 ps |
| T1057 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/55.flash_ctrl_connect.2260083149 |
|
|
Feb 09 06:23:21 AM UTC 25 |
Feb 09 06:23:42 AM UTC 25 |
14415600 ps |
| T1058 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_smoke.2856957968 |
|
|
Feb 09 06:21:05 AM UTC 25 |
Feb 09 06:23:42 AM UTC 25 |
31475900 ps |
| T1059 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/53.flash_ctrl_connect.2045174427 |
|
|
Feb 09 06:23:17 AM UTC 25 |
Feb 09 06:23:42 AM UTC 25 |
25761500 ps |
| T1060 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/56.flash_ctrl_connect.2547954474 |
|
|
Feb 09 06:23:26 AM UTC 25 |
Feb 09 06:23:46 AM UTC 25 |
51017800 ps |
| T1061 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_smoke.1169414004 |
|
|
Feb 09 06:21:45 AM UTC 25 |
Feb 09 06:23:47 AM UTC 25 |
42788700 ps |
| T334 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_hw_sec_otp.350160083 |
|
|
Feb 09 06:21:30 AM UTC 25 |
Feb 09 06:23:48 AM UTC 25 |
1589299400 ps |
| T1062 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_smoke.408935685 |
|
|
Feb 09 06:21:29 AM UTC 25 |
Feb 09 06:23:50 AM UTC 25 |
21834600 ps |
| T1063 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_smoke.2506050013 |
|
|
Feb 09 06:20:46 AM UTC 25 |
Feb 09 06:23:50 AM UTC 25 |
87260600 ps |
| T1064 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/57.flash_ctrl_connect.1898068385 |
|
|
Feb 09 06:23:27 AM UTC 25 |
Feb 09 06:23:52 AM UTC 25 |
21322100 ps |
| T1065 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/58.flash_ctrl_connect.3838772819 |
|
|
Feb 09 06:23:29 AM UTC 25 |
Feb 09 06:23:53 AM UTC 25 |
14072500 ps |
| T1066 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_sec_info_access.3279601417 |
|
|
Feb 09 06:22:21 AM UTC 25 |
Feb 09 06:23:54 AM UTC 25 |
1124888900 ps |
| T1067 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_smoke.2723244468 |
|
|
Feb 09 06:21:59 AM UTC 25 |
Feb 09 06:23:58 AM UTC 25 |
30408600 ps |
| T1068 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_smoke.4165605814 |
|
|
Feb 09 06:22:25 AM UTC 25 |
Feb 09 06:23:59 AM UTC 25 |
23224000 ps |
| T1069 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_sec_info_access.1080209746 |
|
|
Feb 09 06:22:36 AM UTC 25 |
Feb 09 06:24:00 AM UTC 25 |
3968201900 ps |
| T1070 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_hw_sec_otp.561395891 |
|
|
Feb 09 06:22:27 AM UTC 25 |
Feb 09 06:24:00 AM UTC 25 |
3752107000 ps |
| T1071 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_otp_reset.3083830674 |
|
|
Feb 09 06:20:40 AM UTC 25 |
Feb 09 06:24:01 AM UTC 25 |
39578000 ps |
| T1072 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_intr_rd.2953477966 |
|
|
Feb 09 06:19:43 AM UTC 25 |
Feb 09 06:24:01 AM UTC 25 |
3615904700 ps |
| T1073 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_smoke.2330134800 |
|
|
Feb 09 06:20:21 AM UTC 25 |
Feb 09 06:24:01 AM UTC 25 |
32925200 ps |
| T1074 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_hw_sec_otp.2890456858 |
|
|
Feb 09 06:22:46 AM UTC 25 |
Feb 09 06:24:01 AM UTC 25 |
550111600 ps |
| T1075 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/59.flash_ctrl_connect.639918973 |
|
|
Feb 09 06:23:41 AM UTC 25 |
Feb 09 06:24:05 AM UTC 25 |
40538800 ps |
| T1076 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/60.flash_ctrl_connect.2146450070 |
|
|
Feb 09 06:23:41 AM UTC 25 |
Feb 09 06:24:05 AM UTC 25 |
36877000 ps |
| T1077 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/62.flash_ctrl_connect.3447004856 |
|
|
Feb 09 06:23:43 AM UTC 25 |
Feb 09 06:24:05 AM UTC 25 |
209650600 ps |
| T1078 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/63.flash_ctrl_connect.2320126339 |
|
|
Feb 09 06:23:47 AM UTC 25 |
Feb 09 06:24:05 AM UTC 25 |
49499600 ps |
| T1079 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/61.flash_ctrl_connect.3437775208 |
|
|
Feb 09 06:23:42 AM UTC 25 |
Feb 09 06:24:05 AM UTC 25 |
23819300 ps |
| T1080 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_hw_sec_otp.3332902351 |
|
|
Feb 09 06:22:04 AM UTC 25 |
Feb 09 06:24:06 AM UTC 25 |
14937071100 ps |
| T212 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_otp_reset.15016788 |
|
|
Feb 09 06:21:31 AM UTC 25 |
Feb 09 06:24:09 AM UTC 25 |
115328900 ps |
| T1081 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_error_mp.3529407269 |
|
|
Feb 09 05:38:46 AM UTC 25 |
Feb 09 06:24:11 AM UTC 25 |
5504164800 ps |
| T1082 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_otp_reset.3232197830 |
|
|
Feb 09 06:21:09 AM UTC 25 |
Feb 09 06:24:12 AM UTC 25 |
43622400 ps |
| T1083 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_hw_sec_otp.674756000 |
|
|
Feb 09 06:21:45 AM UTC 25 |
Feb 09 06:24:13 AM UTC 25 |
19226428700 ps |
| T1084 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/64.flash_ctrl_connect.758355691 |
|
|
Feb 09 06:23:49 AM UTC 25 |
Feb 09 06:24:14 AM UTC 25 |
22692200 ps |
| T1085 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/65.flash_ctrl_connect.1293336540 |
|
|
Feb 09 06:23:51 AM UTC 25 |
Feb 09 06:24:15 AM UTC 25 |
14076200 ps |
| T1086 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_smoke.2077062021 |
|
|
Feb 09 06:19:43 AM UTC 25 |
Feb 09 06:24:16 AM UTC 25 |
23193400 ps |
| T1087 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/69.flash_ctrl_connect.1608558098 |
|
|
Feb 09 06:24:01 AM UTC 25 |
Feb 09 06:24:18 AM UTC 25 |
58897400 ps |
| T1088 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/66.flash_ctrl_connect.1424804036 |
|
|
Feb 09 06:23:54 AM UTC 25 |
Feb 09 06:24:21 AM UTC 25 |
13313400 ps |
| T1089 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_sec_info_access.96691299 |
|
|
Feb 09 06:22:48 AM UTC 25 |
Feb 09 06:24:22 AM UTC 25 |
3827514100 ps |
| T1090 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/73.flash_ctrl_connect.2800506987 |
|
|
Feb 09 06:24:06 AM UTC 25 |
Feb 09 06:24:24 AM UTC 25 |
53942700 ps |
| T1091 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/67.flash_ctrl_connect.3350586856 |
|
|
Feb 09 06:23:59 AM UTC 25 |
Feb 09 06:24:25 AM UTC 25 |
130111500 ps |
| T1092 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/71.flash_ctrl_connect.1671406826 |
|
|
Feb 09 06:24:06 AM UTC 25 |
Feb 09 06:24:27 AM UTC 25 |
13762400 ps |
| T1093 |
/workspaces/repo/scratch/os_regression/flash_ctrl-sim-vcs/coverage/default/70.flash_ctrl_connect.291200932 |
|
|
Feb 09 06:24:02 AM UTC 25 |
Feb 09 06:24:28 AM UTC 25 |
18805200 ps |