T853 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_smoke.1321061886 |
|
|
Oct 15 09:26:20 AM UTC 24 |
Oct 15 09:27:50 AM UTC 24 |
19206900 ps |
T854 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_prog_reset.3426918340 |
|
|
Oct 15 09:25:04 AM UTC 24 |
Oct 15 09:27:56 AM UTC 24 |
3958971400 ps |
T855 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_intr_rd.3541392881 |
|
|
Oct 15 09:25:55 AM UTC 24 |
Oct 15 09:28:03 AM UTC 24 |
1283160500 ps |
T856 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_otp_reset.2781339029 |
|
|
Oct 15 09:25:53 AM UTC 24 |
Oct 15 09:28:04 AM UTC 24 |
144626200 ps |
T857 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_rw_evict_all_en.4111006213 |
|
|
Oct 15 09:27:14 AM UTC 24 |
Oct 15 09:28:05 AM UTC 24 |
26781800 ps |
T858 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_hw_sec_otp.1310862260 |
|
|
Oct 15 09:25:52 AM UTC 24 |
Oct 15 09:28:06 AM UTC 24 |
18745238000 ps |
T859 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_connect.3442105650 |
|
|
Oct 15 09:27:50 AM UTC 24 |
Oct 15 09:28:13 AM UTC 24 |
21894700 ps |
T117 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_error_prog_type.3341105724 |
|
|
Oct 15 08:32:16 AM UTC 24 |
Oct 15 09:28:14 AM UTC 24 |
897882400 ps |
T860 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_rw_evict.526065952 |
|
|
Oct 15 09:27:12 AM UTC 24 |
Oct 15 09:28:14 AM UTC 24 |
40804000 ps |
T861 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_alert_test.2293986043 |
|
|
Oct 15 09:27:51 AM UTC 24 |
Oct 15 09:28:16 AM UTC 24 |
79869200 ps |
T862 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_otp_reset.3893869397 |
|
|
Oct 15 09:25:25 AM UTC 24 |
Oct 15 09:28:19 AM UTC 24 |
229726000 ps |
T863 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_intr_rd_slow_flash.1873360310 |
|
|
Oct 15 09:26:00 AM UTC 24 |
Oct 15 09:28:21 AM UTC 24 |
5859038300 ps |
T864 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_disable.909758104 |
|
|
Oct 15 09:27:47 AM UTC 24 |
Oct 15 09:28:21 AM UTC 24 |
143651300 ps |
T430 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_sec_info_access.2697941267 |
|
|
Oct 15 09:27:18 AM UTC 24 |
Oct 15 09:28:22 AM UTC 24 |
400311300 ps |
T865 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_intr_rd.3567097102 |
|
|
Oct 15 09:25:32 AM UTC 24 |
Oct 15 09:28:23 AM UTC 24 |
1744842800 ps |
T866 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_hw_sec_otp.3626187542 |
|
|
Oct 15 09:26:21 AM UTC 24 |
Oct 15 09:28:24 AM UTC 24 |
4244633800 ps |
T867 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rand_ops.2804596132 |
|
|
Oct 15 09:18:21 AM UTC 24 |
Oct 15 09:28:26 AM UTC 24 |
737178800 ps |
T868 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_rw_evict.264473248 |
|
|
Oct 15 09:27:37 AM UTC 24 |
Oct 15 09:28:30 AM UTC 24 |
77034800 ps |
T426 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_sec_info_access.2588597238 |
|
|
Oct 15 09:26:50 AM UTC 24 |
Oct 15 09:28:38 AM UTC 24 |
8546995300 ps |
T869 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_rma_reset.2267752373 |
|
|
Oct 15 09:15:18 AM UTC 24 |
Oct 15 09:28:40 AM UTC 24 |
240209030200 ps |
T131 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_disable.1740651280 |
|
|
Oct 15 09:28:15 AM UTC 24 |
Oct 15 09:28:43 AM UTC 24 |
21425500 ps |
T870 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_connect.4222822448 |
|
|
Oct 15 09:28:20 AM UTC 24 |
Oct 15 09:28:47 AM UTC 24 |
62173900 ps |
T871 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_rma_reset.2726122674 |
|
|
Oct 15 09:11:35 AM UTC 24 |
Oct 15 09:28:48 AM UTC 24 |
50130776900 ps |
T872 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_alert_test.233669712 |
|
|
Oct 15 09:28:22 AM UTC 24 |
Oct 15 09:28:49 AM UTC 24 |
116989100 ps |
T873 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_rw_evict_all_en.2878669855 |
|
|
Oct 15 09:28:15 AM UTC 24 |
Oct 15 09:28:51 AM UTC 24 |
74784700 ps |
T874 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rand_ops.770788606 |
|
|
Oct 15 09:13:27 AM UTC 24 |
Oct 15 09:28:58 AM UTC 24 |
289901400 ps |
T875 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_intr_rd_slow_flash.1952841107 |
|
|
Oct 15 09:26:35 AM UTC 24 |
Oct 15 09:29:04 AM UTC 24 |
22021921600 ps |
T876 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_rw_evict.1519693030 |
|
|
Oct 15 09:28:14 AM UTC 24 |
Oct 15 09:29:05 AM UTC 24 |
43318300 ps |
T877 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_intr_rd.795252379 |
|
|
Oct 15 09:26:33 AM UTC 24 |
Oct 15 09:29:08 AM UTC 24 |
2211031000 ps |
T431 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_sec_info_access.1774870263 |
|
|
Oct 15 09:27:48 AM UTC 24 |
Oct 15 09:29:08 AM UTC 24 |
1688722300 ps |
T878 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_connect.925861067 |
|
|
Oct 15 09:28:45 AM UTC 24 |
Oct 15 09:29:08 AM UTC 24 |
108418800 ps |
T879 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_rw_evict.2949250678 |
|
|
Oct 15 09:28:31 AM UTC 24 |
Oct 15 09:29:09 AM UTC 24 |
29340200 ps |
T119 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw.2273846976 |
|
|
Oct 15 09:20:30 AM UTC 24 |
Oct 15 09:29:15 AM UTC 24 |
3758611300 ps |
T880 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_alert_test.1346299787 |
|
|
Oct 15 09:28:49 AM UTC 24 |
Oct 15 09:29:16 AM UTC 24 |
112868200 ps |
T881 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_hw_sec_otp.367129059 |
|
|
Oct 15 09:28:03 AM UTC 24 |
Oct 15 09:29:19 AM UTC 24 |
8567801700 ps |
T882 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_hw_sec_otp.3540264632 |
|
|
Oct 15 09:27:29 AM UTC 24 |
Oct 15 09:29:19 AM UTC 24 |
21883862900 ps |
T883 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_hw_sec_otp.624195182 |
|
|
Oct 15 09:27:05 AM UTC 24 |
Oct 15 09:29:20 AM UTC 24 |
17548531600 ps |
T884 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_sec_info_access.190486590 |
|
|
Oct 15 09:28:17 AM UTC 24 |
Oct 15 09:29:22 AM UTC 24 |
1520578700 ps |
T885 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_otp_reset.770738014 |
|
|
Oct 15 09:26:30 AM UTC 24 |
Oct 15 09:29:22 AM UTC 24 |
182042000 ps |
T393 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_disable.2328995268 |
|
|
Oct 15 09:28:40 AM UTC 24 |
Oct 15 09:29:23 AM UTC 24 |
13339200 ps |
T886 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_rw_evict_all_en.2889239178 |
|
|
Oct 15 09:28:38 AM UTC 24 |
Oct 15 09:29:25 AM UTC 24 |
29026200 ps |
T887 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_intr_rd.3001650925 |
|
|
Oct 15 09:27:07 AM UTC 24 |
Oct 15 09:29:30 AM UTC 24 |
911031500 ps |
T888 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_alert_test.2067874299 |
|
|
Oct 15 09:29:16 AM UTC 24 |
Oct 15 09:29:33 AM UTC 24 |
76805400 ps |
T889 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_connect.2852904660 |
|
|
Oct 15 09:29:10 AM UTC 24 |
Oct 15 09:29:40 AM UTC 24 |
51728900 ps |
T389 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_disable.1328221717 |
|
|
Oct 15 09:29:09 AM UTC 24 |
Oct 15 09:29:45 AM UTC 24 |
10753600 ps |
T890 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_rw_evict.168966713 |
|
|
Oct 15 09:29:06 AM UTC 24 |
Oct 15 09:29:48 AM UTC 24 |
244984200 ps |
T891 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_rw_evict_all_en.2102380943 |
|
|
Oct 15 09:29:09 AM UTC 24 |
Oct 15 09:29:49 AM UTC 24 |
38378400 ps |
T892 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_otp_reset.3152442129 |
|
|
Oct 15 09:27:07 AM UTC 24 |
Oct 15 09:29:52 AM UTC 24 |
109526500 ps |
T893 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_connect.2330395322 |
|
|
Oct 15 09:29:34 AM UTC 24 |
Oct 15 09:29:54 AM UTC 24 |
13956200 ps |
T894 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_sec_info_access.4024551362 |
|
|
Oct 15 09:28:43 AM UTC 24 |
Oct 15 09:29:58 AM UTC 24 |
1961597000 ps |
T895 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_hw_sec_otp.2440988936 |
|
|
Oct 15 09:28:50 AM UTC 24 |
Oct 15 09:30:00 AM UTC 24 |
3454535700 ps |
T896 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_disable.4196620384 |
|
|
Oct 15 09:29:26 AM UTC 24 |
Oct 15 09:30:00 AM UTC 24 |
43965600 ps |
T897 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_smoke.3042159516 |
|
|
Oct 15 09:27:57 AM UTC 24 |
Oct 15 09:30:00 AM UTC 24 |
55138900 ps |
T898 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_rw_evict.2652412697 |
|
|
Oct 15 09:29:24 AM UTC 24 |
Oct 15 09:30:00 AM UTC 24 |
28308700 ps |
T899 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_alert_test.3176743701 |
|
|
Oct 15 09:29:41 AM UTC 24 |
Oct 15 09:30:01 AM UTC 24 |
76817300 ps |
T900 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_rw_evict_all_en.623654697 |
|
|
Oct 15 09:29:24 AM UTC 24 |
Oct 15 09:30:05 AM UTC 24 |
69160300 ps |
T901 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_otp_reset.2921520495 |
|
|
Oct 15 09:27:30 AM UTC 24 |
Oct 15 09:30:12 AM UTC 24 |
80606900 ps |
T902 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_intr_rd.1473275667 |
|
|
Oct 15 09:28:05 AM UTC 24 |
Oct 15 09:30:14 AM UTC 24 |
2252848700 ps |
T903 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_sec_info_access.3391505151 |
|
|
Oct 15 09:29:10 AM UTC 24 |
Oct 15 09:30:16 AM UTC 24 |
2248160000 ps |
T904 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_alert_test.775187383 |
|
|
Oct 15 09:30:03 AM UTC 24 |
Oct 15 09:30:22 AM UTC 24 |
146166500 ps |
T905 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_hw_sec_otp.451489573 |
|
|
Oct 15 09:28:23 AM UTC 24 |
Oct 15 09:30:22 AM UTC 24 |
1775777800 ps |
T906 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_intr_rd.1968247108 |
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|
Oct 15 09:28:25 AM UTC 24 |
Oct 15 09:30:27 AM UTC 24 |
1564842500 ps |
T907 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_connect.3497094146 |
|
|
Oct 15 09:30:01 AM UTC 24 |
Oct 15 09:30:28 AM UTC 24 |
90962300 ps |
T908 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_disable.2319498870 |
|
|
Oct 15 09:30:01 AM UTC 24 |
Oct 15 09:30:28 AM UTC 24 |
25079000 ps |
T909 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_intr_rd_slow_flash.14646110 |
|
|
Oct 15 09:28:08 AM UTC 24 |
Oct 15 09:30:30 AM UTC 24 |
5833154200 ps |
T910 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_otp_reset.2344997062 |
|
|
Oct 15 09:28:05 AM UTC 24 |
Oct 15 09:30:30 AM UTC 24 |
39759800 ps |
T911 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_intr_rd_slow_flash.812218425 |
|
|
Oct 15 09:25:35 AM UTC 24 |
Oct 15 09:30:30 AM UTC 24 |
12489045000 ps |
T912 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_smoke.208117392 |
|
|
Oct 15 09:26:58 AM UTC 24 |
Oct 15 09:30:33 AM UTC 24 |
209814200 ps |
T913 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_smoke.3363073070 |
|
|
Oct 15 09:25:49 AM UTC 24 |
Oct 15 09:30:36 AM UTC 24 |
78165900 ps |
T914 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_rw_evict_all_en.3714919486 |
|
|
Oct 15 09:30:01 AM UTC 24 |
Oct 15 09:30:41 AM UTC 24 |
97093600 ps |
T915 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_intr_rd_slow_flash.2560951950 |
|
|
Oct 15 09:28:27 AM UTC 24 |
Oct 15 09:30:47 AM UTC 24 |
15679036000 ps |
T916 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_rw_evict.462454213 |
|
|
Oct 15 09:29:59 AM UTC 24 |
Oct 15 09:30:51 AM UTC 24 |
114069800 ps |
T917 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_connect.3066271736 |
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|
Oct 15 09:30:31 AM UTC 24 |
Oct 15 09:30:53 AM UTC 24 |
39131700 ps |
T918 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_otp_reset.2647759271 |
|
|
Oct 15 09:28:24 AM UTC 24 |
Oct 15 09:30:54 AM UTC 24 |
40501300 ps |
T919 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_sec_info_access.543447677 |
|
|
Oct 15 09:29:31 AM UTC 24 |
Oct 15 09:30:56 AM UTC 24 |
2138662100 ps |
T920 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_alert_test.577548967 |
|
|
Oct 15 09:30:31 AM UTC 24 |
Oct 15 09:30:58 AM UTC 24 |
98794600 ps |
T921 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_intr_rd_slow_flash.4178419901 |
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|
Oct 15 09:27:31 AM UTC 24 |
Oct 15 09:30:58 AM UTC 24 |
22805736700 ps |
T922 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_rma_reset.362071943 |
|
|
Oct 15 09:17:04 AM UTC 24 |
Oct 15 09:30:58 AM UTC 24 |
40123763900 ps |
T417 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_disable.4019922260 |
|
|
Oct 15 09:30:29 AM UTC 24 |
Oct 15 09:31:01 AM UTC 24 |
63477400 ps |
T923 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_intr_rd.3930206481 |
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|
Oct 15 09:27:30 AM UTC 24 |
Oct 15 09:31:03 AM UTC 24 |
2791049000 ps |
T924 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_rw_evict_all_en.3039822280 |
|
|
Oct 15 09:30:27 AM UTC 24 |
Oct 15 09:31:07 AM UTC 24 |
76578300 ps |
T925 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_smoke.3065811371 |
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|
Oct 15 09:28:22 AM UTC 24 |
Oct 15 09:31:09 AM UTC 24 |
34223800 ps |
T926 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_prog_reset.1156861582 |
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|
Oct 15 09:27:36 AM UTC 24 |
Oct 15 09:31:09 AM UTC 24 |
8276311600 ps |
T927 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rand_ops.362062414 |
|
|
Oct 15 09:06:29 AM UTC 24 |
Oct 15 09:31:10 AM UTC 24 |
794856000 ps |
T928 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_sec_info_access.3194774470 |
|
|
Oct 15 09:30:01 AM UTC 24 |
Oct 15 09:31:21 AM UTC 24 |
1366259500 ps |
T929 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_connect.2596533236 |
|
|
Oct 15 09:30:59 AM UTC 24 |
Oct 15 09:31:26 AM UTC 24 |
15660300 ps |
T930 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_hw_sec_otp.155754886 |
|
|
Oct 15 09:30:13 AM UTC 24 |
Oct 15 09:31:28 AM UTC 24 |
1599511200 ps |
T931 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_alert_test.1045560502 |
|
|
Oct 15 09:30:59 AM UTC 24 |
Oct 15 09:31:28 AM UTC 24 |
72112400 ps |
T932 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_disable.1867510084 |
|
|
Oct 15 09:30:55 AM UTC 24 |
Oct 15 09:31:29 AM UTC 24 |
11678200 ps |
T933 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_otp_reset.2112748961 |
|
|
Oct 15 09:28:51 AM UTC 24 |
Oct 15 09:31:37 AM UTC 24 |
37897900 ps |
T934 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_hw_sec_otp.1906502349 |
|
|
Oct 15 09:29:19 AM UTC 24 |
Oct 15 09:31:41 AM UTC 24 |
3575233900 ps |
T935 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_smoke.1695031595 |
|
|
Oct 15 09:27:26 AM UTC 24 |
Oct 15 09:31:41 AM UTC 24 |
65511300 ps |
T936 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_rw_evict.1328605297 |
|
|
Oct 15 09:30:52 AM UTC 24 |
Oct 15 09:31:44 AM UTC 24 |
170349200 ps |
T937 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_disable.3880242096 |
|
|
Oct 15 09:31:15 AM UTC 24 |
Oct 15 09:31:45 AM UTC 24 |
10089900 ps |
T938 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_hw_sec_otp.995056421 |
|
|
Oct 15 09:29:50 AM UTC 24 |
Oct 15 09:31:48 AM UTC 24 |
3164951100 ps |
T939 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_rw_evict_all_en.2667475606 |
|
|
Oct 15 09:30:54 AM UTC 24 |
Oct 15 09:31:49 AM UTC 24 |
39020000 ps |
T940 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_alert_test.442651598 |
|
|
Oct 15 09:31:29 AM UTC 24 |
Oct 15 09:31:49 AM UTC 24 |
25945000 ps |
T941 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_connect.2840460665 |
|
|
Oct 15 09:31:27 AM UTC 24 |
Oct 15 09:31:51 AM UTC 24 |
12773600 ps |
T942 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_intr_rd_slow_flash.1379012741 |
|
|
Oct 15 09:27:07 AM UTC 24 |
Oct 15 09:31:52 AM UTC 24 |
25128067200 ps |
T943 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_sec_info_access.3146088384 |
|
|
Oct 15 09:30:29 AM UTC 24 |
Oct 15 09:31:52 AM UTC 24 |
5152931500 ps |
T944 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_intr_rd.2642092934 |
|
|
Oct 15 09:29:53 AM UTC 24 |
Oct 15 09:31:58 AM UTC 24 |
3277271300 ps |
T945 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_smoke.3229123185 |
|
|
Oct 15 09:28:49 AM UTC 24 |
Oct 15 09:32:01 AM UTC 24 |
50045100 ps |
T946 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_rw_evict.1806295432 |
|
|
Oct 15 09:31:10 AM UTC 24 |
Oct 15 09:32:01 AM UTC 24 |
28770800 ps |
T947 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_intr_rd_slow_flash.453283211 |
|
|
Oct 15 09:29:23 AM UTC 24 |
Oct 15 09:32:05 AM UTC 24 |
23405232700 ps |
T948 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd_slow_flash.25355655 |
|
|
Oct 15 09:25:02 AM UTC 24 |
Oct 15 09:32:11 AM UTC 24 |
51061465200 ps |
T949 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_otp_reset.3077110474 |
|
|
Oct 15 09:29:20 AM UTC 24 |
Oct 15 09:32:13 AM UTC 24 |
71332000 ps |
T950 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_alert_test.3501034936 |
|
|
Oct 15 09:31:52 AM UTC 24 |
Oct 15 09:32:14 AM UTC 24 |
39902000 ps |
T951 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_rw_evict_all_en.1285823757 |
|
|
Oct 15 09:31:11 AM UTC 24 |
Oct 15 09:32:14 AM UTC 24 |
27513100 ps |
T952 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_connect.509904095 |
|
|
Oct 15 09:31:50 AM UTC 24 |
Oct 15 09:32:20 AM UTC 24 |
25290500 ps |
T953 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_hw_sec_otp.4000786066 |
|
|
Oct 15 09:31:02 AM UTC 24 |
Oct 15 09:32:23 AM UTC 24 |
3709244500 ps |
T390 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_disable.2661692258 |
|
|
Oct 15 09:31:49 AM UTC 24 |
Oct 15 09:32:23 AM UTC 24 |
10009600 ps |
T954 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_sec_info_access.2491873416 |
|
|
Oct 15 09:31:22 AM UTC 24 |
Oct 15 09:32:31 AM UTC 24 |
1672602800 ps |
T955 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_rw_evict_all_en.288732489 |
|
|
Oct 15 09:31:46 AM UTC 24 |
Oct 15 09:32:31 AM UTC 24 |
68608800 ps |
T956 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_sec_info_access.162579004 |
|
|
Oct 15 09:30:57 AM UTC 24 |
Oct 15 09:32:31 AM UTC 24 |
9260050000 ps |
T957 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_rw_evict.3469679765 |
|
|
Oct 15 09:31:46 AM UTC 24 |
Oct 15 09:32:32 AM UTC 24 |
104614300 ps |
T958 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_otp_reset.659031181 |
|
|
Oct 15 09:29:51 AM UTC 24 |
Oct 15 09:32:37 AM UTC 24 |
464273000 ps |
T959 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_connect.2824383599 |
|
|
Oct 15 09:32:15 AM UTC 24 |
Oct 15 09:32:42 AM UTC 24 |
14093800 ps |
T960 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_error_mp.2236801084 |
|
|
Oct 15 08:42:12 AM UTC 24 |
Oct 15 09:32:42 AM UTC 24 |
21294112700 ps |
T961 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_disable.287482518 |
|
|
Oct 15 09:32:14 AM UTC 24 |
Oct 15 09:32:42 AM UTC 24 |
14462400 ps |
T962 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_smoke.1356037415 |
|
|
Oct 15 09:29:45 AM UTC 24 |
Oct 15 09:32:50 AM UTC 24 |
626953400 ps |
T963 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_alert_test.3948963749 |
|
|
Oct 15 09:32:21 AM UTC 24 |
Oct 15 09:32:52 AM UTC 24 |
207259600 ps |
T964 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_hw_sec_otp.3810154875 |
|
|
Oct 15 09:30:34 AM UTC 24 |
Oct 15 09:32:52 AM UTC 24 |
6790493000 ps |
T965 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_smoke.1943477328 |
|
|
Oct 15 09:29:17 AM UTC 24 |
Oct 15 09:32:54 AM UTC 24 |
49086300 ps |
T966 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_rw_evict.3022487507 |
|
|
Oct 15 09:32:06 AM UTC 24 |
Oct 15 09:32:56 AM UTC 24 |
31447400 ps |
T967 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_smoke.3682999305 |
|
|
Oct 15 09:31:53 AM UTC 24 |
Oct 15 09:32:56 AM UTC 24 |
22116300 ps |
T968 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_alert_test.1026891231 |
|
|
Oct 15 09:32:38 AM UTC 24 |
Oct 15 09:32:57 AM UTC 24 |
241125300 ps |
T969 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_connect.1171612418 |
|
|
Oct 15 09:32:32 AM UTC 24 |
Oct 15 09:32:57 AM UTC 24 |
19733100 ps |
T322 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_rw_evict_all_en.2070802938 |
|
|
Oct 15 09:32:12 AM UTC 24 |
Oct 15 09:32:58 AM UTC 24 |
29770000 ps |
T970 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_otp_reset.281523169 |
|
|
Oct 15 09:30:36 AM UTC 24 |
Oct 15 09:33:08 AM UTC 24 |
41687500 ps |
T971 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_intr_rd_slow_flash.1198293355 |
|
|
Oct 15 09:30:48 AM UTC 24 |
Oct 15 09:33:09 AM UTC 24 |
5830131200 ps |
T972 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_disable.2503809337 |
|
|
Oct 15 09:32:32 AM UTC 24 |
Oct 15 09:33:11 AM UTC 24 |
33455200 ps |
T973 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_alert_test.1406834848 |
|
|
Oct 15 09:32:54 AM UTC 24 |
Oct 15 09:33:15 AM UTC 24 |
37754600 ps |
T974 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_intr_rd.1968686573 |
|
|
Oct 15 09:31:08 AM UTC 24 |
Oct 15 09:33:15 AM UTC 24 |
542807900 ps |
T975 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_intr_rd.2656263881 |
|
|
Oct 15 09:28:59 AM UTC 24 |
Oct 15 09:33:19 AM UTC 24 |
13360028400 ps |
T976 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_connect.3264046383 |
|
|
Oct 15 09:32:53 AM UTC 24 |
Oct 15 09:33:22 AM UTC 24 |
16293400 ps |
T977 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_rma_reset.560476946 |
|
|
Oct 15 09:20:03 AM UTC 24 |
Oct 15 09:33:22 AM UTC 24 |
40128982100 ps |
T422 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_sec_info_access.2244946393 |
|
|
Oct 15 09:31:50 AM UTC 24 |
Oct 15 09:33:24 AM UTC 24 |
3564084700 ps |
T978 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_mp_regions.3150645111 |
|
|
Oct 15 09:17:08 AM UTC 24 |
Oct 15 09:33:28 AM UTC 24 |
34440445600 ps |
T979 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_intr_rd.454739747 |
|
|
Oct 15 09:29:22 AM UTC 24 |
Oct 15 09:33:28 AM UTC 24 |
1678368300 ps |
T980 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_alert_test.3913013462 |
|
|
Oct 15 09:33:10 AM UTC 24 |
Oct 15 09:33:29 AM UTC 24 |
66963200 ps |
T981 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_connect.1870860265 |
|
|
Oct 15 09:33:09 AM UTC 24 |
Oct 15 09:33:30 AM UTC 24 |
49873900 ps |
T432 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_sec_info_access.245778439 |
|
|
Oct 15 09:32:14 AM UTC 24 |
Oct 15 09:33:32 AM UTC 24 |
3585450000 ps |
T982 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_disable.3879869984 |
|
|
Oct 15 09:32:51 AM UTC 24 |
Oct 15 09:33:33 AM UTC 24 |
20290500 ps |
T983 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_otp_reset.1252527859 |
|
|
Oct 15 09:30:14 AM UTC 24 |
Oct 15 09:33:35 AM UTC 24 |
72578500 ps |
T984 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_intr_rd.1703755619 |
|
|
Oct 15 09:30:41 AM UTC 24 |
Oct 15 09:33:35 AM UTC 24 |
2803146200 ps |
T985 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_disable.3583366516 |
|
|
Oct 15 09:32:59 AM UTC 24 |
Oct 15 09:33:36 AM UTC 24 |
10513500 ps |
T986 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_intr_rd.192401304 |
|
|
Oct 15 09:30:17 AM UTC 24 |
Oct 15 09:33:39 AM UTC 24 |
3581150200 ps |
T987 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_error_mp.118925310 |
|
|
Oct 15 08:49:39 AM UTC 24 |
Oct 15 09:33:42 AM UTC 24 |
24720291500 ps |
T988 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_connect.1399583619 |
|
|
Oct 15 09:33:24 AM UTC 24 |
Oct 15 09:33:43 AM UTC 24 |
36143000 ps |
T989 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_alert_test.402203659 |
|
|
Oct 15 09:33:25 AM UTC 24 |
Oct 15 09:33:44 AM UTC 24 |
95152800 ps |
T990 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_sec_info_access.63363701 |
|
|
Oct 15 09:32:32 AM UTC 24 |
Oct 15 09:33:45 AM UTC 24 |
2584730900 ps |
T991 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_disable.699937576 |
|
|
Oct 15 09:33:19 AM UTC 24 |
Oct 15 09:33:46 AM UTC 24 |
10213300 ps |
T992 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_intr_rd_slow_flash.1551799765 |
|
|
Oct 15 09:31:10 AM UTC 24 |
Oct 15 09:33:51 AM UTC 24 |
11856089000 ps |
T993 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_connect.1656306714 |
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|
Oct 15 09:33:34 AM UTC 24 |
Oct 15 09:33:53 AM UTC 24 |
20723000 ps |
T994 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_alert_test.18812240 |
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|
Oct 15 09:33:36 AM UTC 24 |
Oct 15 09:33:56 AM UTC 24 |
167657600 ps |
T995 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_intr_rd_slow_flash.504521743 |
|
|
Oct 15 09:30:23 AM UTC 24 |
Oct 15 09:33:56 AM UTC 24 |
38087604300 ps |
T996 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rand_ops.4133584438 |
|
|
Oct 15 09:11:27 AM UTC 24 |
Oct 15 09:33:56 AM UTC 24 |
146226400 ps |
T997 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_smoke.210429354 |
|
|
Oct 15 09:30:07 AM UTC 24 |
Oct 15 09:33:58 AM UTC 24 |
231799800 ps |
T998 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_otp_reset.489296573 |
|
|
Oct 15 09:31:04 AM UTC 24 |
Oct 15 09:34:00 AM UTC 24 |
472713600 ps |
T999 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_sec_info_access.4041370209 |
|
|
Oct 15 09:32:52 AM UTC 24 |
Oct 15 09:34:05 AM UTC 24 |
2482366000 ps |
T326 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_hw_sec_otp.1996497495 |
|
|
Oct 15 09:32:24 AM UTC 24 |
Oct 15 09:34:06 AM UTC 24 |
2940286200 ps |
T1000 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_alert_test.3476680491 |
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|
Oct 15 09:33:46 AM UTC 24 |
Oct 15 09:34:07 AM UTC 24 |
52984600 ps |
T1001 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_intr_rd_slow_flash.1081768298 |
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|
Oct 15 09:31:41 AM UTC 24 |
Oct 15 09:34:07 AM UTC 24 |
15281023300 ps |
T1002 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_disable.2998260528 |
|
|
Oct 15 09:33:32 AM UTC 24 |
Oct 15 09:34:08 AM UTC 24 |
15325800 ps |
T1003 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_disable.1488103990 |
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|
Oct 15 09:33:42 AM UTC 24 |
Oct 15 09:34:12 AM UTC 24 |
20382700 ps |
T1004 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_connect.3751569236 |
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|
Oct 15 09:33:46 AM UTC 24 |
Oct 15 09:34:12 AM UTC 24 |
48210300 ps |
T1005 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_hw_sec_otp.677042329 |
|
|
Oct 15 09:31:30 AM UTC 24 |
Oct 15 09:34:17 AM UTC 24 |
21578603600 ps |
T1006 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_smoke.3882852122 |
|
|
Oct 15 09:30:59 AM UTC 24 |
Oct 15 09:34:18 AM UTC 24 |
37206100 ps |
T1007 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_smoke.2234061183 |
|
|
Oct 15 09:30:31 AM UTC 24 |
Oct 15 09:34:19 AM UTC 24 |
77595300 ps |
T1008 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_connect.4200139552 |
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|
Oct 15 09:33:57 AM UTC 24 |
Oct 15 09:34:25 AM UTC 24 |
15580500 ps |
T1009 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_alert_test.18416390 |
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|
Oct 15 09:34:00 AM UTC 24 |
Oct 15 09:34:27 AM UTC 24 |
637982400 ps |
T1010 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_full_mem_access.980835930 |
|
|
Oct 15 08:27:30 AM UTC 24 |
Oct 15 09:34:27 AM UTC 24 |
48914578300 ps |
T1011 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_disable.3126058490 |
|
|
Oct 15 09:33:56 AM UTC 24 |
Oct 15 09:34:28 AM UTC 24 |
10948300 ps |
T1012 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_connect.2996987370 |
|
|
Oct 15 09:34:09 AM UTC 24 |
Oct 15 09:34:30 AM UTC 24 |
38218100 ps |
T1013 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_rma_reset.3783099639 |
|
|
Oct 15 09:18:27 AM UTC 24 |
Oct 15 09:34:33 AM UTC 24 |
40124301800 ps |
T428 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_sec_info_access.79068851 |
|
|
Oct 15 09:32:59 AM UTC 24 |
Oct 15 09:34:36 AM UTC 24 |
7704100000 ps |
T1014 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_hw_sec_otp.3359504511 |
|
|
Oct 15 09:31:53 AM UTC 24 |
Oct 15 09:34:37 AM UTC 24 |
15618600600 ps |
T1015 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_alert_test.959344695 |
|
|
Oct 15 09:34:12 AM UTC 24 |
Oct 15 09:34:38 AM UTC 24 |
85320500 ps |
T1016 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_sec_info_access.1717886247 |
|
|
Oct 15 09:33:24 AM UTC 24 |
Oct 15 09:34:42 AM UTC 24 |
552021900 ps |
T1017 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_disable.279473793 |
|
|
Oct 15 09:34:07 AM UTC 24 |
Oct 15 09:34:43 AM UTC 24 |
15606100 ps |
T1018 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_smoke.16059070 |
|
|
Oct 15 09:33:12 AM UTC 24 |
Oct 15 09:34:43 AM UTC 24 |
22825800 ps |
T1019 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_hw_sec_otp.4287118684 |
|
|
Oct 15 09:32:42 AM UTC 24 |
Oct 15 09:34:49 AM UTC 24 |
1655586100 ps |
T1020 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_intr_rd_slow_flash.2139660977 |
|
|
Oct 15 09:32:03 AM UTC 24 |
Oct 15 09:34:50 AM UTC 24 |
24872837500 ps |
T1021 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_hw_sec_otp.3062583494 |
|
|
Oct 15 09:33:16 AM UTC 24 |
Oct 15 09:34:50 AM UTC 24 |
26830606700 ps |
T391 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_disable.2721068860 |
|
|
Oct 15 09:34:20 AM UTC 24 |
Oct 15 09:34:51 AM UTC 24 |
26426300 ps |
T1022 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_intr_rd_slow_flash.3849426034 |
|
|
Oct 15 09:29:55 AM UTC 24 |
Oct 15 09:34:56 AM UTC 24 |
12899629300 ps |
T1023 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_sec_info_access.1983243440 |
|
|
Oct 15 09:33:33 AM UTC 24 |
Oct 15 09:34:57 AM UTC 24 |
408470500 ps |
T1024 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_alert_test.1755128403 |
|
|
Oct 15 09:34:32 AM UTC 24 |
Oct 15 09:34:57 AM UTC 24 |
31280900 ps |
T1025 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_otp_reset.1533526944 |
|
|
Oct 15 09:31:38 AM UTC 24 |
Oct 15 09:34:58 AM UTC 24 |
139244500 ps |
T1026 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_connect.2715548310 |
|
|
Oct 15 09:34:39 AM UTC 24 |
Oct 15 09:34:59 AM UTC 24 |
19723100 ps |
T1027 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_connect.1605025381 |
|
|
Oct 15 09:34:32 AM UTC 24 |
Oct 15 09:35:00 AM UTC 24 |
93180700 ps |
T1028 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_smoke.1218239428 |
|
|
Oct 15 09:32:24 AM UTC 24 |
Oct 15 09:35:02 AM UTC 24 |
38136800 ps |
T429 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_sec_info_access.3565326004 |
|
|
Oct 15 09:33:57 AM UTC 24 |
Oct 15 09:35:03 AM UTC 24 |
1458375600 ps |
T1029 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_alert_test.217705950 |
|
|
Oct 15 09:34:43 AM UTC 24 |
Oct 15 09:35:03 AM UTC 24 |
60816400 ps |
T1030 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_intr_rd.3885184719 |
|
|
Oct 15 09:31:41 AM UTC 24 |
Oct 15 09:35:03 AM UTC 24 |
1784396000 ps |
T1031 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_sec_info_access.1681504149 |
|
|
Oct 15 09:33:43 AM UTC 24 |
Oct 15 09:35:04 AM UTC 24 |
2845029800 ps |
T1032 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/50.flash_ctrl_connect.1382542470 |
|
|
Oct 15 09:34:44 AM UTC 24 |
Oct 15 09:35:06 AM UTC 24 |
13515200 ps |
T1033 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_otp_reset.940159468 |
|
|
Oct 15 09:31:59 AM UTC 24 |
Oct 15 09:35:09 AM UTC 24 |
132819000 ps |
T1034 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_hw_sec_otp.335125439 |
|
|
Oct 15 09:32:57 AM UTC 24 |
Oct 15 09:35:10 AM UTC 24 |
14945802700 ps |
T1035 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_disable.305296714 |
|
|
Oct 15 09:34:36 AM UTC 24 |
Oct 15 09:35:10 AM UTC 24 |
10770700 ps |
T1036 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_sec_info_access.2225527756 |
|
|
Oct 15 09:34:08 AM UTC 24 |
Oct 15 09:35:11 AM UTC 24 |
2027710100 ps |
T1037 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_hw_sec_otp.8735113 |
|
|
Oct 15 09:33:29 AM UTC 24 |
Oct 15 09:35:13 AM UTC 24 |
2460054400 ps |
T1038 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/52.flash_ctrl_connect.1910558263 |
|
|
Oct 15 09:34:52 AM UTC 24 |
Oct 15 09:35:13 AM UTC 24 |
26240500 ps |
T1039 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/51.flash_ctrl_connect.1734125766 |
|
|
Oct 15 09:34:50 AM UTC 24 |
Oct 15 09:35:15 AM UTC 24 |
18897100 ps |
T1040 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_otp_reset.666010741 |
|
|
Oct 15 09:32:32 AM UTC 24 |
Oct 15 09:35:17 AM UTC 24 |
39341300 ps |
T1041 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/53.flash_ctrl_connect.1867868648 |
|
|
Oct 15 09:34:58 AM UTC 24 |
Oct 15 09:35:18 AM UTC 24 |
20893400 ps |
T1042 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/56.flash_ctrl_connect.1127246663 |
|
|
Oct 15 09:35:03 AM UTC 24 |
Oct 15 09:35:22 AM UTC 24 |
21326200 ps |
T1043 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/57.flash_ctrl_connect.3239461406 |
|
|
Oct 15 09:35:04 AM UTC 24 |
Oct 15 09:35:25 AM UTC 24 |
14598300 ps |
T1044 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_hw_sec_otp.2425740483 |
|
|
Oct 15 09:33:37 AM UTC 24 |
Oct 15 09:35:25 AM UTC 24 |
2795578300 ps |
T1045 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/55.flash_ctrl_connect.2767236312 |
|
|
Oct 15 09:35:01 AM UTC 24 |
Oct 15 09:35:25 AM UTC 24 |
44680000 ps |
T1046 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/58.flash_ctrl_connect.2397940621 |
|
|
Oct 15 09:35:07 AM UTC 24 |
Oct 15 09:35:26 AM UTC 24 |
53105900 ps |
T1047 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/54.flash_ctrl_connect.3236298960 |
|
|
Oct 15 09:34:59 AM UTC 24 |
Oct 15 09:35:26 AM UTC 24 |
44642300 ps |
T1048 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_intr_rd_slow_flash.1923710122 |
|
|
Oct 15 09:29:05 AM UTC 24 |
Oct 15 09:35:28 AM UTC 24 |
12103237000 ps |
T1049 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/59.flash_ctrl_connect.3732437789 |
|
|
Oct 15 09:35:11 AM UTC 24 |
Oct 15 09:35:30 AM UTC 24 |
15274200 ps |
T1050 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_hw_sec_otp.2158069450 |
|
|
Oct 15 09:34:06 AM UTC 24 |
Oct 15 09:35:32 AM UTC 24 |
2975748300 ps |
T1051 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/61.flash_ctrl_connect.1862383671 |
|
|
Oct 15 09:35:13 AM UTC 24 |
Oct 15 09:35:36 AM UTC 24 |
13227300 ps |
T1052 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/60.flash_ctrl_connect.1345641117 |
|
|
Oct 15 09:35:12 AM UTC 24 |
Oct 15 09:35:36 AM UTC 24 |
20614400 ps |
T1053 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_otp_reset.4146628020 |
|
|
Oct 15 09:32:57 AM UTC 24 |
Oct 15 09:35:37 AM UTC 24 |
54246100 ps |
T1054 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_otp_reset.97543031 |
|
|
Oct 15 09:32:44 AM UTC 24 |
Oct 15 09:35:38 AM UTC 24 |
148115400 ps |
T1055 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_smoke.3557494078 |
|
|
Oct 15 09:31:29 AM UTC 24 |
Oct 15 09:35:39 AM UTC 24 |
160149200 ps |
T1056 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_sec_info_access.3479817059 |
|
|
Oct 15 09:34:26 AM UTC 24 |
Oct 15 09:35:42 AM UTC 24 |
3534919600 ps |
T1057 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/63.flash_ctrl_connect.2841936515 |
|
|
Oct 15 09:35:23 AM UTC 24 |
Oct 15 09:35:42 AM UTC 24 |
15321300 ps |
T1058 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_smoke.1344285393 |
|
|
Oct 15 09:32:57 AM UTC 24 |
Oct 15 09:35:45 AM UTC 24 |
675530500 ps |
T1059 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_hw_sec_otp.2488607022 |
|
|
Oct 15 09:34:33 AM UTC 24 |
Oct 15 09:35:46 AM UTC 24 |
6819875400 ps |
T1060 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_error_prog_type.94208826 |
|
|
Oct 15 08:37:21 AM UTC 24 |
Oct 15 09:35:49 AM UTC 24 |
1393042100 ps |
T327 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_hw_sec_otp.2742862954 |
|
|
Oct 15 09:34:19 AM UTC 24 |
Oct 15 09:35:49 AM UTC 24 |
2522429300 ps |
T1061 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/64.flash_ctrl_connect.431744652 |
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|
Oct 15 09:35:26 AM UTC 24 |
Oct 15 09:35:50 AM UTC 24 |
51577600 ps |
T1062 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/62.flash_ctrl_connect.524034959 |
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|
Oct 15 09:35:18 AM UTC 24 |
Oct 15 09:35:51 AM UTC 24 |
16615500 ps |
T1063 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/66.flash_ctrl_connect.1097796240 |
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|
Oct 15 09:35:29 AM UTC 24 |
Oct 15 09:35:52 AM UTC 24 |
42286800 ps |
T1064 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_smoke.3706839348 |
|
|
Oct 15 09:33:36 AM UTC 24 |
Oct 15 09:35:52 AM UTC 24 |
30812100 ps |
T1065 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/65.flash_ctrl_connect.1076760195 |
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|
Oct 15 09:35:27 AM UTC 24 |
Oct 15 09:35:53 AM UTC 24 |
51407900 ps |
T1066 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_smoke.3288415673 |
|
|
Oct 15 09:33:47 AM UTC 24 |
Oct 15 09:35:55 AM UTC 24 |
102954400 ps |
T1067 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_intr_rd.3508232251 |
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|
Oct 15 09:32:02 AM UTC 24 |
Oct 15 09:35:55 AM UTC 24 |
1724552600 ps |
T1068 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_smoke.273138579 |
|
|
Oct 15 09:32:42 AM UTC 24 |
Oct 15 09:35:57 AM UTC 24 |
33934500 ps |
T1069 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/68.flash_ctrl_connect.612562704 |
|
|
Oct 15 09:35:37 AM UTC 24 |
Oct 15 09:36:00 AM UTC 24 |
16587600 ps |
T1070 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/67.flash_ctrl_connect.3872173810 |
|
|
Oct 15 09:35:33 AM UTC 24 |
Oct 15 09:36:00 AM UTC 24 |
13792800 ps |
T1071 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_sec_info_access.3325778522 |
|
|
Oct 15 09:34:37 AM UTC 24 |
Oct 15 09:36:02 AM UTC 24 |
4855815400 ps |
T1072 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/69.flash_ctrl_connect.9601461 |
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|
Oct 15 09:35:39 AM UTC 24 |
Oct 15 09:36:04 AM UTC 24 |
37637600 ps |
T1073 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/71.flash_ctrl_connect.1838547359 |
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|
Oct 15 09:35:47 AM UTC 24 |
Oct 15 09:36:06 AM UTC 24 |
31893900 ps |
T328 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_otp_reset.718399558 |
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|
Oct 15 09:33:30 AM UTC 24 |
Oct 15 09:36:07 AM UTC 24 |
159427500 ps |
T1074 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/70.flash_ctrl_connect.2109362207 |
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|
Oct 15 09:35:42 AM UTC 24 |
Oct 15 09:36:07 AM UTC 24 |
28850500 ps |
T193 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_otp_reset.381831600 |
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|
Oct 15 09:33:16 AM UTC 24 |
Oct 15 09:36:08 AM UTC 24 |
46268100 ps |
T1075 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_hw_sec_otp.3534287020 |
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|
Oct 15 09:33:52 AM UTC 24 |
Oct 15 09:36:08 AM UTC 24 |
6773661200 ps |
T1076 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/73.flash_ctrl_connect.610290311 |
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|
Oct 15 09:35:51 AM UTC 24 |
Oct 15 09:36:10 AM UTC 24 |
22966800 ps |
T1077 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/72.flash_ctrl_connect.2911716119 |
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|
Oct 15 09:35:50 AM UTC 24 |
Oct 15 09:36:13 AM UTC 24 |
26964500 ps |
T1078 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/74.flash_ctrl_connect.3533823604 |
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Oct 15 09:35:52 AM UTC 24 |
Oct 15 09:36:17 AM UTC 24 |
15649100 ps |
T1079 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/76.flash_ctrl_connect.1467916258 |
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|
Oct 15 09:35:57 AM UTC 24 |
Oct 15 09:36:17 AM UTC 24 |
84519200 ps |
T1080 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/75.flash_ctrl_connect.1946973535 |
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Oct 15 09:35:54 AM UTC 24 |
Oct 15 09:36:19 AM UTC 24 |
42976700 ps |
T1081 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_otp_reset.2681475278 |
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|
Oct 15 09:33:40 AM UTC 24 |
Oct 15 09:36:21 AM UTC 24 |
75492600 ps |
T1082 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/77.flash_ctrl_connect.3084513489 |
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Oct 15 09:36:01 AM UTC 24 |
Oct 15 09:36:22 AM UTC 24 |
15822400 ps |