Module Definition
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Module : pwrmgr_fsm
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00 0.00 0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_pwrmgr_component_0.1/rtl/pwrmgr_fsm.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.u_fsm 0.00 0.00 0.00 0.00 0.00



Module Instance : tb.dut.u_fsm

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00 0.00 0.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00 0.00 0.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
20.42 0.00 0.00 81.69 0.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_fetch_en 0.00 0.00 0.00
u_reg_lc_init 0.00 0.00 0.00
u_reg_otp_init 0.00 0.00 0.00
u_slow_sync_lc_done 0.00 0.00 0.00
u_state_regs 0.00 0.00 0.00
u_sync_lc_done 0.00 0.00 0.00
u_usb_ip_clk_en 0.00 0.00 0.00


Since this is the module's only instance, the coverage report is the same as for the module.
Line Coverage for Module : pwrmgr_fsm
Line No.TotalCoveredPercent
TOTAL14900.00
CONT_ASSIGN122100.00
CONT_ASSIGN126100.00
CONT_ASSIGN129100.00
CONT_ASSIGN132100.00
CONT_ASSIGN135100.00
CONT_ASSIGN138100.00
CONT_ASSIGN141100.00
CONT_ASSIGN145100.00
CONT_ASSIGN148100.00
CONT_ASSIGN153100.00
ALWAYS1571700.00
ALWAYS179300.00
ALWAYS182600.00
CONT_ASSIGN197100.00
CONT_ASSIGN233100.00
CONT_ASSIGN240100.00
CONT_ASSIGN250100.00
CONT_ASSIGN256100.00
CONT_ASSIGN258100.00
ALWAYS2619700.00
CONT_ASSIGN497100.00
CONT_ASSIGN498100.00
CONT_ASSIGN499100.00
CONT_ASSIGN501100.00
CONT_ASSIGN502100.00
CONT_ASSIGN503100.00
CONT_ASSIGN504100.00
CONT_ASSIGN508100.00
CONT_ASSIGN509100.00
CONT_ASSIGN519100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pwrmgr_component_0.1/rtl/pwrmgr_fsm.sv' or '../src/lowrisc_ip_pwrmgr_component_0.1/rtl/pwrmgr_fsm.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
122 0 1
126 0 1
129 0 1
132 0 1
135 0 1
138 0 1
141 0 1
145 0 1
148 0 1
153 0 1
157 0 1
158 0 1
159 0 1
160 0 1
161 0 1
162 0 1
163 0 1
164 0 1
165 0 1
167 0 1
168 0 1
169 0 1
170 0 1
171 0 1
172 0 1
173 0 1
174 0 1
179 0 3
182 0 1
183 0 1
184 0 1
185 0 1
186 0 1
187 0 1
==> MISSING_ELSE
197 0 1
233 0 1
240 0 1
250 0 1
256 0 1
258 0 1
261 0 1
262 0 1
263 0 1
264 0 1
265 0 1
266 0 1
267 0 1
268 0 1
269 0 1
271 0 1
272 0 1
273 0 1
274 0 1
275 0 1
276 0 1
277 0 1
278 0 1
279 0 1
280 0 1
282 0 1
285 0 1
286 0 1
==> MISSING_ELSE
291 0 1
292 0 1
293 0 1
==> MISSING_ELSE
298 0 1
299 0 1
301 0 1
302 0 1
==> MISSING_ELSE
307 0 1
309 0 1
310 0 1
==> MISSING_ELSE
315 0 1
317 0 1
318 0 1
==> MISSING_ELSE
325 0 1
328 0 1
329 0 1
330 0 1
333 0 1
335 0 1
336 0 1
==> MISSING_ELSE
341 0 1
342 0 1
347 0 1
348 0 1
351 0 1
352 0 1
==> MISSING_ELSE
357 0 1
358 0 1
==> MISSING_ELSE
364 0 1
368 0 1
369 0 1
370 0 1
371 0 1
==> MISSING_ELSE
376 0 1
378 0 1
379 0 1
380 0 1
383 0 1
384 0 1
390 0 1
393 0 1
394 0 1
395 0 1
396 0 1
397 0 1
399 0 1
405 0 1
406 0 1
408 0 1
409 0 1
410 0 1
411 0 1
417 0 1
422 0 1
423 0 1
424 0 1
427 0 1
428 0 1
==> MISSING_ELSE
433 0 1
435 0 1
436 0 1
437 0 1
==> MISSING_ELSE
443 0 1
444 0 1
445 0 1
449 0 1
450 0 1
451 0 1
458 0 1
462 0 1
463 0 1
474 0 1
475 0 1
==> MISSING_ELSE
489 0 1
491 0 1
==> MISSING_ELSE
497 0 1
498 0 1
499 0 1
501 0 1
502 0 1
503 0 1
504 0 1
508 0 1
509 0 1
519 0 1


Cond Coverage for Module : pwrmgr_fsm
TotalCoveredPercent
Conditions6400.00
Logical6400.00
Non-Logical00
Event00

 LINE       122
 EXPRESSION ((pwr_rst_i.rst_lc_src_n[1] == '0) & (pwr_rst_i.rst_sys_src_n[1] == '0))
             ----------------1----------------   -----------------2----------------
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       122
 SUB-EXPRESSION (pwr_rst_i.rst_lc_src_n[1] == '0)
                ----------------1----------------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       122
 SUB-EXPRESSION (pwr_rst_i.rst_sys_src_n[1] == '0)
                -----------------1----------------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       126
 EXPRESSION (((rst_lc_req_q & (~pwr_rst_i.rst_lc_src_n)) | ((~rst_lc_req_q) & pwr_rst_i.rst_lc_src_n)) == {pwrmgr_pkg::PowerDomains {1'b1}})
            ----------------------------------------------------------------1---------------------------------------------------------------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       129
 EXPRESSION (((rst_sys_req_q & (~pwr_rst_i.rst_sys_src_n)) | ((~rst_sys_req_q) & pwr_rst_i.rst_sys_src_n)) == {pwrmgr_pkg::PowerDomains {1'b1}})
            ------------------------------------------------------------------1-----------------------------------------------------------------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       132
 EXPRESSION (lc_rsts_valid & sys_rsts_valid)
             ------1------   -------2------
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       141
 EXPRESSION (reset_reqs_i[pwrmgr_reg_pkg::ResetEscIdx] | reset_reqs_i[pwrmgr_reg_pkg::ResetMainPwrIdx])
             --------------------1--------------------   ----------------------2----------------------
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

 LINE       153
 EXPRESSION ((reset_cause_q == LowPwrEntry) ? (main_pd_ni | pd_n_rsts_asserted) : ((reset_cause_q == HwReq) ? all_rsts_asserted : 1'b0))
             ---------------1--------------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       153
 SUB-EXPRESSION (reset_cause_q == LowPwrEntry)
                ---------------1--------------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       153
 SUB-EXPRESSION (main_pd_ni | pd_n_rsts_asserted)
                 -----1----   ---------2--------
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

 LINE       153
 SUB-EXPRESSION ((reset_cause_q == HwReq) ? all_rsts_asserted : 1'b0)
                 ------------1-----------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       153
 SUB-EXPRESSION (reset_cause_q == HwReq)
                ------------1-----------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       233
 EXPRESSION (ip_clk_en_q && ((&((ips_clk_en_o & clk_en_status_i) | (~ips_clk_en_o)))))
             -----1-----    ----------------------------2----------------------------
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       240
 EXPRESSION (((~ip_clk_en_q)) && ((&(((~ips_clk_en_o) & (~clk_en_status_i)) | ips_clk_en_o))))
             --------1-------    ------------------------------2-----------------------------
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       285
 EXPRESSION (req_pwrup_i || reset_ongoing_q)
             -----1-----    -------2-------
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

 LINE       328
 EXPRESSION (((!req_pwrup_i)) || reset_ongoing_q)
             --------1-------    -------2-------
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

 LINE       333
 EXPRESSION ((pwrup_cause_i == Wake) & (reset_cause_q == LowPwrEntry))
             -----------1-----------   ---------------2--------------
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       333
 SUB-EXPRESSION (pwrup_cause_i == Wake)
                -----------1-----------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       333
 SUB-EXPRESSION (reset_cause_q == LowPwrEntry)
                ---------------1--------------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       368
 EXPRESSION (reset_req || low_power_entry_i)
             ----1----    --------2--------
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

 LINE       379
 EXPRESSION (reset_req ? FastPwrStateNvmShutDown : FastPwrStateFallThrough)
             ----1----
-1-StatusTests
0Not Covered
1Not Covered

 LINE       383
 EXPRESSION (direct_rst_req ? FastPwrStateNvmShutDown : state_q)
             -------1------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       405
 EXPRESSION (otp_idle_i && lc_idle_i && flash_idle_i)
             -----1----    ----2----    ------3-----
-1--2--3-StatusTests
011Not Covered
101Not Covered
110Not Covered
111Not Covered

 LINE       474
 EXPRESSION (reset_valid && ((!reset_reqs_i[pwrmgr_reg_pkg::ResetMainPwrIdx])))
             -----1-----    -------------------------2------------------------
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       513
 EXPRESSION (ip_clk_en_d & usb_ip_clk_en_i)
             -----1-----   -------2-------
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

FSM Coverage for Module : pwrmgr_fsm
Summary for FSM :: state_q
TotalCoveredPercent
States 19 0 0.00 (Not included in score)
Transitions 39 0 0.00
Sequences 0 0

State, Transition and Sequence Details for FSM :: state_q
statesLine No.CoveredTests
FastPwrStateAckPwrUp 318 Not Covered
FastPwrStateActive 358 Not Covered
FastPwrStateDisClks 371 Not Covered
FastPwrStateEnableClocks 286 Not Covered
FastPwrStateFallThrough 379 Not Covered
FastPwrStateInvalid 491 Not Covered
FastPwrStateLcInit 310 Not Covered
FastPwrStateLowPower 437 Not Covered
FastPwrStateLowPowerPrep 406 Not Covered
FastPwrStateNvmIdleChk 399 Not Covered
FastPwrStateNvmShutDown 379 Not Covered
FastPwrStateOtpInit 302 Not Covered
FastPwrStateReleaseLcRst 293 Not Covered
FastPwrStateReqPwrDn 428 Not Covered
FastPwrStateResetPrep 445 Not Covered
FastPwrStateResetWait 458 Not Covered
FastPwrStateRomCheckDone 342 Not Covered
FastPwrStateRomCheckGood 352 Not Covered
FastPwrStateStrap 336 Not Covered


transitionsLine No.CoveredTests
FastPwrStateAckPwrUp->FastPwrStateInvalid 491 Not Covered
FastPwrStateAckPwrUp->FastPwrStateStrap 336 Not Covered
FastPwrStateActive->FastPwrStateDisClks 371 Not Covered
FastPwrStateActive->FastPwrStateInvalid 491 Not Covered
FastPwrStateDisClks->FastPwrStateFallThrough 379 Not Covered
FastPwrStateDisClks->FastPwrStateInvalid 491 Not Covered
FastPwrStateDisClks->FastPwrStateNvmShutDown 379 Not Covered
FastPwrStateEnableClocks->FastPwrStateInvalid 491 Not Covered
FastPwrStateEnableClocks->FastPwrStateReleaseLcRst 293 Not Covered
FastPwrStateFallThrough->FastPwrStateInvalid 491 Not Covered
FastPwrStateFallThrough->FastPwrStateNvmIdleChk 399 Not Covered
FastPwrStateFallThrough->FastPwrStateRomCheckDone 397 Not Covered
FastPwrStateLcInit->FastPwrStateAckPwrUp 318 Not Covered
FastPwrStateLcInit->FastPwrStateInvalid 491 Not Covered
FastPwrStateLowPower->FastPwrStateEnableClocks 286 Not Covered
FastPwrStateLowPower->FastPwrStateInvalid 491 Not Covered
FastPwrStateLowPowerPrep->FastPwrStateInvalid 491 Not Covered
FastPwrStateLowPowerPrep->FastPwrStateReqPwrDn 428 Not Covered
FastPwrStateNvmIdleChk->FastPwrStateInvalid 491 Not Covered
FastPwrStateNvmIdleChk->FastPwrStateLowPowerPrep 406 Not Covered
FastPwrStateNvmIdleChk->FastPwrStateRomCheckDone 411 Not Covered
FastPwrStateNvmShutDown->FastPwrStateInvalid 491 Not Covered
FastPwrStateNvmShutDown->FastPwrStateResetPrep 445 Not Covered
FastPwrStateOtpInit->FastPwrStateInvalid 491 Not Covered
FastPwrStateOtpInit->FastPwrStateLcInit 310 Not Covered
FastPwrStateReleaseLcRst->FastPwrStateInvalid 491 Not Covered
FastPwrStateReleaseLcRst->FastPwrStateOtpInit 302 Not Covered
FastPwrStateReqPwrDn->FastPwrStateInvalid 491 Not Covered
FastPwrStateReqPwrDn->FastPwrStateLowPower 437 Not Covered
FastPwrStateResetPrep->FastPwrStateInvalid 491 Not Covered
FastPwrStateResetPrep->FastPwrStateResetWait 458 Not Covered
FastPwrStateResetWait->FastPwrStateInvalid 491 Not Covered
FastPwrStateResetWait->FastPwrStateLowPower 475 Not Covered
FastPwrStateRomCheckDone->FastPwrStateInvalid 491 Not Covered
FastPwrStateRomCheckDone->FastPwrStateRomCheckGood 352 Not Covered
FastPwrStateRomCheckGood->FastPwrStateActive 358 Not Covered
FastPwrStateRomCheckGood->FastPwrStateInvalid 491 Not Covered
FastPwrStateStrap->FastPwrStateInvalid 491 Not Covered
FastPwrStateStrap->FastPwrStateRomCheckDone 342 Not Covered



Branch Coverage for Module : pwrmgr_fsm
Line No.TotalCoveredPercent
Branches 49 0 0.00
TERNARY 153 3 0 0.00
IF 157 2 0 0.00
IF 179 2 0 0.00
IF 182 4 0 0.00
CASE 282 36 0 0.00
IF 489 2 0 0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pwrmgr_component_0.1/rtl/pwrmgr_fsm.sv' or '../src/lowrisc_ip_pwrmgr_component_0.1/rtl/pwrmgr_fsm.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 153 ((reset_cause_q == LowPwrEntry)) ? -2-: 153 ((reset_cause_q == HwReq)) ?

Branches:
-1--2-StatusTests
1 - Not Covered
0 1 Not Covered
0 0 Not Covered


LineNo. Expression -1-: 157 if ((!rst_ni))

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 179 if ((!rst_ni))

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 182 if ((!rst_ni)) -2-: 184 if ((&rst_sys_req_q)) -3-: 186 if (strap_o)

Branches:
-1--2--3-StatusTests
1 - - Not Covered
0 1 - Not Covered
0 0 1 Not Covered
0 0 0 Not Covered


LineNo. Expression -1-: 282 case (state_q) -2-: 285 if ((req_pwrup_i || reset_ongoing_q)) -3-: 292 if (clks_enabled) -4-: 301 if ((&pwr_rst_i.rst_lc_src_n)) -5-: 309 if (otp_done_i) -6-: 317 if (lc_done) -7-: 328 if (((!req_pwrup_i) || reset_ongoing_q)) -8-: 351 if (prim_mubi_pkg::mubi4_test_true_strict(rom_intg_chk_done)) -9-: 357 if (prim_mubi_pkg::mubi4_test_true_strict(rom_intg_chk_good)) -10-: 368 if ((reset_req || low_power_entry_i)) -11-: 378 if (clks_disabled) -12-: 379 (reset_req) ? -13-: 383 (direct_rst_req) ? -14-: 393 if ((!low_power_entry_i)) -15-: 405 if (((otp_idle_i && lc_idle_i) && flash_idle_i)) -16-: 427 if (reset_valid) -17-: 435 if (ack_pwrdn_i) -18-: 474 if ((reset_valid && (!reset_reqs_i[pwrmgr_reg_pkg::ResetMainPwrIdx])))

Branches:
-1--2--3--4--5--6--7--8--9--10--11--12--13--14--15--16--17--18-StatusTests
FastPwrStateLowPower 1 - - - - - - - - - - - - - - - - Not Covered
FastPwrStateLowPower 0 - - - - - - - - - - - - - - - - Not Covered
FastPwrStateEnableClocks - 1 - - - - - - - - - - - - - - - Not Covered
FastPwrStateEnableClocks - 0 - - - - - - - - - - - - - - - Not Covered
FastPwrStateReleaseLcRst - - 1 - - - - - - - - - - - - - - Not Covered
FastPwrStateReleaseLcRst - - 0 - - - - - - - - - - - - - - Not Covered
FastPwrStateOtpInit - - - 1 - - - - - - - - - - - - - Not Covered
FastPwrStateOtpInit - - - 0 - - - - - - - - - - - - - Not Covered
FastPwrStateLcInit - - - - 1 - - - - - - - - - - - - Not Covered
FastPwrStateLcInit - - - - 0 - - - - - - - - - - - - Not Covered
FastPwrStateAckPwrUp - - - - - 1 - - - - - - - - - - - Not Covered
FastPwrStateAckPwrUp - - - - - 0 - - - - - - - - - - - Not Covered
FastPwrStateStrap - - - - - - - - - - - - - - - - - Not Covered
FastPwrStateRomCheckDone - - - - - - 1 - - - - - - - - - - Not Covered
FastPwrStateRomCheckDone - - - - - - 0 - - - - - - - - - - Not Covered
FastPwrStateRomCheckGood - - - - - - - 1 - - - - - - - - - Not Covered
FastPwrStateRomCheckGood - - - - - - - 0 - - - - - - - - - Not Covered
FastPwrStateActive - - - - - - - - 1 - - - - - - - - Not Covered
FastPwrStateActive - - - - - - - - 0 - - - - - - - - Not Covered
FastPwrStateDisClks - - - - - - - - - 1 1 - - - - - - Not Covered
FastPwrStateDisClks - - - - - - - - - 1 0 - - - - - - Not Covered
FastPwrStateDisClks - - - - - - - - - 0 - 1 - - - - - Not Covered
FastPwrStateDisClks - - - - - - - - - 0 - 0 - - - - - Not Covered
FastPwrStateFallThrough - - - - - - - - - - - - 1 - - - - Not Covered
FastPwrStateFallThrough - - - - - - - - - - - - 0 - - - - Not Covered
FastPwrStateNvmIdleChk - - - - - - - - - - - - - 1 - - - Not Covered
FastPwrStateNvmIdleChk - - - - - - - - - - - - - 0 - - - Not Covered
FastPwrStateLowPowerPrep - - - - - - - - - - - - - - 1 - - Not Covered
FastPwrStateLowPowerPrep - - - - - - - - - - - - - - 0 - - Not Covered
FastPwrStateReqPwrDn - - - - - - - - - - - - - - - 1 - Not Covered
FastPwrStateReqPwrDn - - - - - - - - - - - - - - - 0 - Not Covered
FastPwrStateNvmShutDown - - - - - - - - - - - - - - - - - Not Covered
FastPwrStateResetPrep - - - - - - - - - - - - - - - - - Not Covered
FastPwrStateResetWait - - - - - - - - - - - - - - - - 1 Not Covered
FastPwrStateResetWait - - - - - - - - - - - - - - - - 0 Not Covered
default - - - - - - - - - - - - - - - - - Not Covered


LineNo. Expression -1-: 489 if (fsm_invalid_i)

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%