Unified Coverage Report :: Module :: prim_flop_2sync

Module : prim_flop_2sync

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_prim_flop_2sync_0/rtl/prim_flop_2sync.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_ndm_sync
tb.dut.u_esc_timeout.u_ref_timeout.gen_nrz_hs_protocol.req_sync
tb.dut.u_esc_timeout.u_ref_timeout.gen_nrz_hs_protocol.ack_sync
tb.dut.u_esc_timeout_sync
tb.dut.u_cdc.u_req_pwrdn_sync
tb.dut.u_cdc.u_ack_pwrup_sync
tb.dut.u_cdc.u_slow_cdc_sync.prim_flop_2sync
tb.dut.u_cdc.u_slow_ext_req_sync
tb.dut.u_cdc.u_ip_clk_status_sync
tb.dut.u_cdc.u_ast_sync
tb.dut.u_cdc.u_req_pwrup_sync
tb.dut.u_cdc.u_ack_pwrdn_sync
tb.dut.u_cdc.u_int_fsm_invalid_sync
tb.dut.u_cdc.u_pwrup_chg_sync
tb.dut.u_cdc.u_ip_clk_en_sync
tb.dut.u_cdc.u_sleeping_sync
tb.dut.u_cdc.u_scdc_sync.prim_flop_2sync
tb.dut.u_cdc.u_ext_req_sync
tb.dut.u_cdc.u_sync_flash_idle
tb.dut.u_cdc.u_sync_otp
tb.dut.u_cdc.u_sync_rom_ctrl.gen_flops.u_prim_flop_2sync
tb.dut.u_cdc.u_clr_req_sync
tb.dut.u_slow_fsm.u_main_pok_sync
tb.dut.u_prim_lc_sync_dft_en.gen_flops.u_prim_flop_2sync
tb.dut.u_prim_lc_sync_hw_debug_en.gen_flops.u_prim_flop_2sync
tb.dut.u_fsm.u_slow_sync_lc_done
tb.dut.u_fsm.u_sync_lc_done

---

Module Instance : tb.dut.u_ndm_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
20.42	0.00	0.00	81.69		0.00		dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_esc_timeout.u_ref_timeout.gen_nrz_hs_protocol.req_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_ref_timeout

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_esc_timeout.u_ref_timeout.gen_nrz_hs_protocol.ack_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_ref_timeout

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_esc_timeout_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
20.42	0.00	0.00	81.69		0.00		dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_req_pwrdn_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_cdc

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_ack_pwrup_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_cdc

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_slow_cdc_sync.prim_flop_2sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_slow_cdc_sync

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_slow_ext_req_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_cdc

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_ip_clk_status_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_cdc

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_ast_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_cdc

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_req_pwrup_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_cdc

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_ack_pwrdn_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_cdc

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_int_fsm_invalid_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_cdc

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_pwrup_chg_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_cdc

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_ip_clk_en_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_cdc

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_sleeping_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_cdc

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_scdc_sync.prim_flop_2sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_scdc_sync

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_ext_req_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_cdc

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_sync_flash_idle

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_cdc

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_sync_otp

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_cdc

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_sync_rom_ctrl.gen_flops.u_prim_flop_2sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_sync_rom_ctrl

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_cdc.u_clr_req_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		u_cdc

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_slow_fsm.u_main_pok_sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00		0.00	0.00		u_slow_fsm

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_prim_lc_sync_dft_en.gen_flops.u_prim_flop_2sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00						u_prim_lc_sync_dft_en

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_prim_lc_sync_hw_debug_en.gen_flops.u_prim_flop_2sync

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00						u_prim_lc_sync_hw_debug_en

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_fsm.u_slow_sync_lc_done

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00		0.00	0.00		u_fsm

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00

---

Module Instance : tb.dut.u_fsm.u_sync_lc_done

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00		0.00	0.00		u_fsm

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sync_1	0.00	0.00				0.00
u_sync_2	0.00	0.00				0.00