T321 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_esc_clk_rst_malfunc.2978006719 |
|
|
Aug 27 05:16:17 AM UTC 24 |
Aug 27 05:16:19 AM UTC 24 |
32537685 ps |
T322 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_reset.1854533664 |
|
|
Aug 27 05:16:16 AM UTC 24 |
Aug 27 05:16:19 AM UTC 24 |
65970035 ps |
T323 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_global_esc.1089736844 |
|
|
Aug 27 05:16:17 AM UTC 24 |
Aug 27 05:16:19 AM UTC 24 |
22075076 ps |
T324 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_aborted_low_power.2722829950 |
|
|
Aug 27 05:16:17 AM UTC 24 |
Aug 27 05:16:19 AM UTC 24 |
40559928 ps |
T325 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_glitch.1500719959 |
|
|
Aug 27 05:16:17 AM UTC 24 |
Aug 27 05:16:19 AM UTC 24 |
33713006 ps |
T326 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rstmgr_intersig_mubi.3997406408 |
|
|
Aug 27 05:16:17 AM UTC 24 |
Aug 27 05:16:19 AM UTC 24 |
86065478 ps |
T327 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all.1387570145 |
|
|
Aug 27 05:16:16 AM UTC 24 |
Aug 27 05:16:19 AM UTC 24 |
295747318 ps |
T328 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_ctrl_config_regwen.3058477086 |
|
|
Aug 27 05:16:17 AM UTC 24 |
Aug 27 05:16:19 AM UTC 24 |
114856066 ps |
T329 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset.174334936 |
|
|
Aug 27 05:16:17 AM UTC 24 |
Aug 27 05:16:19 AM UTC 24 |
125696083 ps |
T330 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_disable_rom_integrity_check.582255054 |
|
|
Aug 27 05:16:17 AM UTC 24 |
Aug 27 05:16:19 AM UTC 24 |
59827180 ps |
T331 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_lowpower_invalid.837687221 |
|
|
Aug 27 05:16:17 AM UTC 24 |
Aug 27 05:16:19 AM UTC 24 |
53623795 ps |
T332 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_smoke.2956929698 |
|
|
Aug 27 05:16:17 AM UTC 24 |
Aug 27 05:16:19 AM UTC 24 |
31563538 ps |
T333 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_wakeup_reset.508765185 |
|
|
Aug 27 05:16:17 AM UTC 24 |
Aug 27 05:16:19 AM UTC 24 |
271068870 ps |
T334 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_escalation_timeout.941376837 |
|
|
Aug 27 05:16:17 AM UTC 24 |
Aug 27 05:16:19 AM UTC 24 |
115788229 ps |
T335 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_smoke.946940256 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:23 AM UTC 24 |
54727097 ps |
T336 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_reset_invalid.3023753832 |
|
|
Aug 27 05:16:17 AM UTC 24 |
Aug 27 05:16:19 AM UTC 24 |
97179477 ps |
T337 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3521837532 |
|
|
Aug 27 05:16:16 AM UTC 24 |
Aug 27 05:16:19 AM UTC 24 |
1130871222 ps |
T338 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2915692446 |
|
|
Aug 27 05:16:16 AM UTC 24 |
Aug 27 05:16:19 AM UTC 24 |
1313682462 ps |
T339 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.340243571 |
|
|
Aug 27 05:16:17 AM UTC 24 |
Aug 27 05:16:20 AM UTC 24 |
1001329254 ps |
T340 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all.2572908866 |
|
|
Aug 27 05:16:17 AM UTC 24 |
Aug 27 05:16:20 AM UTC 24 |
708289669 ps |
T341 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_aborted_low_power.3565513935 |
|
|
Aug 27 05:16:18 AM UTC 24 |
Aug 27 05:16:20 AM UTC 24 |
31060770 ps |
T342 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_esc_clk_rst_malfunc.137423581 |
|
|
Aug 27 05:16:19 AM UTC 24 |
Aug 27 05:16:20 AM UTC 24 |
28686823 ps |
T343 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_wakeup_race.1896408541 |
|
|
Aug 27 05:16:18 AM UTC 24 |
Aug 27 05:16:20 AM UTC 24 |
467587139 ps |
T344 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup_reset.11221717 |
|
|
Aug 27 05:16:18 AM UTC 24 |
Aug 27 05:16:20 AM UTC 24 |
117892083 ps |
T54 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_stress_all_with_rand_reset.3103692958 |
|
|
Aug 27 05:16:07 AM UTC 24 |
Aug 27 05:16:20 AM UTC 24 |
3999611219 ps |
T345 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_global_esc.848897939 |
|
|
Aug 27 05:16:19 AM UTC 24 |
Aug 27 05:16:20 AM UTC 24 |
78571261 ps |
T346 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup.2362406147 |
|
|
Aug 27 05:16:18 AM UTC 24 |
Aug 27 05:16:21 AM UTC 24 |
266064363 ps |
T347 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rstmgr_intersig_mubi.3970748503 |
|
|
Aug 27 05:16:19 AM UTC 24 |
Aug 27 05:16:21 AM UTC 24 |
51611982 ps |
T348 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_escalation_timeout.2519091092 |
|
|
Aug 27 05:16:19 AM UTC 24 |
Aug 27 05:16:21 AM UTC 24 |
403703450 ps |
T55 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_stress_all_with_rand_reset.1590493367 |
|
|
Aug 27 05:16:12 AM UTC 24 |
Aug 27 05:16:21 AM UTC 24 |
3972378303 ps |
T349 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3820323393 |
|
|
Aug 27 05:16:17 AM UTC 24 |
Aug 27 05:16:21 AM UTC 24 |
867606261 ps |
T350 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_ctrl_config_regwen.916892844 |
|
|
Aug 27 05:16:19 AM UTC 24 |
Aug 27 05:16:21 AM UTC 24 |
405173740 ps |
T351 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4245796568 |
|
|
Aug 27 05:16:19 AM UTC 24 |
Aug 27 05:16:21 AM UTC 24 |
1335576205 ps |
T352 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1873019978 |
|
|
Aug 27 05:16:19 AM UTC 24 |
Aug 27 05:16:22 AM UTC 24 |
1437836097 ps |
T56 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_stress_all_with_rand_reset.1263138408 |
|
|
Aug 27 05:16:10 AM UTC 24 |
Aug 27 05:16:22 AM UTC 24 |
2508279129 ps |
T353 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_glitch.2062875397 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:22 AM UTC 24 |
77891883 ps |
T354 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_invalid.671646445 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:22 AM UTC 24 |
64638846 ps |
T355 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset_invalid.3119517489 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:22 AM UTC 24 |
153817370 ps |
T147 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_disable_rom_integrity_check.608452437 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:22 AM UTC 24 |
98422903 ps |
T356 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_wakeup_race.3783441269 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:23 AM UTC 24 |
96238345 ps |
T357 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_smoke.3846859969 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:22 AM UTC 24 |
40377696 ps |
T358 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_esc_clk_rst_malfunc.4106777783 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:23 AM UTC 24 |
32268231 ps |
T359 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_global_esc.366095703 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:23 AM UTC 24 |
54744487 ps |
T360 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_aborted_low_power.1348571939 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:23 AM UTC 24 |
68469809 ps |
T361 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset.912380529 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:23 AM UTC 24 |
77305005 ps |
T362 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_wakeup_race.2293024408 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:23 AM UTC 24 |
258024543 ps |
T363 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_glitch.3147442337 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:23 AM UTC 24 |
89600100 ps |
T364 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_disable_rom_integrity_check.203361053 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:23 AM UTC 24 |
129272985 ps |
T365 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_ctrl_config_regwen.225388191 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:23 AM UTC 24 |
238298474 ps |
T366 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup_reset.1488334721 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:23 AM UTC 24 |
265721181 ps |
T367 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_escalation_timeout.3249436315 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:23 AM UTC 24 |
929880094 ps |
T368 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rstmgr_intersig_mubi.3278100605 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:23 AM UTC 24 |
76119712 ps |
T369 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset_invalid.2793034823 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:23 AM UTC 24 |
150812347 ps |
T370 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup.2213349346 |
|
|
Aug 27 05:16:27 AM UTC 24 |
Aug 27 05:16:35 AM UTC 24 |
381958039 ps |
T371 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1488911652 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:25 AM UTC 24 |
745234928 ps |
T372 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.433837829 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:25 AM UTC 24 |
867393843 ps |
T373 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all.158842962 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:26 AM UTC 24 |
1914727955 ps |
T374 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all.1863524862 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:28 AM UTC 24 |
1712162918 ps |
T120 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all_with_rand_reset.1703015092 |
|
|
Aug 27 05:16:17 AM UTC 24 |
Aug 27 05:16:28 AM UTC 24 |
12486965407 ps |
T121 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all_with_rand_reset.1003401839 |
|
|
Aug 27 05:16:16 AM UTC 24 |
Aug 27 05:16:29 AM UTC 24 |
3788543722 ps |
T375 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_disable_rom_integrity_check.3779033145 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:16:30 AM UTC 24 |
52969720 ps |
T376 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rstmgr_intersig_mubi.409637212 |
|
|
Aug 27 05:16:28 AM UTC 24 |
Aug 27 05:16:32 AM UTC 24 |
73480127 ps |
T122 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all_with_rand_reset.1170198987 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:32 AM UTC 24 |
2955695739 ps |
T377 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_esc_clk_rst_malfunc.1944514094 |
|
|
Aug 27 05:16:30 AM UTC 24 |
Aug 27 05:16:35 AM UTC 24 |
38139309 ps |
T378 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup_reset.1421229321 |
|
|
Aug 27 05:16:27 AM UTC 24 |
Aug 27 05:16:36 AM UTC 24 |
208361193 ps |
T123 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all_with_rand_reset.2162008388 |
|
|
Aug 27 05:16:21 AM UTC 24 |
Aug 27 05:16:36 AM UTC 24 |
4273032926 ps |
T379 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_invalid.2096335191 |
|
|
Aug 27 05:16:36 AM UTC 24 |
Aug 27 05:16:41 AM UTC 24 |
38937133 ps |
T380 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset_invalid.1831097878 |
|
|
Aug 27 05:16:36 AM UTC 24 |
Aug 27 05:16:41 AM UTC 24 |
130365321 ps |
T381 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_glitch.802042811 |
|
|
Aug 27 05:16:32 AM UTC 24 |
Aug 27 05:16:41 AM UTC 24 |
105342068 ps |
T382 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_global_esc.4284286301 |
|
|
Aug 27 05:16:30 AM UTC 24 |
Aug 27 05:16:42 AM UTC 24 |
30159159 ps |
T383 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all.4127874027 |
|
|
Aug 27 05:16:37 AM UTC 24 |
Aug 27 05:16:45 AM UTC 24 |
1994683543 ps |
T384 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_ctrl_config_regwen.713844204 |
|
|
Aug 27 05:16:30 AM UTC 24 |
Aug 27 05:16:45 AM UTC 24 |
40690251 ps |
T385 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_escalation_timeout.2255456335 |
|
|
Aug 27 05:16:30 AM UTC 24 |
Aug 27 05:16:46 AM UTC 24 |
111047127 ps |
T386 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_smoke.2121619290 |
|
|
Aug 27 05:16:41 AM UTC 24 |
Aug 27 05:16:46 AM UTC 24 |
29167493 ps |
T387 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup.1746294273 |
|
|
Aug 27 05:16:43 AM UTC 24 |
Aug 27 05:16:46 AM UTC 24 |
125474810 ps |
T388 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_disable_rom_integrity_check.1823306756 |
|
|
Aug 27 05:16:34 AM UTC 24 |
Aug 27 05:16:46 AM UTC 24 |
192252160 ps |
T389 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_aborted_low_power.832821211 |
|
|
Aug 27 05:16:27 AM UTC 24 |
Aug 27 05:16:47 AM UTC 24 |
33547636 ps |
T390 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1210105065 |
|
|
Aug 27 05:16:27 AM UTC 24 |
Aug 27 05:16:48 AM UTC 24 |
1110441863 ps |
T391 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.678152790 |
|
|
Aug 27 05:16:27 AM UTC 24 |
Aug 27 05:16:48 AM UTC 24 |
1123563229 ps |
T392 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all_with_rand_reset.31715205 |
|
|
Aug 27 05:16:37 AM UTC 24 |
Aug 27 05:16:48 AM UTC 24 |
3009180101 ps |
T393 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rstmgr_intersig_mubi.1119835698 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:16:50 AM UTC 24 |
55330344 ps |
T394 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_esc_clk_rst_malfunc.3225852990 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:16:50 AM UTC 24 |
29730658 ps |
T395 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_global_esc.1042695507 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:16:50 AM UTC 24 |
70754660 ps |
T396 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_ctrl_config_regwen.1020724871 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:16:50 AM UTC 24 |
167827200 ps |
T397 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_aborted_low_power.3896219675 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:16:50 AM UTC 24 |
122968318 ps |
T398 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset.3773322446 |
|
|
Aug 27 05:16:42 AM UTC 24 |
Aug 27 05:16:50 AM UTC 24 |
97606891 ps |
T399 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_global_esc.2206145031 |
|
|
Aug 27 05:16:49 AM UTC 24 |
Aug 27 05:16:50 AM UTC 24 |
36487615 ps |
T400 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_wakeup_race.3686482401 |
|
|
Aug 27 05:16:42 AM UTC 24 |
Aug 27 05:16:50 AM UTC 24 |
247560718 ps |
T401 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_glitch.415675465 |
|
|
Aug 27 05:16:49 AM UTC 24 |
Aug 27 05:16:50 AM UTC 24 |
33090642 ps |
T402 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_escalation_timeout.2589443732 |
|
|
Aug 27 05:16:49 AM UTC 24 |
Aug 27 05:16:51 AM UTC 24 |
134130274 ps |
T403 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1596705239 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:16:51 AM UTC 24 |
1294001597 ps |
T404 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_disable_rom_integrity_check.1097269783 |
|
|
Aug 27 05:16:51 AM UTC 24 |
Aug 27 05:16:56 AM UTC 24 |
49406163 ps |
T405 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_invalid.3736512793 |
|
|
Aug 27 05:16:51 AM UTC 24 |
Aug 27 05:16:56 AM UTC 24 |
68951405 ps |
T406 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset_invalid.2518670921 |
|
|
Aug 27 05:16:51 AM UTC 24 |
Aug 27 05:16:56 AM UTC 24 |
169642258 ps |
T407 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_smoke.2428258500 |
|
|
Aug 27 05:16:51 AM UTC 24 |
Aug 27 05:16:56 AM UTC 24 |
39097039 ps |
T408 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_wakeup_race.816442238 |
|
|
Aug 27 05:16:51 AM UTC 24 |
Aug 27 05:16:56 AM UTC 24 |
116107171 ps |
T409 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup_reset.3776632019 |
|
|
Aug 27 05:16:51 AM UTC 24 |
Aug 27 05:16:56 AM UTC 24 |
39175749 ps |
T410 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset.486919693 |
|
|
Aug 27 05:16:51 AM UTC 24 |
Aug 27 05:16:56 AM UTC 24 |
54041104 ps |
T411 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup.355320245 |
|
|
Aug 27 05:16:51 AM UTC 24 |
Aug 27 05:16:56 AM UTC 24 |
566067666 ps |
T412 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_aborted_low_power.4085334132 |
|
|
Aug 27 05:16:51 AM UTC 24 |
Aug 27 05:16:56 AM UTC 24 |
49426306 ps |
T413 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_esc_clk_rst_malfunc.1659062756 |
|
|
Aug 27 05:16:47 AM UTC 24 |
Aug 27 05:16:56 AM UTC 24 |
32038337 ps |
T414 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_ctrl_config_regwen.1269096559 |
|
|
Aug 27 05:16:48 AM UTC 24 |
Aug 27 05:16:56 AM UTC 24 |
203442031 ps |
T415 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rstmgr_intersig_mubi.3150647396 |
|
|
Aug 27 05:16:47 AM UTC 24 |
Aug 27 05:16:56 AM UTC 24 |
87846891 ps |
T416 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_invalid.3670099220 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:16:56 AM UTC 24 |
42044320 ps |
T417 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_aborted_low_power.3323048240 |
|
|
Aug 27 05:16:24 AM UTC 24 |
Aug 27 05:16:57 AM UTC 24 |
32545397 ps |
T418 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset_invalid.807950473 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:16:57 AM UTC 24 |
99324642 ps |
T419 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup.2116601691 |
|
|
Aug 27 05:16:24 AM UTC 24 |
Aug 27 05:16:57 AM UTC 24 |
189518976 ps |
T420 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup_reset.3596875965 |
|
|
Aug 27 05:16:24 AM UTC 24 |
Aug 27 05:16:57 AM UTC 24 |
293207856 ps |
T421 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all.3109381218 |
|
|
Aug 27 05:16:51 AM UTC 24 |
Aug 27 05:16:59 AM UTC 24 |
2271579811 ps |
T422 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_wakeup_race.2671544834 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:17:00 AM UTC 24 |
71056494 ps |
T423 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_glitch.1781006110 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:17:00 AM UTC 24 |
51374203 ps |
T424 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_invalid.2850003233 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:17:00 AM UTC 24 |
158741123 ps |
T425 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_escalation_timeout.3651294879 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:17:00 AM UTC 24 |
114874192 ps |
T426 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_disable_rom_integrity_check.587452146 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:17:00 AM UTC 24 |
62870350 ps |
T427 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup.3393441048 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:17:00 AM UTC 24 |
265658164 ps |
T428 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_smoke.1275154519 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:17:00 AM UTC 24 |
39637844 ps |
T429 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset_invalid.981824132 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:17:00 AM UTC 24 |
147196408 ps |
T430 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset.1927716774 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:17:00 AM UTC 24 |
107635351 ps |
T431 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_smoke.2468906130 |
|
|
Aug 27 05:16:58 AM UTC 24 |
Aug 27 05:17:00 AM UTC 24 |
27888887 ps |
T432 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup_reset.681516090 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:17:01 AM UTC 24 |
305178385 ps |
T433 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_wakeup_race.1936114948 |
|
|
Aug 27 05:16:58 AM UTC 24 |
Aug 27 05:17:01 AM UTC 24 |
123834595 ps |
T434 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_aborted_low_power.287880365 |
|
|
Aug 27 05:16:58 AM UTC 24 |
Aug 27 05:17:01 AM UTC 24 |
27499539 ps |
T435 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset.2434880279 |
|
|
Aug 27 05:16:58 AM UTC 24 |
Aug 27 05:17:01 AM UTC 24 |
52106589 ps |
T436 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup.2266731368 |
|
|
Aug 27 05:16:58 AM UTC 24 |
Aug 27 05:17:01 AM UTC 24 |
252766943 ps |
T437 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup_reset.797242296 |
|
|
Aug 27 05:16:58 AM UTC 24 |
Aug 27 05:17:01 AM UTC 24 |
132497087 ps |
T438 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rstmgr_intersig_mubi.2789066256 |
|
|
Aug 27 05:16:56 AM UTC 24 |
Aug 27 05:17:01 AM UTC 24 |
151513477 ps |
T439 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1860027381 |
|
|
Aug 27 05:16:52 AM UTC 24 |
Aug 27 05:17:02 AM UTC 24 |
783804743 ps |
T440 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all.69684278 |
|
|
Aug 27 05:16:58 AM UTC 24 |
Aug 27 05:17:02 AM UTC 24 |
630248267 ps |
T441 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all_with_rand_reset.3248562480 |
|
|
Aug 27 05:16:51 AM UTC 24 |
Aug 27 05:17:02 AM UTC 24 |
12523336093 ps |
T442 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_glitch.1649084938 |
|
|
Aug 27 05:17:01 AM UTC 24 |
Aug 27 05:17:16 AM UTC 24 |
30367401 ps |
T443 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all_with_rand_reset.3640115521 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:17:02 AM UTC 24 |
5216634009 ps |
T444 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all.1443148444 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:17:03 AM UTC 24 |
2576007043 ps |
T445 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_esc_clk_rst_malfunc.2386015515 |
|
|
Aug 27 05:17:01 AM UTC 24 |
Aug 27 05:17:06 AM UTC 24 |
29597861 ps |
T446 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_global_esc.3778343831 |
|
|
Aug 27 05:17:01 AM UTC 24 |
Aug 27 05:17:06 AM UTC 24 |
38724738 ps |
T447 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_disable_rom_integrity_check.3204034625 |
|
|
Aug 27 05:17:01 AM UTC 24 |
Aug 27 05:17:06 AM UTC 24 |
83496231 ps |
T448 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset_invalid.2011124042 |
|
|
Aug 27 05:17:01 AM UTC 24 |
Aug 27 05:17:06 AM UTC 24 |
154552180 ps |
T449 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_ctrl_config_regwen.2953875582 |
|
|
Aug 27 05:17:01 AM UTC 24 |
Aug 27 05:17:06 AM UTC 24 |
103419983 ps |
T450 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rstmgr_intersig_mubi.269893429 |
|
|
Aug 27 05:17:01 AM UTC 24 |
Aug 27 05:17:06 AM UTC 24 |
53113583 ps |
T451 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_escalation_timeout.2040443664 |
|
|
Aug 27 05:17:01 AM UTC 24 |
Aug 27 05:17:06 AM UTC 24 |
108437403 ps |
T57 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all_with_rand_reset.650943527 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:17:12 AM UTC 24 |
9946418362 ps |
T452 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2354644352 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:17:12 AM UTC 24 |
842604731 ps |
T453 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_smoke.3495505317 |
|
|
Aug 27 05:17:31 AM UTC 24 |
Aug 27 05:17:36 AM UTC 24 |
29139525 ps |
T454 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_invalid.3522163934 |
|
|
Aug 27 05:17:01 AM UTC 24 |
Aug 27 05:17:16 AM UTC 24 |
51004507 ps |
T455 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_global_esc.2660702452 |
|
|
Aug 27 05:16:57 AM UTC 24 |
Aug 27 05:17:16 AM UTC 24 |
45955795 ps |
T456 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_esc_clk_rst_malfunc.544558773 |
|
|
Aug 27 05:17:04 AM UTC 24 |
Aug 27 05:17:16 AM UTC 24 |
36510875 ps |
T457 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_glitch.3972608088 |
|
|
Aug 27 05:16:57 AM UTC 24 |
Aug 27 05:17:16 AM UTC 24 |
68899393 ps |
T458 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_smoke.4018752873 |
|
|
Aug 27 05:17:01 AM UTC 24 |
Aug 27 05:17:16 AM UTC 24 |
32362369 ps |
T459 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_global_esc.4258441463 |
|
|
Aug 27 05:17:04 AM UTC 24 |
Aug 27 05:17:16 AM UTC 24 |
21375880 ps |
T460 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup.1290763048 |
|
|
Aug 27 05:17:26 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
79640226 ps |
T461 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset.213963117 |
|
|
Aug 27 05:17:01 AM UTC 24 |
Aug 27 05:17:16 AM UTC 24 |
54165709 ps |
T462 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_aborted_low_power.2273080861 |
|
|
Aug 27 05:17:03 AM UTC 24 |
Aug 27 05:17:16 AM UTC 24 |
60658098 ps |
T463 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_escalation_timeout.1360987644 |
|
|
Aug 27 05:16:57 AM UTC 24 |
Aug 27 05:17:17 AM UTC 24 |
390218573 ps |
T464 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all.723625317 |
|
|
Aug 27 05:17:18 AM UTC 24 |
Aug 27 05:17:30 AM UTC 24 |
2225553750 ps |
T465 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup.1870521189 |
|
|
Aug 27 05:17:01 AM UTC 24 |
Aug 27 05:17:17 AM UTC 24 |
164280899 ps |
T466 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_wakeup_race.2017796901 |
|
|
Aug 27 05:17:01 AM UTC 24 |
Aug 27 05:17:17 AM UTC 24 |
278757945 ps |
T467 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_invalid.2239666494 |
|
|
Aug 27 05:16:58 AM UTC 24 |
Aug 27 05:17:17 AM UTC 24 |
43188795 ps |
T468 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_glitch.4118599056 |
|
|
Aug 27 05:17:08 AM UTC 24 |
Aug 27 05:17:17 AM UTC 24 |
45937760 ps |
T469 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_disable_rom_integrity_check.4222806905 |
|
|
Aug 27 05:16:58 AM UTC 24 |
Aug 27 05:17:17 AM UTC 24 |
66604107 ps |
T470 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rstmgr_intersig_mubi.126111728 |
|
|
Aug 27 05:17:04 AM UTC 24 |
Aug 27 05:17:17 AM UTC 24 |
72998146 ps |
T471 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_smoke.2422256385 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:17:17 AM UTC 24 |
40775895 ps |
T472 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_disable_rom_integrity_check.222710672 |
|
|
Aug 27 05:17:08 AM UTC 24 |
Aug 27 05:17:17 AM UTC 24 |
71929339 ps |
T473 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_invalid.3255179951 |
|
|
Aug 27 05:17:08 AM UTC 24 |
Aug 27 05:17:17 AM UTC 24 |
42384284 ps |
T474 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_ctrl_config_regwen.981833828 |
|
|
Aug 27 05:17:04 AM UTC 24 |
Aug 27 05:17:17 AM UTC 24 |
365919493 ps |
T475 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup_reset.1178427152 |
|
|
Aug 27 05:17:01 AM UTC 24 |
Aug 27 05:17:17 AM UTC 24 |
233147781 ps |
T476 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset_invalid.2308441504 |
|
|
Aug 27 05:16:58 AM UTC 24 |
Aug 27 05:17:17 AM UTC 24 |
100338002 ps |
T477 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_escalation_timeout.1538032351 |
|
|
Aug 27 05:17:08 AM UTC 24 |
Aug 27 05:17:17 AM UTC 24 |
200546898 ps |
T478 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset_invalid.1573304055 |
|
|
Aug 27 05:17:08 AM UTC 24 |
Aug 27 05:17:17 AM UTC 24 |
90491841 ps |
T479 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset.3661210706 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:17:17 AM UTC 24 |
121103110 ps |
T480 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.491753058 |
|
|
Aug 27 05:17:04 AM UTC 24 |
Aug 27 05:17:18 AM UTC 24 |
850613090 ps |
T481 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.767940118 |
|
|
Aug 27 05:17:04 AM UTC 24 |
Aug 27 05:17:19 AM UTC 24 |
814012838 ps |
T482 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all.1461380844 |
|
|
Aug 27 05:17:01 AM UTC 24 |
Aug 27 05:17:19 AM UTC 24 |
741967027 ps |
T58 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all_with_rand_reset.3408395635 |
|
|
Aug 27 05:17:08 AM UTC 24 |
Aug 27 05:17:23 AM UTC 24 |
6739642336 ps |
T483 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_glitch.2514489465 |
|
|
Aug 27 05:17:17 AM UTC 24 |
Aug 27 05:17:25 AM UTC 24 |
48536231 ps |
T484 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_global_esc.1083261287 |
|
|
Aug 27 05:17:16 AM UTC 24 |
Aug 27 05:17:25 AM UTC 24 |
52425315 ps |
T485 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_escalation_timeout.1098416149 |
|
|
Aug 27 05:17:16 AM UTC 24 |
Aug 27 05:17:25 AM UTC 24 |
387294194 ps |
T486 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_wakeup_race.2860266394 |
|
|
Aug 27 05:17:24 AM UTC 24 |
Aug 27 05:17:26 AM UTC 24 |
192074865 ps |
T487 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_smoke.2281603030 |
|
|
Aug 27 05:17:08 AM UTC 24 |
Aug 27 05:17:27 AM UTC 24 |
67459951 ps |
T488 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_wakeup_race.2345157033 |
|
|
Aug 27 05:17:08 AM UTC 24 |
Aug 27 05:17:27 AM UTC 24 |
44661992 ps |
T489 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_invalid.1766530174 |
|
|
Aug 27 05:17:18 AM UTC 24 |
Aug 27 05:17:27 AM UTC 24 |
51118416 ps |
T490 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset_invalid.1795677174 |
|
|
Aug 27 05:17:18 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
107793765 ps |
T491 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_aborted_low_power.2068933169 |
|
|
Aug 27 05:17:26 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
92622693 ps |
T492 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset.3155416174 |
|
|
Aug 27 05:17:08 AM UTC 24 |
Aug 27 05:17:27 AM UTC 24 |
59926042 ps |
T493 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset_invalid.2367501350 |
|
|
Aug 27 05:17:19 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
96110813 ps |
T494 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_wakeup_reset.1986845394 |
|
|
Aug 27 05:17:08 AM UTC 24 |
Aug 27 05:17:27 AM UTC 24 |
222642944 ps |
T495 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_disable_rom_integrity_check.2801590319 |
|
|
Aug 27 05:17:18 AM UTC 24 |
Aug 27 05:17:27 AM UTC 24 |
70018321 ps |
T496 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_smoke.591231872 |
|
|
Aug 27 05:17:18 AM UTC 24 |
Aug 27 05:17:27 AM UTC 24 |
40554488 ps |
T497 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup.1779800304 |
|
|
Aug 27 05:17:18 AM UTC 24 |
Aug 27 05:17:27 AM UTC 24 |
78338192 ps |
T498 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all.540629113 |
|
|
Aug 27 05:17:08 AM UTC 24 |
Aug 27 05:17:29 AM UTC 24 |
1999593590 ps |
T499 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_esc_clk_rst_malfunc.3597610693 |
|
|
Aug 27 05:17:12 AM UTC 24 |
Aug 27 05:17:27 AM UTC 24 |
29025561 ps |
T500 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_wakeup.3291961467 |
|
|
Aug 27 05:17:08 AM UTC 24 |
Aug 27 05:17:27 AM UTC 24 |
218992843 ps |
T501 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset.1891708919 |
|
|
Aug 27 05:17:18 AM UTC 24 |
Aug 27 05:17:27 AM UTC 24 |
141667529 ps |
T502 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_ctrl_config_regwen.1488197500 |
|
|
Aug 27 05:17:12 AM UTC 24 |
Aug 27 05:17:27 AM UTC 24 |
126358305 ps |
T503 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_aborted_low_power.113660968 |
|
|
Aug 27 05:17:08 AM UTC 24 |
Aug 27 05:17:27 AM UTC 24 |
30793291 ps |
T504 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_global_esc.942511380 |
|
|
Aug 27 05:17:19 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
44303086 ps |
T505 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rstmgr_intersig_mubi.3686852963 |
|
|
Aug 27 05:17:08 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
53591995 ps |
T506 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_esc_clk_rst_malfunc.3573369062 |
|
|
Aug 27 05:17:19 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
31015255 ps |
T507 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_aborted_low_power.4206789377 |
|
|
Aug 27 05:17:18 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
76083679 ps |
T508 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup_reset.2985968915 |
|
|
Aug 27 05:17:26 AM UTC 24 |
Aug 27 05:17:35 AM UTC 24 |
61040445 ps |
T509 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_invalid.3649822221 |
|
|
Aug 27 05:17:19 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
40651264 ps |
T510 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_glitch.1189382807 |
|
|
Aug 27 05:17:19 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
33648885 ps |
T511 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rstmgr_intersig_mubi.179093125 |
|
|
Aug 27 05:17:19 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
257692553 ps |
T512 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_disable_rom_integrity_check.4174759029 |
|
|
Aug 27 05:17:19 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
60044657 ps |
T513 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup_reset.834699642 |
|
|
Aug 27 05:17:18 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
201252482 ps |
T514 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_wakeup_race.4014540780 |
|
|
Aug 27 05:16:25 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
198488403 ps |
T515 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_escalation_timeout.2965103009 |
|
|
Aug 27 05:17:19 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
383540622 ps |
T516 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_wakeup_race.293625901 |
|
|
Aug 27 05:17:18 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
232875956 ps |
T517 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_ctrl_config_regwen.1466463177 |
|
|
Aug 27 05:17:19 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
67105566 ps |
T59 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all_with_rand_reset.1259944399 |
|
|
Aug 27 05:17:18 AM UTC 24 |
Aug 27 05:17:28 AM UTC 24 |
891830527 ps |
T518 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.942600255 |
|
|
Aug 27 05:17:08 AM UTC 24 |
Aug 27 05:17:29 AM UTC 24 |
962012918 ps |
T519 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.534472033 |
|
|
Aug 27 05:17:08 AM UTC 24 |
Aug 27 05:17:29 AM UTC 24 |
904109167 ps |
T520 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all_with_rand_reset.1140224470 |
|
|
Aug 27 05:16:58 AM UTC 24 |
Aug 27 05:17:29 AM UTC 24 |
4552127320 ps |
T521 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.244565692 |
|
|
Aug 27 05:17:18 AM UTC 24 |
Aug 27 05:17:29 AM UTC 24 |
1174329700 ps |
T522 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3584143177 |
|
|
Aug 27 05:17:18 AM UTC 24 |
Aug 27 05:17:30 AM UTC 24 |
805790947 ps |
T65 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all_with_rand_reset.2255491496 |
|
|
Aug 27 05:17:01 AM UTC 24 |
Aug 27 05:17:30 AM UTC 24 |
13880585733 ps |
T523 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all_with_rand_reset.2951261481 |
|
|
Aug 27 05:17:19 AM UTC 24 |
Aug 27 05:17:32 AM UTC 24 |
3427052144 ps |
T524 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_ctrl_config_regwen.2478690408 |
|
|
Aug 27 05:17:33 AM UTC 24 |
Aug 27 05:17:36 AM UTC 24 |
153874701 ps |
T525 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_esc_clk_rst_malfunc.586643653 |
|
|
Aug 27 05:17:27 AM UTC 24 |
Aug 27 05:17:36 AM UTC 24 |
38621425 ps |
T526 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_invalid.4071506319 |
|
|
Aug 27 05:17:29 AM UTC 24 |
Aug 27 05:17:58 AM UTC 24 |
89566599 ps |
T527 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2292986918 |
|
|
Aug 27 05:17:56 AM UTC 24 |
Aug 27 05:17:58 AM UTC 24 |
1525901108 ps |
T528 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_wakeup_race.1346936983 |
|
|
Aug 27 05:17:31 AM UTC 24 |
Aug 27 05:17:36 AM UTC 24 |
62407272 ps |
T529 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_aborted_low_power.812280418 |
|
|
Aug 27 05:17:32 AM UTC 24 |
Aug 27 05:17:36 AM UTC 24 |
20302896 ps |
T530 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset.1506439616 |
|
|
Aug 27 05:17:31 AM UTC 24 |
Aug 27 05:17:36 AM UTC 24 |
37795212 ps |
T531 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_esc_clk_rst_malfunc.3284175359 |
|
|
Aug 27 05:17:32 AM UTC 24 |
Aug 27 05:17:36 AM UTC 24 |
39353345 ps |
T532 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup.2730798897 |
|
|
Aug 27 05:17:31 AM UTC 24 |
Aug 27 05:17:36 AM UTC 24 |
321000704 ps |
T533 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_ctrl_config_regwen.4003354825 |
|
|
Aug 27 05:17:27 AM UTC 24 |
Aug 27 05:17:36 AM UTC 24 |
159759924 ps |
T534 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rstmgr_intersig_mubi.557000170 |
|
|
Aug 27 05:17:27 AM UTC 24 |
Aug 27 05:17:36 AM UTC 24 |
134432092 ps |
T535 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rstmgr_intersig_mubi.111763844 |
|
|
Aug 27 05:17:32 AM UTC 24 |
Aug 27 05:17:36 AM UTC 24 |
107691209 ps |
T536 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup_reset.905968460 |
|
|
Aug 27 05:17:31 AM UTC 24 |
Aug 27 05:17:37 AM UTC 24 |
281321965 ps |
T537 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1874866724 |
|
|
Aug 27 05:17:26 AM UTC 24 |
Aug 27 05:17:37 AM UTC 24 |
779730637 ps |
T538 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.674274986 |
|
|
Aug 27 05:17:27 AM UTC 24 |
Aug 27 05:17:38 AM UTC 24 |
1379242558 ps |
T539 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.66894111 |
|
|
Aug 27 05:17:32 AM UTC 24 |
Aug 27 05:17:38 AM UTC 24 |
967755823 ps |
T540 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3635529644 |
|
|
Aug 27 05:17:32 AM UTC 24 |
Aug 27 05:17:38 AM UTC 24 |
842551259 ps |
T541 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2124596162 |
|
|
Aug 27 05:16:56 AM UTC 24 |
Aug 27 05:17:40 AM UTC 24 |
923566365 ps |
T542 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup_reset.1216903348 |
|
|
Aug 27 05:17:38 AM UTC 24 |
Aug 27 05:17:41 AM UTC 24 |
138555824 ps |
T543 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_global_esc.79362458 |
|
|
Aug 27 05:17:29 AM UTC 24 |
Aug 27 05:17:41 AM UTC 24 |
43043981 ps |
T544 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_aborted_low_power.2736945733 |
|
|
Aug 27 05:17:38 AM UTC 24 |
Aug 27 05:17:41 AM UTC 24 |
42839119 ps |
T545 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup.2228929232 |
|
|
Aug 27 05:17:38 AM UTC 24 |
Aug 27 05:17:41 AM UTC 24 |
625266026 ps |
T546 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1891272845 |
|
|
Aug 27 05:17:38 AM UTC 24 |
Aug 27 05:17:42 AM UTC 24 |
991534970 ps |
T547 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.657630294 |
|
|
Aug 27 05:17:38 AM UTC 24 |
Aug 27 05:17:42 AM UTC 24 |
936578815 ps |
T548 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_disable_rom_integrity_check.1587367318 |
|
|
Aug 27 05:17:29 AM UTC 24 |
Aug 27 05:17:48 AM UTC 24 |
61958456 ps |
T549 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_esc_clk_rst_malfunc.4434115 |
|
|
Aug 27 05:17:39 AM UTC 24 |
Aug 27 05:17:51 AM UTC 24 |
41256237 ps |
T550 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rstmgr_intersig_mubi.176750563 |
|
|
Aug 27 05:17:39 AM UTC 24 |
Aug 27 05:17:51 AM UTC 24 |
166554670 ps |
T551 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_glitch.3886908551 |
|
|
Aug 27 05:17:30 AM UTC 24 |
Aug 27 05:17:51 AM UTC 24 |
36674982 ps |
T552 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all.1249186840 |
|
|
Aug 27 05:17:42 AM UTC 24 |
Aug 27 05:17:53 AM UTC 24 |
2361401221 ps |
T553 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_glitch.1660232784 |
|
|
Aug 27 05:17:29 AM UTC 24 |
Aug 27 05:17:55 AM UTC 24 |
59146811 ps |
T554 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_global_esc.1996656381 |
|
|
Aug 27 05:17:41 AM UTC 24 |
Aug 27 05:17:55 AM UTC 24 |
115855588 ps |
T555 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all.1203615590 |
|
|
Aug 27 05:17:29 AM UTC 24 |
Aug 27 05:17:58 AM UTC 24 |
2437057401 ps |
T556 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_escalation_timeout.2071178560 |
|
|
Aug 27 05:17:29 AM UTC 24 |
Aug 27 05:17:55 AM UTC 24 |
394129871 ps |
T557 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_smoke.1997302089 |
|
|
Aug 27 05:17:29 AM UTC 24 |
Aug 27 05:17:55 AM UTC 24 |
35518571 ps |
T558 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_glitch.156598981 |
|
|
Aug 27 05:17:41 AM UTC 24 |
Aug 27 05:17:55 AM UTC 24 |
55603553 ps |