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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.89 98.23 96.58 99.62 96.00 96.37 99.74 98.69


Total test records in report: 1100
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html

T559 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_ctrl_config_regwen.3641685636 Aug 27 05:17:41 AM UTC 24 Aug 27 05:17:56 AM UTC 24 134466130 ps
T560 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset.2588803008 Aug 27 05:17:29 AM UTC 24 Aug 27 05:17:56 AM UTC 24 79268254 ps
T561 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_disable_rom_integrity_check.741191815 Aug 27 05:17:41 AM UTC 24 Aug 27 05:17:56 AM UTC 24 73558319 ps
T562 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_aborted_low_power.3394640367 Aug 27 05:17:30 AM UTC 24 Aug 27 05:17:56 AM UTC 24 35616997 ps
T563 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_global_esc.2633736525 Aug 27 05:17:37 AM UTC 24 Aug 27 05:17:56 AM UTC 24 63549879 ps
T564 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_escalation_timeout.1488144871 Aug 27 05:17:41 AM UTC 24 Aug 27 05:17:56 AM UTC 24 112973224 ps
T565 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_invalid.801635983 Aug 27 05:17:37 AM UTC 24 Aug 27 05:17:56 AM UTC 24 42799855 ps
T566 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset.12045201 Aug 27 05:17:37 AM UTC 24 Aug 27 05:17:56 AM UTC 24 66781049 ps
T567 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_smoke.2724254875 Aug 27 05:17:37 AM UTC 24 Aug 27 05:17:56 AM UTC 24 39042600 ps
T568 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup.2577639185 Aug 27 05:17:30 AM UTC 24 Aug 27 05:17:56 AM UTC 24 325949214 ps
T569 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_glitch.2487796777 Aug 27 05:17:37 AM UTC 24 Aug 27 05:17:56 AM UTC 24 48525738 ps
T570 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_escalation_timeout.904708840 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 736937440 ps
T571 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset_invalid.2647192603 Aug 27 05:17:37 AM UTC 24 Aug 27 05:17:56 AM UTC 24 191484139 ps
T572 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_disable_rom_integrity_check.3097128843 Aug 27 05:17:37 AM UTC 24 Aug 27 05:17:56 AM UTC 24 117079932 ps
T573 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_wakeup_race.2321021339 Aug 27 05:17:30 AM UTC 24 Aug 27 05:17:56 AM UTC 24 199851178 ps
T574 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_smoke.1704175940 Aug 27 05:17:43 AM UTC 24 Aug 27 05:17:56 AM UTC 24 29981503 ps
T575 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_wakeup_race.2367475883 Aug 27 05:17:37 AM UTC 24 Aug 27 05:17:56 AM UTC 24 332751499 ps
T576 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset.953384514 Aug 27 05:17:43 AM UTC 24 Aug 27 05:17:56 AM UTC 24 93301444 ps
T577 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup.83097992 Aug 27 05:17:51 AM UTC 24 Aug 27 05:17:56 AM UTC 24 245205148 ps
T578 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset_invalid.2013034640 Aug 27 05:17:42 AM UTC 24 Aug 27 05:17:57 AM UTC 24 133325413 ps
T124 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all_with_rand_reset.2214410164 Aug 27 05:17:37 AM UTC 24 Aug 27 05:17:57 AM UTC 24 1000829247 ps
T579 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_aborted_low_power.206378435 Aug 27 05:17:52 AM UTC 24 Aug 27 05:17:57 AM UTC 24 63234271 ps
T580 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup_reset.489902762 Aug 27 05:17:52 AM UTC 24 Aug 27 05:17:57 AM UTC 24 235095929 ps
T581 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rstmgr_intersig_mubi.2855275874 Aug 27 05:17:56 AM UTC 24 Aug 27 05:17:57 AM UTC 24 80684638 ps
T582 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all.3570585156 Aug 27 05:17:37 AM UTC 24 Aug 27 05:17:58 AM UTC 24 1245727263 ps
T583 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_invalid.1916678784 Aug 27 05:17:42 AM UTC 24 Aug 27 05:17:58 AM UTC 24 48361059 ps
T584 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset_invalid.2683116852 Aug 27 05:17:29 AM UTC 24 Aug 27 05:17:58 AM UTC 24 164253324 ps
T585 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_invalid.1020706523 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 72838128 ps
T586 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2604091948 Aug 27 05:17:54 AM UTC 24 Aug 27 05:17:58 AM UTC 24 771038232 ps
T587 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all.674968757 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:04 AM UTC 24 1840454704 ps
T588 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_wakeup_race.478378833 Aug 27 05:17:49 AM UTC 24 Aug 27 05:17:58 AM UTC 24 458287862 ps
T589 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_esc_clk_rst_malfunc.937312642 Aug 27 05:17:30 AM UTC 24 Aug 27 05:17:58 AM UTC 24 32011114 ps
T590 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup_reset.2588761489 Aug 27 05:17:30 AM UTC 24 Aug 27 05:17:58 AM UTC 24 86009758 ps
T591 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_global_esc.499262084 Aug 27 05:17:30 AM UTC 24 Aug 27 05:17:59 AM UTC 24 40114974 ps
T592 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_smoke.1050997925 Aug 27 05:17:20 AM UTC 24 Aug 27 05:17:59 AM UTC 24 33168284 ps
T593 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rstmgr_intersig_mubi.3652212523 Aug 27 05:17:30 AM UTC 24 Aug 27 05:17:59 AM UTC 24 52674001 ps
T144 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_disable_rom_integrity_check.3383988160 Aug 27 05:17:30 AM UTC 24 Aug 27 05:17:59 AM UTC 24 58182028 ps
T594 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_invalid.810347987 Aug 27 05:17:30 AM UTC 24 Aug 27 05:17:59 AM UTC 24 40935043 ps
T595 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_ctrl_config_regwen.185864831 Aug 27 05:17:30 AM UTC 24 Aug 27 05:17:59 AM UTC 24 267864687 ps
T596 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset_invalid.1039613763 Aug 27 05:17:30 AM UTC 24 Aug 27 05:17:59 AM UTC 24 460361291 ps
T597 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_escalation_timeout.3703297617 Aug 27 05:17:30 AM UTC 24 Aug 27 05:17:59 AM UTC 24 201254065 ps
T598 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset.1609689959 Aug 27 05:17:20 AM UTC 24 Aug 27 05:17:59 AM UTC 24 158709013 ps
T599 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_ctrl_config_regwen.3108838792 Aug 27 05:17:57 AM UTC 24 Aug 27 05:17:59 AM UTC 24 73098326 ps
T600 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_global_esc.3881283767 Aug 27 05:17:57 AM UTC 24 Aug 27 05:17:59 AM UTC 24 81110653 ps
T601 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_glitch.140988829 Aug 27 05:17:57 AM UTC 24 Aug 27 05:17:59 AM UTC 24 61618570 ps
T602 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_esc_clk_rst_malfunc.2772627062 Aug 27 05:17:57 AM UTC 24 Aug 27 05:17:59 AM UTC 24 37824972 ps
T603 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_disable_rom_integrity_check.3066826601 Aug 27 05:17:57 AM UTC 24 Aug 27 05:17:59 AM UTC 24 52455969 ps
T604 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_invalid.2823084279 Aug 27 05:17:57 AM UTC 24 Aug 27 05:17:59 AM UTC 24 88617598 ps
T605 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_smoke.595207030 Aug 27 05:17:57 AM UTC 24 Aug 27 05:17:59 AM UTC 24 76303808 ps
T606 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset_invalid.3029525856 Aug 27 05:17:57 AM UTC 24 Aug 27 05:17:59 AM UTC 24 112167082 ps
T607 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup_reset.2971267026 Aug 27 05:17:58 AM UTC 24 Aug 27 05:17:59 AM UTC 24 96580916 ps
T608 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_escalation_timeout.4038336345 Aug 27 05:17:57 AM UTC 24 Aug 27 05:17:59 AM UTC 24 722493454 ps
T609 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset.812312689 Aug 27 05:17:58 AM UTC 24 Aug 27 05:18:00 AM UTC 24 116452689 ps
T610 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_esc_clk_rst_malfunc.3848913628 Aug 27 05:17:58 AM UTC 24 Aug 27 05:18:00 AM UTC 24 29657995 ps
T611 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_aborted_low_power.1560950658 Aug 27 05:17:58 AM UTC 24 Aug 27 05:18:00 AM UTC 24 71722886 ps
T612 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_global_esc.1502427225 Aug 27 05:17:58 AM UTC 24 Aug 27 05:18:00 AM UTC 24 31413724 ps
T613 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_wakeup_race.3355006466 Aug 27 05:17:58 AM UTC 24 Aug 27 05:18:00 AM UTC 24 93218790 ps
T614 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_ctrl_config_regwen.1789827064 Aug 27 05:17:58 AM UTC 24 Aug 27 05:18:00 AM UTC 24 207027976 ps
T615 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1341782307 Aug 27 05:17:30 AM UTC 24 Aug 27 05:18:00 AM UTC 24 1450374646 ps
T616 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup.795616849 Aug 27 05:17:58 AM UTC 24 Aug 27 05:18:00 AM UTC 24 692466623 ps
T617 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rstmgr_intersig_mubi.1123837867 Aug 27 05:17:58 AM UTC 24 Aug 27 05:18:00 AM UTC 24 66729677 ps
T618 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_escalation_timeout.984347537 Aug 27 05:17:58 AM UTC 24 Aug 27 05:18:00 AM UTC 24 112379219 ps
T619 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all.1535030392 Aug 27 05:17:30 AM UTC 24 Aug 27 05:18:00 AM UTC 24 479652791 ps
T620 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all_with_rand_reset.933718646 Aug 27 05:17:30 AM UTC 24 Aug 27 05:18:00 AM UTC 24 14582381092 ps
T621 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1568596792 Aug 27 05:17:00 AM UTC 24 Aug 27 05:18:00 AM UTC 24 835271079 ps
T622 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2261472750 Aug 27 05:17:30 AM UTC 24 Aug 27 05:18:01 AM UTC 24 830722548 ps
T623 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1197933984 Aug 27 05:17:00 AM UTC 24 Aug 27 05:18:01 AM UTC 24 762784334 ps
T624 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_esc_clk_rst_malfunc.1609893739 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:05 AM UTC 24 40052154 ps
T625 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_glitch.2544658126 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:01 AM UTC 24 37011950 ps
T626 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_invalid.1637590778 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:01 AM UTC 24 43324418 ps
T627 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_disable_rom_integrity_check.3252080767 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:01 AM UTC 24 92170806 ps
T628 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_smoke.3396069929 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:01 AM UTC 24 62351550 ps
T629 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3442054332 Aug 27 05:17:58 AM UTC 24 Aug 27 05:18:02 AM UTC 24 889301496 ps
T630 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset_invalid.31873162 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:02 AM UTC 24 175366754 ps
T631 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_aborted_low_power.2803885246 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:05 AM UTC 24 46962366 ps
T632 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset.142266577 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:02 AM UTC 24 64945877 ps
T633 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup_reset.2133009934 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:02 AM UTC 24 53730774 ps
T634 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all.495913218 Aug 27 05:17:20 AM UTC 24 Aug 27 05:18:04 AM UTC 24 1783560016 ps
T635 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup.1749194896 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:05 AM UTC 24 218366070 ps
T636 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_esc_clk_rst_malfunc.2970070014 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:02 AM UTC 24 41891901 ps
T637 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all.892197021 Aug 27 05:17:57 AM UTC 24 Aug 27 05:18:02 AM UTC 24 2793130503 ps
T638 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2482457039 Aug 27 05:17:58 AM UTC 24 Aug 27 05:18:02 AM UTC 24 880442101 ps
T639 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_global_esc.800546047 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:02 AM UTC 24 28920529 ps
T640 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all.3940874993 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:02 AM UTC 24 67106567 ps
T641 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup_reset.2028023471 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:05 AM UTC 24 536554613 ps
T642 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup.3172270902 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:02 AM UTC 24 215997055 ps
T643 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_glitch.739026600 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:02 AM UTC 24 31456700 ps
T644 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.1154520114 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:02 AM UTC 24 210992149 ps
T645 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_disable_rom_integrity_check.1562506289 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:02 AM UTC 24 51262565 ps
T646 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_aborted_low_power.3488885301 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:02 AM UTC 24 32669830 ps
T647 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rstmgr_intersig_mubi.1779934596 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:02 AM UTC 24 73511291 ps
T648 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_wakeup_race.3566402355 Aug 27 05:18:01 AM UTC 24 Aug 27 05:18:02 AM UTC 24 45634882 ps
T649 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_escalation_timeout.3604370218 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:02 AM UTC 24 200755813 ps
T650 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_invalid.1716907956 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:02 AM UTC 24 89518657 ps
T651 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_wakeup_race.3077694402 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:02 AM UTC 24 297121532 ps
T652 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset_invalid.3018356772 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:02 AM UTC 24 278862645 ps
T653 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_smoke.1569626491 Aug 27 05:18:01 AM UTC 24 Aug 27 05:18:02 AM UTC 24 57870370 ps
T654 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset.2607932281 Aug 27 05:18:01 AM UTC 24 Aug 27 05:18:02 AM UTC 24 138234976 ps
T655 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3652021024 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:03 AM UTC 24 2128208812 ps
T656 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2413418290 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:03 AM UTC 24 875694883 ps
T657 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all_with_rand_reset.1726213707 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:04 AM UTC 24 1149018566 ps
T658 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_global_esc.1725557026 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:05 AM UTC 24 274071789 ps
T659 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_ctrl_config_regwen.2935366352 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:05 AM UTC 24 36446069 ps
T660 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_glitch.2257997575 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:05 AM UTC 24 42776551 ps
T661 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rstmgr_intersig_mubi.3591963122 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:05 AM UTC 24 184324065 ps
T662 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_disable_rom_integrity_check.3196519552 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:05 AM UTC 24 88396090 ps
T663 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_invalid.4119637487 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:05 AM UTC 24 72306515 ps
T664 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset_invalid.2143745389 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:05 AM UTC 24 160536838 ps
T665 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_escalation_timeout.2392425902 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:05 AM UTC 24 208880922 ps
T666 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset.2693422392 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:05 AM UTC 24 51317147 ps
T667 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_smoke.1699079016 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:05 AM UTC 24 84725712 ps
T668 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup_reset.1849048101 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 330453703 ps
T669 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_aborted_low_power.906213997 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:05 AM UTC 24 75452997 ps
T670 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_wakeup_race.2211146620 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:05 AM UTC 24 456844775 ps
T671 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup_reset.2415710272 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 154384480 ps
T672 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_esc_clk_rst_malfunc.2258226175 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 38471575 ps
T673 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup.1024094469 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:06 AM UTC 24 272035516 ps
T674 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_global_esc.2088064306 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 31626616 ps
T675 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_glitch.1644327969 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 53425829 ps
T676 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rstmgr_intersig_mubi.606211294 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 131223023 ps
T677 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.3969345994 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 88724214 ps
T678 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_invalid.3298361243 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 64416644 ps
T679 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4188139154 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:06 AM UTC 24 923423811 ps
T680 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_smoke.3904845652 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 34503366 ps
T681 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_aborted_low_power.4044469535 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 46969607 ps
T682 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_ctrl_config_regwen.1402624095 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 219354469 ps
T683 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_esc_clk_rst_malfunc.768177836 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 39123087 ps
T684 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_escalation_timeout.1882022472 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 206057745 ps
T685 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_disable_rom_integrity_check.2814051795 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 57374274 ps
T686 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_wakeup_race.1301151741 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 31894481 ps
T687 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset_invalid.372441235 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 104415190 ps
T688 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rstmgr_intersig_mubi.545461026 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 167380242 ps
T689 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset.662214585 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 119931247 ps
T690 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup_reset.2256460161 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 192739708 ps
T691 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup.2720467435 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:06 AM UTC 24 164427904 ps
T692 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.674184264 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:06 AM UTC 24 1222945966 ps
T693 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_ctrl_config_regwen.1941961725 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:07 AM UTC 24 257297903 ps
T694 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all_with_rand_reset.3998807481 Aug 27 05:17:29 AM UTC 24 Aug 27 05:18:07 AM UTC 24 9251915299 ps
T695 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2375527415 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:07 AM UTC 24 840640725 ps
T696 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3644248681 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:07 AM UTC 24 1166814546 ps
T697 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.739118455 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:08 AM UTC 24 838989041 ps
T698 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_global_esc.3244578550 Aug 27 05:18:06 AM UTC 24 Aug 27 05:18:08 AM UTC 24 46729271 ps
T699 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_glitch.453031127 Aug 27 05:18:06 AM UTC 24 Aug 27 05:18:08 AM UTC 24 46743416 ps
T700 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_invalid.1265579759 Aug 27 05:18:06 AM UTC 24 Aug 27 05:18:08 AM UTC 24 256509517 ps
T701 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_disable_rom_integrity_check.2849093655 Aug 27 05:18:06 AM UTC 24 Aug 27 05:18:08 AM UTC 24 70983477 ps
T702 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.993613783 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:08 AM UTC 24 879237264 ps
T703 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_escalation_timeout.2612116330 Aug 27 05:18:06 AM UTC 24 Aug 27 05:18:08 AM UTC 24 111655170 ps
T704 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset_invalid.86466588 Aug 27 05:18:06 AM UTC 24 Aug 27 05:18:08 AM UTC 24 394940492 ps
T705 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_smoke.881115911 Aug 27 05:18:06 AM UTC 24 Aug 27 05:18:09 AM UTC 24 32894487 ps
T706 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_aborted_low_power.3921161833 Aug 27 05:18:06 AM UTC 24 Aug 27 05:18:09 AM UTC 24 174983080 ps
T707 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.3491630630 Aug 27 05:18:07 AM UTC 24 Aug 27 05:18:09 AM UTC 24 29857553 ps
T708 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset.1290420132 Aug 27 05:18:06 AM UTC 24 Aug 27 05:18:09 AM UTC 24 99757468 ps
T709 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_ctrl_config_regwen.4171262194 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 230260964 ps
T710 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all.3465476944 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:09 AM UTC 24 2304188455 ps
T711 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup_reset.1678122120 Aug 27 05:18:06 AM UTC 24 Aug 27 05:18:09 AM UTC 24 279088247 ps
T712 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_global_esc.3305084659 Aug 27 05:18:07 AM UTC 24 Aug 27 05:18:09 AM UTC 24 46884094 ps
T713 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup.1195035708 Aug 27 05:18:06 AM UTC 24 Aug 27 05:18:09 AM UTC 24 120045233 ps
T714 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rstmgr_intersig_mubi.3997944154 Aug 27 05:18:06 AM UTC 24 Aug 27 05:18:09 AM UTC 24 67015114 ps
T715 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all.4213360531 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:09 AM UTC 24 1904930527 ps
T716 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_glitch.3899273378 Aug 27 05:18:07 AM UTC 24 Aug 27 05:18:09 AM UTC 24 81305227 ps
T717 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_escalation_timeout.4049563131 Aug 27 05:18:07 AM UTC 24 Aug 27 05:18:09 AM UTC 24 343327136 ps
T718 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_disable_rom_integrity_check.3044713262 Aug 27 05:18:07 AM UTC 24 Aug 27 05:18:09 AM UTC 24 119488513 ps
T719 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_ctrl_config_regwen.3587326013 Aug 27 05:18:07 AM UTC 24 Aug 27 05:18:09 AM UTC 24 185504869 ps
T720 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_wakeup_race.1059462752 Aug 27 05:18:06 AM UTC 24 Aug 27 05:18:09 AM UTC 24 279868814 ps
T721 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all.1462616209 Aug 27 05:18:06 AM UTC 24 Aug 27 05:18:10 AM UTC 24 466979426 ps
T722 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_invalid.390073029 Aug 27 05:18:07 AM UTC 24 Aug 27 05:18:10 AM UTC 24 53470547 ps
T723 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2678381442 Aug 27 05:18:06 AM UTC 24 Aug 27 05:18:10 AM UTC 24 1012474915 ps
T724 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_wakeup_race.1211715476 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:10 AM UTC 24 112088476 ps
T725 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_global_esc.1329190610 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 65330379 ps
T726 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_esc_clk_rst_malfunc.1988470119 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 33712475 ps
T727 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset_invalid.2599224913 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 274759420 ps
T728 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_aborted_low_power.369976311 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 33000741 ps
T729 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset.2542487592 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 75779775 ps
T730 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all.1751947259 Aug 27 05:18:07 AM UTC 24 Aug 27 05:18:11 AM UTC 24 265463429 ps
T731 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_glitch.2357591435 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 55505583 ps
T732 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_disable_rom_integrity_check.2577404781 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 64400347 ps
T733 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup.115274200 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 196579026 ps
T734 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_smoke.885307700 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 52368466 ps
T735 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1195296273 Aug 27 05:18:06 AM UTC 24 Aug 27 05:18:11 AM UTC 24 791286231 ps
T736 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_wakeup_race.906788655 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 107599151 ps
T737 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_aborted_low_power.3029178448 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 21424656 ps
T738 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup.4195386724 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 98010921 ps
T739 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset.4084394661 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:11 AM UTC 24 104435273 ps
T740 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset_invalid.4226658843 Aug 27 05:18:07 AM UTC 24 Aug 27 05:18:12 AM UTC 24 150324495 ps
T741 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup_reset.1955044892 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:12 AM UTC 24 424141212 ps
T66 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all_with_rand_reset.1327911710 Aug 27 05:17:57 AM UTC 24 Aug 27 05:18:12 AM UTC 24 6470172289 ps
T742 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2359878928 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:12 AM UTC 24 932577289 ps
T743 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3784245328 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:12 AM UTC 24 984343457 ps
T744 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_stress_all.3475997507 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:13 AM UTC 24 1393473215 ps
T745 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all_with_rand_reset.865829265 Aug 27 05:18:07 AM UTC 24 Aug 27 05:18:13 AM UTC 24 1371538953 ps
T746 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2611162783 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:13 AM UTC 24 836674471 ps
T747 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all_with_rand_reset.2459510611 Aug 27 05:18:06 AM UTC 24 Aug 27 05:18:15 AM UTC 24 1870013731 ps
T115 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all_with_rand_reset.638319565 Aug 27 05:18:00 AM UTC 24 Aug 27 05:18:15 AM UTC 24 5072473267 ps
T748 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_glitch.2383572395 Aug 27 05:18:14 AM UTC 24 Aug 27 05:18:16 AM UTC 24 34391459 ps
T749 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_global_esc.1455169112 Aug 27 05:18:14 AM UTC 24 Aug 27 05:18:16 AM UTC 24 29571101 ps
T750 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_smoke.831211477 Aug 27 05:18:07 AM UTC 24 Aug 27 05:18:16 AM UTC 24 63458497 ps
T751 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.2852314231 Aug 27 05:18:14 AM UTC 24 Aug 27 05:18:16 AM UTC 24 93095298 ps
T752 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_invalid.591676986 Aug 27 05:18:15 AM UTC 24 Aug 27 05:18:25 AM UTC 24 228500350 ps
T753 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_escalation_timeout.566632877 Aug 27 05:18:14 AM UTC 24 Aug 27 05:18:16 AM UTC 24 213018109 ps
T754 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_esc_clk_rst_malfunc.1114841917 Aug 27 05:18:11 AM UTC 24 Aug 27 05:18:16 AM UTC 24 41417481 ps
T755 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_global_esc.2586683585 Aug 27 05:18:11 AM UTC 24 Aug 27 05:18:16 AM UTC 24 55645208 ps
T756 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_ctrl_config_regwen.2783828382 Aug 27 05:18:11 AM UTC 24 Aug 27 05:18:16 AM UTC 24 132396005 ps
T757 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rstmgr_intersig_mubi.3333022120 Aug 27 05:18:11 AM UTC 24 Aug 27 05:18:16 AM UTC 24 60030287 ps
T758 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_escalation_timeout.699934631 Aug 27 05:18:11 AM UTC 24 Aug 27 05:18:17 AM UTC 24 113186404 ps
T47 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all_with_rand_reset.3730806012 Aug 27 05:18:03 AM UTC 24 Aug 27 05:18:18 AM UTC 24 6595122723 ps
T110 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_stress_all_with_rand_reset.1035339672 Aug 27 05:18:09 AM UTC 24 Aug 27 05:18:19 AM UTC 24 3005129451 ps
T759 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_aborted_low_power.1662614521 Aug 27 05:18:18 AM UTC 24 Aug 27 05:18:20 AM UTC 24 32684220 ps
T760 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_esc_clk_rst_malfunc.808226650 Aug 27 05:18:18 AM UTC 24 Aug 27 05:18:20 AM UTC 24 31447790 ps
T761 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_global_esc.1144081114 Aug 27 05:18:19 AM UTC 24 Aug 27 05:18:20 AM UTC 24 63058588 ps
T762 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all_with_rand_reset.963743132 Aug 27 05:18:04 AM UTC 24 Aug 27 05:18:20 AM UTC 24 5508312048 ps
T763 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rstmgr_intersig_mubi.72764342 Aug 27 05:18:18 AM UTC 24 Aug 27 05:18:21 AM UTC 24 110233088 ps
T764 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_wakeup_race.2629617587 Aug 27 05:18:18 AM UTC 24 Aug 27 05:18:21 AM UTC 24 233312575 ps
T765 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_ctrl_config_regwen.1721153361 Aug 27 05:18:18 AM UTC 24 Aug 27 05:18:21 AM UTC 24 323376583 ps
T766 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_smoke.787061834 Aug 27 05:18:16 AM UTC 24 Aug 27 05:18:21 AM UTC 24 31738967 ps
T767 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset.1168577335 Aug 27 05:18:16 AM UTC 24 Aug 27 05:18:21 AM UTC 24 197900562 ps
T768 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all.2239102559 Aug 27 05:18:16 AM UTC 24 Aug 27 05:18:22 AM UTC 24 187399361 ps
T769 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2192774363 Aug 27 05:18:18 AM UTC 24 Aug 27 05:18:22 AM UTC 24 833535659 ps
T770 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_escalation_timeout.1352706276 Aug 27 05:18:20 AM UTC 24 Aug 27 05:18:22 AM UTC 24 383595519 ps
T771 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1704517584 Aug 27 05:18:18 AM UTC 24 Aug 27 05:18:23 AM UTC 24 869783705 ps
T772 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup_reset.1962421727 Aug 27 05:18:18 AM UTC 24 Aug 27 05:18:23 AM UTC 24 360631471 ps
T773 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_glitch.384457643 Aug 27 05:18:21 AM UTC 24 Aug 27 05:18:23 AM UTC 24 30418705 ps
T774 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup.3338533831 Aug 27 05:18:18 AM UTC 24 Aug 27 05:18:23 AM UTC 24 258712923 ps
T775 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_invalid.3650443572 Aug 27 05:18:21 AM UTC 24 Aug 27 05:18:23 AM UTC 24 48948009 ps
T776 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_disable_rom_integrity_check.3975060209 Aug 27 05:18:21 AM UTC 24 Aug 27 05:18:23 AM UTC 24 55874618 ps
T777 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset_invalid.2027728890 Aug 27 05:18:21 AM UTC 24 Aug 27 05:18:23 AM UTC 24 149334167 ps
T778 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_esc_clk_rst_malfunc.1664341905 Aug 27 05:18:33 AM UTC 24 Aug 27 05:18:56 AM UTC 24 27871902 ps
T779 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_smoke.4211182816 Aug 27 05:18:21 AM UTC 24 Aug 27 05:18:23 AM UTC 24 28887574 ps
T780 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_smoke.2275659871 Aug 27 05:18:11 AM UTC 24 Aug 27 05:18:23 AM UTC 24 26983391 ps
T781 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_wakeup_race.2277756168 Aug 27 05:18:11 AM UTC 24 Aug 27 05:18:23 AM UTC 24 152363033 ps
T782 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_glitch.2561709420 Aug 27 05:18:11 AM UTC 24 Aug 27 05:18:23 AM UTC 24 97184416 ps
T783 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_esc_clk_rst_malfunc.1067757624 Aug 27 05:18:13 AM UTC 24 Aug 27 05:18:23 AM UTC 24 37384992 ps
T784 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_disable_rom_integrity_check.4152877769 Aug 27 05:18:11 AM UTC 24 Aug 27 05:18:23 AM UTC 24 72281184 ps
T785 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_invalid.2672446004 Aug 27 05:18:11 AM UTC 24 Aug 27 05:18:24 AM UTC 24 52106744 ps
T786 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_global_esc.1735684383 Aug 27 05:18:13 AM UTC 24 Aug 27 05:18:24 AM UTC 24 51818574 ps
T787 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset_invalid.2867673279 Aug 27 05:18:13 AM UTC 24 Aug 27 05:18:24 AM UTC 24 157953735 ps
T788 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_wakeup_reset.1599215307 Aug 27 05:18:31 AM UTC 24 Aug 27 05:18:56 AM UTC 24 105287425 ps
T789 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset_invalid.4229794009 Aug 27 05:18:11 AM UTC 24 Aug 27 05:18:24 AM UTC 24 107556339 ps
T790 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_escalation_timeout.2523420610 Aug 27 05:18:13 AM UTC 24 Aug 27 05:18:24 AM UTC 24 108909486 ps
T791 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rstmgr_intersig_mubi.2923479058 Aug 27 05:18:13 AM UTC 24 Aug 27 05:18:24 AM UTC 24 75423855 ps
T792 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_glitch.2833824902 Aug 27 05:18:13 AM UTC 24 Aug 27 05:18:24 AM UTC 24 46769656 ps
T793 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup.1316680722 Aug 27 05:18:11 AM UTC 24 Aug 27 05:18:24 AM UTC 24 94289608 ps
T794 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_ctrl_config_regwen.3153809426 Aug 27 05:18:13 AM UTC 24 Aug 27 05:18:24 AM UTC 24 98854549 ps
T795 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset.2588980737 Aug 27 05:18:11 AM UTC 24 Aug 27 05:18:24 AM UTC 24 58923598 ps
T796 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_disable_rom_integrity_check.1792486222 Aug 27 05:18:13 AM UTC 24 Aug 27 05:18:24 AM UTC 24 83841660 ps
T797 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_aborted_low_power.2874502811 Aug 27 05:18:11 AM UTC 24 Aug 27 05:18:24 AM UTC 24 22382033 ps
T798 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all.2196768039 Aug 27 05:18:11 AM UTC 24 Aug 27 05:18:24 AM UTC 24 150217871 ps
T799 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_invalid.1548365769 Aug 27 05:18:13 AM UTC 24 Aug 27 05:18:24 AM UTC 24 54068706 ps
T800 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup.1014046656 Aug 27 05:18:13 AM UTC 24 Aug 27 05:18:24 AM UTC 24 189416347 ps
T801 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup_reset.1276840409 Aug 27 05:18:11 AM UTC 24 Aug 27 05:18:24 AM UTC 24 309095004 ps
T802 /workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset_invalid.1117209796 Aug 27 05:18:15 AM UTC 24 Aug 27 05:18:25 AM UTC 24 147377096 ps
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