| T803 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.265818081 |
|
|
Aug 27 05:18:11 AM UTC 24 |
Aug 27 05:18:25 AM UTC 24 |
1223561889 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.350732582 |
|
|
Aug 27 05:18:13 AM UTC 24 |
Aug 27 05:18:25 AM UTC 24 |
836831245 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset.3918735606 |
|
|
Aug 27 05:18:23 AM UTC 24 |
Aug 27 05:18:25 AM UTC 24 |
55201700 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_aborted_low_power.1652835180 |
|
|
Aug 27 05:18:23 AM UTC 24 |
Aug 27 05:18:26 AM UTC 24 |
186703258 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2705189438 |
|
|
Aug 27 05:18:11 AM UTC 24 |
Aug 27 05:18:26 AM UTC 24 |
818349975 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_wakeup_race.2499727180 |
|
|
Aug 27 05:18:23 AM UTC 24 |
Aug 27 05:18:26 AM UTC 24 |
468718636 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup.3740687945 |
|
|
Aug 27 05:18:23 AM UTC 24 |
Aug 27 05:18:26 AM UTC 24 |
107114606 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup_reset.3241907043 |
|
|
Aug 27 05:18:23 AM UTC 24 |
Aug 27 05:18:26 AM UTC 24 |
210375353 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_esc_clk_rst_malfunc.2743107143 |
|
|
Aug 27 05:18:24 AM UTC 24 |
Aug 27 05:18:26 AM UTC 24 |
29111217 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_global_esc.3449058672 |
|
|
Aug 27 05:18:24 AM UTC 24 |
Aug 27 05:18:26 AM UTC 24 |
28589608 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rstmgr_intersig_mubi.1852279304 |
|
|
Aug 27 05:18:24 AM UTC 24 |
Aug 27 05:18:26 AM UTC 24 |
186558365 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_disable_rom_integrity_check.1978172180 |
|
|
Aug 27 05:18:24 AM UTC 24 |
Aug 27 05:18:26 AM UTC 24 |
137815930 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_smoke.2439596574 |
|
|
Aug 27 05:18:25 AM UTC 24 |
Aug 27 05:18:26 AM UTC 24 |
63975272 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_glitch.2193514291 |
|
|
Aug 27 05:18:24 AM UTC 24 |
Aug 27 05:18:26 AM UTC 24 |
57530169 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset_invalid.2614389358 |
|
|
Aug 27 05:18:24 AM UTC 24 |
Aug 27 05:18:26 AM UTC 24 |
171122662 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_invalid.3111207728 |
|
|
Aug 27 05:18:24 AM UTC 24 |
Aug 27 05:18:26 AM UTC 24 |
72192710 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_ctrl_config_regwen.214136172 |
|
|
Aug 27 05:18:24 AM UTC 24 |
Aug 27 05:18:26 AM UTC 24 |
131385147 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_escalation_timeout.4278928173 |
|
|
Aug 27 05:18:24 AM UTC 24 |
Aug 27 05:18:26 AM UTC 24 |
598306648 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_wakeup.3073711407 |
|
|
Aug 27 05:18:25 AM UTC 24 |
Aug 27 05:18:26 AM UTC 24 |
38602150 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_smoke.3000040790 |
|
|
Aug 27 05:18:13 AM UTC 24 |
Aug 27 05:18:26 AM UTC 24 |
61463563 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_aborted_low_power.199169366 |
|
|
Aug 27 05:18:14 AM UTC 24 |
Aug 27 05:18:27 AM UTC 24 |
21829756 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_reset.2792616891 |
|
|
Aug 27 05:18:25 AM UTC 24 |
Aug 27 05:18:27 AM UTC 24 |
62571201 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup_reset.922361688 |
|
|
Aug 27 05:18:14 AM UTC 24 |
Aug 27 05:18:27 AM UTC 24 |
71173277 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all.794568571 |
|
|
Aug 27 05:18:21 AM UTC 24 |
Aug 27 05:18:27 AM UTC 24 |
1006917103 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_reset.1501205291 |
|
|
Aug 27 05:18:31 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
69207086 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_lowpower_wakeup_race.575572372 |
|
|
Aug 27 05:18:25 AM UTC 24 |
Aug 27 05:18:27 AM UTC 24 |
272011373 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_esc_clk_rst_malfunc.18053362 |
|
|
Aug 27 05:18:14 AM UTC 24 |
Aug 27 05:18:27 AM UTC 24 |
27676501 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset.398964478 |
|
|
Aug 27 05:18:13 AM UTC 24 |
Aug 27 05:18:27 AM UTC 24 |
68438664 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rstmgr_intersig_mubi.1981144546 |
|
|
Aug 27 05:18:14 AM UTC 24 |
Aug 27 05:18:27 AM UTC 24 |
116289476 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all.3553982277 |
|
|
Aug 27 05:18:13 AM UTC 24 |
Aug 27 05:18:27 AM UTC 24 |
211425166 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_disable_rom_integrity_check.74933083 |
|
|
Aug 27 05:18:15 AM UTC 24 |
Aug 27 05:18:27 AM UTC 24 |
54507899 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_wakeup_race.2596604554 |
|
|
Aug 27 05:18:13 AM UTC 24 |
Aug 27 05:18:27 AM UTC 24 |
266271868 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3251319956 |
|
|
Aug 27 05:18:24 AM UTC 24 |
Aug 27 05:18:27 AM UTC 24 |
1093273829 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3972497834 |
|
|
Aug 27 05:18:24 AM UTC 24 |
Aug 27 05:18:27 AM UTC 24 |
926860992 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all_with_rand_reset.767656634 |
|
|
Aug 27 05:18:21 AM UTC 24 |
Aug 27 05:18:27 AM UTC 24 |
6861519389 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.48644861 |
|
|
Aug 27 05:18:14 AM UTC 24 |
Aug 27 05:18:28 AM UTC 24 |
1193150617 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_esc_clk_rst_malfunc.2863770253 |
|
|
Aug 27 05:18:26 AM UTC 24 |
Aug 27 05:18:28 AM UTC 24 |
36693792 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_global_esc.476312016 |
|
|
Aug 27 05:18:26 AM UTC 24 |
Aug 27 05:18:28 AM UTC 24 |
36725611 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_disable_rom_integrity_check.547243326 |
|
|
Aug 27 05:18:27 AM UTC 24 |
Aug 27 05:18:29 AM UTC 24 |
74550796 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_wakeup_reset.2345854551 |
|
|
Aug 27 05:18:26 AM UTC 24 |
Aug 27 05:18:29 AM UTC 24 |
236344645 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_aborted_low_power.3895558303 |
|
|
Aug 27 05:18:26 AM UTC 24 |
Aug 27 05:18:29 AM UTC 24 |
30359990 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_escalation_timeout.2992517443 |
|
|
Aug 27 05:18:27 AM UTC 24 |
Aug 27 05:18:29 AM UTC 24 |
289155706 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_ctrl_config_regwen.1195300908 |
|
|
Aug 27 05:18:26 AM UTC 24 |
Aug 27 05:18:29 AM UTC 24 |
267355374 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_stress_all.2314843672 |
|
|
Aug 27 05:18:25 AM UTC 24 |
Aug 27 05:18:29 AM UTC 24 |
3804065999 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.739182052 |
|
|
Aug 27 05:18:14 AM UTC 24 |
Aug 27 05:18:29 AM UTC 24 |
903963171 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_stress_all_with_rand_reset.176288651 |
|
|
Aug 27 05:18:25 AM UTC 24 |
Aug 27 05:18:29 AM UTC 24 |
1181309262 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all_with_rand_reset.638696827 |
|
|
Aug 27 05:18:13 AM UTC 24 |
Aug 27 05:18:29 AM UTC 24 |
1756750312 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3711320167 |
|
|
Aug 27 05:18:26 AM UTC 24 |
Aug 27 05:18:30 AM UTC 24 |
1032094213 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3630991370 |
|
|
Aug 27 05:18:26 AM UTC 24 |
Aug 27 05:18:30 AM UTC 24 |
1243720644 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2248459180 |
|
|
Aug 27 05:18:27 AM UTC 24 |
Aug 27 05:18:32 AM UTC 24 |
799048631 ps |
| T96 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all_with_rand_reset.3939972453 |
|
|
Aug 27 05:18:11 AM UTC 24 |
Aug 27 05:18:37 AM UTC 24 |
5028632224 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all_with_rand_reset.3941594647 |
|
|
Aug 27 05:18:15 AM UTC 24 |
Aug 27 05:18:39 AM UTC 24 |
9057355845 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_disable_rom_integrity_check.3064093759 |
|
|
Aug 27 05:18:31 AM UTC 24 |
Aug 27 05:18:45 AM UTC 24 |
101944590 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_glitch.2922811066 |
|
|
Aug 27 05:18:27 AM UTC 24 |
Aug 27 05:18:45 AM UTC 24 |
88069460 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_reset_invalid.1278947443 |
|
|
Aug 27 05:18:31 AM UTC 24 |
Aug 27 05:18:46 AM UTC 24 |
167809843 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_rstmgr_intersig_mubi.1785313519 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:18:51 AM UTC 24 |
95618092 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_aborted_low_power.992991918 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:18:51 AM UTC 24 |
229638205 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_global_esc.3550132521 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:18:51 AM UTC 24 |
29290494 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_esc_clk_rst_malfunc.226685808 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:18:51 AM UTC 24 |
30313318 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_wakeup.808706213 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:18:51 AM UTC 24 |
136853981 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_wakeup_reset.3610628596 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:18:51 AM UTC 24 |
372279507 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4127098554 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:18:52 AM UTC 24 |
1545193274 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_glitch.3358635313 |
|
|
Aug 27 05:18:47 AM UTC 24 |
Aug 27 05:18:55 AM UTC 24 |
39730839 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_disable_rom_integrity_check.2734180384 |
|
|
Aug 27 05:18:47 AM UTC 24 |
Aug 27 05:18:55 AM UTC 24 |
140611949 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_reset_invalid.3304699431 |
|
|
Aug 27 05:18:27 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
114847115 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_escalation_timeout.1994108841 |
|
|
Aug 27 05:18:47 AM UTC 24 |
Aug 27 05:18:55 AM UTC 24 |
105157820 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_wakeup.2610530137 |
|
|
Aug 27 05:18:31 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
39772507 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_lowpower_invalid.1333253360 |
|
|
Aug 27 05:18:31 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
70425924 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_lowpower_invalid.757731284 |
|
|
Aug 27 05:18:27 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
45898295 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_stress_all.2893833360 |
|
|
Aug 27 05:18:31 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
41512173 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_smoke.3947778209 |
|
|
Aug 27 05:18:27 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
62689264 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_smoke.100595258 |
|
|
Aug 27 05:18:31 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
29740360 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_rstmgr_intersig_mubi.1174896544 |
|
|
Aug 27 05:18:26 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
67381503 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_wakeup.4272945090 |
|
|
Aug 27 05:18:27 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
128571168 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_aborted_low_power.2030460509 |
|
|
Aug 27 05:18:27 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
116401659 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_lowpower_wakeup_race.1134361496 |
|
|
Aug 27 05:18:53 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
103465761 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_lowpower_wakeup_race.305392706 |
|
|
Aug 27 05:18:31 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
259614554 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_wakeup_reset.1185988036 |
|
|
Aug 27 05:18:27 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
312575018 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_reset.2397016169 |
|
|
Aug 27 05:18:27 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
105401320 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_lowpower_wakeup_race.3998919499 |
|
|
Aug 27 05:18:27 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
229898240 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_aborted_low_power.2843478310 |
|
|
Aug 27 05:18:31 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
297785475 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_rstmgr_intersig_mubi.3842440727 |
|
|
Aug 27 05:18:31 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
54434877 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_ctrl_config_regwen.3033828501 |
|
|
Aug 27 05:18:37 AM UTC 24 |
Aug 27 05:18:56 AM UTC 24 |
190314582 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_lowpower_invalid.1925797521 |
|
|
Aug 27 05:18:52 AM UTC 24 |
Aug 27 05:18:57 AM UTC 24 |
53570510 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_smoke.60809052 |
|
|
Aug 27 05:18:52 AM UTC 24 |
Aug 27 05:18:57 AM UTC 24 |
179594348 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_reset.1445986143 |
|
|
Aug 27 05:18:52 AM UTC 24 |
Aug 27 05:18:57 AM UTC 24 |
80060088 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_reset_invalid.1090105448 |
|
|
Aug 27 05:18:52 AM UTC 24 |
Aug 27 05:18:57 AM UTC 24 |
126355384 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_global_esc.2270631948 |
|
|
Aug 27 05:19:02 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
60669942 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1685335264 |
|
|
Aug 27 05:18:31 AM UTC 24 |
Aug 27 05:18:57 AM UTC 24 |
1256082084 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_global_esc.2050219166 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:18:58 AM UTC 24 |
74627090 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_esc_clk_rst_malfunc.442278930 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:18:58 AM UTC 24 |
29349976 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_lowpower_invalid.1451285099 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:18:58 AM UTC 24 |
40943455 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_stress_all_with_rand_reset.2484033372 |
|
|
Aug 27 05:18:31 AM UTC 24 |
Aug 27 05:18:58 AM UTC 24 |
2303717360 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_reset_invalid.2105622964 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:18:58 AM UTC 24 |
231593851 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_ctrl_config_regwen.2545651992 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:18:58 AM UTC 24 |
440482557 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_escalation_timeout.2534873464 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:18:58 AM UTC 24 |
200949252 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.217479895 |
|
|
Aug 27 05:18:27 AM UTC 24 |
Aug 27 05:18:58 AM UTC 24 |
785275271 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2142269031 |
|
|
Aug 27 05:18:31 AM UTC 24 |
Aug 27 05:18:58 AM UTC 24 |
903257583 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_stress_all.1733921279 |
|
|
Aug 27 05:18:27 AM UTC 24 |
Aug 27 05:18:59 AM UTC 24 |
2397428435 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_lowpower_wakeup_race.3941957222 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:00 AM UTC 24 |
124842221 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_esc_clk_rst_malfunc.2732246379 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:00 AM UTC 24 |
30898098 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_global_esc.2843607251 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:00 AM UTC 24 |
45547781 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_glitch.3858225965 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:01 AM UTC 24 |
51691560 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_ctrl_config_regwen.127029064 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:01 AM UTC 24 |
162408836 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_aborted_low_power.4135034794 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:01 AM UTC 24 |
36696158 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_rstmgr_intersig_mubi.1929802634 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:01 AM UTC 24 |
140365658 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_lowpower_invalid.1395338510 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:01 AM UTC 24 |
125183987 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_wakeup_reset.1621249892 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:01 AM UTC 24 |
293437208 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_wakeup.4171194678 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:01 AM UTC 24 |
152490259 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_reset_invalid.3097293211 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:01 AM UTC 24 |
538845927 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_disable_rom_integrity_check.1183294154 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:01 AM UTC 24 |
68199615 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_escalation_timeout.4027609422 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:01 AM UTC 24 |
109464580 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_glitch.1828112642 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:19:01 AM UTC 24 |
55741611 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_reset.125761970 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:19:01 AM UTC 24 |
102146377 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_disable_rom_integrity_check.2449222817 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:19:01 AM UTC 24 |
54529218 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_stress_all.2572765809 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:19:01 AM UTC 24 |
1551312729 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_stress_all_with_rand_reset.2760635185 |
|
|
Aug 27 05:18:52 AM UTC 24 |
Aug 27 05:19:01 AM UTC 24 |
7693311719 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2765863001 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:02 AM UTC 24 |
907883619 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4181593379 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:03 AM UTC 24 |
835028754 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_stress_all_with_rand_reset.1460771527 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:19:03 AM UTC 24 |
4943108726 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_stress_all.4213601686 |
|
|
Aug 27 05:18:52 AM UTC 24 |
Aug 27 05:19:03 AM UTC 24 |
2276283744 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_stress_all.1342153605 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:03 AM UTC 24 |
983168658 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_stress_all_with_rand_reset.3027850510 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:04 AM UTC 24 |
2288307589 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_smoke.2733512612 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
37527987 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_wakeup_reset.997349824 |
|
|
Aug 27 05:18:57 AM UTC 24 |
Aug 27 05:19:05 AM UTC 24 |
105353126 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_global_esc.197382159 |
|
|
Aug 27 05:18:57 AM UTC 24 |
Aug 27 05:19:05 AM UTC 24 |
53189851 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_aborted_low_power.4008615332 |
|
|
Aug 27 05:18:57 AM UTC 24 |
Aug 27 05:19:05 AM UTC 24 |
112328622 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_esc_clk_rst_malfunc.2738791887 |
|
|
Aug 27 05:18:57 AM UTC 24 |
Aug 27 05:19:05 AM UTC 24 |
38950780 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_ctrl_config_regwen.798181448 |
|
|
Aug 27 05:18:57 AM UTC 24 |
Aug 27 05:19:06 AM UTC 24 |
56367888 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_glitch.2964127831 |
|
|
Aug 27 05:18:57 AM UTC 24 |
Aug 27 05:19:06 AM UTC 24 |
69998031 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_rstmgr_intersig_mubi.3987608899 |
|
|
Aug 27 05:18:57 AM UTC 24 |
Aug 27 05:19:06 AM UTC 24 |
295966033 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_escalation_timeout.3884427998 |
|
|
Aug 27 05:18:57 AM UTC 24 |
Aug 27 05:19:06 AM UTC 24 |
634320667 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_disable_rom_integrity_check.1864570121 |
|
|
Aug 27 05:18:57 AM UTC 24 |
Aug 27 05:19:06 AM UTC 24 |
43281922 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_reset_invalid.2430602316 |
|
|
Aug 27 05:18:57 AM UTC 24 |
Aug 27 05:19:06 AM UTC 24 |
157029475 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_wakeup.259430736 |
|
|
Aug 27 05:18:57 AM UTC 24 |
Aug 27 05:19:06 AM UTC 24 |
265297455 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.836662984 |
|
|
Aug 27 05:18:57 AM UTC 24 |
Aug 27 05:19:06 AM UTC 24 |
1104685910 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_global_esc.2069241137 |
|
|
Aug 27 05:19:06 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
36921109 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3067641832 |
|
|
Aug 27 05:18:57 AM UTC 24 |
Aug 27 05:19:07 AM UTC 24 |
1239119586 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_stress_all_with_rand_reset.2575197698 |
|
|
Aug 27 05:18:57 AM UTC 24 |
Aug 27 05:19:17 AM UTC 24 |
10326143761 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_aborted_low_power.967115340 |
|
|
Aug 27 05:19:02 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
52575327 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_esc_clk_rst_malfunc.782818934 |
|
|
Aug 27 05:19:06 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
35898233 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_glitch.4095118660 |
|
|
Aug 27 05:19:02 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
45788213 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_lowpower_wakeup_race.3832642213 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
60253769 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_glitch.1031773078 |
|
|
Aug 27 05:19:06 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
60862126 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_smoke.1367901997 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
36368388 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_escalation_timeout.1960459659 |
|
|
Aug 27 05:19:06 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
388708999 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_disable_rom_integrity_check.525229448 |
|
|
Aug 27 05:19:06 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
74462519 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_esc_clk_rst_malfunc.531594381 |
|
|
Aug 27 05:19:02 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
30402111 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_rstmgr_intersig_mubi.1858226228 |
|
|
Aug 27 05:19:02 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
138261289 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_ctrl_config_regwen.3992331818 |
|
|
Aug 27 05:19:02 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
267384631 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_ctrl_config_regwen.3289711680 |
|
|
Aug 27 05:19:06 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
243401536 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_escalation_timeout.2458057089 |
|
|
Aug 27 05:19:02 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
417248609 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_lowpower_invalid.3354459308 |
|
|
Aug 27 05:19:02 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
130777364 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_smoke.982457162 |
|
|
Aug 27 05:19:02 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
40738657 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_glitch.1493813127 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
67080760 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_disable_rom_integrity_check.1840673724 |
|
|
Aug 27 05:19:02 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
66463965 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_global_esc.3978036645 |
|
|
Aug 27 05:18:39 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
42134478 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_ctrl_config_regwen.2271745527 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
79365131 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_reset_invalid.4109621326 |
|
|
Aug 27 05:19:02 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
110224808 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_reset.2622103591 |
|
|
Aug 27 05:19:02 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
42746382 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_rstmgr_intersig_mubi.1910314855 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
207134588 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_smoke.4258044874 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
115208668 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_wakeup_reset.1769073871 |
|
|
Aug 27 05:19:02 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
402324732 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_escalation_timeout.1121046690 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:19:21 AM UTC 24 |
401848389 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_stress_all.3952376472 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:22 AM UTC 24 |
84960669 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2598749135 |
|
|
Aug 27 05:19:02 AM UTC 24 |
Aug 27 05:19:22 AM UTC 24 |
837178666 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3209863124 |
|
|
Aug 27 05:19:02 AM UTC 24 |
Aug 27 05:19:22 AM UTC 24 |
919711586 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1031328716 |
|
|
Aug 27 05:18:29 AM UTC 24 |
Aug 27 05:19:23 AM UTC 24 |
779651236 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_stress_all.1627872744 |
|
|
Aug 27 05:19:02 AM UTC 24 |
Aug 27 05:19:24 AM UTC 24 |
872147155 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_reset.595981185 |
|
|
Aug 27 05:19:00 AM UTC 24 |
Aug 27 05:19:25 AM UTC 24 |
99902274 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_wakeup.932935363 |
|
|
Aug 27 05:19:00 AM UTC 24 |
Aug 27 05:19:25 AM UTC 24 |
145956548 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_lowpower_wakeup_race.848354328 |
|
|
Aug 27 05:19:00 AM UTC 24 |
Aug 27 05:19:25 AM UTC 24 |
168902746 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_lowpower_invalid.14794530 |
|
|
Aug 27 05:18:57 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
73749959 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_lowpower_invalid.4132415048 |
|
|
Aug 27 05:19:07 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
174387627 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_wakeup.800568990 |
|
|
Aug 27 05:19:03 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
426083847 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_reset_invalid.1657824018 |
|
|
Aug 27 05:19:07 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
125405645 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_stress_all_with_rand_reset.2958583923 |
|
|
Aug 27 05:19:02 AM UTC 24 |
Aug 27 05:19:28 AM UTC 24 |
6413868544 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_stress_all_with_rand_reset.1173638897 |
|
|
Aug 27 05:19:07 AM UTC 24 |
Aug 27 05:19:36 AM UTC 24 |
5689021264 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_lowpower_wakeup_race.276520936 |
|
|
Aug 27 05:19:03 AM UTC 24 |
Aug 27 05:19:57 AM UTC 24 |
128275598 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_wakeup_reset.2331436120 |
|
|
Aug 27 05:19:04 AM UTC 24 |
Aug 27 05:19:57 AM UTC 24 |
150833073 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_stress_all.2866761229 |
|
|
Aug 27 05:19:07 AM UTC 24 |
Aug 27 05:19:57 AM UTC 24 |
213861276 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_aborted_low_power.590078818 |
|
|
Aug 27 05:19:04 AM UTC 24 |
Aug 27 05:19:57 AM UTC 24 |
22599117 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_rstmgr_intersig_mubi.79361885 |
|
|
Aug 27 05:19:05 AM UTC 24 |
Aug 27 05:19:57 AM UTC 24 |
53685550 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1424082788 |
|
|
Aug 27 05:19:05 AM UTC 24 |
Aug 27 05:19:59 AM UTC 24 |
750674921 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_reset.1950331632 |
|
|
Aug 27 05:18:59 AM UTC 24 |
Aug 27 05:19:59 AM UTC 24 |
63048072 ps |
| T101 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_rw.1745652775 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:25 AM UTC 24 |
24447738 ps |
| T106 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_aliasing.3527548598 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:25 AM UTC 24 |
172019975 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_hw_reset.768349757 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:25 AM UTC 24 |
29996849 ps |
| T48 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_tl_errors.74600030 |
|
|
Aug 27 05:19:28 AM UTC 24 |
Aug 27 05:19:57 AM UTC 24 |
37015569 ps |
| T84 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_same_csr_outstanding.908194043 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:25 AM UTC 24 |
45992181 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_intr_test.1398136221 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
17778780 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_rw.1526066940 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
18767810 ps |
| T105 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_hw_reset.1294783779 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
24258967 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_csr_rw.3799388601 |
|
|
Aug 27 05:19:42 AM UTC 24 |
Aug 27 05:19:57 AM UTC 24 |
42242594 ps |
| T125 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_mem_rw_with_rand_reset.2675884893 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
59991479 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_same_csr_outstanding.2555390721 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
81364094 ps |
| T82 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_rw.4150750895 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
46967750 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_intr_test.1629613013 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
19315413 ps |
| T73 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_hw_reset.1427600210 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
68008316 ps |
| T154 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_intr_test.258153484 |
|
|
Aug 27 05:19:42 AM UTC 24 |
Aug 27 05:19:57 AM UTC 24 |
23889297 ps |
| T74 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_aliasing.1558403155 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
28007760 ps |
| T49 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_tl_intg_err.2210977063 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
101870896 ps |
| T52 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_mem_rw_with_rand_reset.1229873837 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
56441638 ps |
| T102 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_tl_errors.2574493984 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
61928528 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_mem_rw_with_rand_reset.4268991682 |
|
|
Aug 27 05:19:24 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
33850267 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_same_csr_outstanding.3066611531 |
|
|
Aug 27 05:19:24 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
27306803 ps |
| T103 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_tl_errors.2249103949 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:26 AM UTC 24 |
275495515 ps |
| T75 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_aliasing.1850040770 |
|
|
Aug 27 05:19:24 AM UTC 24 |
Aug 27 05:19:27 AM UTC 24 |
45112233 ps |
| T97 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_tl_intg_err.2062359468 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:27 AM UTC 24 |
183600293 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_tl_errors.482403777 |
|
|
Aug 27 05:19:24 AM UTC 24 |
Aug 27 05:19:27 AM UTC 24 |
64629616 ps |
| T98 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_tl_intg_err.3025485867 |
|
|
Aug 27 05:19:24 AM UTC 24 |
Aug 27 05:19:27 AM UTC 24 |
184265694 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_bit_bash.3087027792 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:28 AM UTC 24 |
440318558 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_bit_bash.1451661985 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:28 AM UTC 24 |
980277512 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_bit_bash.1641936510 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:28 AM UTC 24 |
1221604093 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_csr_rw.4063859057 |
|
|
Aug 27 05:19:28 AM UTC 24 |
Aug 27 05:19:30 AM UTC 24 |
30757681 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_same_csr_outstanding.2109809815 |
|
|
Aug 27 05:19:28 AM UTC 24 |
Aug 27 05:19:30 AM UTC 24 |
44872801 ps |
| T76 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_hw_reset.3693321477 |
|
|
Aug 27 05:19:27 AM UTC 24 |
Aug 27 05:19:36 AM UTC 24 |
41124452 ps |
| T77 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_csr_rw.2954303279 |
|
|
Aug 27 05:19:28 AM UTC 24 |
Aug 27 05:19:40 AM UTC 24 |
18815210 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_intr_test.3277160217 |
|
|
Aug 27 05:19:28 AM UTC 24 |
Aug 27 05:19:40 AM UTC 24 |
38364674 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_same_csr_outstanding.3708518637 |
|
|
Aug 27 05:19:28 AM UTC 24 |
Aug 27 05:19:41 AM UTC 24 |
93893915 ps |
| T156 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_intr_test.552673500 |
|
|
Aug 27 05:19:28 AM UTC 24 |
Aug 27 05:19:41 AM UTC 24 |
17985466 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_csr_mem_rw_with_rand_reset.3730614886 |
|
|
Aug 27 05:19:28 AM UTC 24 |
Aug 27 05:19:41 AM UTC 24 |
48205231 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_intr_test.370283615 |
|
|
Aug 27 05:19:29 AM UTC 24 |
Aug 27 05:19:41 AM UTC 24 |
18237325 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_tl_intg_err.39789031 |
|
|
Aug 27 05:19:28 AM UTC 24 |
Aug 27 05:19:41 AM UTC 24 |
112299052 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_csr_mem_rw_with_rand_reset.2345022147 |
|
|
Aug 27 05:19:28 AM UTC 24 |
Aug 27 05:19:41 AM UTC 24 |
387697693 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_tl_errors.3008981686 |
|
|
Aug 27 05:19:28 AM UTC 24 |
Aug 27 05:19:41 AM UTC 24 |
104321357 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_tl_intg_err.2679307221 |
|
|
Aug 27 05:19:29 AM UTC 24 |
Aug 27 05:19:41 AM UTC 24 |
108188398 ps |
| T104 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_tl_intg_err.3611648481 |
|
|
Aug 27 05:19:28 AM UTC 24 |
Aug 27 05:19:41 AM UTC 24 |
246524512 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_tl_errors.2377701837 |
|
|
Aug 27 05:19:28 AM UTC 24 |
Aug 27 05:19:41 AM UTC 24 |
105672444 ps |
| T159 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_intr_test.458909405 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:45 AM UTC 24 |
145805474 ps |
| T107 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_tl_intg_err.742327862 |
|
|
Aug 27 05:19:23 AM UTC 24 |
Aug 27 05:19:46 AM UTC 24 |
156398990 ps |
| T78 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_csr_rw.3023013465 |
|
|
Aug 27 05:19:47 AM UTC 24 |
Aug 27 05:19:56 AM UTC 24 |
17208662 ps |
| T113 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_tl_intg_err.4171887062 |
|
|
Aug 27 05:19:43 AM UTC 24 |
Aug 27 05:19:56 AM UTC 24 |
136275284 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_csr_mem_rw_with_rand_reset.2017892485 |
|
|
Aug 27 05:19:37 AM UTC 24 |
Aug 27 05:19:56 AM UTC 24 |
52336205 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_tl_errors.2825227619 |
|
|
Aug 27 05:19:43 AM UTC 24 |
Aug 27 05:19:56 AM UTC 24 |
62747704 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_csr_rw.1564196538 |
|
|
Aug 27 05:19:31 AM UTC 24 |
Aug 27 05:19:56 AM UTC 24 |
20499344 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_rw.1169840019 |
|
|
Aug 27 05:19:27 AM UTC 24 |
Aug 27 05:19:56 AM UTC 24 |
46919467 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_intr_test.4131821528 |
|
|
Aug 27 05:19:27 AM UTC 24 |
Aug 27 05:19:56 AM UTC 24 |
18039319 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_intr_test.588587682 |
|
|
Aug 27 05:19:27 AM UTC 24 |
Aug 27 05:19:56 AM UTC 24 |
151896056 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_same_csr_outstanding.1465403264 |
|
|
Aug 27 05:19:27 AM UTC 24 |
Aug 27 05:19:56 AM UTC 24 |
45514633 ps |
| T1001 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_csr_rw.2308172279 |
|
|
Aug 27 05:19:29 AM UTC 24 |
Aug 27 05:19:58 AM UTC 24 |
19062240 ps |
| T1002 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_csr_rw.2055692668 |
|
|
Aug 27 05:19:27 AM UTC 24 |
Aug 27 05:19:56 AM UTC 24 |
36861810 ps |
| T1003 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_aliasing.1087914987 |
|
|
Aug 27 05:19:27 AM UTC 24 |
Aug 27 05:19:56 AM UTC 24 |
37368998 ps |
| T1004 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_same_csr_outstanding.1406360917 |
|
|
Aug 27 05:19:31 AM UTC 24 |
Aug 27 05:19:56 AM UTC 24 |
23917402 ps |
| T1005 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_same_csr_outstanding.1122389233 |
|
|
Aug 27 05:19:28 AM UTC 24 |
Aug 27 05:19:57 AM UTC 24 |
73530267 ps |
| T1006 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_intr_test.2206444472 |
|
|
Aug 27 05:19:42 AM UTC 24 |
Aug 27 05:19:57 AM UTC 24 |
21105671 ps |
| T1007 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_intr_test.2390017085 |
|
|
Aug 27 05:19:28 AM UTC 24 |
Aug 27 05:19:57 AM UTC 24 |
19104376 ps |
| T1008 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_tl_errors.3808603990 |
|
|
Aug 27 05:19:37 AM UTC 24 |
Aug 27 05:19:57 AM UTC 24 |
69112513 ps |
| T1009 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_tl_intg_err.292686357 |
|
|
Aug 27 05:19:27 AM UTC 24 |
Aug 27 05:19:57 AM UTC 24 |
157305300 ps |
| T1010 |
/workspaces/repo/scratch/os_regression_2024_08_26/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_same_csr_outstanding.3661271410 |
|
|
Aug 27 05:19:42 AM UTC 24 |
Aug 27 05:19:57 AM UTC 24 |
246054205 ps |