| T320 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_wakeup_reset.1699525925 |
|
|
Sep 01 08:25:43 PM UTC 24 |
Sep 01 08:25:46 PM UTC 24 |
155581848 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all.839539970 |
|
|
Sep 01 08:25:43 PM UTC 24 |
Sep 01 08:25:46 PM UTC 24 |
141044091 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_wakeup.3800247170 |
|
|
Sep 01 08:25:43 PM UTC 24 |
Sep 01 08:25:46 PM UTC 24 |
195436924 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_stress_all.4134985935 |
|
|
Sep 01 08:25:40 PM UTC 24 |
Sep 01 08:25:47 PM UTC 24 |
5631265655 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_aborted_low_power.1716172340 |
|
|
Sep 01 08:25:45 PM UTC 24 |
Sep 01 08:25:47 PM UTC 24 |
63729166 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_stress_all_with_rand_reset.2426857098 |
|
|
Sep 01 08:25:40 PM UTC 24 |
Sep 01 08:25:47 PM UTC 24 |
1047489955 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_esc_clk_rst_malfunc.1046474213 |
|
|
Sep 01 08:25:45 PM UTC 24 |
Sep 01 08:25:47 PM UTC 24 |
33170414 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_global_esc.1123164602 |
|
|
Sep 01 08:25:45 PM UTC 24 |
Sep 01 08:25:47 PM UTC 24 |
47417206 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rstmgr_intersig_mubi.2790185405 |
|
|
Sep 01 08:25:45 PM UTC 24 |
Sep 01 08:25:47 PM UTC 24 |
171980086 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_escalation_timeout.2103574694 |
|
|
Sep 01 08:25:45 PM UTC 24 |
Sep 01 08:25:47 PM UTC 24 |
109757282 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_ctrl_config_regwen.606646764 |
|
|
Sep 01 08:25:45 PM UTC 24 |
Sep 01 08:25:48 PM UTC 24 |
319022938 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4183374020 |
|
|
Sep 01 08:25:41 PM UTC 24 |
Sep 01 08:25:48 PM UTC 24 |
755633354 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_glitch.1861301535 |
|
|
Sep 01 08:25:46 PM UTC 24 |
Sep 01 08:25:48 PM UTC 24 |
42267561 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2327760458 |
|
|
Sep 01 08:25:41 PM UTC 24 |
Sep 01 08:25:48 PM UTC 24 |
763565633 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_disable_rom_integrity_check.4028297050 |
|
|
Sep 01 08:25:46 PM UTC 24 |
Sep 01 08:25:48 PM UTC 24 |
68247008 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_lowpower_invalid.3141805552 |
|
|
Sep 01 08:25:46 PM UTC 24 |
Sep 01 08:25:49 PM UTC 24 |
54909647 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_reset_invalid.3053674474 |
|
|
Sep 01 08:25:46 PM UTC 24 |
Sep 01 08:25:49 PM UTC 24 |
175731130 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_smoke.4132858687 |
|
|
Sep 01 08:25:47 PM UTC 24 |
Sep 01 08:25:49 PM UTC 24 |
31570051 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup.345484224 |
|
|
Sep 01 08:25:47 PM UTC 24 |
Sep 01 08:25:49 PM UTC 24 |
58766458 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_wakeup_race.3723924050 |
|
|
Sep 01 08:25:47 PM UTC 24 |
Sep 01 08:25:49 PM UTC 24 |
198545105 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset.88373194 |
|
|
Sep 01 08:25:47 PM UTC 24 |
Sep 01 08:25:49 PM UTC 24 |
63571853 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_global_esc.4277324913 |
|
|
Sep 01 08:25:48 PM UTC 24 |
Sep 01 08:25:50 PM UTC 24 |
52920799 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup_reset.1097530128 |
|
|
Sep 01 08:25:48 PM UTC 24 |
Sep 01 08:25:50 PM UTC 24 |
59009059 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_esc_clk_rst_malfunc.2786196327 |
|
|
Sep 01 08:25:48 PM UTC 24 |
Sep 01 08:25:50 PM UTC 24 |
37473585 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.232158659 |
|
|
Sep 01 08:25:45 PM UTC 24 |
Sep 01 08:25:50 PM UTC 24 |
832281338 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_aborted_low_power.695040171 |
|
|
Sep 01 08:25:48 PM UTC 24 |
Sep 01 08:25:51 PM UTC 24 |
46431960 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_glitch.1538043770 |
|
|
Sep 01 08:25:48 PM UTC 24 |
Sep 01 08:25:51 PM UTC 24 |
60356276 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rstmgr_intersig_mubi.3445682107 |
|
|
Sep 01 08:25:48 PM UTC 24 |
Sep 01 08:25:51 PM UTC 24 |
87537813 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_escalation_timeout.1330635888 |
|
|
Sep 01 08:25:48 PM UTC 24 |
Sep 01 08:25:51 PM UTC 24 |
205034528 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all.637845438 |
|
|
Sep 01 08:25:47 PM UTC 24 |
Sep 01 08:25:51 PM UTC 24 |
1445245376 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_ctrl_config_regwen.3229736040 |
|
|
Sep 01 08:25:48 PM UTC 24 |
Sep 01 08:25:51 PM UTC 24 |
184460646 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1107710623 |
|
|
Sep 01 08:25:45 PM UTC 24 |
Sep 01 08:25:52 PM UTC 24 |
798185648 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_disable_rom_integrity_check.603359576 |
|
|
Sep 01 08:25:50 PM UTC 24 |
Sep 01 08:25:52 PM UTC 24 |
65493271 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_invalid.3912961763 |
|
|
Sep 01 08:25:50 PM UTC 24 |
Sep 01 08:25:52 PM UTC 24 |
81813164 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset_invalid.4193601016 |
|
|
Sep 01 08:25:50 PM UTC 24 |
Sep 01 08:25:52 PM UTC 24 |
150471370 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_smoke.3881511737 |
|
|
Sep 01 08:25:50 PM UTC 24 |
Sep 01 08:25:52 PM UTC 24 |
70990776 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_wakeup_race.876397981 |
|
|
Sep 01 08:25:50 PM UTC 24 |
Sep 01 08:25:52 PM UTC 24 |
81279286 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset.3653695534 |
|
|
Sep 01 08:25:50 PM UTC 24 |
Sep 01 08:25:52 PM UTC 24 |
113098050 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup_reset.3082850108 |
|
|
Sep 01 08:25:50 PM UTC 24 |
Sep 01 08:25:52 PM UTC 24 |
30671678 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.429992203 |
|
|
Sep 01 08:25:48 PM UTC 24 |
Sep 01 08:25:53 PM UTC 24 |
871218923 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_aborted_low_power.3862534097 |
|
|
Sep 01 08:25:52 PM UTC 24 |
Sep 01 08:25:53 PM UTC 24 |
38747086 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup.4003251180 |
|
|
Sep 01 08:25:50 PM UTC 24 |
Sep 01 08:25:54 PM UTC 24 |
256112016 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_esc_clk_rst_malfunc.1011028448 |
|
|
Sep 01 08:25:52 PM UTC 24 |
Sep 01 08:25:54 PM UTC 24 |
87247692 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_global_esc.478952914 |
|
|
Sep 01 08:25:52 PM UTC 24 |
Sep 01 08:25:54 PM UTC 24 |
62826712 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1163159742 |
|
|
Sep 01 08:25:48 PM UTC 24 |
Sep 01 08:25:54 PM UTC 24 |
834133589 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_ctrl_config_regwen.1209658477 |
|
|
Sep 01 08:25:52 PM UTC 24 |
Sep 01 08:25:54 PM UTC 24 |
80092767 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_glitch.207577672 |
|
|
Sep 01 08:25:52 PM UTC 24 |
Sep 01 08:25:54 PM UTC 24 |
58360481 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rstmgr_intersig_mubi.2424300335 |
|
|
Sep 01 08:25:52 PM UTC 24 |
Sep 01 08:25:54 PM UTC 24 |
172890558 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_escalation_timeout.3701572478 |
|
|
Sep 01 08:25:52 PM UTC 24 |
Sep 01 08:25:54 PM UTC 24 |
110152911 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_disable_rom_integrity_check.3670721803 |
|
|
Sep 01 08:25:53 PM UTC 24 |
Sep 01 08:25:55 PM UTC 24 |
172156925 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_invalid.160663178 |
|
|
Sep 01 08:25:53 PM UTC 24 |
Sep 01 08:25:55 PM UTC 24 |
110273381 ps |
| T50 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all_with_rand_reset.3293108598 |
|
|
Sep 01 08:25:46 PM UTC 24 |
Sep 01 08:25:55 PM UTC 24 |
1854863037 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_smoke.1657042701 |
|
|
Sep 01 08:25:53 PM UTC 24 |
Sep 01 08:25:55 PM UTC 24 |
30452440 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all.1850682737 |
|
|
Sep 01 08:25:50 PM UTC 24 |
Sep 01 08:25:56 PM UTC 24 |
1505990266 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset.1803711489 |
|
|
Sep 01 08:25:53 PM UTC 24 |
Sep 01 08:25:56 PM UTC 24 |
46200042 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_glitch.2573193049 |
|
|
Sep 01 08:25:55 PM UTC 24 |
Sep 01 08:25:57 PM UTC 24 |
43127805 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset_invalid.137957289 |
|
|
Sep 01 08:25:53 PM UTC 24 |
Sep 01 08:25:56 PM UTC 24 |
103362463 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2186079789 |
|
|
Sep 01 08:25:52 PM UTC 24 |
Sep 01 08:25:56 PM UTC 24 |
1000506551 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_wakeup_race.4049524000 |
|
|
Sep 01 08:25:53 PM UTC 24 |
Sep 01 08:25:56 PM UTC 24 |
315737363 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3651188699 |
|
|
Sep 01 08:25:52 PM UTC 24 |
Sep 01 08:25:56 PM UTC 24 |
1049452584 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_esc_clk_rst_malfunc.858772328 |
|
|
Sep 01 08:25:55 PM UTC 24 |
Sep 01 08:25:57 PM UTC 24 |
29549153 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_global_esc.2051621272 |
|
|
Sep 01 08:25:55 PM UTC 24 |
Sep 01 08:25:57 PM UTC 24 |
144089899 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_aborted_low_power.2707865647 |
|
|
Sep 01 08:25:55 PM UTC 24 |
Sep 01 08:25:57 PM UTC 24 |
24357846 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rstmgr_intersig_mubi.1621113028 |
|
|
Sep 01 08:25:55 PM UTC 24 |
Sep 01 08:25:57 PM UTC 24 |
141062651 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup_reset.1419449740 |
|
|
Sep 01 08:25:55 PM UTC 24 |
Sep 01 08:25:57 PM UTC 24 |
165108113 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_escalation_timeout.3189261706 |
|
|
Sep 01 08:25:55 PM UTC 24 |
Sep 01 08:25:58 PM UTC 24 |
378691260 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_ctrl_config_regwen.1693291926 |
|
|
Sep 01 08:25:55 PM UTC 24 |
Sep 01 08:25:58 PM UTC 24 |
248709851 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_disable_rom_integrity_check.3847134670 |
|
|
Sep 01 08:25:56 PM UTC 24 |
Sep 01 08:25:59 PM UTC 24 |
83779636 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_invalid.1929869917 |
|
|
Sep 01 08:25:57 PM UTC 24 |
Sep 01 08:25:59 PM UTC 24 |
73255129 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_smoke.400468746 |
|
|
Sep 01 08:25:57 PM UTC 24 |
Sep 01 08:25:59 PM UTC 24 |
37238861 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset_invalid.50965346 |
|
|
Sep 01 08:25:57 PM UTC 24 |
Sep 01 08:25:59 PM UTC 24 |
155024485 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset.1628503888 |
|
|
Sep 01 08:25:57 PM UTC 24 |
Sep 01 08:25:59 PM UTC 24 |
64249414 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2483054428 |
|
|
Sep 01 08:25:55 PM UTC 24 |
Sep 01 08:25:59 PM UTC 24 |
1251491067 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_wakeup_race.1588818696 |
|
|
Sep 01 08:25:57 PM UTC 24 |
Sep 01 08:25:59 PM UTC 24 |
129619604 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all.2062267157 |
|
|
Sep 01 08:25:53 PM UTC 24 |
Sep 01 08:25:59 PM UTC 24 |
6884793343 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_aborted_low_power.3315377165 |
|
|
Sep 01 08:25:57 PM UTC 24 |
Sep 01 08:25:59 PM UTC 24 |
66032033 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup.3074813827 |
|
|
Sep 01 08:25:57 PM UTC 24 |
Sep 01 08:26:00 PM UTC 24 |
246219894 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.583116590 |
|
|
Sep 01 08:25:55 PM UTC 24 |
Sep 01 08:26:00 PM UTC 24 |
761908727 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup_reset.3223031505 |
|
|
Sep 01 08:25:57 PM UTC 24 |
Sep 01 08:26:00 PM UTC 24 |
286647098 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_invalid.2869727351 |
|
|
Sep 01 08:26:06 PM UTC 24 |
Sep 01 08:26:08 PM UTC 24 |
46530933 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_esc_clk_rst_malfunc.43043077 |
|
|
Sep 01 08:25:58 PM UTC 24 |
Sep 01 08:26:00 PM UTC 24 |
38548155 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_global_esc.2225783794 |
|
|
Sep 01 08:25:59 PM UTC 24 |
Sep 01 08:26:01 PM UTC 24 |
29849455 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_glitch.2707176805 |
|
|
Sep 01 08:25:59 PM UTC 24 |
Sep 01 08:26:01 PM UTC 24 |
50406633 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_escalation_timeout.2153538708 |
|
|
Sep 01 08:25:59 PM UTC 24 |
Sep 01 08:26:01 PM UTC 24 |
399492270 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all_with_rand_reset.1804701943 |
|
|
Sep 01 08:25:43 PM UTC 24 |
Sep 01 08:26:01 PM UTC 24 |
6511889633 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rstmgr_intersig_mubi.154611981 |
|
|
Sep 01 08:25:58 PM UTC 24 |
Sep 01 08:26:01 PM UTC 24 |
54629837 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_disable_rom_integrity_check.2096913260 |
|
|
Sep 01 08:25:59 PM UTC 24 |
Sep 01 08:26:01 PM UTC 24 |
62962029 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset_invalid.918966576 |
|
|
Sep 01 08:25:59 PM UTC 24 |
Sep 01 08:26:01 PM UTC 24 |
100761813 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_ctrl_config_regwen.3751774241 |
|
|
Sep 01 08:25:58 PM UTC 24 |
Sep 01 08:26:01 PM UTC 24 |
213566662 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1298190907 |
|
|
Sep 01 08:25:58 PM UTC 24 |
Sep 01 08:26:02 PM UTC 24 |
1034962474 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_smoke.2713997002 |
|
|
Sep 01 08:26:00 PM UTC 24 |
Sep 01 08:26:02 PM UTC 24 |
32080125 ps |
| T110 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all.3296766906 |
|
|
Sep 01 08:25:57 PM UTC 24 |
Sep 01 08:26:02 PM UTC 24 |
2409703890 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_invalid.1076652008 |
|
|
Sep 01 08:26:00 PM UTC 24 |
Sep 01 08:26:02 PM UTC 24 |
46475382 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_aborted_low_power.3846074903 |
|
|
Sep 01 08:26:01 PM UTC 24 |
Sep 01 08:26:03 PM UTC 24 |
28649165 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset.3840029161 |
|
|
Sep 01 08:26:00 PM UTC 24 |
Sep 01 08:26:03 PM UTC 24 |
120500320 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup_reset.2906163881 |
|
|
Sep 01 08:26:00 PM UTC 24 |
Sep 01 08:26:03 PM UTC 24 |
119057241 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all_with_rand_reset.2685177993 |
|
|
Sep 01 08:25:53 PM UTC 24 |
Sep 01 08:26:03 PM UTC 24 |
6273589395 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_wakeup_race.2347877727 |
|
|
Sep 01 08:26:00 PM UTC 24 |
Sep 01 08:26:03 PM UTC 24 |
196935674 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset.2150054853 |
|
|
Sep 01 08:26:06 PM UTC 24 |
Sep 01 08:26:08 PM UTC 24 |
50135145 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup.1900982110 |
|
|
Sep 01 08:26:00 PM UTC 24 |
Sep 01 08:26:04 PM UTC 24 |
227420488 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.498088363 |
|
|
Sep 01 08:26:01 PM UTC 24 |
Sep 01 08:26:04 PM UTC 24 |
1019803683 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all_with_rand_reset.2542313038 |
|
|
Sep 01 08:25:50 PM UTC 24 |
Sep 01 08:26:04 PM UTC 24 |
9493599395 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_esc_clk_rst_malfunc.1051783501 |
|
|
Sep 01 08:26:02 PM UTC 24 |
Sep 01 08:26:04 PM UTC 24 |
38354079 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_global_esc.626325460 |
|
|
Sep 01 08:26:02 PM UTC 24 |
Sep 01 08:26:04 PM UTC 24 |
38586127 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2576986623 |
|
|
Sep 01 08:25:58 PM UTC 24 |
Sep 01 08:26:04 PM UTC 24 |
826075538 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset_invalid.2351314741 |
|
|
Sep 01 08:26:06 PM UTC 24 |
Sep 01 08:26:08 PM UTC 24 |
101588436 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_glitch.159727944 |
|
|
Sep 01 08:26:02 PM UTC 24 |
Sep 01 08:26:04 PM UTC 24 |
48200808 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_disable_rom_integrity_check.4229457894 |
|
|
Sep 01 08:26:02 PM UTC 24 |
Sep 01 08:26:04 PM UTC 24 |
67653384 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rstmgr_intersig_mubi.2856647215 |
|
|
Sep 01 08:26:02 PM UTC 24 |
Sep 01 08:26:04 PM UTC 24 |
68914833 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_ctrl_config_regwen.1878206611 |
|
|
Sep 01 08:26:02 PM UTC 24 |
Sep 01 08:26:04 PM UTC 24 |
324431110 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_invalid.633602616 |
|
|
Sep 01 08:26:02 PM UTC 24 |
Sep 01 08:26:04 PM UTC 24 |
51965094 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_escalation_timeout.2613988359 |
|
|
Sep 01 08:26:02 PM UTC 24 |
Sep 01 08:26:04 PM UTC 24 |
112513827 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset_invalid.1553421710 |
|
|
Sep 01 08:26:02 PM UTC 24 |
Sep 01 08:26:05 PM UTC 24 |
114639830 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.603046518 |
|
|
Sep 01 08:26:02 PM UTC 24 |
Sep 01 08:26:05 PM UTC 24 |
1039662949 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all.2653444953 |
|
|
Sep 01 08:26:00 PM UTC 24 |
Sep 01 08:26:06 PM UTC 24 |
2626189715 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_smoke.1377920310 |
|
|
Sep 01 08:26:04 PM UTC 24 |
Sep 01 08:26:06 PM UTC 24 |
30510939 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset.1923565380 |
|
|
Sep 01 08:26:04 PM UTC 24 |
Sep 01 08:26:06 PM UTC 24 |
106343278 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_wakeup_race.3891732147 |
|
|
Sep 01 08:26:04 PM UTC 24 |
Sep 01 08:26:06 PM UTC 24 |
288083983 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup.501801745 |
|
|
Sep 01 08:26:04 PM UTC 24 |
Sep 01 08:26:06 PM UTC 24 |
233351966 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup_reset.2099385988 |
|
|
Sep 01 08:26:04 PM UTC 24 |
Sep 01 08:26:06 PM UTC 24 |
406759693 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_aborted_low_power.4247095335 |
|
|
Sep 01 08:26:04 PM UTC 24 |
Sep 01 08:26:06 PM UTC 24 |
44294205 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rstmgr_intersig_mubi.3091275640 |
|
|
Sep 01 08:26:04 PM UTC 24 |
Sep 01 08:26:07 PM UTC 24 |
72515752 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_global_esc.2607955044 |
|
|
Sep 01 08:26:06 PM UTC 24 |
Sep 01 08:26:07 PM UTC 24 |
43103178 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2554273187 |
|
|
Sep 01 08:26:04 PM UTC 24 |
Sep 01 08:26:07 PM UTC 24 |
1035412801 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.976996709 |
|
|
Sep 01 08:26:04 PM UTC 24 |
Sep 01 08:26:08 PM UTC 24 |
1323403266 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_esc_clk_rst_malfunc.3548746863 |
|
|
Sep 01 08:26:06 PM UTC 24 |
Sep 01 08:26:08 PM UTC 24 |
40194716 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_disable_rom_integrity_check.1407689724 |
|
|
Sep 01 08:26:06 PM UTC 24 |
Sep 01 08:26:08 PM UTC 24 |
87380571 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_glitch.3705109037 |
|
|
Sep 01 08:26:06 PM UTC 24 |
Sep 01 08:26:08 PM UTC 24 |
35460324 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_escalation_timeout.852125563 |
|
|
Sep 01 08:26:06 PM UTC 24 |
Sep 01 08:26:08 PM UTC 24 |
357164896 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_smoke.270193178 |
|
|
Sep 01 08:26:06 PM UTC 24 |
Sep 01 08:26:08 PM UTC 24 |
116836928 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_ctrl_config_regwen.2345662673 |
|
|
Sep 01 08:26:06 PM UTC 24 |
Sep 01 08:26:08 PM UTC 24 |
89161770 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_wakeup_race.881725031 |
|
|
Sep 01 08:26:06 PM UTC 24 |
Sep 01 08:26:08 PM UTC 24 |
225763219 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all.1395173327 |
|
|
Sep 01 08:26:02 PM UTC 24 |
Sep 01 08:26:09 PM UTC 24 |
1178394954 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_global_esc.2392922212 |
|
|
Sep 01 08:26:08 PM UTC 24 |
Sep 01 08:26:09 PM UTC 24 |
35983058 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_esc_clk_rst_malfunc.262932058 |
|
|
Sep 01 08:26:08 PM UTC 24 |
Sep 01 08:26:10 PM UTC 24 |
29516670 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup_reset.17339835 |
|
|
Sep 01 08:26:07 PM UTC 24 |
Sep 01 08:26:10 PM UTC 24 |
133822381 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_glitch.2392268351 |
|
|
Sep 01 08:26:08 PM UTC 24 |
Sep 01 08:26:10 PM UTC 24 |
29995877 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_ctrl_config_regwen.3035232514 |
|
|
Sep 01 08:26:08 PM UTC 24 |
Sep 01 08:26:10 PM UTC 24 |
111245804 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_aborted_low_power.2695170107 |
|
|
Sep 01 08:26:07 PM UTC 24 |
Sep 01 08:26:10 PM UTC 24 |
44887981 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rstmgr_intersig_mubi.694542007 |
|
|
Sep 01 08:26:08 PM UTC 24 |
Sep 01 08:26:10 PM UTC 24 |
180134088 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_disable_rom_integrity_check.1642675818 |
|
|
Sep 01 08:26:08 PM UTC 24 |
Sep 01 08:26:10 PM UTC 24 |
81242190 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup.4064217163 |
|
|
Sep 01 08:26:07 PM UTC 24 |
Sep 01 08:26:10 PM UTC 24 |
303459247 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_escalation_timeout.2260094876 |
|
|
Sep 01 08:26:08 PM UTC 24 |
Sep 01 08:26:10 PM UTC 24 |
622010546 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all.1624812474 |
|
|
Sep 01 08:26:06 PM UTC 24 |
Sep 01 08:26:11 PM UTC 24 |
1587754641 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_invalid.2277543941 |
|
|
Sep 01 08:26:09 PM UTC 24 |
Sep 01 08:26:11 PM UTC 24 |
52084706 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1611770955 |
|
|
Sep 01 08:26:08 PM UTC 24 |
Sep 01 08:26:11 PM UTC 24 |
1005316239 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_smoke.1311648969 |
|
|
Sep 01 08:26:09 PM UTC 24 |
Sep 01 08:26:11 PM UTC 24 |
30624674 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset_invalid.1889577310 |
|
|
Sep 01 08:26:09 PM UTC 24 |
Sep 01 08:26:11 PM UTC 24 |
188768342 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_aborted_low_power.1105446471 |
|
|
Sep 01 08:26:10 PM UTC 24 |
Sep 01 08:26:12 PM UTC 24 |
31744204 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_esc_clk_rst_malfunc.3256777391 |
|
|
Sep 01 08:26:10 PM UTC 24 |
Sep 01 08:26:12 PM UTC 24 |
30791694 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset.2521938775 |
|
|
Sep 01 08:26:09 PM UTC 24 |
Sep 01 08:26:12 PM UTC 24 |
136229233 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2271030525 |
|
|
Sep 01 08:26:08 PM UTC 24 |
Sep 01 08:26:12 PM UTC 24 |
748769476 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup.2789133906 |
|
|
Sep 01 08:26:10 PM UTC 24 |
Sep 01 08:26:12 PM UTC 24 |
81988361 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_wakeup_race.485106346 |
|
|
Sep 01 08:26:09 PM UTC 24 |
Sep 01 08:26:12 PM UTC 24 |
290521211 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup_reset.2083762019 |
|
|
Sep 01 08:26:10 PM UTC 24 |
Sep 01 08:26:12 PM UTC 24 |
196064728 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rstmgr_intersig_mubi.678084300 |
|
|
Sep 01 08:26:10 PM UTC 24 |
Sep 01 08:26:12 PM UTC 24 |
50836933 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all_with_rand_reset.3458450772 |
|
|
Sep 01 08:26:00 PM UTC 24 |
Sep 01 08:26:13 PM UTC 24 |
6887819516 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_global_esc.841254317 |
|
|
Sep 01 08:26:11 PM UTC 24 |
Sep 01 08:26:13 PM UTC 24 |
60915203 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_glitch.3018574999 |
|
|
Sep 01 08:26:11 PM UTC 24 |
Sep 01 08:26:13 PM UTC 24 |
102375137 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_disable_rom_integrity_check.2128175583 |
|
|
Sep 01 08:26:11 PM UTC 24 |
Sep 01 08:26:13 PM UTC 24 |
63377743 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_smoke.1967707668 |
|
|
Sep 01 08:26:11 PM UTC 24 |
Sep 01 08:26:13 PM UTC 24 |
31462337 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_invalid.2280118833 |
|
|
Sep 01 08:26:11 PM UTC 24 |
Sep 01 08:26:14 PM UTC 24 |
43795678 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_ctrl_config_regwen.3949018193 |
|
|
Sep 01 08:26:11 PM UTC 24 |
Sep 01 08:26:14 PM UTC 24 |
160231696 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_escalation_timeout.2248333472 |
|
|
Sep 01 08:26:11 PM UTC 24 |
Sep 01 08:26:14 PM UTC 24 |
110001255 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset.1728314786 |
|
|
Sep 01 08:26:12 PM UTC 24 |
Sep 01 08:26:14 PM UTC 24 |
78455660 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset_invalid.1870536599 |
|
|
Sep 01 08:26:11 PM UTC 24 |
Sep 01 08:26:14 PM UTC 24 |
106457640 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3798310315 |
|
|
Sep 01 08:26:10 PM UTC 24 |
Sep 01 08:26:14 PM UTC 24 |
738600517 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all.3357182410 |
|
|
Sep 01 08:26:09 PM UTC 24 |
Sep 01 08:26:15 PM UTC 24 |
1275563558 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_esc_clk_rst_malfunc.3255683347 |
|
|
Sep 01 08:26:13 PM UTC 24 |
Sep 01 08:26:15 PM UTC 24 |
31487947 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1948966855 |
|
|
Sep 01 08:26:10 PM UTC 24 |
Sep 01 08:26:15 PM UTC 24 |
857776891 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_global_esc.3364577883 |
|
|
Sep 01 08:26:13 PM UTC 24 |
Sep 01 08:26:15 PM UTC 24 |
79906215 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_aborted_low_power.1439391085 |
|
|
Sep 01 08:26:13 PM UTC 24 |
Sep 01 08:26:15 PM UTC 24 |
66101777 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup.2304275347 |
|
|
Sep 01 08:26:13 PM UTC 24 |
Sep 01 08:26:15 PM UTC 24 |
151870664 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_glitch.4083056511 |
|
|
Sep 01 08:26:13 PM UTC 24 |
Sep 01 08:26:15 PM UTC 24 |
59209807 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_wakeup_race.3378342733 |
|
|
Sep 01 08:26:13 PM UTC 24 |
Sep 01 08:26:16 PM UTC 24 |
178105458 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rstmgr_intersig_mubi.2650143000 |
|
|
Sep 01 08:26:13 PM UTC 24 |
Sep 01 08:26:16 PM UTC 24 |
54882196 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup_reset.875157644 |
|
|
Sep 01 08:26:13 PM UTC 24 |
Sep 01 08:26:16 PM UTC 24 |
136393431 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_disable_rom_integrity_check.2936197715 |
|
|
Sep 01 08:26:13 PM UTC 24 |
Sep 01 08:26:16 PM UTC 24 |
57445655 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_escalation_timeout.3459356289 |
|
|
Sep 01 08:26:13 PM UTC 24 |
Sep 01 08:26:16 PM UTC 24 |
113455383 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1841819696 |
|
|
Sep 01 08:26:13 PM UTC 24 |
Sep 01 08:26:16 PM UTC 24 |
1243012978 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_ctrl_config_regwen.322786691 |
|
|
Sep 01 08:26:13 PM UTC 24 |
Sep 01 08:26:17 PM UTC 24 |
299528518 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.125674769 |
|
|
Sep 01 08:26:13 PM UTC 24 |
Sep 01 08:26:17 PM UTC 24 |
934210631 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all_with_rand_reset.2976904448 |
|
|
Sep 01 08:26:06 PM UTC 24 |
Sep 01 08:26:17 PM UTC 24 |
5854808095 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_invalid.449058755 |
|
|
Sep 01 08:26:15 PM UTC 24 |
Sep 01 08:26:17 PM UTC 24 |
44665102 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_aborted_low_power.946738591 |
|
|
Sep 01 08:26:15 PM UTC 24 |
Sep 01 08:26:17 PM UTC 24 |
52528019 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_smoke.1087605419 |
|
|
Sep 01 08:26:15 PM UTC 24 |
Sep 01 08:26:17 PM UTC 24 |
89406801 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset_invalid.2199292615 |
|
|
Sep 01 08:26:15 PM UTC 24 |
Sep 01 08:26:17 PM UTC 24 |
147856618 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_wakeup_reset.3208634077 |
|
|
Sep 01 08:26:15 PM UTC 24 |
Sep 01 08:26:17 PM UTC 24 |
95910294 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_wakeup.2195961347 |
|
|
Sep 01 08:26:15 PM UTC 24 |
Sep 01 08:26:17 PM UTC 24 |
158159056 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_wakeup_race.1596852851 |
|
|
Sep 01 08:26:15 PM UTC 24 |
Sep 01 08:26:17 PM UTC 24 |
131529437 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset.2503522544 |
|
|
Sep 01 08:26:15 PM UTC 24 |
Sep 01 08:26:17 PM UTC 24 |
53678853 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_esc_clk_rst_malfunc.1131818516 |
|
|
Sep 01 08:26:17 PM UTC 24 |
Sep 01 08:26:19 PM UTC 24 |
46379968 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_glitch.1937605176 |
|
|
Sep 01 08:26:17 PM UTC 24 |
Sep 01 08:26:19 PM UTC 24 |
66090861 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_smoke.2816296350 |
|
|
Sep 01 08:26:17 PM UTC 24 |
Sep 01 08:26:19 PM UTC 24 |
75745238 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_global_esc.894488763 |
|
|
Sep 01 08:26:17 PM UTC 24 |
Sep 01 08:26:19 PM UTC 24 |
49398679 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset_invalid.895874389 |
|
|
Sep 01 08:26:17 PM UTC 24 |
Sep 01 08:26:19 PM UTC 24 |
116410655 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_disable_rom_integrity_check.3595362597 |
|
|
Sep 01 08:26:17 PM UTC 24 |
Sep 01 08:26:19 PM UTC 24 |
60249087 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rstmgr_intersig_mubi.1079065258 |
|
|
Sep 01 08:26:17 PM UTC 24 |
Sep 01 08:26:19 PM UTC 24 |
69448182 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_escalation_timeout.3792504620 |
|
|
Sep 01 08:26:17 PM UTC 24 |
Sep 01 08:26:19 PM UTC 24 |
339918180 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_invalid.2165417742 |
|
|
Sep 01 08:26:17 PM UTC 24 |
Sep 01 08:26:19 PM UTC 24 |
38900057 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all_with_rand_reset.2541794665 |
|
|
Sep 01 08:25:57 PM UTC 24 |
Sep 01 08:26:19 PM UTC 24 |
17453242547 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_ctrl_config_regwen.1403071086 |
|
|
Sep 01 08:26:17 PM UTC 24 |
Sep 01 08:26:19 PM UTC 24 |
255330496 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1532746452 |
|
|
Sep 01 08:26:15 PM UTC 24 |
Sep 01 08:26:19 PM UTC 24 |
955250173 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all_with_rand_reset.1558567671 |
|
|
Sep 01 08:26:15 PM UTC 24 |
Sep 01 08:26:19 PM UTC 24 |
809962597 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all.2623437078 |
|
|
Sep 01 08:26:17 PM UTC 24 |
Sep 01 08:26:20 PM UTC 24 |
223773050 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3811745808 |
|
|
Sep 01 08:26:17 PM UTC 24 |
Sep 01 08:26:20 PM UTC 24 |
1044713724 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup.611859647 |
|
|
Sep 01 08:26:18 PM UTC 24 |
Sep 01 08:26:20 PM UTC 24 |
56804402 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset.3043538576 |
|
|
Sep 01 08:26:18 PM UTC 24 |
Sep 01 08:26:21 PM UTC 24 |
105874637 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_aborted_low_power.3740874633 |
|
|
Sep 01 08:26:19 PM UTC 24 |
Sep 01 08:26:21 PM UTC 24 |
32988417 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rstmgr_intersig_mubi.2301529996 |
|
|
Sep 01 08:26:19 PM UTC 24 |
Sep 01 08:26:21 PM UTC 24 |
65629993 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_wakeup_race.1955327057 |
|
|
Sep 01 08:26:18 PM UTC 24 |
Sep 01 08:26:21 PM UTC 24 |
291044048 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_esc_clk_rst_malfunc.3097801789 |
|
|
Sep 01 08:26:19 PM UTC 24 |
Sep 01 08:26:21 PM UTC 24 |
30125394 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup_reset.2602269740 |
|
|
Sep 01 08:26:18 PM UTC 24 |
Sep 01 08:26:21 PM UTC 24 |
188034008 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_escalation_timeout.3680906030 |
|
|
Sep 01 08:26:19 PM UTC 24 |
Sep 01 08:26:21 PM UTC 24 |
637399944 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_ctrl_config_regwen.1261644505 |
|
|
Sep 01 08:26:19 PM UTC 24 |
Sep 01 08:26:21 PM UTC 24 |
296092788 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all.3714826155 |
|
|
Sep 01 08:26:15 PM UTC 24 |
Sep 01 08:26:22 PM UTC 24 |
1308257708 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_global_esc.3768169037 |
|
|
Sep 01 08:26:19 PM UTC 24 |
Sep 01 08:26:22 PM UTC 24 |
86648989 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4081937904 |
|
|
Sep 01 08:26:19 PM UTC 24 |
Sep 01 08:26:22 PM UTC 24 |
1201569529 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all.4109123088 |
|
|
Sep 01 08:26:11 PM UTC 24 |
Sep 01 08:26:22 PM UTC 24 |
2203659667 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2750196889 |
|
|
Sep 01 08:26:19 PM UTC 24 |
Sep 01 08:26:23 PM UTC 24 |
917025261 ps |
| T51 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all_with_rand_reset.933780182 |
|
|
Sep 01 08:26:02 PM UTC 24 |
Sep 01 08:26:23 PM UTC 24 |
4833497954 ps |
| T77 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all_with_rand_reset.634187332 |
|
|
Sep 01 08:26:09 PM UTC 24 |
Sep 01 08:26:26 PM UTC 24 |
6705705871 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_escalation_timeout.2526725745 |
|
|
Sep 01 08:26:22 PM UTC 24 |
Sep 01 08:26:27 PM UTC 24 |
114512738 ps |
| T78 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all_with_rand_reset.3581420563 |
|
|
Sep 01 08:26:11 PM UTC 24 |
Sep 01 08:26:28 PM UTC 24 |
4334985317 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_esc_clk_rst_malfunc.4272335145 |
|
|
Sep 01 08:26:27 PM UTC 24 |
Sep 01 08:26:32 PM UTC 24 |
29205075 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_invalid.1409486652 |
|
|
Sep 01 08:26:20 PM UTC 24 |
Sep 01 08:26:32 PM UTC 24 |
86463324 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset_invalid.2894405135 |
|
|
Sep 01 08:26:20 PM UTC 24 |
Sep 01 08:26:32 PM UTC 24 |
99973769 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all_with_rand_reset.2698714825 |
|
|
Sep 01 08:26:17 PM UTC 24 |
Sep 01 08:26:34 PM UTC 24 |
4844569596 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rstmgr_intersig_mubi.4026411952 |
|
|
Sep 01 08:26:25 PM UTC 24 |
Sep 01 08:26:37 PM UTC 24 |
533851609 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_smoke.3531020307 |
|
|
Sep 01 08:26:45 PM UTC 24 |
Sep 01 08:26:58 PM UTC 24 |
48834203 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.286228681 |
|
|
Sep 01 08:26:25 PM UTC 24 |
Sep 01 08:26:38 PM UTC 24 |
1080013651 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_aborted_low_power.3357404565 |
|
|
Sep 01 08:26:39 PM UTC 24 |
Sep 01 08:26:42 PM UTC 24 |
123243116 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_disable_rom_integrity_check.2726285144 |
|
|
Sep 01 08:26:20 PM UTC 24 |
Sep 01 08:26:42 PM UTC 24 |
61978806 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_disable_rom_integrity_check.3915456030 |
|
|
Sep 01 08:26:30 PM UTC 24 |
Sep 01 08:26:42 PM UTC 24 |
48864135 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_esc_clk_rst_malfunc.681353305 |
|
|
Sep 01 08:26:40 PM UTC 24 |
Sep 01 08:26:42 PM UTC 24 |
69029901 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rstmgr_intersig_mubi.534438754 |
|
|
Sep 01 08:26:40 PM UTC 24 |
Sep 01 08:26:42 PM UTC 24 |
69868543 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_wakeup_race.2266562761 |
|
|
Sep 01 08:26:37 PM UTC 24 |
Sep 01 08:26:43 PM UTC 24 |
251613639 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1042867510 |
|
|
Sep 01 08:26:39 PM UTC 24 |
Sep 01 08:26:44 PM UTC 24 |
705941469 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3766914947 |
|
|
Sep 01 08:26:39 PM UTC 24 |
Sep 01 08:26:44 PM UTC 24 |
811911785 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_global_esc.125457626 |
|
|
Sep 01 08:26:22 PM UTC 24 |
Sep 01 08:26:47 PM UTC 24 |
286743987 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_global_esc.4205810080 |
|
|
Sep 01 08:26:28 PM UTC 24 |
Sep 01 08:26:47 PM UTC 24 |
41651384 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_invalid.1976491363 |
|
|
Sep 01 08:26:22 PM UTC 24 |
Sep 01 08:26:47 PM UTC 24 |
44700781 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_glitch.938787539 |
|
|
Sep 01 08:26:22 PM UTC 24 |
Sep 01 08:26:47 PM UTC 24 |
30246354 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup.2257465153 |
|
|
Sep 01 08:26:38 PM UTC 24 |
Sep 01 08:26:47 PM UTC 24 |
166036479 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup_reset.23812271 |
|
|
Sep 01 08:26:38 PM UTC 24 |
Sep 01 08:26:47 PM UTC 24 |
154892535 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_ctrl_config_regwen.37211233 |
|
|
Sep 01 08:26:22 PM UTC 24 |
Sep 01 08:26:47 PM UTC 24 |
336850067 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_ctrl_config_regwen.2297243948 |
|
|
Sep 01 08:26:28 PM UTC 24 |
Sep 01 08:26:48 PM UTC 24 |
385055223 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_global_esc.96036307 |
|
|
Sep 01 08:26:50 PM UTC 24 |
Sep 01 08:26:52 PM UTC 24 |
71747920 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_ctrl_config_regwen.740091318 |
|
|
Sep 01 08:26:50 PM UTC 24 |
Sep 01 08:26:52 PM UTC 24 |
78424604 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset.1195609202 |
|
|
Sep 01 08:26:23 PM UTC 24 |
Sep 01 08:26:58 PM UTC 24 |
163715777 ps |