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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 98.23 96.58 99.62 96.00 96.37 100.00 98.85


Total test records in report: 1080
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T555 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_smoke.1454221763 Sep 01 08:26:21 PM UTC 24 Sep 01 08:26:52 PM UTC 24 53210493 ps
T556 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_glitch.3990426203 Sep 01 08:26:44 PM UTC 24 Sep 01 08:26:52 PM UTC 24 41504072 ps
T557 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset.2582618893 Sep 01 08:26:45 PM UTC 24 Sep 01 08:26:58 PM UTC 24 57561285 ps
T558 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset.1077046348 Sep 01 08:26:21 PM UTC 24 Sep 01 08:26:53 PM UTC 24 39820895 ps
T559 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_disable_rom_integrity_check.2050497465 Sep 01 08:26:44 PM UTC 24 Sep 01 08:26:53 PM UTC 24 85190450 ps
T560 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_escalation_timeout.1990403443 Sep 01 08:26:44 PM UTC 24 Sep 01 08:26:53 PM UTC 24 111842551 ps
T561 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_wakeup_race.1277830397 Sep 01 08:26:24 PM UTC 24 Sep 01 08:26:53 PM UTC 24 176421371 ps
T562 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_wakeup_race.2857046612 Sep 01 08:26:21 PM UTC 24 Sep 01 08:26:53 PM UTC 24 73780182 ps
T563 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_invalid.2083983693 Sep 01 08:26:44 PM UTC 24 Sep 01 08:26:53 PM UTC 24 57353430 ps
T564 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset_invalid.2867768085 Sep 01 08:26:44 PM UTC 24 Sep 01 08:26:53 PM UTC 24 117819106 ps
T565 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup_reset.684121965 Sep 01 08:26:21 PM UTC 24 Sep 01 08:26:53 PM UTC 24 130339202 ps
T566 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup.1721237123 Sep 01 08:26:21 PM UTC 24 Sep 01 08:26:53 PM UTC 24 234643111 ps
T567 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup.1979582710 Sep 01 08:26:24 PM UTC 24 Sep 01 08:26:53 PM UTC 24 973081183 ps
T568 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all.2312929911 Sep 01 08:26:20 PM UTC 24 Sep 01 08:26:54 PM UTC 24 1426793784 ps
T569 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.987299670 Sep 01 08:26:21 PM UTC 24 Sep 01 08:26:54 PM UTC 24 1271625471 ps
T570 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_esc_clk_rst_malfunc.3759779978 Sep 01 08:26:55 PM UTC 24 Sep 01 08:26:57 PM UTC 24 87463106 ps
T571 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_aborted_low_power.2731408899 Sep 01 08:26:54 PM UTC 24 Sep 01 08:26:57 PM UTC 24 60600667 ps
T572 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rstmgr_intersig_mubi.3680154011 Sep 01 08:26:55 PM UTC 24 Sep 01 08:26:57 PM UTC 24 89132130 ps
T573 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_glitch.4041720136 Sep 01 08:26:28 PM UTC 24 Sep 01 08:26:57 PM UTC 24 59701972 ps
T574 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_disable_rom_integrity_check.107997036 Sep 01 08:26:22 PM UTC 24 Sep 01 08:26:57 PM UTC 24 45936071 ps
T575 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_smoke.864546135 Sep 01 08:26:35 PM UTC 24 Sep 01 08:26:58 PM UTC 24 31965955 ps
T146 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all_with_rand_reset.1671377300 Sep 01 08:26:20 PM UTC 24 Sep 01 08:26:57 PM UTC 24 5737160841 ps
T576 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset_invalid.2709717402 Sep 01 08:26:22 PM UTC 24 Sep 01 08:26:57 PM UTC 24 113663542 ps
T577 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_escalation_timeout.757536459 Sep 01 08:26:28 PM UTC 24 Sep 01 08:26:57 PM UTC 24 378440520 ps
T578 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_global_esc.1298697783 Sep 01 08:26:43 PM UTC 24 Sep 01 08:26:57 PM UTC 24 32859803 ps
T579 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_smoke.3957582340 Sep 01 08:26:23 PM UTC 24 Sep 01 08:26:58 PM UTC 24 31096907 ps
T580 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_glitch.1241723358 Sep 01 08:26:52 PM UTC 24 Sep 01 08:26:58 PM UTC 24 43761288 ps
T581 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_invalid.1838201909 Sep 01 08:26:33 PM UTC 24 Sep 01 08:26:58 PM UTC 24 44395091 ps
T582 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_escalation_timeout.2142029016 Sep 01 08:26:52 PM UTC 24 Sep 01 08:26:58 PM UTC 24 122175596 ps
T583 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset.1394088810 Sep 01 08:26:35 PM UTC 24 Sep 01 08:26:58 PM UTC 24 34592699 ps
T584 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset_invalid.4219184549 Sep 01 08:26:33 PM UTC 24 Sep 01 08:26:58 PM UTC 24 109359722 ps
T585 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_ctrl_config_regwen.2417465272 Sep 01 08:26:56 PM UTC 24 Sep 01 08:26:59 PM UTC 24 132738854 ps
T586 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset_invalid.1317281029 Sep 01 08:26:54 PM UTC 24 Sep 01 08:26:59 PM UTC 24 107863636 ps
T587 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all.874345380 Sep 01 08:26:45 PM UTC 24 Sep 01 08:27:00 PM UTC 24 5536037276 ps
T588 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all.334968764 Sep 01 08:26:22 PM UTC 24 Sep 01 08:27:01 PM UTC 24 2396870301 ps
T589 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_disable_rom_integrity_check.3252353775 Sep 01 08:26:59 PM UTC 24 Sep 01 08:27:01 PM UTC 24 93474108 ps
T590 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_smoke.2896644354 Sep 01 08:26:54 PM UTC 24 Sep 01 08:27:02 PM UTC 24 38035744 ps
T591 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset.3736690456 Sep 01 08:26:54 PM UTC 24 Sep 01 08:27:02 PM UTC 24 47764619 ps
T592 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_invalid.2595878196 Sep 01 08:26:54 PM UTC 24 Sep 01 08:27:02 PM UTC 24 110313669 ps
T593 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_ctrl_config_regwen.394260285 Sep 01 08:26:59 PM UTC 24 Sep 01 08:27:02 PM UTC 24 683983178 ps
T594 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_disable_rom_integrity_check.446699295 Sep 01 08:26:54 PM UTC 24 Sep 01 08:27:02 PM UTC 24 67965477 ps
T595 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_aborted_low_power.576197309 Sep 01 08:26:21 PM UTC 24 Sep 01 08:27:03 PM UTC 24 52387573 ps
T596 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_glitch.591169779 Sep 01 08:27:01 PM UTC 24 Sep 01 08:27:03 PM UTC 24 125859839 ps
T597 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_smoke.607063087 Sep 01 08:27:02 PM UTC 24 Sep 01 08:27:17 PM UTC 24 67122396 ps
T598 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_global_esc.27063183 Sep 01 08:27:13 PM UTC 24 Sep 01 08:27:17 PM UTC 24 66155222 ps
T599 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_ctrl_config_regwen.3991765259 Sep 01 08:27:13 PM UTC 24 Sep 01 08:27:17 PM UTC 24 61795050 ps
T600 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_global_esc.2163607537 Sep 01 08:27:00 PM UTC 24 Sep 01 08:27:03 PM UTC 24 148713682 ps
T601 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup.120267451 Sep 01 08:26:54 PM UTC 24 Sep 01 08:27:03 PM UTC 24 76868242 ps
T602 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset.2505211236 Sep 01 08:27:02 PM UTC 24 Sep 01 08:27:17 PM UTC 24 60902852 ps
T603 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_aborted_low_power.3521950104 Sep 01 08:26:24 PM UTC 24 Sep 01 08:27:03 PM UTC 24 84721060 ps
T604 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_wakeup_race.327633101 Sep 01 08:26:54 PM UTC 24 Sep 01 08:27:03 PM UTC 24 137226996 ps
T605 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_esc_clk_rst_malfunc.1066200673 Sep 01 08:26:21 PM UTC 24 Sep 01 08:27:03 PM UTC 24 30440903 ps
T606 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup_reset.1479457711 Sep 01 08:26:24 PM UTC 24 Sep 01 08:27:03 PM UTC 24 265857068 ps
T607 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup_reset.1216435886 Sep 01 08:26:54 PM UTC 24 Sep 01 08:27:03 PM UTC 24 153647560 ps
T608 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_escalation_timeout.3897208467 Sep 01 08:27:00 PM UTC 24 Sep 01 08:27:03 PM UTC 24 111824154 ps
T609 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rstmgr_intersig_mubi.3370167429 Sep 01 08:26:21 PM UTC 24 Sep 01 08:27:03 PM UTC 24 70537465 ps
T610 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup_reset.3403289923 Sep 01 08:26:48 PM UTC 24 Sep 01 08:27:03 PM UTC 24 130179472 ps
T611 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_aborted_low_power.1483755553 Sep 01 08:26:48 PM UTC 24 Sep 01 08:27:03 PM UTC 24 33568700 ps
T612 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_wakeup_race.2444955231 Sep 01 08:26:48 PM UTC 24 Sep 01 08:27:03 PM UTC 24 162962352 ps
T613 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rstmgr_intersig_mubi.2981465111 Sep 01 08:26:48 PM UTC 24 Sep 01 08:27:03 PM UTC 24 226680812 ps
T614 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup.360044497 Sep 01 08:26:48 PM UTC 24 Sep 01 08:27:03 PM UTC 24 274135644 ps
T79 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all_with_rand_reset.26902015 Sep 01 08:26:22 PM UTC 24 Sep 01 08:27:04 PM UTC 24 5034826568 ps
T615 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3874546623 Sep 01 08:26:48 PM UTC 24 Sep 01 08:27:04 PM UTC 24 1237022672 ps
T616 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all.2762417910 Sep 01 08:26:54 PM UTC 24 Sep 01 08:27:05 PM UTC 24 1714910209 ps
T617 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2276393582 Sep 01 08:26:21 PM UTC 24 Sep 01 08:27:05 PM UTC 24 847416425 ps
T618 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1384912278 Sep 01 08:26:54 PM UTC 24 Sep 01 08:27:05 PM UTC 24 815582467 ps
T619 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.595326793 Sep 01 08:26:54 PM UTC 24 Sep 01 08:27:06 PM UTC 24 773690288 ps
T620 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all.3059929417 Sep 01 08:26:59 PM UTC 24 Sep 01 08:27:07 PM UTC 24 1798689611 ps
T621 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_glitch.502899494 Sep 01 08:26:58 PM UTC 24 Sep 01 08:27:07 PM UTC 24 105715632 ps
T622 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_global_esc.3849196961 Sep 01 08:26:58 PM UTC 24 Sep 01 08:27:07 PM UTC 24 49485002 ps
T623 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset.4237594338 Sep 01 08:26:59 PM UTC 24 Sep 01 08:27:07 PM UTC 24 52990291 ps
T624 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_invalid.2830907000 Sep 01 08:26:59 PM UTC 24 Sep 01 08:27:07 PM UTC 24 82812471 ps
T625 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_escalation_timeout.2067153104 Sep 01 08:26:58 PM UTC 24 Sep 01 08:27:07 PM UTC 24 112384208 ps
T626 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_smoke.3317151001 Sep 01 08:27:05 PM UTC 24 Sep 01 08:27:07 PM UTC 24 44476844 ps
T627 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_smoke.3393080877 Sep 01 08:26:59 PM UTC 24 Sep 01 08:27:07 PM UTC 24 31209723 ps
T628 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset_invalid.3047203705 Sep 01 08:26:59 PM UTC 24 Sep 01 08:27:07 PM UTC 24 105362576 ps
T629 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_ctrl_config_regwen.268492443 Sep 01 08:26:41 PM UTC 24 Sep 01 08:27:07 PM UTC 24 305705695 ps
T630 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_wakeup_race.3006008672 Sep 01 08:26:59 PM UTC 24 Sep 01 08:27:07 PM UTC 24 352382456 ps
T631 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_wakeup_race.146879281 Sep 01 08:27:05 PM UTC 24 Sep 01 08:27:07 PM UTC 24 215952549 ps
T632 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup.1736372929 Sep 01 08:27:05 PM UTC 24 Sep 01 08:27:07 PM UTC 24 234086414 ps
T633 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset.1871188592 Sep 01 08:27:05 PM UTC 24 Sep 01 08:27:07 PM UTC 24 80580062 ps
T634 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup_reset.513264146 Sep 01 08:26:59 PM UTC 24 Sep 01 08:27:07 PM UTC 24 177043234 ps
T635 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup.309031370 Sep 01 08:26:59 PM UTC 24 Sep 01 08:27:07 PM UTC 24 222707969 ps
T636 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all_with_rand_reset.3316654891 Sep 01 08:26:45 PM UTC 24 Sep 01 08:27:08 PM UTC 24 6302432316 ps
T637 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all.3568210450 Sep 01 08:26:34 PM UTC 24 Sep 01 08:27:08 PM UTC 24 1777613221 ps
T638 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.714857513 Sep 01 08:26:59 PM UTC 24 Sep 01 08:27:08 PM UTC 24 1626863423 ps
T80 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all_with_rand_reset.547128277 Sep 01 08:26:34 PM UTC 24 Sep 01 08:27:08 PM UTC 24 2546976045 ps
T639 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all.598333808 Sep 01 08:27:05 PM UTC 24 Sep 01 08:27:10 PM UTC 24 2445887568 ps
T640 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_glitch.3900190013 Sep 01 08:27:15 PM UTC 24 Sep 01 08:27:17 PM UTC 24 38229076 ps
T641 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_aborted_low_power.1793120026 Sep 01 08:27:09 PM UTC 24 Sep 01 08:27:12 PM UTC 24 60190389 ps
T642 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.519301386 Sep 01 08:27:09 PM UTC 24 Sep 01 08:27:12 PM UTC 24 141068253 ps
T643 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2116090641 Sep 01 08:27:09 PM UTC 24 Sep 01 08:27:13 PM UTC 24 1907944725 ps
T644 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1258855081 Sep 01 08:27:09 PM UTC 24 Sep 01 08:27:14 PM UTC 24 819877894 ps
T81 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all_with_rand_reset.282686123 Sep 01 08:26:59 PM UTC 24 Sep 01 08:27:17 PM UTC 24 8257059498 ps
T645 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset.737166496 Sep 01 08:27:08 PM UTC 24 Sep 01 08:27:17 PM UTC 24 107708492 ps
T646 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup.3916295521 Sep 01 08:27:08 PM UTC 24 Sep 01 08:27:17 PM UTC 24 310632848 ps
T647 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_wakeup_race.1571635409 Sep 01 08:27:08 PM UTC 24 Sep 01 08:27:17 PM UTC 24 311393298 ps
T648 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset_invalid.212732884 Sep 01 08:27:02 PM UTC 24 Sep 01 08:27:17 PM UTC 24 143064079 ps
T649 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_invalid.2186164081 Sep 01 08:27:02 PM UTC 24 Sep 01 08:27:17 PM UTC 24 58849550 ps
T650 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_disable_rom_integrity_check.1210490009 Sep 01 08:27:02 PM UTC 24 Sep 01 08:27:17 PM UTC 24 64005054 ps
T651 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup_reset.1442128722 Sep 01 08:27:08 PM UTC 24 Sep 01 08:27:17 PM UTC 24 408017864 ps
T652 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_disable_rom_integrity_check.1714628804 Sep 01 08:27:15 PM UTC 24 Sep 01 08:27:18 PM UTC 24 46923929 ps
T653 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all_with_rand_reset.725245411 Sep 01 08:27:05 PM UTC 24 Sep 01 08:27:18 PM UTC 24 5628870964 ps
T654 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all.1572278806 Sep 01 08:27:02 PM UTC 24 Sep 01 08:27:21 PM UTC 24 1449098048 ps
T655 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_global_esc.1375832244 Sep 01 08:27:20 PM UTC 24 Sep 01 08:27:22 PM UTC 24 65330421 ps
T656 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_esc_clk_rst_malfunc.1736870868 Sep 01 08:27:08 PM UTC 24 Sep 01 08:27:22 PM UTC 24 32261874 ps
T657 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup.1558099352 Sep 01 08:27:04 PM UTC 24 Sep 01 08:27:23 PM UTC 24 62552924 ps
T658 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_wakeup_race.2586448601 Sep 01 08:27:04 PM UTC 24 Sep 01 08:27:23 PM UTC 24 87419066 ps
T659 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rstmgr_intersig_mubi.2761092909 Sep 01 08:27:08 PM UTC 24 Sep 01 08:27:23 PM UTC 24 129501216 ps
T660 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_escalation_timeout.2540559328 Sep 01 08:27:14 PM UTC 24 Sep 01 08:27:23 PM UTC 24 109553489 ps
T661 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_ctrl_config_regwen.1210680487 Sep 01 08:27:08 PM UTC 24 Sep 01 08:27:23 PM UTC 24 150020054 ps
T662 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2780233668 Sep 01 08:27:06 PM UTC 24 Sep 01 08:27:23 PM UTC 24 1027573016 ps
T663 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup_reset.976873977 Sep 01 08:27:18 PM UTC 24 Sep 01 08:27:26 PM UTC 24 350456654 ps
T664 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rstmgr_intersig_mubi.4104049695 Sep 01 08:27:18 PM UTC 24 Sep 01 08:27:26 PM UTC 24 334126615 ps
T665 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup.243775932 Sep 01 08:27:25 PM UTC 24 Sep 01 08:27:27 PM UTC 24 37338307 ps
T666 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_esc_clk_rst_malfunc.262143976 Sep 01 08:27:18 PM UTC 24 Sep 01 08:27:27 PM UTC 24 31480496 ps
T667 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_glitch.3420260691 Sep 01 08:27:23 PM UTC 24 Sep 01 08:27:27 PM UTC 24 31787241 ps
T668 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_ctrl_config_regwen.1544112757 Sep 01 08:27:18 PM UTC 24 Sep 01 08:27:27 PM UTC 24 216882573 ps
T669 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_disable_rom_integrity_check.3173492886 Sep 01 08:27:23 PM UTC 24 Sep 01 08:27:27 PM UTC 24 90946941 ps
T670 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2913119117 Sep 01 08:27:18 PM UTC 24 Sep 01 08:27:28 PM UTC 24 1153734318 ps
T671 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_esc_clk_rst_malfunc.3241149611 Sep 01 08:26:59 PM UTC 24 Sep 01 08:27:28 PM UTC 24 40071050 ps
T672 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_aborted_low_power.1618419771 Sep 01 08:26:59 PM UTC 24 Sep 01 08:27:28 PM UTC 24 20912856 ps
T673 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all_with_rand_reset.4067008213 Sep 01 08:27:02 PM UTC 24 Sep 01 08:27:28 PM UTC 24 7982170073 ps
T674 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1063138726 Sep 01 08:27:18 PM UTC 24 Sep 01 08:27:29 PM UTC 24 824031979 ps
T675 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2853335636 Sep 01 08:26:59 PM UTC 24 Sep 01 08:27:30 PM UTC 24 837290400 ps
T676 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup_reset.3623125458 Sep 01 08:27:06 PM UTC 24 Sep 01 08:27:31 PM UTC 24 127160338 ps
T677 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_global_esc.1627644720 Sep 01 08:27:28 PM UTC 24 Sep 01 08:27:34 PM UTC 24 85409393 ps
T678 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_disable_rom_integrity_check.2514993280 Sep 01 08:27:29 PM UTC 24 Sep 01 08:27:34 PM UTC 24 98180272 ps
T679 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_aborted_low_power.1684666620 Sep 01 08:27:27 PM UTC 24 Sep 01 08:27:32 PM UTC 24 48901173 ps
T680 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup_reset.2176517689 Sep 01 08:27:27 PM UTC 24 Sep 01 08:27:33 PM UTC 24 482559206 ps
T681 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_invalid.2555035759 Sep 01 08:27:30 PM UTC 24 Sep 01 08:27:33 PM UTC 24 54836418 ps
T682 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset_invalid.3121758548 Sep 01 08:27:30 PM UTC 24 Sep 01 08:27:33 PM UTC 24 244891880 ps
T683 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.364840374 Sep 01 08:27:06 PM UTC 24 Sep 01 08:27:33 PM UTC 24 1064217494 ps
T684 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_aborted_low_power.75747718 Sep 01 08:27:04 PM UTC 24 Sep 01 08:27:33 PM UTC 24 80550306 ps
T685 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rstmgr_intersig_mubi.355318304 Sep 01 08:27:28 PM UTC 24 Sep 01 08:27:34 PM UTC 24 390997047 ps
T686 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_glitch.2376717621 Sep 01 08:27:08 PM UTC 24 Sep 01 08:27:33 PM UTC 24 43313501 ps
T687 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_global_esc.2293675442 Sep 01 08:27:08 PM UTC 24 Sep 01 08:27:33 PM UTC 24 35053687 ps
T688 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_disable_rom_integrity_check.4022850199 Sep 01 08:27:08 PM UTC 24 Sep 01 08:27:33 PM UTC 24 83099690 ps
T689 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_escalation_timeout.3225101436 Sep 01 08:27:22 PM UTC 24 Sep 01 08:27:34 PM UTC 24 207615261 ps
T690 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_smoke.2283495784 Sep 01 08:27:24 PM UTC 24 Sep 01 08:27:33 PM UTC 24 50842290 ps
T691 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_escalation_timeout.1039049830 Sep 01 08:27:48 PM UTC 24 Sep 01 08:28:03 PM UTC 24 110312546 ps
T692 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rstmgr_intersig_mubi.994106684 Sep 01 08:27:04 PM UTC 24 Sep 01 08:27:33 PM UTC 24 167156118 ps
T693 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_escalation_timeout.2679939622 Sep 01 08:27:08 PM UTC 24 Sep 01 08:27:33 PM UTC 24 228489549 ps
T694 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.3485366157 Sep 01 08:27:04 PM UTC 24 Sep 01 08:27:33 PM UTC 24 269473031 ps
T695 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_invalid.710419703 Sep 01 08:27:24 PM UTC 24 Sep 01 08:27:33 PM UTC 24 45852949 ps
T696 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_invalid.3554200641 Sep 01 08:27:08 PM UTC 24 Sep 01 08:27:33 PM UTC 24 70336155 ps
T697 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_esc_clk_rst_malfunc.1370036222 Sep 01 08:28:14 PM UTC 24 Sep 01 08:28:17 PM UTC 24 30355370 ps
T698 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset_invalid.2008766485 Sep 01 08:27:08 PM UTC 24 Sep 01 08:27:33 PM UTC 24 111048503 ps
T699 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_global_esc.3560015613 Sep 01 08:27:04 PM UTC 24 Sep 01 08:27:33 PM UTC 24 21392860 ps
T700 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_glitch.2534666981 Sep 01 08:27:04 PM UTC 24 Sep 01 08:27:33 PM UTC 24 34555925 ps
T701 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_smoke.1080738578 Sep 01 08:27:18 PM UTC 24 Sep 01 08:27:33 PM UTC 24 40970323 ps
T702 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_escalation_timeout.2200901844 Sep 01 08:27:04 PM UTC 24 Sep 01 08:27:34 PM UTC 24 110313601 ps
T703 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_wakeup_race.3231633618 Sep 01 08:27:18 PM UTC 24 Sep 01 08:27:34 PM UTC 24 238284068 ps
T704 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_invalid.3962395574 Sep 01 08:27:18 PM UTC 24 Sep 01 08:27:34 PM UTC 24 61009222 ps
T705 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset_invalid.1123383056 Sep 01 08:27:24 PM UTC 24 Sep 01 08:27:34 PM UTC 24 100894814 ps
T706 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup.3501432102 Sep 01 08:27:18 PM UTC 24 Sep 01 08:27:34 PM UTC 24 146110453 ps
T707 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_smoke.4263525006 Sep 01 08:27:08 PM UTC 24 Sep 01 08:27:34 PM UTC 24 42713962 ps
T708 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_esc_clk_rst_malfunc.3289436860 Sep 01 08:27:04 PM UTC 24 Sep 01 08:27:34 PM UTC 24 29044634 ps
T709 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.3148901031 Sep 01 08:27:28 PM UTC 24 Sep 01 08:27:34 PM UTC 24 28641209 ps
T710 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset_invalid.2487855570 Sep 01 08:27:04 PM UTC 24 Sep 01 08:27:34 PM UTC 24 121700307 ps
T711 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_invalid.1696836846 Sep 01 08:27:04 PM UTC 24 Sep 01 08:27:34 PM UTC 24 75756034 ps
T712 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1615719731 Sep 01 08:27:27 PM UTC 24 Sep 01 08:27:34 PM UTC 24 934257753 ps
T713 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_wakeup_race.3461157713 Sep 01 08:27:24 PM UTC 24 Sep 01 08:27:34 PM UTC 24 143184284 ps
T714 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset.533355493 Sep 01 08:27:18 PM UTC 24 Sep 01 08:27:34 PM UTC 24 164555296 ps
T715 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_disable_rom_integrity_check.524656107 Sep 01 08:27:04 PM UTC 24 Sep 01 08:27:34 PM UTC 24 47197986 ps
T716 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup_reset.1950167419 Sep 01 08:27:04 PM UTC 24 Sep 01 08:27:34 PM UTC 24 264340483 ps
T717 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_escalation_timeout.2065729336 Sep 01 08:27:28 PM UTC 24 Sep 01 08:27:34 PM UTC 24 205392507 ps
T718 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset.2014909526 Sep 01 08:27:24 PM UTC 24 Sep 01 08:27:34 PM UTC 24 81992077 ps
T719 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_aborted_low_power.3155075600 Sep 01 08:27:18 PM UTC 24 Sep 01 08:27:34 PM UTC 24 67370167 ps
T720 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_ctrl_config_regwen.1639125961 Sep 01 08:27:28 PM UTC 24 Sep 01 08:27:34 PM UTC 24 387709063 ps
T721 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_esc_clk_rst_malfunc.2155521925 Sep 01 08:27:11 PM UTC 24 Sep 01 08:27:34 PM UTC 24 29154721 ps
T722 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_glitch.3108014848 Sep 01 08:27:29 PM UTC 24 Sep 01 08:27:34 PM UTC 24 25293445 ps
T723 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1559970813 Sep 01 08:27:04 PM UTC 24 Sep 01 08:27:34 PM UTC 24 1110604112 ps
T724 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.762596486 Sep 01 08:27:27 PM UTC 24 Sep 01 08:27:35 PM UTC 24 852517563 ps
T725 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset.1090734019 Sep 01 08:27:33 PM UTC 24 Sep 01 08:27:35 PM UTC 24 128147703 ps
T726 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all.2198092165 Sep 01 08:27:24 PM UTC 24 Sep 01 08:27:36 PM UTC 24 1113268553 ps
T727 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_glitch.2508240316 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:37 PM UTC 24 55911927 ps
T728 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_ctrl_config_regwen.4152694181 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:48 PM UTC 24 288694350 ps
T729 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_invalid.799448552 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:37 PM UTC 24 72616884 ps
T730 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_aborted_low_power.1939524451 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:37 PM UTC 24 39847655 ps
T731 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_esc_clk_rst_malfunc.2419135061 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:37 PM UTC 24 38143295 ps
T732 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_glitch.1023200089 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:37 PM UTC 24 58701553 ps
T733 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_global_esc.3778904197 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:37 PM UTC 24 27589208 ps
T734 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all.707356882 Sep 01 08:27:32 PM UTC 24 Sep 01 08:27:37 PM UTC 24 2431015230 ps
T735 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_ctrl_config_regwen.1155097419 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:37 PM UTC 24 139842920 ps
T736 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rstmgr_intersig_mubi.646523154 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:37 PM UTC 24 64393300 ps
T737 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_escalation_timeout.4171334341 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:37 PM UTC 24 197848450 ps
T738 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_invalid.1117341435 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:38 PM UTC 24 83717795 ps
T739 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_smoke.1884824967 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:38 PM UTC 24 33093157 ps
T740 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_disable_rom_integrity_check.1175354692 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:38 PM UTC 24 81946025 ps
T741 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_global_esc.2717808408 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:38 PM UTC 24 89276021 ps
T742 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rstmgr_intersig_mubi.2959049097 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:38 PM UTC 24 169371632 ps
T743 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset_invalid.2337357896 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:38 PM UTC 24 95213405 ps
T744 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_escalation_timeout.2404142324 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:38 PM UTC 24 393042907 ps
T745 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_wakeup_race.210537225 Sep 01 08:27:36 PM UTC 24 Sep 01 08:27:38 PM UTC 24 274677782 ps
T746 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup_reset.2284876366 Sep 01 08:27:36 PM UTC 24 Sep 01 08:27:38 PM UTC 24 105108092 ps
T747 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rstmgr_intersig_mubi.3699523174 Sep 01 08:26:59 PM UTC 24 Sep 01 08:27:38 PM UTC 24 155199196 ps
T748 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_smoke.1187448258 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:38 PM UTC 24 28376430 ps
T749 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset_invalid.2219759324 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:38 PM UTC 24 102401129 ps
T750 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3295972641 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:38 PM UTC 24 1303651878 ps
T751 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_aborted_low_power.3608041318 Sep 01 08:27:36 PM UTC 24 Sep 01 08:27:48 PM UTC 24 35633890 ps
T752 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all.696739661 Sep 01 08:27:18 PM UTC 24 Sep 01 08:27:38 PM UTC 24 1545763887 ps
T753 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1470448746 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:39 PM UTC 24 871088510 ps
T754 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all.679083380 Sep 01 08:27:08 PM UTC 24 Sep 01 08:27:39 PM UTC 24 2844382798 ps
T755 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_disable_rom_integrity_check.1699814793 Sep 01 08:27:40 PM UTC 24 Sep 01 08:27:42 PM UTC 24 59685144 ps
T756 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rstmgr_intersig_mubi.2639903467 Sep 01 08:27:40 PM UTC 24 Sep 01 08:27:42 PM UTC 24 93400892 ps
T757 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_smoke.3610820492 Sep 01 08:27:33 PM UTC 24 Sep 01 08:27:42 PM UTC 24 51021734 ps
T758 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_wakeup_race.2792140278 Sep 01 08:27:33 PM UTC 24 Sep 01 08:27:42 PM UTC 24 88357697 ps
T759 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup.287959524 Sep 01 08:27:33 PM UTC 24 Sep 01 08:27:42 PM UTC 24 265818094 ps
T760 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup_reset.3737631499 Sep 01 08:27:33 PM UTC 24 Sep 01 08:27:42 PM UTC 24 190605210 ps
T761 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_esc_clk_rst_malfunc.2214896035 Sep 01 08:27:40 PM UTC 24 Sep 01 08:27:42 PM UTC 24 32345736 ps
T762 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset.1336057277 Sep 01 08:27:42 PM UTC 24 Sep 01 08:27:47 PM UTC 24 85555515 ps
T763 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_wakeup_race.1988764378 Sep 01 08:27:45 PM UTC 24 Sep 01 08:27:48 PM UTC 24 57132993 ps
T764 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_global_esc.1480124775 Sep 01 08:27:40 PM UTC 24 Sep 01 08:27:43 PM UTC 24 81725306 ps
T765 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_glitch.2792731695 Sep 01 08:27:40 PM UTC 24 Sep 01 08:27:43 PM UTC 24 143366280 ps
T766 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_smoke.3844780898 Sep 01 08:27:41 PM UTC 24 Sep 01 08:27:43 PM UTC 24 47125815 ps
T767 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset.3050093881 Sep 01 08:27:45 PM UTC 24 Sep 01 08:27:48 PM UTC 24 120772472 ps
T768 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset_invalid.336991302 Sep 01 08:27:40 PM UTC 24 Sep 01 08:27:43 PM UTC 24 126772437 ps
T769 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_invalid.3165606764 Sep 01 08:27:40 PM UTC 24 Sep 01 08:27:43 PM UTC 24 41628203 ps
T770 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.1652774342 Sep 01 08:27:40 PM UTC 24 Sep 01 08:27:43 PM UTC 24 226219025 ps
T771 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all.714523391 Sep 01 08:27:40 PM UTC 24 Sep 01 08:27:43 PM UTC 24 40068675 ps
T772 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_global_esc.507290346 Sep 01 08:27:38 PM UTC 24 Sep 01 08:27:43 PM UTC 24 38954026 ps
T773 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_escalation_timeout.4177085155 Sep 01 08:27:40 PM UTC 24 Sep 01 08:27:43 PM UTC 24 193645922 ps
T774 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_glitch.1969153949 Sep 01 08:27:38 PM UTC 24 Sep 01 08:27:43 PM UTC 24 73249773 ps
T775 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset_invalid.3197351428 Sep 01 08:27:38 PM UTC 24 Sep 01 08:27:43 PM UTC 24 333414354 ps
T776 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_invalid.4121449328 Sep 01 08:27:38 PM UTC 24 Sep 01 08:27:43 PM UTC 24 94572618 ps
T777 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_escalation_timeout.1791240966 Sep 01 08:27:38 PM UTC 24 Sep 01 08:27:43 PM UTC 24 159731165 ps
T778 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_disable_rom_integrity_check.3921456173 Sep 01 08:27:38 PM UTC 24 Sep 01 08:27:43 PM UTC 24 59692639 ps
T779 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1578282000 Sep 01 08:27:39 PM UTC 24 Sep 01 08:27:44 PM UTC 24 852855818 ps
T780 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all.2282990389 Sep 01 08:27:38 PM UTC 24 Sep 01 08:27:45 PM UTC 24 673429667 ps
T781 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all_with_rand_reset.1727823759 Sep 01 08:27:31 PM UTC 24 Sep 01 08:27:45 PM UTC 24 9030887088 ps
T782 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all_with_rand_reset.576506799 Sep 01 08:27:18 PM UTC 24 Sep 01 08:27:46 PM UTC 24 6712473152 ps
T783 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_esc_clk_rst_malfunc.1567971521 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:47 PM UTC 24 39182548 ps
T784 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_aborted_low_power.146290238 Sep 01 08:27:34 PM UTC 24 Sep 01 08:27:47 PM UTC 24 57223895 ps
T785 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup.2058231638 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:48 PM UTC 24 182869584 ps
T786 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_smoke.3422383256 Sep 01 08:27:38 PM UTC 24 Sep 01 08:27:46 PM UTC 24 31666015 ps
T787 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_aborted_low_power.4206590516 Sep 01 08:27:38 PM UTC 24 Sep 01 08:27:46 PM UTC 24 75889097 ps
T788 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup.1441756143 Sep 01 08:27:38 PM UTC 24 Sep 01 08:27:46 PM UTC 24 253455535 ps
T789 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_wakeup_race.3201214062 Sep 01 08:27:38 PM UTC 24 Sep 01 08:27:46 PM UTC 24 115147203 ps
T790 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup_reset.4204334718 Sep 01 08:27:38 PM UTC 24 Sep 01 08:27:46 PM UTC 24 154857350 ps
T791 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup.1426764570 Sep 01 08:27:42 PM UTC 24 Sep 01 08:27:47 PM UTC 24 110817070 ps
T792 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup_reset.1262717209 Sep 01 08:27:42 PM UTC 24 Sep 01 08:27:47 PM UTC 24 121761653 ps
T793 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all.2493549959 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:47 PM UTC 24 77782296 ps
T794 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset.104731280 Sep 01 08:27:36 PM UTC 24 Sep 01 08:27:47 PM UTC 24 53985953 ps
T795 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset.1006356171 Sep 01 08:27:38 PM UTC 24 Sep 01 08:27:47 PM UTC 24 81566368 ps
T796 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_wakeup_race.2497437168 Sep 01 08:27:42 PM UTC 24 Sep 01 08:27:47 PM UTC 24 413218453 ps
T797 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_disable_rom_integrity_check.395113906 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:48 PM UTC 24 60693299 ps
T798 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup.430614988 Sep 01 08:27:36 PM UTC 24 Sep 01 08:27:48 PM UTC 24 265721694 ps
T799 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup_reset.3955887550 Sep 01 08:27:35 PM UTC 24 Sep 01 08:27:48 PM UTC 24 332859143 ps
T800 /workspaces/repo/scratch/os_regression_2024_08_31/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup.2029239684 Sep 01 08:27:45 PM UTC 24 Sep 01 08:27:49 PM UTC 24 285455200 ps
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