AES/MASKED Simulation Results

Wednesday January 24 2024 20:02:24 UTC

GitHub Revision: `17d5a97c3b`

Branch: os_regression

Simulator: XCELIUM

Build randomization enabled with --build-seed 111545506019531132515166311410934274348263845011639206515682989027305484635840

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	wake_up	aes_wake_up	4.000s	68.464us	1	1	100.00
V1	smoke	aes_smoke	36.000s	1.020ms	50	50	100.00
V1	csr_hw_reset	aes_csr_hw_reset	4.000s	119.360us	5	5	100.00
V1	csr_rw	aes_csr_rw	5.000s	55.076us	20	20	100.00
V1	csr_bit_bash	aes_csr_bit_bash	15.000s	11.362ms	5	5	100.00
V1	csr_aliasing	aes_csr_aliasing	7.000s	302.436us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aes_csr_mem_rw_with_rand_reset	6.000s	53.325us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aes_csr_rw	5.000s	55.076us	20	20	100.00
		aes_csr_aliasing	7.000s	302.436us	5	5	100.00
V1		TOTAL			106	106	100.00
V2	algorithm	aes_smoke	36.000s	1.020ms	50	50	100.00
		aes_config_error	20.000s	706.539us	50	50	100.00
		aes_stress	49.000s	1.462ms	50	50	100.00
V2	key_length	aes_smoke	36.000s	1.020ms	50	50	100.00
		aes_config_error	20.000s	706.539us	50	50	100.00
		aes_stress	49.000s	1.462ms	50	50	100.00
V2	back2back	aes_stress	49.000s	1.462ms	50	50	100.00
		aes_b2b	35.000s	1.215ms	47	50	94.00
V2	backpressure	aes_stress	49.000s	1.462ms	50	50	100.00
V2	multi_message	aes_smoke	36.000s	1.020ms	50	50	100.00
		aes_config_error	20.000s	706.539us	50	50	100.00
		aes_stress	49.000s	1.462ms	50	50	100.00
		aes_alert_reset	12.000s	341.599us	48	50	96.00
V2	failure_test	aes_man_cfg_err	8.000s	108.106us	47	50	94.00
		aes_config_error	20.000s	706.539us	50	50	100.00
		aes_alert_reset	12.000s	341.599us	48	50	96.00
V2	trigger_clear_test	aes_clear	59.000s	11.885ms	49	50	98.00
V2	nist_test_vectors	aes_nist_vectors	18.000s	1.601ms	1	1	100.00
V2	reset_recovery	aes_alert_reset	12.000s	341.599us	48	50	96.00
V2	stress	aes_stress	49.000s	1.462ms	50	50	100.00
V2	sideload	aes_stress	49.000s	1.462ms	50	50	100.00
		aes_sideload	23.000s	721.374us	49	50	98.00
V2	deinitialization	aes_deinit	8.000s	336.055us	48	50	96.00
V2	stress_all	aes_stress_all	1.883m	1.629ms	10	10	100.00
V2	alert_test	aes_alert_test	8.000s	54.627us	49	50	98.00
V2	tl_d_oob_addr_access	aes_tl_errors	7.000s	74.658us	20	20	100.00
V2	tl_d_illegal_access	aes_tl_errors	7.000s	74.658us	20	20	100.00
V2	tl_d_outstanding_access	aes_csr_hw_reset	4.000s	119.360us	5	5	100.00
		aes_csr_rw	5.000s	55.076us	20	20	100.00
		aes_csr_aliasing	7.000s	302.436us	5	5	100.00
		aes_same_csr_outstanding	6.000s	60.056us	20	20	100.00
V2	tl_d_partial_access	aes_csr_hw_reset	4.000s	119.360us	5	5	100.00
		aes_csr_rw	5.000s	55.076us	20	20	100.00
		aes_csr_aliasing	7.000s	302.436us	5	5	100.00
		aes_same_csr_outstanding	6.000s	60.056us	20	20	100.00
V2		TOTAL			488	501	97.41
V2S	reseeding	aes_reseed	32.000s	902.171us	48	50	96.00
V2S	fault_inject	aes_fi	19.000s	1.173ms	50	50	100.00
		aes_control_fi	51.000s	10.006ms	262	300	87.33
		aes_cipher_fi	51.000s	10.005ms	329	350	94.00
V2S	shadow_reg_update_error	aes_shadow_reg_errors	5.000s	63.290us	20	20	100.00
V2S	shadow_reg_read_clear_staged_value	aes_shadow_reg_errors	5.000s	63.290us	20	20	100.00
V2S	shadow_reg_storage_error	aes_shadow_reg_errors	5.000s	63.290us	20	20	100.00
V2S	shadowed_reset_glitch	aes_shadow_reg_errors	5.000s	63.290us	20	20	100.00
V2S	shadow_reg_update_error_with_csr_rw	aes_shadow_reg_errors_with_csr_rw	8.000s	100.781us	20	20	100.00
V2S	tl_intg_err	aes_sec_cm	10.000s	1.067ms	5	5	100.00
		aes_tl_intg_err	8.000s	177.425us	20	20	100.00
V2S	sec_cm_bus_integrity	aes_tl_intg_err	8.000s	177.425us	20	20	100.00
V2S	sec_cm_lc_escalate_en_intersig_mubi	aes_alert_reset	12.000s	341.599us	48	50	96.00
V2S	sec_cm_main_config_shadow	aes_shadow_reg_errors	5.000s	63.290us	20	20	100.00
V2S	sec_cm_main_config_sparse	aes_smoke	36.000s	1.020ms	50	50	100.00
		aes_stress	49.000s	1.462ms	50	50	100.00
		aes_alert_reset	12.000s	341.599us	48	50	96.00
		aes_core_fi	1.517m	10.004ms	64	70	91.43
V2S	sec_cm_aux_config_shadow	aes_shadow_reg_errors	5.000s	63.290us	20	20	100.00
V2S	sec_cm_aux_config_regwen	aes_readability	8.000s	111.104us	50	50	100.00
		aes_stress	49.000s	1.462ms	50	50	100.00
V2S	sec_cm_key_sideload	aes_stress	49.000s	1.462ms	50	50	100.00
		aes_sideload	23.000s	721.374us	49	50	98.00
V2S	sec_cm_key_sw_unreadable	aes_readability	8.000s	111.104us	50	50	100.00
V2S	sec_cm_data_reg_sw_unreadable	aes_readability	8.000s	111.104us	50	50	100.00
V2S	sec_cm_key_sec_wipe	aes_readability	8.000s	111.104us	50	50	100.00
V2S	sec_cm_iv_config_sec_wipe	aes_readability	8.000s	111.104us	50	50	100.00
V2S	sec_cm_data_reg_sec_wipe	aes_readability	8.000s	111.104us	50	50	100.00
V2S	sec_cm_data_reg_key_sca	aes_stress	49.000s	1.462ms	50	50	100.00
V2S	sec_cm_key_masking	aes_stress	49.000s	1.462ms	50	50	100.00
V2S	sec_cm_main_fsm_sparse	aes_fi	19.000s	1.173ms	50	50	100.00
V2S	sec_cm_main_fsm_redun	aes_fi	19.000s	1.173ms	50	50	100.00
		aes_control_fi	51.000s	10.006ms	262	300	87.33
		aes_cipher_fi	51.000s	10.005ms	329	350	94.00
		aes_ctr_fi	5.000s	61.694us	48	50	96.00
V2S	sec_cm_cipher_fsm_sparse	aes_fi	19.000s	1.173ms	50	50	100.00
V2S	sec_cm_cipher_fsm_redun	aes_fi	19.000s	1.173ms	50	50	100.00
		aes_control_fi	51.000s	10.006ms	262	300	87.33
		aes_cipher_fi	51.000s	10.005ms	329	350	94.00
V2S	sec_cm_cipher_ctr_redun	aes_cipher_fi	51.000s	10.005ms	329	350	94.00
V2S	sec_cm_ctr_fsm_sparse	aes_fi	19.000s	1.173ms	50	50	100.00
V2S	sec_cm_ctr_fsm_redun	aes_fi	19.000s	1.173ms	50	50	100.00
		aes_control_fi	51.000s	10.006ms	262	300	87.33
		aes_ctr_fi	5.000s	61.694us	48	50	96.00
V2S	sec_cm_ctrl_sparse	aes_fi	19.000s	1.173ms	50	50	100.00
		aes_control_fi	51.000s	10.006ms	262	300	87.33
		aes_cipher_fi	51.000s	10.005ms	329	350	94.00
		aes_ctr_fi	5.000s	61.694us	48	50	96.00
V2S	sec_cm_main_fsm_global_esc	aes_alert_reset	12.000s	341.599us	48	50	96.00
V2S	sec_cm_main_fsm_local_esc	aes_fi	19.000s	1.173ms	50	50	100.00
		aes_control_fi	51.000s	10.006ms	262	300	87.33
		aes_cipher_fi	51.000s	10.005ms	329	350	94.00
		aes_ctr_fi	5.000s	61.694us	48	50	96.00
V2S	sec_cm_cipher_fsm_local_esc	aes_fi	19.000s	1.173ms	50	50	100.00
		aes_control_fi	51.000s	10.006ms	262	300	87.33
		aes_cipher_fi	51.000s	10.005ms	329	350	94.00
		aes_ctr_fi	5.000s	61.694us	48	50	96.00
V2S	sec_cm_ctr_fsm_local_esc	aes_fi	19.000s	1.173ms	50	50	100.00
		aes_control_fi	51.000s	10.006ms	262	300	87.33
		aes_ctr_fi	5.000s	61.694us	48	50	96.00
V2S	sec_cm_data_reg_local_esc	aes_fi	19.000s	1.173ms	50	50	100.00
		aes_control_fi	51.000s	10.006ms	262	300	87.33
		aes_cipher_fi	51.000s	10.005ms	329	350	94.00
V2S		TOTAL			916	985	92.99
V3	stress_all_with_rand_reset	aes_stress_all_with_rand_reset	6.917m	11.452ms	0	10	0.00
V3		TOTAL			0	10	0.00
		TOTAL			1510	1602	94.26

Testplan Progress

Items	Total	Written	Passing	Progress
V1	7	7	7	100.00
V2	13	13	6	46.15
V2S	11	11	6	54.55
V3	1	1	0	0.00

Coverage Results

Coverage Dashboard

Score	Block	Branch	Statement	Expression	Toggle	Fsm	Assertion	CoverGroup
98.51	98.98	97.47	99.41	95.85	95.66	97.78	98.97	97.36

Failure Buckets

Job aes_masked-sim-xcelium_run_default killed due to: Exit reason: User job exceeded runlimit: User job timed out has 34 failures:
- Test aes_control_fi has 26 failures.
  - 4.aes_control_fi.71265798626588041080696750100161334756867486753769965603172052630094745956849
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/4.aes_control_fi/latest/run.log
```
  Job ID: smart:93170969-1bf4-4a61-9bd3-d45c916a680a
```
  - 17.aes_control_fi.30168593401914963554562258147975248091826700872700033203538636210115876605264
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/17.aes_control_fi/latest/run.log
```
  Job ID: smart:4d1f1714-860d-4e9e-a3a6-dd32fa834a3d
```
  - ... and 24 more failures.
- Test aes_cipher_fi has 8 failures.
  - 96.aes_cipher_fi.29348109793339726914154386052457293652905118434291626653122446451097898076256
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/96.aes_cipher_fi/latest/run.log
```
  Job ID: smart:7bd5bac4-059d-4661-845c-09d370251661
```
  - 157.aes_cipher_fi.68262922744158458707898912098772090464187642048844566029381335794967969333982
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/157.aes_cipher_fi/latest/run.log
```
  Job ID: smart:4eea1422-2fec-4d8c-8376-50f70408cbb3
```
  - ... and 6 more failures.
Job aes_masked-sim-xcelium_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *] has 12 failures:
- Test aes_b2b has 1 failures.
  - 11.aes_b2b.112109730334907766570139400624744122529031109255612321858233224249256052908131
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/11.aes_b2b/latest/run.log
```
  Job ID: smart:4e71b43f-d9d2-40f5-a4d5-519c7de26973
```
- Test aes_control_fi has 3 failures.
  - 14.aes_control_fi.70394100357474452155732271317675777631874023093740576780122894717289844361472
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/14.aes_control_fi/latest/run.log
```
  Job ID: smart:fb20d192-0eeb-4fee-b5c3-5891783a887e
```
  - 29.aes_control_fi.6611241364034898041951897503781099805848777943833725876077739649333852394507
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/29.aes_control_fi/latest/run.log
```
  Job ID: smart:6ab656d4-988d-4009-ac45-f6a5caac05f7
```
  - ... and 1 more failures.
- Test aes_man_cfg_err has 1 failures.
  - 23.aes_man_cfg_err.6277615160643678735672458555748318664722576527282541111094960230861856734612
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/23.aes_man_cfg_err/latest/run.log
```
  Job ID: smart:d4cff07f-39d6-46b7-8d7f-b6d8afca0cc0
```
- Test aes_sideload has 1 failures.
  - 34.aes_sideload.113034197410509541683153239500436373176009188727111229727071682904734689826562
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/34.aes_sideload/latest/run.log
```
  Job ID: smart:2d69cdd1-55ca-45b5-a149-8c1e26c6b59f
```
- Test aes_ctr_fi has 1 failures.
  - 38.aes_ctr_fi.74954909487992716719004260900133106430764933834205978210040625334097570312780
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/38.aes_ctr_fi/latest/run.log
```
  Job ID: smart:efda4390-4d8d-4880-9910-5dc4f013309c
```
- ... and 2 more tests.
Job aes_masked-sim-xcelium_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *] has 10 failures:
- Test aes_core_fi has 1 failures.
  - 10.aes_core_fi.112417691468301943554215099254621004356713599033273169267182126055890377523623
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/10.aes_core_fi/latest/run.log
```
  Job ID: smart:460d85c1-4b3b-46a4-80f6-6e0e9fc34b3d
```
- Test aes_man_cfg_err has 1 failures.
  - 14.aes_man_cfg_err.37547643693590285729440170316129246174577851351659899136092133314697451452147
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/14.aes_man_cfg_err/latest/run.log
```
  Job ID: smart:e57cba00-a2e2-48a4-8de4-b25b886b3958
```
- Test aes_b2b has 2 failures.
  - 23.aes_b2b.35762048228468436145150020054102035862042989245587130275861936541740013086312
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/23.aes_b2b/latest/run.log
```
  Job ID: smart:de7e98a0-dec6-4b83-99c3-fe66d797dcb3
```
  - 45.aes_b2b.19969335509762136120421617720758581399859124263929617972076515368502606964713
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/45.aes_b2b/latest/run.log
```
  Job ID: smart:50e106e8-2897-4f71-9066-573ef5f96ae6
```
- Test aes_alert_reset has 1 failures.
  - 34.aes_alert_reset.29912158235709202904825400932898496281036398060731642228587397326855475902773
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/34.aes_alert_reset/latest/run.log
```
  Job ID: smart:7b579917-3d65-4219-9bbb-d40a4c551348
```
- Test aes_control_fi has 3 failures.
  - 34.aes_control_fi.92706577618918350329056150860823930462291612899413987411122403514253127156614
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/34.aes_control_fi/latest/run.log
```
  Job ID: smart:4602b502-e9ae-4406-9081-9ae74977b1bf
```
  - 45.aes_control_fi.36313175863574135111987665806077755472021736481016746601337389148624452808234
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/45.aes_control_fi/latest/run.log
```
  Job ID: smart:753794fb-2183-4009-b025-e0fa7c046db2
```
  - ... and 1 more failures.
- ... and 1 more tests.
Job aes_masked-sim-xcelium_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *] has 8 failures:
- Test aes_deinit has 1 failures.
  - 12.aes_deinit.73915278817393242790351315708198772415150804793088038789187107306520233878911
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/12.aes_deinit/latest/run.log
```
  Job ID: smart:9797d8e7-e82b-4486-829c-6b1be3710d83
```
- Test aes_clear has 1 failures.
  - 17.aes_clear.18026132773414888260707640359628411934936965266734606847498060308149307390217
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/17.aes_clear/latest/run.log
```
  Job ID: smart:19c1b86f-4a09-4627-9063-a0df4924aecf
```
- Test aes_ctr_fi has 1 failures.
  - 39.aes_ctr_fi.59003335482971039589162055834616951474565155889469878824708913993478701397350
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/39.aes_ctr_fi/latest/run.log
```
  Job ID: smart:a6d7e87d-2546-4ba4-af78-825e8f67d345
```
- Test aes_man_cfg_err has 1 failures.
  - 46.aes_man_cfg_err.13293836487787089912838937767920025443091959225787913474704631232498698943800
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/46.aes_man_cfg_err/latest/run.log
```
  Job ID: smart:0c5c0e6b-9643-40f1-a810-da7ca29e509f
```
- Test aes_control_fi has 1 failures.
  - 130.aes_control_fi.56406940008097538925988380332397052629313340179994596052499796558957490177272
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/130.aes_control_fi/latest/run.log
```
  Job ID: smart:964a15d2-ab34-4574-afe0-1813562bf5b0
```
- ... and 1 more tests.

UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues has 4 failures:

Test aes_stress_all_with_rand_reset has 4 failures.

0.aes_stress_all_with_rand_reset.89094507452539468987352883977320191420255658289901477834198974325262256826726
Line 1025, in log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/0.aes_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 594333855 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
  UVM_INFO @ 594333855 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.aes_stress_all_with_rand_reset.16259560797750205414462491799695434298186451723311136827021225768424561883055
Line 1757, in log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/1.aes_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 22654362009 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
  UVM_INFO @ 22654362009 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 2 more failures.

UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! has 4 failures:
- Test aes_cipher_fi has 4 failures.
  - 3.aes_cipher_fi.35779102238054395608096786593451339718464268019109928410036206485675832018250
    Line 327, in log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/3.aes_cipher_fi/latest/run.log
```
  UVM_FATAL @ 10058292244 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
  UVM_INFO @ 10058292244 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
  
  
```
  - 7.aes_cipher_fi.23280727968360321088006311844012956688314333413998681207467349690958355503092
    Line 334, in log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/7.aes_cipher_fi/latest/run.log
```
  UVM_FATAL @ 10004715965 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
  UVM_INFO @ 10004715965 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
  
  
```
  - ... and 2 more failures.
Job aes_masked-sim-xcelium_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *] has 4 failures:
- Test aes_core_fi has 1 failures.
  - 8.aes_core_fi.94662774644428414091762060964574780970136252699668757532296831854860047897932
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/8.aes_core_fi/latest/run.log
```
  Job ID: smart:07e90940-de2a-4e7d-aefc-ec55795bf7a8
```
- Test aes_control_fi has 2 failures.
  - 11.aes_control_fi.60485579324962701930733924862286248384067974603047196493513107300848084197625
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/11.aes_control_fi/latest/run.log
```
  Job ID: smart:9d5ef8b8-ae6b-48b8-9a1e-e847ac38fc55
```
  - 288.aes_control_fi.52839276965056915475033554014101146108056662835556202936298199059124197270071
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/288.aes_control_fi/latest/run.log
```
  Job ID: smart:e2898207-69cb-48fc-9891-6ac91b37d032
```
- Test aes_reseed has 1 failures.
  - 29.aes_reseed.83765730282724119108197539876059807056049778842922547308584908582062590352604
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/29.aes_reseed/latest/run.log
```
  Job ID: smart:55a76e8e-cb98-4d90-9007-bb86cfc87e35
```
UVM_FATAL (aes_core_fi_vseq.sv:66) [aes_core_fi_vseq] wait timeout occurred! has 4 failures:
- Test aes_core_fi has 4 failures.
  - 16.aes_core_fi.33034246967213068335332415106975674763787065341414065700171327091062890561561
    Line 327, in log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/16.aes_core_fi/latest/run.log
```
  UVM_FATAL @ 10030508682 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
  UVM_INFO @ 10030508682 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
  
  
```
  - 19.aes_core_fi.51749512422692333551762261616356470788963700629121401968324382961730778065903
    Line 323, in log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/19.aes_core_fi/latest/run.log
```
  UVM_FATAL @ 10004074507 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
  UVM_INFO @ 10004074507 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
  
  
```
  - ... and 2 more failures.

Exit reason: Error: User command failed UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues has 3 failures:

Test aes_stress_all_with_rand_reset has 3 failures.

3.aes_stress_all_with_rand_reset.39239559042978512745086668853270755690228367953923560795346585735240918899268
Line 744, in log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/3.aes_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 1018916427 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
  UVM_INFO @ 1018916427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

5.aes_stress_all_with_rand_reset.51984144678221878877586698324372283106603717844846297970607287468645360289474
Line 807, in log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/5.aes_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 611225545 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
  UVM_INFO @ 611225545 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 1 more failures.

UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! has 2 failures:
- Test aes_control_fi has 2 failures.
  - 18.aes_control_fi.93241030301077629457381374276879578111006630371661311174727699422732025529265
    Line 319, in log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/18.aes_control_fi/latest/run.log
```
  UVM_FATAL @ 10008967326 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
  UVM_INFO @ 10008967326 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
  
  
```
  - 268.aes_control_fi.46486513795194056464663452255316899721414985718134985627515383886584402343121
    Line 318, in log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/268.aes_control_fi/latest/run.log
```
  UVM_FATAL @ 10006467943 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
  UVM_INFO @ 10006467943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
Job aes_masked-sim-xcelium_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *] has 2 failures:
- Test aes_reseed has 1 failures.
  - 41.aes_reseed.73299468444438951918945552458280249103685574152757795418993023770141963566601
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/41.aes_reseed/latest/run.log
```
  Job ID: smart:4fa24db0-d5c4-4036-bdce-f3e24b02a68b
```
- Test aes_control_fi has 1 failures.
  - 132.aes_control_fi.54543972330364025458578262410280965584564533851886922549178693395081892766798
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/132.aes_control_fi/latest/run.log
```
  Job ID: smart:e0964b0e-e832-4814-9d0a-01e289609b63
```
Exit reason: Error: User command failed UVM_FATAL (aes_reseed_vseq.sv:40) [aes_reseed_vseq] Check failed request_seen | finished_all_msgs == *'b* (* [*] vs * [*]) has 1 failures:
- Test aes_stress_all_with_rand_reset has 1 failures.
  - 2.aes_stress_all_with_rand_reset.101883211974258731590698224651797404754732217823075404841174474006850464006124
    Line 331, in log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/2.aes_stress_all_with_rand_reset/latest/run.log
```
  UVM_FATAL @ 388340354 ps: (aes_reseed_vseq.sv:40) [uvm_test_top.env.virtual_sequencer.aes_reseed_vseq] Check failed request_seen | finished_all_msgs == 1'b1 (0 [0x0] vs 1 [0x1])
  UVM_INFO @ 388340354 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (aes_base_vseq.sv:724) virtual_sequencer [aes_alert_reset_vseq] has 1 failures:
- Test aes_stress_all_with_rand_reset has 1 failures.
  - 4.aes_stress_all_with_rand_reset.1812661233788797834643702992773049911482296203796890116488142230347824793653
    Line 373, in log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/4.aes_stress_all_with_rand_reset/latest/run.log
```
  UVM_FATAL @  74446970 ps: (aes_base_vseq.sv:724) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq]
       Was able to clear FATAL ALERT without reset
  
       ---| Idle:          0
       ---| Stall:         0
```
Job aes_masked-sim-xcelium_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *] has 1 failures:
- Test aes_alert_test has 1 failures.
  - 7.aes_alert_test.46420322531681898750403715580020709054383329207892837584754172261413579956611
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/7.aes_alert_test/latest/run.log
```
  Job ID: smart:47368d01-7427-4142-83b5-6b8d456ae231
```
UVM_FATAL (aes_reseed_vseq.sv:40) [aes_reseed_vseq] Check failed request_seen | finished_all_msgs == *'b* (* [*] vs * [*]) has 1 failures:
- Test aes_stress_all_with_rand_reset has 1 failures.
  - 9.aes_stress_all_with_rand_reset.92280430822795793478447732387848864912043079369221478974159290360793173377110
    Line 336, in log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/9.aes_stress_all_with_rand_reset/latest/run.log
```
  UVM_FATAL @ 438186154 ps: (aes_reseed_vseq.sv:40) [uvm_test_top.env.virtual_sequencer.aes_reseed_vseq] Check failed request_seen | finished_all_msgs == 1'b1 (0 [0x0] vs 1 [0x1])
  UVM_INFO @ 438186154 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
Job aes_masked-sim-xcelium_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *] has 1 failures:
- Test aes_deinit has 1 failures.
  - 35.aes_deinit.89604624904556594759318934504885456264022816165414115110312493532608718116771
    Log /container/opentitan-public/scratch/os_regression/aes_masked-sim-xcelium/35.aes_deinit/latest/run.log
```
  Job ID: smart:409397d3-0e0d-4fa2-9547-73bbc662a6a7
```