17d5a97c3b
Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
---|---|---|---|---|---|---|---|
V1 | wake_up | aes_wake_up | 3.000s | 63.608us | 1 | 1 | 100.00 |
V1 | smoke | aes_smoke | 9.000s | 56.082us | 50 | 50 | 100.00 |
V1 | csr_hw_reset | aes_csr_hw_reset | 4.000s | 68.550us | 5 | 5 | 100.00 |
V1 | csr_rw | aes_csr_rw | 9.000s | 283.740us | 20 | 20 | 100.00 |
V1 | csr_bit_bash | aes_csr_bit_bash | 9.000s | 329.995us | 5 | 5 | 100.00 |
V1 | csr_aliasing | aes_csr_aliasing | 9.000s | 243.195us | 5 | 5 | 100.00 |
V1 | csr_mem_rw_with_rand_reset | aes_csr_mem_rw_with_rand_reset | 6.000s | 63.301us | 20 | 20 | 100.00 |
V1 | regwen_csr_and_corresponding_lockable_csr | aes_csr_rw | 9.000s | 283.740us | 20 | 20 | 100.00 |
aes_csr_aliasing | 9.000s | 243.195us | 5 | 5 | 100.00 | ||
V1 | TOTAL | 106 | 106 | 100.00 | |||
V2 | algorithm | aes_smoke | 9.000s | 56.082us | 50 | 50 | 100.00 |
aes_config_error | 9.000s | 117.986us | 50 | 50 | 100.00 | ||
aes_stress | 8.000s | 66.438us | 47 | 50 | 94.00 | ||
V2 | key_length | aes_smoke | 9.000s | 56.082us | 50 | 50 | 100.00 |
aes_config_error | 9.000s | 117.986us | 50 | 50 | 100.00 | ||
aes_stress | 8.000s | 66.438us | 47 | 50 | 94.00 | ||
V2 | back2back | aes_stress | 8.000s | 66.438us | 47 | 50 | 94.00 |
aes_b2b | 11.000s | 176.038us | 50 | 50 | 100.00 | ||
V2 | backpressure | aes_stress | 8.000s | 66.438us | 47 | 50 | 94.00 |
V2 | multi_message | aes_smoke | 9.000s | 56.082us | 50 | 50 | 100.00 |
aes_config_error | 9.000s | 117.986us | 50 | 50 | 100.00 | ||
aes_stress | 8.000s | 66.438us | 47 | 50 | 94.00 | ||
aes_alert_reset | 10.000s | 77.382us | 49 | 50 | 98.00 | ||
V2 | failure_test | aes_man_cfg_err | 8.000s | 91.043us | 50 | 50 | 100.00 |
aes_config_error | 9.000s | 117.986us | 50 | 50 | 100.00 | ||
aes_alert_reset | 10.000s | 77.382us | 49 | 50 | 98.00 | ||
V2 | trigger_clear_test | aes_clear | 12.000s | 243.514us | 48 | 50 | 96.00 |
V2 | nist_test_vectors | aes_nist_vectors | 6.000s | 200.667us | 1 | 1 | 100.00 |
V2 | reset_recovery | aes_alert_reset | 10.000s | 77.382us | 49 | 50 | 98.00 |
V2 | stress | aes_stress | 8.000s | 66.438us | 47 | 50 | 94.00 |
V2 | sideload | aes_stress | 8.000s | 66.438us | 47 | 50 | 94.00 |
aes_sideload | 10.000s | 62.300us | 50 | 50 | 100.00 | ||
V2 | deinitialization | aes_deinit | 10.000s | 374.637us | 49 | 50 | 98.00 |
V2 | stress_all | aes_stress_all | 34.000s | 2.154ms | 10 | 10 | 100.00 |
V2 | alert_test | aes_alert_test | 8.000s | 96.881us | 49 | 50 | 98.00 |
V2 | tl_d_oob_addr_access | aes_tl_errors | 11.000s | 435.631us | 20 | 20 | 100.00 |
V2 | tl_d_illegal_access | aes_tl_errors | 11.000s | 435.631us | 20 | 20 | 100.00 |
V2 | tl_d_outstanding_access | aes_csr_hw_reset | 4.000s | 68.550us | 5 | 5 | 100.00 |
aes_csr_rw | 9.000s | 283.740us | 20 | 20 | 100.00 | ||
aes_csr_aliasing | 9.000s | 243.195us | 5 | 5 | 100.00 | ||
aes_same_csr_outstanding | 9.000s | 150.956us | 20 | 20 | 100.00 | ||
V2 | tl_d_partial_access | aes_csr_hw_reset | 4.000s | 68.550us | 5 | 5 | 100.00 |
aes_csr_rw | 9.000s | 283.740us | 20 | 20 | 100.00 | ||
aes_csr_aliasing | 9.000s | 243.195us | 5 | 5 | 100.00 | ||
aes_same_csr_outstanding | 9.000s | 150.956us | 20 | 20 | 100.00 | ||
V2 | TOTAL | 493 | 501 | 98.40 | |||
V2S | reseeding | aes_reseed | 10.000s | 122.096us | 49 | 50 | 98.00 |
V2S | fault_inject | aes_fi | 10.000s | 101.479us | 48 | 50 | 96.00 |
aes_control_fi | 47.000s | 10.002ms | 273 | 300 | 91.00 | ||
aes_cipher_fi | 51.000s | 26.729ms | 319 | 350 | 91.14 | ||
V2S | shadow_reg_update_error | aes_shadow_reg_errors | 10.000s | 57.050us | 20 | 20 | 100.00 |
V2S | shadow_reg_read_clear_staged_value | aes_shadow_reg_errors | 10.000s | 57.050us | 20 | 20 | 100.00 |
V2S | shadow_reg_storage_error | aes_shadow_reg_errors | 10.000s | 57.050us | 20 | 20 | 100.00 |
V2S | shadowed_reset_glitch | aes_shadow_reg_errors | 10.000s | 57.050us | 20 | 20 | 100.00 |
V2S | shadow_reg_update_error_with_csr_rw | aes_shadow_reg_errors_with_csr_rw | 8.000s | 79.655us | 20 | 20 | 100.00 |
V2S | tl_intg_err | aes_sec_cm | 7.000s | 848.864us | 5 | 5 | 100.00 |
aes_tl_intg_err | 11.000s | 603.335us | 20 | 20 | 100.00 | ||
V2S | sec_cm_bus_integrity | aes_tl_intg_err | 11.000s | 603.335us | 20 | 20 | 100.00 |
V2S | sec_cm_lc_escalate_en_intersig_mubi | aes_alert_reset | 10.000s | 77.382us | 49 | 50 | 98.00 |
V2S | sec_cm_main_config_shadow | aes_shadow_reg_errors | 10.000s | 57.050us | 20 | 20 | 100.00 |
V2S | sec_cm_main_config_sparse | aes_smoke | 9.000s | 56.082us | 50 | 50 | 100.00 |
aes_stress | 8.000s | 66.438us | 47 | 50 | 94.00 | ||
aes_alert_reset | 10.000s | 77.382us | 49 | 50 | 98.00 | ||
aes_core_fi | 40.000s | 10.009ms | 65 | 70 | 92.86 | ||
V2S | sec_cm_aux_config_shadow | aes_shadow_reg_errors | 10.000s | 57.050us | 20 | 20 | 100.00 |
V2S | sec_cm_aux_config_regwen | aes_readability | 10.000s | 62.075us | 48 | 50 | 96.00 |
aes_stress | 8.000s | 66.438us | 47 | 50 | 94.00 | ||
V2S | sec_cm_key_sideload | aes_stress | 8.000s | 66.438us | 47 | 50 | 94.00 |
aes_sideload | 10.000s | 62.300us | 50 | 50 | 100.00 | ||
V2S | sec_cm_key_sw_unreadable | aes_readability | 10.000s | 62.075us | 48 | 50 | 96.00 |
V2S | sec_cm_data_reg_sw_unreadable | aes_readability | 10.000s | 62.075us | 48 | 50 | 96.00 |
V2S | sec_cm_key_sec_wipe | aes_readability | 10.000s | 62.075us | 48 | 50 | 96.00 |
V2S | sec_cm_iv_config_sec_wipe | aes_readability | 10.000s | 62.075us | 48 | 50 | 96.00 |
V2S | sec_cm_data_reg_sec_wipe | aes_readability | 10.000s | 62.075us | 48 | 50 | 96.00 |
V2S | sec_cm_data_reg_key_sca | aes_stress | 8.000s | 66.438us | 47 | 50 | 94.00 |
V2S | sec_cm_key_masking | aes_stress | 8.000s | 66.438us | 47 | 50 | 94.00 |
V2S | sec_cm_main_fsm_sparse | aes_fi | 10.000s | 101.479us | 48 | 50 | 96.00 |
V2S | sec_cm_main_fsm_redun | aes_fi | 10.000s | 101.479us | 48 | 50 | 96.00 |
aes_control_fi | 47.000s | 10.002ms | 273 | 300 | 91.00 | ||
aes_cipher_fi | 51.000s | 26.729ms | 319 | 350 | 91.14 | ||
aes_ctr_fi | 15.000s | 10.009ms | 49 | 50 | 98.00 | ||
V2S | sec_cm_cipher_fsm_sparse | aes_fi | 10.000s | 101.479us | 48 | 50 | 96.00 |
V2S | sec_cm_cipher_fsm_redun | aes_fi | 10.000s | 101.479us | 48 | 50 | 96.00 |
aes_control_fi | 47.000s | 10.002ms | 273 | 300 | 91.00 | ||
aes_cipher_fi | 51.000s | 26.729ms | 319 | 350 | 91.14 | ||
V2S | sec_cm_cipher_ctr_redun | aes_cipher_fi | 51.000s | 26.729ms | 319 | 350 | 91.14 |
V2S | sec_cm_ctr_fsm_sparse | aes_fi | 10.000s | 101.479us | 48 | 50 | 96.00 |
V2S | sec_cm_ctr_fsm_redun | aes_fi | 10.000s | 101.479us | 48 | 50 | 96.00 |
aes_control_fi | 47.000s | 10.002ms | 273 | 300 | 91.00 | ||
aes_ctr_fi | 15.000s | 10.009ms | 49 | 50 | 98.00 | ||
V2S | sec_cm_ctrl_sparse | aes_fi | 10.000s | 101.479us | 48 | 50 | 96.00 |
aes_control_fi | 47.000s | 10.002ms | 273 | 300 | 91.00 | ||
aes_cipher_fi | 51.000s | 26.729ms | 319 | 350 | 91.14 | ||
aes_ctr_fi | 15.000s | 10.009ms | 49 | 50 | 98.00 | ||
V2S | sec_cm_main_fsm_global_esc | aes_alert_reset | 10.000s | 77.382us | 49 | 50 | 98.00 |
V2S | sec_cm_main_fsm_local_esc | aes_fi | 10.000s | 101.479us | 48 | 50 | 96.00 |
aes_control_fi | 47.000s | 10.002ms | 273 | 300 | 91.00 | ||
aes_cipher_fi | 51.000s | 26.729ms | 319 | 350 | 91.14 | ||
aes_ctr_fi | 15.000s | 10.009ms | 49 | 50 | 98.00 | ||
V2S | sec_cm_cipher_fsm_local_esc | aes_fi | 10.000s | 101.479us | 48 | 50 | 96.00 |
aes_control_fi | 47.000s | 10.002ms | 273 | 300 | 91.00 | ||
aes_cipher_fi | 51.000s | 26.729ms | 319 | 350 | 91.14 | ||
aes_ctr_fi | 15.000s | 10.009ms | 49 | 50 | 98.00 | ||
V2S | sec_cm_ctr_fsm_local_esc | aes_fi | 10.000s | 101.479us | 48 | 50 | 96.00 |
aes_control_fi | 47.000s | 10.002ms | 273 | 300 | 91.00 | ||
aes_ctr_fi | 15.000s | 10.009ms | 49 | 50 | 98.00 | ||
V2S | sec_cm_data_reg_local_esc | aes_fi | 10.000s | 101.479us | 48 | 50 | 96.00 |
aes_control_fi | 47.000s | 10.002ms | 273 | 300 | 91.00 | ||
aes_cipher_fi | 51.000s | 26.729ms | 319 | 350 | 91.14 | ||
V2S | TOTAL | 916 | 985 | 92.99 | |||
V3 | stress_all_with_rand_reset | aes_stress_all_with_rand_reset | 17.617m | 197.248ms | 0 | 10 | 0.00 |
V3 | TOTAL | 0 | 10 | 0.00 | |||
TOTAL | 1515 | 1602 | 94.57 |
Items | Total | Written | Passing | Progress |
---|---|---|---|---|
V1 | 7 | 7 | 7 | 100.00 |
V2 | 13 | 13 | 8 | 61.54 |
V2S | 11 | 11 | 4 | 36.36 |
V3 | 1 | 1 | 0 | 0.00 |
Score | Block | Branch | Statement | Expression | Toggle | Fsm | Assertion | CoverGroup |
---|---|---|---|---|---|---|---|---|
97.21 | 97.49 | 94.31 | 98.83 | 93.59 | 97.72 | 91.11 | 98.85 | 97.36 |
Job aes_unmasked-sim-xcelium_run_default killed due to: Exit reason: User job exceeded runlimit: User job timed out
has 33 failures:
23.aes_control_fi.12148241020820472843762561703350979875629081310828041732693044093266467895725
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/23.aes_control_fi/latest/run.log
Job ID: smart:88007cce-1ae8-40e6-b218-8a177c1e4285
72.aes_control_fi.6052998078075249904384950151455871263235786251404627530226478520218773229269
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/72.aes_control_fi/latest/run.log
Job ID: smart:5ff14eb6-df90-44be-9a63-13003e6e9ed4
... and 12 more failures.
55.aes_cipher_fi.23319833355363353025957523306378930457499816962399003822199055913781432710289
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/55.aes_cipher_fi/latest/run.log
Job ID: smart:817f3256-1a2c-454b-9896-f79fe5fcefca
71.aes_cipher_fi.29357160431626934450621244128206691799504773668824092851610259096250892375063
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/71.aes_cipher_fi/latest/run.log
Job ID: smart:affdfa2c-e04f-41f6-8c90-082a2d3d4aba
... and 17 more failures.
Job aes_unmasked-sim-xcelium_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *]
has 10 failures:
Test aes_alert_reset has 1 failures.
21.aes_alert_reset.49497240805429222767186065375513278000195938064058065302890911042450389561310
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/21.aes_alert_reset/latest/run.log
Job ID: smart:d283bdb2-3eda-42e4-8e42-2a82a20e99c0
Test aes_stress has 1 failures.
28.aes_stress.73507354450581033034599406907291729494879844539788908769702169797985713255627
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/28.aes_stress/latest/run.log
Job ID: smart:9bcff9d7-6ace-48e4-88e6-331d45daf853
Test aes_reseed has 1 failures.
40.aes_reseed.60095479842870674768594050016198113551213597330871251939051394871191374426437
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/40.aes_reseed/latest/run.log
Job ID: smart:a147d738-a81e-42f6-9e8b-bbaee360b6bb
Test aes_core_fi has 1 failures.
43.aes_core_fi.14732745598467892631407293470368502130326778657187899231925510830406162569538
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/43.aes_core_fi/latest/run.log
Job ID: smart:2a05f618-2467-4759-854c-017ade31ddbc
Test aes_control_fi has 4 failures.
153.aes_control_fi.51697472172319362372386013364708409554966267878207678428489370139269993831134
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/153.aes_control_fi/latest/run.log
Job ID: smart:1fd1387d-d4d2-4078-9ccc-ce862e77f1ae
177.aes_control_fi.40532012232226834557490393459505080972255976347724796871156790580160868807289
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/177.aes_control_fi/latest/run.log
Job ID: smart:e51f33d1-25a7-446e-a749-00075019181e
... and 2 more failures.
... and 1 more tests.
Job aes_unmasked-sim-xcelium_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *]
has 10 failures:
Test aes_fi has 1 failures.
23.aes_fi.7428701040232429005057585982352756489594034687081567696460165888617463986584
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/23.aes_fi/latest/run.log
Job ID: smart:bd8058cd-500c-41ec-b9ed-1855d21a0c0e
Test aes_cipher_fi has 3 failures.
24.aes_cipher_fi.112783215722326444498000512995122364710087908166313481080128817302085328899182
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/24.aes_cipher_fi/latest/run.log
Job ID: smart:e49becf5-edf7-4762-bcdb-c76cf4d7579a
225.aes_cipher_fi.92534040411075289648282514423014502117205436064492701872348770475780866799426
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/225.aes_cipher_fi/latest/run.log
Job ID: smart:3089ad8e-7af7-43cd-986e-0f90fe0628b6
... and 1 more failures.
Test aes_alert_test has 1 failures.
25.aes_alert_test.54067829359644586678972270730526847874544510401652633386476040892839598091949
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/25.aes_alert_test/latest/run.log
Job ID: smart:263471bf-9c5c-4f0c-84ba-546656d63bca
Test aes_readability has 2 failures.
27.aes_readability.54735302928027606348033809764425820532928046202700456131772519916349850257112
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/27.aes_readability/latest/run.log
Job ID: smart:e8104057-ff0d-4598-aacf-cdfcbf5d688c
28.aes_readability.105338448130862232958872482141693609906561505596449619693663761834503727101342
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/28.aes_readability/latest/run.log
Job ID: smart:516ef724-d185-41ed-bab8-8c31962fb071
Test aes_clear has 1 failures.
38.aes_clear.23686731932226182321128962094270699262088603492762588102329801809262528363532
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/38.aes_clear/latest/run.log
Job ID: smart:60d8e17b-9526-4bee-8fbd-1602c6483ae7
... and 1 more tests.
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
has 5 failures:
0.aes_stress_all_with_rand_reset.71743906504443186972545097516802458886377597754378673944709272015296386372326
Line 670, in log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 1030775074 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 1030775074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
2.aes_stress_all_with_rand_reset.56430704448598705517658140871577322475259440953754378609934609907145866921515
Line 1887, in log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/2.aes_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 10894705984 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 10894705984 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 3 more failures.
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred!
has 5 failures:
14.aes_control_fi.40671197486431206779703249106765626415585196336672823911069034080121861643537
Line 320, in log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/14.aes_control_fi/latest/run.log
UVM_FATAL @ 10002455950 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10002455950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
76.aes_control_fi.3731795136620347533961724472110328516148486261899649977320414592136289239011
Line 314, in log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/76.aes_control_fi/latest/run.log
UVM_FATAL @ 10006214355 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006214355 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 3 more failures.
Job aes_unmasked-sim-xcelium_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *]
has 5 failures:
Test aes_clear has 1 failures.
15.aes_clear.75470617404436119246990636365826409078616558811821908723575481978789007970779
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/15.aes_clear/latest/run.log
Job ID: smart:7c2a7010-f0c1-4a1c-a760-cf02ff14c0c9
Test aes_cipher_fi has 2 failures.
22.aes_cipher_fi.108654465068106656495217805666255805589330848992261019456308339118097342314811
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/22.aes_cipher_fi/latest/run.log
Job ID: smart:471bbe0a-ffe8-447f-be5f-2852847a7193
224.aes_cipher_fi.68720464088625067429657907208592702362977711410655893806863809740643435782208
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/224.aes_cipher_fi/latest/run.log
Job ID: smart:97919b9c-e1a4-43c8-bbdd-145f4d68c994
Test aes_deinit has 1 failures.
23.aes_deinit.68056731474969160992510458824029749738659474932719516628130508888811230094913
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/23.aes_deinit/latest/run.log
Job ID: smart:4b86c7b0-3aae-4b98-8d35-14d2d8c6d6ce
Test aes_control_fi has 1 failures.
186.aes_control_fi.14300575315595964230834894164370586933112350503638432315176184395328028377510
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/186.aes_control_fi/latest/run.log
Job ID: smart:2426b498-d2cb-4774-9a9c-97c7efd6e968
Exit reason: Error: User command failed UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
has 4 failures:
3.aes_stress_all_with_rand_reset.113067409197673788657041478742576939265029932250684893736487192203218797969154
Line 1319, in log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/3.aes_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 1166583711 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 1166583711 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
4.aes_stress_all_with_rand_reset.15991622006792554444298605045641464890181141292458159552683275094834658735534
Line 1556, in log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/4.aes_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 197248261900 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 197248261900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
UVM_FATAL (aes_core_fi_vseq.sv:66) [aes_core_fi_vseq] wait timeout occurred!
has 4 failures:
7.aes_core_fi.62282206727356075442025491959253582930863098374382040964750126179023995886317
Line 319, in log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/7.aes_core_fi/latest/run.log
UVM_FATAL @ 10005269709 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005269709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
51.aes_core_fi.11919889522090620286538154460469531534883191273076653683179364360153815843291
Line 323, in log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/51.aes_core_fi/latest/run.log
UVM_FATAL @ 10007336840 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10007336840 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred!
has 4 failures:
60.aes_cipher_fi.65717677287984419916334752548690275530747484989641314871053080370844690970722
Line 313, in log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/60.aes_cipher_fi/latest/run.log
UVM_FATAL @ 10005519411 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005519411 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
181.aes_cipher_fi.37497524658783847076171988182751301956168615786603126250492287003371311493121
Line 315, in log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/181.aes_cipher_fi/latest/run.log
UVM_FATAL @ 10028099647 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10028099647 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
Job aes_unmasked-sim-xcelium_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *]
has 2 failures:
Test aes_fi has 1 failures.
20.aes_fi.27737774216759727515431527641219524051236585484748916065867792190958865415955
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/20.aes_fi/latest/run.log
Job ID: smart:016b8545-adb9-4d47-9d11-e0caebafa583
Test aes_stress has 1 failures.
36.aes_stress.90203055177750180495477049370300328509549991694716044016561618651056130472626
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/36.aes_stress/latest/run.log
Job ID: smart:7c2661e6-7359-4a52-a79c-463ac5aa64d5
UVM_FATAL (aes_reseed_vseq.sv:28) [aes_reseed_vseq] Check failed request_seen == *'b* (* [*] vs * [*])
has 1 failures:
1.aes_stress_all_with_rand_reset.65208752193189563867934899101152493679936777754765626531095092422925861858051
Line 426, in log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 1168091937 ps: (aes_reseed_vseq.sv:28) [uvm_test_top.env.virtual_sequencer.aes_reseed_vseq] Check failed request_seen == 1'b1 (0 [0x0] vs 1 [0x1])
UVM_INFO @ 1168091937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job aes_unmasked-sim-xcelium_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *]
has 1 failures:
19.aes_stress.33148759861101049483418280719614424659834377306176095530236554028073144186934
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/19.aes_stress/latest/run.log
Job ID: smart:c7538742-64d8-46c0-8b22-dfc3b5506688
UVM_FATAL (aes_ctr_fi_vseq.sv:59) [aes_ctr_fi_vseq] wait timeout occurred!
has 1 failures:
40.aes_ctr_fi.58801429554525823620055587655161001576825380795191665134994489814804830231595
Line 312, in log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/40.aes_ctr_fi/latest/run.log
UVM_FATAL @ 10009284251 ps: (aes_ctr_fi_vseq.sv:59) [uvm_test_top.env.virtual_sequencer.aes_ctr_fi_vseq] wait timeout occurred!
UVM_INFO @ 10009284251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job aes_unmasked-sim-xcelium_run_default killed due to: Exit reason: Error: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *]
has 1 failures:
254.aes_control_fi.33048719462738444747280527859266942309234087478942789294571046414880023739414
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/254.aes_control_fi/latest/run.log
Job ID: smart:d80383f6-ade4-4b2c-bc28-e796c874a3f0
Job aes_unmasked-sim-xcelium_run_default killed due to: Exit reason: Job lost from admin server: generic::not_found: generic::not_found: job is not found
has 1 failures:
272.aes_cipher_fi.56923144567261107859249610108466545130678997039822326785941240620736543622285
Log /container/opentitan-public/scratch/os_regression/aes_unmasked-sim-xcelium/272.aes_cipher_fi/latest/run.log
Job ID: smart:76e3dc06-835b-42e4-a8d2-b98425563099