AES/UNMASKED Simulation Results

Saturday February 08 2025 05:05:54 UTC

GitHub Revision: `9f20940d49`

Branch: os_regression

Simulator: XCELIUM

Build randomization enabled with --build-seed 88344288495849993302635329522992994622996067932062874150778031027723701018040

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	wake_up	aes_wake_up	3.000s	227.109us	1	1	100.00
V1	smoke	aes_smoke	5.000s	93.213us	50	50	100.00
V1	csr_hw_reset	aes_csr_hw_reset	16.000s	52.893us	5	5	100.00
V1	csr_rw	aes_csr_rw	25.000s	67.915us	20	20	100.00
V1	csr_bit_bash	aes_csr_bit_bash	21.000s	183.426us	5	5	100.00
V1	csr_aliasing	aes_csr_aliasing	18.000s	135.191us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aes_csr_mem_rw_with_rand_reset	23.000s	171.192us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aes_csr_rw	25.000s	67.915us	20	20	100.00
		aes_csr_aliasing	18.000s	135.191us	5	5	100.00
V1		TOTAL			106	106	100.00
V2	algorithm	aes_smoke	5.000s	93.213us	50	50	100.00
		aes_config_error	13.000s	428.013us	50	50	100.00
		aes_stress	6.000s	119.883us	50	50	100.00
V2	key_length	aes_smoke	5.000s	93.213us	50	50	100.00
		aes_config_error	13.000s	428.013us	50	50	100.00
		aes_stress	6.000s	119.883us	50	50	100.00
V2	back2back	aes_stress	6.000s	119.883us	50	50	100.00
		aes_b2b	10.000s	135.974us	50	50	100.00
V2	backpressure	aes_stress	6.000s	119.883us	50	50	100.00
V2	multi_message	aes_smoke	5.000s	93.213us	50	50	100.00
		aes_config_error	13.000s	428.013us	50	50	100.00
		aes_stress	6.000s	119.883us	50	50	100.00
		aes_alert_reset	5.000s	85.415us	50	50	100.00
V2	failure_test	aes_man_cfg_err	6.000s	243.625us	50	50	100.00
		aes_config_error	13.000s	428.013us	50	50	100.00
		aes_alert_reset	5.000s	85.415us	50	50	100.00
V2	trigger_clear_test	aes_clear	6.000s	151.245us	49	50	98.00
V2	nist_test_vectors	aes_nist_vectors	7.000s	122.657us	1	1	100.00
V2	reset_recovery	aes_alert_reset	5.000s	85.415us	50	50	100.00
V2	stress	aes_stress	6.000s	119.883us	50	50	100.00
V2	sideload	aes_stress	6.000s	119.883us	50	50	100.00
		aes_sideload	5.000s	348.079us	50	50	100.00
V2	deinitialization	aes_deinit	6.000s	350.429us	50	50	100.00
V2	stress_all	aes_stress_all	34.000s	571.328us	10	10	100.00
V2	alert_test	aes_alert_test	4.000s	69.839us	50	50	100.00
V2	tl_d_oob_addr_access	aes_tl_errors	23.000s	106.433us	20	20	100.00
V2	tl_d_illegal_access	aes_tl_errors	23.000s	106.433us	20	20	100.00
V2	tl_d_outstanding_access	aes_csr_hw_reset	16.000s	52.893us	5	5	100.00
		aes_csr_rw	25.000s	67.915us	20	20	100.00
		aes_csr_aliasing	18.000s	135.191us	5	5	100.00
		aes_same_csr_outstanding	23.000s	68.015us	20	20	100.00
V2	tl_d_partial_access	aes_csr_hw_reset	16.000s	52.893us	5	5	100.00
		aes_csr_rw	25.000s	67.915us	20	20	100.00
		aes_csr_aliasing	18.000s	135.191us	5	5	100.00
		aes_same_csr_outstanding	23.000s	68.015us	20	20	100.00
V2		TOTAL			500	501	99.80
V2S	reseeding	aes_reseed	6.000s	898.186us	50	50	100.00
V2S	fault_inject	aes_fi	5.000s	105.323us	50	50	100.00
		aes_control_fi	46.000s	10.025ms	286	300	95.33
		aes_cipher_fi	41.000s	10.005ms	314	350	89.71
V2S	shadow_reg_update_error	aes_shadow_reg_errors	22.000s	99.651us	20	20	100.00
V2S	shadow_reg_read_clear_staged_value	aes_shadow_reg_errors	22.000s	99.651us	20	20	100.00
V2S	shadow_reg_storage_error	aes_shadow_reg_errors	22.000s	99.651us	20	20	100.00
V2S	shadowed_reset_glitch	aes_shadow_reg_errors	22.000s	99.651us	20	20	100.00
V2S	shadow_reg_update_error_with_csr_rw	aes_shadow_reg_errors_with_csr_rw	19.000s	227.623us	20	20	100.00
V2S	tl_intg_err	aes_sec_cm	22.000s	2.745ms	5	5	100.00
		aes_tl_intg_err	23.000s	187.914us	20	20	100.00
V2S	sec_cm_bus_integrity	aes_tl_intg_err	23.000s	187.914us	20	20	100.00
V2S	sec_cm_lc_escalate_en_intersig_mubi	aes_alert_reset	5.000s	85.415us	50	50	100.00
V2S	sec_cm_main_config_shadow	aes_shadow_reg_errors	22.000s	99.651us	20	20	100.00
V2S	sec_cm_main_config_sparse	aes_smoke	5.000s	93.213us	50	50	100.00
		aes_stress	6.000s	119.883us	50	50	100.00
		aes_alert_reset	5.000s	85.415us	50	50	100.00
		aes_core_fi	3.667m	10.020ms	66	70	94.29
V2S	sec_cm_aux_config_shadow	aes_shadow_reg_errors	22.000s	99.651us	20	20	100.00
V2S	sec_cm_aux_config_regwen	aes_readability	5.000s	65.035us	50	50	100.00
		aes_stress	6.000s	119.883us	50	50	100.00
V2S	sec_cm_key_sideload	aes_stress	6.000s	119.883us	50	50	100.00
		aes_sideload	5.000s	348.079us	50	50	100.00
V2S	sec_cm_key_sw_unreadable	aes_readability	5.000s	65.035us	50	50	100.00
V2S	sec_cm_data_reg_sw_unreadable	aes_readability	5.000s	65.035us	50	50	100.00
V2S	sec_cm_key_sec_wipe	aes_readability	5.000s	65.035us	50	50	100.00
V2S	sec_cm_iv_config_sec_wipe	aes_readability	5.000s	65.035us	50	50	100.00
V2S	sec_cm_data_reg_sec_wipe	aes_readability	5.000s	65.035us	50	50	100.00
V2S	sec_cm_data_reg_key_sca	aes_stress	6.000s	119.883us	50	50	100.00
V2S	sec_cm_key_masking	aes_stress	6.000s	119.883us	50	50	100.00
V2S	sec_cm_main_fsm_sparse	aes_fi	5.000s	105.323us	50	50	100.00
V2S	sec_cm_main_fsm_redun	aes_fi	5.000s	105.323us	50	50	100.00
		aes_control_fi	46.000s	10.025ms	286	300	95.33
		aes_cipher_fi	41.000s	10.005ms	314	350	89.71
		aes_ctr_fi	4.000s	72.560us	49	50	98.00
V2S	sec_cm_cipher_fsm_sparse	aes_fi	5.000s	105.323us	50	50	100.00
V2S	sec_cm_cipher_fsm_redun	aes_fi	5.000s	105.323us	50	50	100.00
		aes_control_fi	46.000s	10.025ms	286	300	95.33
		aes_cipher_fi	41.000s	10.005ms	314	350	89.71
V2S	sec_cm_cipher_ctr_redun	aes_cipher_fi	41.000s	10.005ms	314	350	89.71
V2S	sec_cm_ctr_fsm_sparse	aes_fi	5.000s	105.323us	50	50	100.00
V2S	sec_cm_ctr_fsm_redun	aes_fi	5.000s	105.323us	50	50	100.00
		aes_control_fi	46.000s	10.025ms	286	300	95.33
		aes_ctr_fi	4.000s	72.560us	49	50	98.00
V2S	sec_cm_ctrl_sparse	aes_fi	5.000s	105.323us	50	50	100.00
		aes_control_fi	46.000s	10.025ms	286	300	95.33
		aes_cipher_fi	41.000s	10.005ms	314	350	89.71
		aes_ctr_fi	4.000s	72.560us	49	50	98.00
V2S	sec_cm_main_fsm_global_esc	aes_alert_reset	5.000s	85.415us	50	50	100.00
V2S	sec_cm_main_fsm_local_esc	aes_fi	5.000s	105.323us	50	50	100.00
		aes_control_fi	46.000s	10.025ms	286	300	95.33
		aes_cipher_fi	41.000s	10.005ms	314	350	89.71
		aes_ctr_fi	4.000s	72.560us	49	50	98.00
V2S	sec_cm_cipher_fsm_local_esc	aes_fi	5.000s	105.323us	50	50	100.00
		aes_control_fi	46.000s	10.025ms	286	300	95.33
		aes_cipher_fi	41.000s	10.005ms	314	350	89.71
		aes_ctr_fi	4.000s	72.560us	49	50	98.00
V2S	sec_cm_ctr_fsm_local_esc	aes_fi	5.000s	105.323us	50	50	100.00
		aes_control_fi	46.000s	10.025ms	286	300	95.33
		aes_ctr_fi	4.000s	72.560us	49	50	98.00
V2S	sec_cm_data_reg_local_esc	aes_fi	5.000s	105.323us	50	50	100.00
		aes_control_fi	46.000s	10.025ms	286	300	95.33
		aes_cipher_fi	41.000s	10.005ms	314	350	89.71
V2S		TOTAL			930	985	94.42
V3	stress_all_with_rand_reset	aes_stress_all_with_rand_reset	4.767m	124.732ms	0	10	0.00
V3		TOTAL			0	10	0.00
		TOTAL			1536	1602	95.88

Testplan Progress

Items	Total	Written	Passing	Progress
V1	7	7	7	100.00
V2	13	13	12	92.31
V2S	11	11	7	63.64
V3	1	1	0	0.00

Coverage Results

Coverage Dashboard

Score	Block	Branch	Statement	Expression	Toggle	Fsm	Assertion	CoverGroup
97.09	97.39	94.18	98.66	93.60	97.72	91.11	98.85	96.81

Failure Buckets

Job timed out after * minutes has 41 failures:
- Test aes_cipher_fi has 29 failures.
  - 7.aes_cipher_fi.28548496636843905434459768061681203462798932717582673278285124388409441888852
    Log /workspaces/repo/scratch/os_regression/aes_unmasked-sim-xcelium/7.aes_cipher_fi/latest/run.log
```
  Job timed out after 1 minutes
```
  - 9.aes_cipher_fi.53945536536454137926303097724656291050633543773813826869735971613382088755275
    Log /workspaces/repo/scratch/os_regression/aes_unmasked-sim-xcelium/9.aes_cipher_fi/latest/run.log
```
  Job timed out after 1 minutes
```
  - ... and 27 more failures.
- Test aes_control_fi has 12 failures.
  - 17.aes_control_fi.101697556630941276538355542782478988121464820211430787802277444170630301912784
    Log /workspaces/repo/scratch/os_regression/aes_unmasked-sim-xcelium/17.aes_control_fi/latest/run.log
```
  Job timed out after 1 minutes
```
  - 66.aes_control_fi.68143929682334011313028195296884659054135111542245658075394092207800421093164
    Log /workspaces/repo/scratch/os_regression/aes_unmasked-sim-xcelium/66.aes_control_fi/latest/run.log
```
  Job timed out after 1 minutes
```
  - ... and 10 more failures.

UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues has 9 failures:

Test aes_stress_all_with_rand_reset has 9 failures.

0.aes_stress_all_with_rand_reset.2992814235902564823251164247839907948431295846877674226790781530598854653310
Line 395, in log /workspaces/repo/scratch/os_regression/aes_unmasked-sim-xcelium/0.aes_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 409819596 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
  UVM_INFO @ 409819596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.aes_stress_all_with_rand_reset.73609122987733307898192432060295526722501938180483401561900989505041311332781
Line 950, in log /workspaces/repo/scratch/os_regression/aes_unmasked-sim-xcelium/1.aes_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 1347515945 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
  UVM_INFO @ 1347515945 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 7 more failures.

UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! has 7 failures:
- Test aes_cipher_fi has 7 failures.
  - 13.aes_cipher_fi.53534872345704784612464439394908056034955278078658018402132710180876062676543
    Line 125, in log /workspaces/repo/scratch/os_regression/aes_unmasked-sim-xcelium/13.aes_cipher_fi/latest/run.log
```
  UVM_FATAL @ 10014902695 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
  UVM_INFO @ 10014902695 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
  
  
```
  - 186.aes_cipher_fi.15507511632551067518232612892124746331245602285918692405839395883303776247454
    Line 135, in log /workspaces/repo/scratch/os_regression/aes_unmasked-sim-xcelium/186.aes_cipher_fi/latest/run.log
```
  UVM_FATAL @ 10010296024 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
  UVM_INFO @ 10010296024 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
  
  
```
  - ... and 5 more failures.
UVM_FATAL (aes_core_fi_vseq.sv:66) [aes_core_fi_vseq] wait timeout occurred! has 3 failures:
- Test aes_core_fi has 3 failures.
  - 10.aes_core_fi.33961094637140046484708359186633727616619543207034649320161991183849615564065
    Line 135, in log /workspaces/repo/scratch/os_regression/aes_unmasked-sim-xcelium/10.aes_core_fi/latest/run.log
```
  UVM_FATAL @ 10009219230 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
  UVM_INFO @ 10009219230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
  
  
```
  - 15.aes_core_fi.54243442747405097804906926273638469524082781997599394043289014829730635426252
    Line 138, in log /workspaces/repo/scratch/os_regression/aes_unmasked-sim-xcelium/15.aes_core_fi/latest/run.log
```
  UVM_FATAL @ 10002583205 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
  UVM_INFO @ 10002583205 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
  
  
```
  - ... and 1 more failures.
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! has 2 failures:
- Test aes_control_fi has 2 failures.
  - 37.aes_control_fi.9606226407225502942443474500563829898590718513048033578053372840189820882917
    Line 131, in log /workspaces/repo/scratch/os_regression/aes_unmasked-sim-xcelium/37.aes_control_fi/latest/run.log
```
  UVM_FATAL @ 10008339684 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
  UVM_INFO @ 10008339684 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
  
  
```
  - 92.aes_control_fi.108748058327702366699477292491044612143121728542543796545731872187868120840120
    Line 135, in log /workspaces/repo/scratch/os_regression/aes_unmasked-sim-xcelium/92.aes_control_fi/latest/run.log
```
  UVM_FATAL @ 10024716395 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
  UVM_INFO @ 10024716395 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'm_tl_host_base_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues has 1 failures:
- Test aes_ctr_fi has 1 failures.
  - 2.aes_ctr_fi.109526446264389130763700861498769463769683512265559220837829101071591719535075
    Line 140, in log /workspaces/repo/scratch/os_regression/aes_unmasked-sim-xcelium/2.aes_ctr_fi/latest/run.log
```
  UVM_ERROR @  51778091 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.m_tl_agent_aes_reg_block.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.m_tl_agent_aes_reg_block.sequencer' for sequence 'm_tl_host_base_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
  UVM_INFO @  51778091 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_ERROR (cip_base_vseq.sv:549) [aes_alert_reset_vseq] Check failed * == cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() (* [*] vs * [*]) Alert fatal_fault fired unexpectedly! has 1 failures:
- Test aes_stress_all_with_rand_reset has 1 failures.
  - 6.aes_stress_all_with_rand_reset.47122808645404899138798052889866731845400554672501309406604568074223312742279
    Line 470, in log /workspaces/repo/scratch/os_regression/aes_unmasked-sim-xcelium/6.aes_stress_all_with_rand_reset/latest/run.log
```
  UVM_ERROR @ 306883534 ps: (cip_base_vseq.sv:549) [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Check failed 0 == cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() (0 [0x0] vs 1 [0x1]) Alert fatal_fault fired unexpectedly!
  UVM_INFO @ 306883534 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (csr_utils_pkg.sv:587) [csr_utils::csr_spinwait] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=7) has 1 failures:
- Test aes_core_fi has 1 failures.
  - 9.aes_core_fi.28382178110414901252168968415313572486318558347587715896138985338969414787237
    Line 128, in log /workspaces/repo/scratch/os_regression/aes_unmasked-sim-xcelium/9.aes_core_fi/latest/run.log
```
  UVM_FATAL @ 10020140907 ps: (csr_utils_pkg.sv:587) [csr_utils::csr_spinwait] timeout aes_reg_block.status.idle (addr=0xc1862384, Comparison=CompareOpEq, exp_data=0x0, call_count=7)
  UVM_INFO @ 10020140907 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (aes_scoreboard.sv:714) scoreboard [scoreboard] has 1 failures:
- Test aes_clear has 1 failures.
  - 14.aes_clear.82719342804750571614375957456225841770264736090630096878264296776780476798626
    Line 9716, in log /workspaces/repo/scratch/os_regression/aes_unmasked-sim-xcelium/14.aes_clear/latest/run.log
```
  UVM_FATAL @  83907831 ps: (aes_scoreboard.sv:714) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard]
       ----| SAW TOO MANY MESSAGES AND NONE WAS SPLIT
       ----| Expected:           5
       ----| Seen:               6
       ----| Expected corrupted: 0
```