0dd29ab736| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | csrng_smoke | 0 | 50 | 0.00 | ||
| V1 | csr_hw_reset | csrng_csr_hw_reset | 3.000s | 69.459us | 5 | 5 | 100.00 |
| V1 | csr_rw | csrng_csr_rw | 8.000s | 75.523us | 20 | 20 | 100.00 |
| V1 | csr_bit_bash | csrng_csr_bit_bash | 23.000s | 666.794us | 5 | 5 | 100.00 |
| V1 | csr_aliasing | csrng_csr_aliasing | 4.000s | 70.740us | 5 | 5 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | csrng_csr_mem_rw_with_rand_reset | 8.000s | 84.857us | 20 | 20 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | csrng_csr_rw | 8.000s | 75.523us | 20 | 20 | 100.00 |
| csrng_csr_aliasing | 4.000s | 70.740us | 5 | 5 | 100.00 | ||
| V1 | TOTAL | 55 | 105 | 52.38 | |||
| V2 | interrupts | csrng_intr | 0 | 200 | 0.00 | ||
| V2 | alerts | csrng_alert | 0 | 500 | 0.00 | ||
| V2 | err | csrng_err | 0 | 500 | 0.00 | ||
| V2 | cmds | csrng_cmds | 0 | 50 | 0.00 | ||
| V2 | life cycle | csrng_cmds | 0 | 50 | 0.00 | ||
| V2 | stress_all | csrng_stress_all | 0 | 50 | 0.00 | ||
| V2 | intr_test | csrng_intr_test | 7.000s | 14.330us | 50 | 50 | 100.00 |
| V2 | alert_test | csrng_alert_test | 0 | 50 | 0.00 | ||
| V2 | tl_d_oob_addr_access | csrng_tl_errors | 15.000s | 948.271us | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | csrng_tl_errors | 15.000s | 948.271us | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | csrng_csr_hw_reset | 3.000s | 69.459us | 5 | 5 | 100.00 |
| csrng_csr_rw | 8.000s | 75.523us | 20 | 20 | 100.00 | ||
| csrng_csr_aliasing | 4.000s | 70.740us | 5 | 5 | 100.00 | ||
| csrng_same_csr_outstanding | 7.000s | 508.745us | 20 | 20 | 100.00 | ||
| V2 | tl_d_partial_access | csrng_csr_hw_reset | 3.000s | 69.459us | 5 | 5 | 100.00 |
| csrng_csr_rw | 8.000s | 75.523us | 20 | 20 | 100.00 | ||
| csrng_csr_aliasing | 4.000s | 70.740us | 5 | 5 | 100.00 | ||
| csrng_same_csr_outstanding | 7.000s | 508.745us | 20 | 20 | 100.00 | ||
| V2 | TOTAL | 90 | 1440 | 6.25 | |||
| V2S | tl_intg_err | csrng_sec_cm | 0 | 5 | 0.00 | ||
| csrng_tl_intg_err | 31.000s | 881.248us | 20 | 20 | 100.00 | ||
| V2S | sec_cm_config_regwen | csrng_regwen | 0 | 50 | 0.00 | ||
| csrng_csr_rw | 8.000s | 75.523us | 20 | 20 | 100.00 | ||
| V2S | sec_cm_config_mubi | csrng_alert | 0 | 500 | 0.00 | ||
| V2S | sec_cm_intersig_mubi | csrng_stress_all | 0 | 50 | 0.00 | ||
| V2S | sec_cm_main_sm_fsm_sparse | csrng_intr | 0 | 200 | 0.00 | ||
| csrng_err | 0 | 500 | 0.00 | ||||
| csrng_sec_cm | 0 | 5 | 0.00 | ||||
| V2S | sec_cm_update_fsm_sparse | csrng_intr | 0 | 200 | 0.00 | ||
| csrng_err | 0 | 500 | 0.00 | ||||
| csrng_sec_cm | 0 | 5 | 0.00 | ||||
| V2S | sec_cm_blk_enc_fsm_sparse | csrng_intr | 0 | 200 | 0.00 | ||
| csrng_err | 0 | 500 | 0.00 | ||||
| csrng_sec_cm | 0 | 5 | 0.00 | ||||
| V2S | sec_cm_outblk_fsm_sparse | csrng_intr | 0 | 200 | 0.00 | ||
| csrng_err | 0 | 500 | 0.00 | ||||
| csrng_sec_cm | 0 | 5 | 0.00 | ||||
| V2S | sec_cm_gen_cmd_ctr_redun | csrng_intr | 0 | 200 | 0.00 | ||
| csrng_err | 0 | 500 | 0.00 | ||||
| csrng_sec_cm | 0 | 5 | 0.00 | ||||
| V2S | sec_cm_drbg_upd_ctr_redun | csrng_intr | 0 | 200 | 0.00 | ||
| csrng_err | 0 | 500 | 0.00 | ||||
| csrng_sec_cm | 0 | 5 | 0.00 | ||||
| V2S | sec_cm_drbg_gen_ctr_redun | csrng_intr | 0 | 200 | 0.00 | ||
| csrng_err | 0 | 500 | 0.00 | ||||
| csrng_sec_cm | 0 | 5 | 0.00 | ||||
| V2S | sec_cm_ctrl_mubi | csrng_alert | 0 | 500 | 0.00 | ||
| V2S | sec_cm_main_sm_ctr_local_esc | csrng_intr | 0 | 200 | 0.00 | ||
| csrng_err | 0 | 500 | 0.00 | ||||
| V2S | sec_cm_constants_lc_gated | csrng_stress_all | 0 | 50 | 0.00 | ||
| V2S | sec_cm_sw_genbits_bus_consistency | csrng_alert | 0 | 500 | 0.00 | ||
| V2S | sec_cm_tile_link_bus_integrity | csrng_tl_intg_err | 31.000s | 881.248us | 20 | 20 | 100.00 |
| V2S | sec_cm_aes_cipher_fsm_sparse | csrng_intr | 0 | 200 | 0.00 | ||
| csrng_err | 0 | 500 | 0.00 | ||||
| csrng_sec_cm | 0 | 5 | 0.00 | ||||
| V2S | sec_cm_aes_cipher_fsm_redun | csrng_intr | 0 | 200 | 0.00 | ||
| csrng_err | 0 | 500 | 0.00 | ||||
| V2S | sec_cm_aes_cipher_ctrl_sparse | csrng_intr | 0 | 200 | 0.00 | ||
| csrng_err | 0 | 500 | 0.00 | ||||
| V2S | sec_cm_aes_cipher_fsm_local_esc | csrng_intr | 0 | 200 | 0.00 | ||
| csrng_err | 0 | 500 | 0.00 | ||||
| V2S | sec_cm_aes_cipher_ctr_redun | csrng_intr | 0 | 200 | 0.00 | ||
| csrng_err | 0 | 500 | 0.00 | ||||
| csrng_sec_cm | 0 | 5 | 0.00 | ||||
| V2S | sec_cm_aes_cipher_data_reg_local_esc | csrng_intr | 0 | 200 | 0.00 | ||
| csrng_err | 0 | 500 | 0.00 | ||||
| V2S | TOTAL | 20 | 75 | 26.67 | |||
| V3 | stress_all_with_rand_reset | csrng_stress_all_with_rand_reset | 0 | 50 | 0.00 | ||
| V3 | TOTAL | 0 | 50 | 0.00 | |||
| TOTAL | 165 | 1670 | 9.88 |
| Items | Total | Written | Passing | Progress |
|---|---|---|---|---|
| V1 | 6 | 6 | 5 | 83.33 |
| V2 | 9 | 9 | 3 | 33.33 |
| V2S | 3 | 3 | 1 | 33.33 |
| V3 | 1 | 1 | 0 | 0.00 |
| Score | Block | Branch | Statement | Expression | Toggle | Fsm | Assertion | CoverGroup |
|---|---|---|---|---|---|---|---|---|
| 71.97 | 91.48 | 82.03 | 96.08 | 99.04 | 34.39 | -- | 100.00 | 23.60 |
launch_task.returncode != *, err: * *:*:* * lswatcher.go:*] Failed to connect to Watcher service in the Envelope (you probably need to import _ "google3/tech/env/go/envelope"): generic::unimplemented: envrpc: no envelope available for service "chubby.googleapis.com" Failure to submit jobs: rpc error: code = Unavailable desc = The service is currently unavailable. has 753 failures:
0.csrng_smoke.6601411712797638605109786301386989699866396947504525826017797814829245165925
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/0.csrng_smoke/latest/run.log
1.csrng_smoke.108755151576880850665487977519611194325713840025556927972963025247343524686177
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/1.csrng_smoke/latest/run.log
... and 26 more failures.
0.csrng_stress_all.100252132152441713736441312006233739842641735794975730377210255503948737781623
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/0.csrng_stress_all/latest/run.log
1.csrng_stress_all.26205247772083338352711615821535950910940807098842273928639677772599605403862
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/1.csrng_stress_all/latest/run.log
... and 26 more failures.
0.csrng_alert.9430526519801530752733187061388016530921713288474923659364380581675652803178
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/0.csrng_alert/latest/run.log
1.csrng_alert.20397415607420540365149865454546039866752703118731752371992478974181012565341
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/1.csrng_alert/latest/run.log
... and 101 more failures.
0.csrng_regwen.80797680936493123752059299659368335460948236627601272168316205632904960221162
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/0.csrng_regwen/latest/run.log
1.csrng_regwen.8299598607212969602865854812586213164672379557120133165915056728449240179786
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/1.csrng_regwen/latest/run.log
... and 26 more failures.
0.csrng_sec_cm.31646374271841211393810718837473210193902727835119839235768352502436439488935
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/0.csrng_sec_cm/latest/run.log
1.csrng_sec_cm.13211620495725286773501900910571743639094418604121467860391058705762773915927
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/1.csrng_sec_cm/latest/run.log
... and 3 more failures.
Job killed most likely because its dependent job failed. has 752 failures:
0.csrng_cmds.21627471896707931917421663706530947943840134636658512941735932639788629079644
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/0.csrng_cmds/latest/run.log
1.csrng_cmds.26624889137016990660498161945449094807773612059668511442879280450341026538213
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/1.csrng_cmds/latest/run.log
... and 26 more failures.
0.csrng_intr.3623806016376225692488429470851807716290862642939659659793562103403369787905
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/0.csrng_intr/latest/run.log
1.csrng_intr.9132266895393458921287334472226685908159157494684827463978906156260780257286
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/1.csrng_intr/latest/run.log
... and 101 more failures.
0.csrng_err.97969986390853887412561057731428374911312286992791941514410546954472781420371
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/0.csrng_err/latest/run.log
1.csrng_err.56217238417644742648194624596195186116980030820191422019749891301813749510980
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/1.csrng_err/latest/run.log
... and 101 more failures.
0.csrng_stress_all_with_rand_reset.77516759283826660630230294451960862345744860928189179989723817868813863200019
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/0.csrng_stress_all_with_rand_reset/latest/run.log
1.csrng_stress_all_with_rand_reset.95597328420700041027658135927827540625241275165492011644084683530445891053171
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/1.csrng_stress_all_with_rand_reset/latest/run.log
... and 26 more failures.
0.csrng_alert_test.62435062957973245103507669696325033012679160445615334612953227628933500868265
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/0.csrng_alert_test/latest/run.log
1.csrng_alert_test.63573859421853474396504223927349191248789021018009921592331566351600461402041
Log /container/opentitan-public/scratch/os_regression/csrng-sim-xcelium/1.csrng_alert_test/latest/run.log
... and 25 more failures.