ENTROPY_SRC Simulation Results

Sunday July 07 2024 23:02:38 UTC

GitHub Revision: 2e5d86c9b5

Branch: os_regression

Testplan

Simulator: XCELIUM

Build randomization enabled with --build-seed 75221189197949424635294305394615322888112457483844341597147780944629972574676

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke entropy_src_smoke 18.000s 30.613us 50 50 100.00
V1 csr_hw_reset entropy_src_csr_hw_reset 3.000s 115.327us 5 5 100.00
V1 csr_rw entropy_src_csr_rw 8.000s 16.442us 20 20 100.00
V1 csr_bit_bash entropy_src_csr_bit_bash 13.000s 2.142ms 5 5 100.00
V1 csr_aliasing entropy_src_csr_aliasing 8.000s 915.195us 5 5 100.00
V1 csr_mem_rw_with_rand_reset entropy_src_csr_mem_rw_with_rand_reset 5.000s 164.056us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr entropy_src_csr_rw 8.000s 16.442us 20 20 100.00
entropy_src_csr_aliasing 8.000s 915.195us 5 5 100.00
V1 TOTAL 105 105 100.00
V2 firmware entropy_src_smoke 18.000s 30.613us 50 50 100.00
entropy_src_rng 4.633m 10.016ms 300 300 100.00
entropy_src_fw_ov 2.383m 5.036ms 289 300 96.33
V2 firmware_mode entropy_src_fw_ov 2.383m 5.036ms 289 300 96.33
V2 rng_mode entropy_src_rng 4.633m 10.016ms 300 300 100.00
V2 rng_max_rate entropy_src_rng_max_rate 8.617m 10.060ms 397 400 99.25
V2 health_checks entropy_src_rng 4.633m 10.016ms 300 300 100.00
V2 conditioning entropy_src_rng 4.633m 10.016ms 300 300 100.00
V2 interrupts entropy_src_rng 4.633m 10.016ms 300 300 100.00
entropy_src_intr 22.000s 2.330ms 50 50 100.00
V2 alerts entropy_src_rng 4.633m 10.016ms 300 300 100.00
entropy_src_functional_alerts 19.000s 257.366us 50 50 100.00
V2 stress_all entropy_src_stress_all 16.000s 144.226us 50 50 100.00
V2 functional_errors entropy_src_functional_errors 9.767m 10.012ms 960 1000 96.00
V2 firmware_ov_read_contiguous_data entropy_src_fw_ov_contiguous 25.000s 643.041us 50 50 100.00
V2 intr_test entropy_src_intr_test 12.000s 18.597us 50 50 100.00
V2 alert_test entropy_src_alert_test 18.000s 25.662us 50 50 100.00
V2 tl_d_oob_addr_access entropy_src_tl_errors 7.000s 138.759us 20 20 100.00
V2 tl_d_illegal_access entropy_src_tl_errors 7.000s 138.759us 20 20 100.00
V2 tl_d_outstanding_access entropy_src_csr_hw_reset 3.000s 115.327us 5 5 100.00
entropy_src_csr_rw 8.000s 16.442us 20 20 100.00
entropy_src_csr_aliasing 8.000s 915.195us 5 5 100.00
entropy_src_same_csr_outstanding 5.000s 112.332us 20 20 100.00
V2 tl_d_partial_access entropy_src_csr_hw_reset 3.000s 115.327us 5 5 100.00
entropy_src_csr_rw 8.000s 16.442us 20 20 100.00
entropy_src_csr_aliasing 8.000s 915.195us 5 5 100.00
entropy_src_same_csr_outstanding 5.000s 112.332us 20 20 100.00
V2 TOTAL 2286 2340 97.69
V2S tl_intg_err entropy_src_sec_cm 5.000s 120.183us 5 5 100.00
entropy_src_tl_intg_err 7.000s 179.986us 20 20 100.00
V2S sec_cm_config_regwen entropy_src_rng 4.633m 10.016ms 300 300 100.00
entropy_src_cfg_regwen 18.000s 17.485us 50 50 100.00
V2S sec_cm_config_mubi entropy_src_rng 4.633m 10.016ms 300 300 100.00
V2S sec_cm_config_redun entropy_src_rng 4.633m 10.016ms 300 300 100.00
V2S sec_cm_intersig_mubi entropy_src_rng 4.633m 10.016ms 300 300 100.00
entropy_src_fw_ov 2.383m 5.036ms 289 300 96.33
V2S sec_cm_main_sm_fsm_sparse entropy_src_functional_errors 9.767m 10.012ms 960 1000 96.00
entropy_src_sec_cm 5.000s 120.183us 5 5 100.00
V2S sec_cm_ack_sm_fsm_sparse entropy_src_functional_errors 9.767m 10.012ms 960 1000 96.00
entropy_src_sec_cm 5.000s 120.183us 5 5 100.00
V2S sec_cm_rng_bkgn_chk entropy_src_rng 4.633m 10.016ms 300 300 100.00
V2S sec_cm_fifo_ctr_redun entropy_src_functional_errors 9.767m 10.012ms 960 1000 96.00
entropy_src_sec_cm 5.000s 120.183us 5 5 100.00
V2S sec_cm_ctr_redun entropy_src_functional_errors 9.767m 10.012ms 960 1000 96.00
entropy_src_sec_cm 5.000s 120.183us 5 5 100.00
V2S sec_cm_ctr_local_esc entropy_src_functional_errors 9.767m 10.012ms 960 1000 96.00
V2S sec_cm_esfinal_rdata_bus_consistency entropy_src_functional_alerts 19.000s 257.366us 50 50 100.00
V2S sec_cm_tile_link_bus_integrity entropy_src_tl_intg_err 7.000s 179.986us 20 20 100.00
V2S TOTAL 75 75 100.00
V3 external_health_tests entropy_src_rng_with_xht_rsps 4.433m 10.074ms 49 50 98.00
V3 stress_all_with_rand_reset entropy_src_stress_all_with_rand_reset 0 0 --
V3 TOTAL 49 50 98.00
TOTAL 2515 2570 97.86

Testplan Progress

Items Total Written Passing Progress
V1 6 6 6 100.00
V2 12 12 9 75.00
V2S 3 3 3 100.00
V3 2 1 0 0.00

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
97.13 98.15 95.32 98.36 95.79 96.68 96.88 90.48 95.73

Failure Buckets

Past Results