GPIO Simulation Results

Wednesday January 17 2024 20:02:30 UTC

GitHub Revision: 4d88b9516c

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 3635458896929517279689574864899235923834879224879080668186365324190153451241

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke gpio_smoke 1.530s 183.450us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.610s 433.212us 50 50 100.00
gpio_smoke_en_cdc_prim 1.460s 173.120us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.630s 1.014ms 50 50 100.00
V1 csr_hw_reset gpio_csr_hw_reset 0.650s 47.461us 5 5 100.00
V1 csr_rw gpio_csr_rw 0.670s 19.415us 20 20 100.00
V1 csr_bit_bash gpio_csr_bit_bash 2.910s 690.733us 5 5 100.00
V1 csr_aliasing gpio_csr_aliasing 0.860s 553.319us 5 5 100.00
V1 csr_mem_rw_with_rand_reset gpio_csr_mem_rw_with_rand_reset 1.080s 40.408us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr gpio_csr_rw 0.670s 19.415us 20 20 100.00
gpio_csr_aliasing 0.860s 553.319us 5 5 100.00
V1 TOTAL 255 255 100.00
V2 direct_and_masked_out gpio_random_dout_din 1.510s 105.160us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.480s 222.823us 50 50 100.00
V2 out_in_regs_read_write gpio_dout_din_regs_random_rw 1.000s 46.535us 50 50 100.00
V2 gpio_interrupt_programming gpio_intr_rand_pgm 1.510s 420.840us 50 50 100.00
V2 random_interrupt_trigger gpio_rand_intr_trigger 3.870s 435.186us 50 50 100.00
V2 interrupt_and_noise_filter gpio_intr_with_filter_rand_intr_event 3.780s 167.147us 50 50 100.00
V2 noise_filter_stress gpio_filter_stress 28.100s 3.945ms 50 50 100.00
V2 regs_long_reads_and_writes gpio_random_long_reg_writes_reg_reads 6.600s 3.501ms 50 50 100.00
V2 full_random gpio_full_random 1.190s 322.947us 50 50 100.00
V2 stress_all gpio_stress_all 4.154m 78.726ms 50 50 100.00
V2 alert_test gpio_alert_test 0.630s 12.393us 50 50 100.00
V2 intr_test gpio_intr_test 0.670s 26.672us 50 50 100.00
V2 tl_d_oob_addr_access gpio_tl_errors 2.870s 219.483us 20 20 100.00
V2 tl_d_illegal_access gpio_tl_errors 2.870s 219.483us 20 20 100.00
V2 tl_d_outstanding_access gpio_csr_rw 0.670s 19.415us 20 20 100.00
gpio_same_csr_outstanding 0.880s 36.379us 20 20 100.00
gpio_csr_aliasing 0.860s 553.319us 5 5 100.00
gpio_csr_hw_reset 0.650s 47.461us 5 5 100.00
V2 tl_d_partial_access gpio_csr_rw 0.670s 19.415us 20 20 100.00
gpio_same_csr_outstanding 0.880s 36.379us 20 20 100.00
gpio_csr_aliasing 0.860s 553.319us 5 5 100.00
gpio_csr_hw_reset 0.650s 47.461us 5 5 100.00
V2 TOTAL 640 640 100.00
V2S tl_intg_err gpio_tl_intg_err 2.010s 1.453ms 20 20 100.00
gpio_sec_cm 0.990s 309.279us 5 5 100.00
V2S sec_cm_bus_integrity gpio_tl_intg_err 2.010s 1.453ms 20 20 100.00
V2S TOTAL 25 25 100.00
V3 stress_all_with_rand_reset gpio_stress_all_with_rand_reset 42.762m 319.042ms 50 50 100.00
V3 TOTAL 50 50 100.00
TOTAL 970 970 100.00

Testplan Progress

Items Total Written Passing Progress
V1 9 9 9 100.00
V2 14 14 14 100.00
V2S 2 2 2 100.00
V3 1 1 1 100.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
99.61 99.06 99.10 100.00 -- 99.80 99.68 100.00

Past Results