GPIO Simulation Results

Tuesday September 24 2024 01:05:57 UTC

GitHub Revision: 78ad89d1aa

Branch: os_regression_2024_09_23

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 34048022127553017884926631616394166155118623175048314192737094530054579848544

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke gpio_smoke 2.580s 189.988us 50 50 100.00
gpio_smoke_no_pullup_pulldown 2.690s 942.851us 50 50 100.00
gpio_smoke_en_cdc_prim 1.950s 48.166us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 2.020s 91.375us 50 50 100.00
V1 csr_hw_reset gpio_csr_hw_reset 1.100s 34.837us 5 5 100.00
V1 csr_rw gpio_csr_rw 1.030s 18.015us 20 20 100.00
V1 csr_bit_bash gpio_csr_bit_bash 5.010s 251.187us 5 5 100.00
V1 csr_aliasing gpio_csr_aliasing 1.320s 57.858us 5 5 100.00
V1 csr_mem_rw_with_rand_reset gpio_csr_mem_rw_with_rand_reset 2.170s 41.037us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr gpio_csr_rw 1.030s 18.015us 20 20 100.00
gpio_csr_aliasing 1.320s 57.858us 5 5 100.00
V1 TOTAL 255 255 100.00
V2 direct_and_masked_out gpio_random_dout_din 2.190s 266.254us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 2.240s 298.589us 50 50 100.00
V2 out_in_regs_read_write gpio_dout_din_regs_random_rw 1.560s 177.479us 50 50 100.00
V2 gpio_interrupt_programming gpio_intr_rand_pgm 2.420s 105.089us 50 50 100.00
V2 random_interrupt_trigger gpio_rand_intr_trigger 5.640s 593.806us 50 50 100.00
V2 interrupt_and_noise_filter gpio_intr_with_filter_rand_intr_event 5.360s 97.228us 50 50 100.00
V2 noise_filter_stress gpio_filter_stress 36.140s 2.009ms 50 50 100.00
V2 regs_long_reads_and_writes gpio_random_long_reg_writes_reg_reads 10.540s 573.732us 50 50 100.00
V2 full_random gpio_full_random 1.770s 430.790us 50 50 100.00
V2 stress_all gpio_stress_all 4.250m 15.872ms 50 50 100.00
V2 alert_test gpio_alert_test 1.000s 13.618us 50 50 100.00
V2 intr_test gpio_intr_test 1.010s 17.860us 50 50 100.00
V2 tl_d_oob_addr_access gpio_tl_errors 5.360s 188.198us 20 20 100.00
V2 tl_d_illegal_access gpio_tl_errors 5.360s 188.198us 20 20 100.00
V2 tl_d_outstanding_access gpio_csr_rw 1.030s 18.015us 20 20 100.00
gpio_same_csr_outstanding 1.300s 51.043us 20 20 100.00
gpio_csr_aliasing 1.320s 57.858us 5 5 100.00
gpio_csr_hw_reset 1.100s 34.837us 5 5 100.00
V2 tl_d_partial_access gpio_csr_rw 1.030s 18.015us 20 20 100.00
gpio_same_csr_outstanding 1.300s 51.043us 20 20 100.00
gpio_csr_aliasing 1.320s 57.858us 5 5 100.00
gpio_csr_hw_reset 1.100s 34.837us 5 5 100.00
V2 TOTAL 640 640 100.00
V2S tl_intg_err gpio_tl_intg_err 2.390s 118.532us 20 20 100.00
gpio_sec_cm 1.770s 642.996us 5 5 100.00
V2S sec_cm_bus_integrity gpio_tl_intg_err 2.390s 118.532us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 stress_all_with_rand_reset gpio_stress_all_with_rand_reset 3.407m 5.355ms 17 50 34.00
V3 TOTAL 17 50 34.00
TOTAL 937 970 96.60

Testplan Progress

Items Total Written Passing Progress
V1 9 9 9 100.00
V2 14 14 14 100.00
V2S 2 2 2 100.00
V3 1 1 0 0.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
99.62 99.04 99.24 100.00 -- 99.80 99.68 99.99

Failure Buckets

Past Results