T394 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_stretch.1906721919 |
|
|
Sep 18 07:57:09 AM UTC 24 |
Sep 18 07:57:13 AM UTC 24 |
677314183 ps |
T395 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_host_error_intr.2514463286 |
|
|
Sep 18 07:57:07 AM UTC 24 |
Sep 18 07:57:16 AM UTC 24 |
204923509 ps |
T396 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_target_stretch.3115598684 |
|
|
Sep 18 07:56:52 AM UTC 24 |
Sep 18 07:57:16 AM UTC 24 |
2842108127 ps |
T397 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_stress_rd.547072603 |
|
|
Sep 18 07:57:35 AM UTC 24 |
Sep 18 07:58:15 AM UTC 24 |
746646902 ps |
T398 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_reset_acq.2148212699 |
|
|
Sep 18 07:57:14 AM UTC 24 |
Sep 18 07:57:17 AM UTC 24 |
145903308 ps |
T399 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_stretch.2630069140 |
|
|
Sep 18 07:55:00 AM UTC 24 |
Sep 18 07:57:17 AM UTC 24 |
4415112512 ps |
T400 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_reset_tx.751087966 |
|
|
Sep 18 07:57:15 AM UTC 24 |
Sep 18 07:57:19 AM UTC 24 |
588885407 ps |
T401 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_host_perf_precise.1212739348 |
|
|
Sep 18 07:57:07 AM UTC 24 |
Sep 18 07:57:19 AM UTC 24 |
234261211 ps |
T171 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_full.2346602247 |
|
|
Sep 18 07:56:21 AM UTC 24 |
Sep 18 07:57:20 AM UTC 24 |
12457994234 ps |
T402 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_intr_smoke.1528302726 |
|
|
Sep 18 07:57:10 AM UTC 24 |
Sep 18 07:57:21 AM UTC 24 |
1263050547 ps |
T403 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_timeout.3325649918 |
|
|
Sep 18 07:57:11 AM UTC 24 |
Sep 18 07:57:22 AM UTC 24 |
5985089648 ps |
T404 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_intr_smoke.3588580542 |
|
|
Sep 18 07:58:02 AM UTC 24 |
Sep 18 07:58:15 AM UTC 24 |
2992608766 ps |
T405 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_host_stretch_timeout.3228414589 |
|
|
Sep 18 07:57:07 AM UTC 24 |
Sep 18 07:57:23 AM UTC 24 |
13761935792 ps |
T406 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_tx.4150630288 |
|
|
Sep 18 07:57:22 AM UTC 24 |
Sep 18 07:57:25 AM UTC 24 |
109864756 ps |
T407 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_perf.1265802124 |
|
|
Sep 18 07:57:16 AM UTC 24 |
Sep 18 07:57:26 AM UTC 24 |
815862818 ps |
T408 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_bad_addr.3463451737 |
|
|
Sep 18 07:57:18 AM UTC 24 |
Sep 18 07:57:26 AM UTC 24 |
3623065595 ps |
T409 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_acq.4043696815 |
|
|
Sep 18 07:57:21 AM UTC 24 |
Sep 18 07:57:27 AM UTC 24 |
2150654885 ps |
T410 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_host_stretch_timeout.3715505476 |
|
|
Sep 18 07:56:46 AM UTC 24 |
Sep 18 07:57:27 AM UTC 24 |
992275831 ps |
T411 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_target_intr_stress_wr.2607582588 |
|
|
Sep 18 07:56:53 AM UTC 24 |
Sep 18 07:57:28 AM UTC 24 |
32813577017 ps |
T412 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_host_smoke.4247773815 |
|
|
Sep 18 07:56:43 AM UTC 24 |
Sep 18 07:58:06 AM UTC 24 |
3295086350 ps |
T413 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_stress_rd.2417259592 |
|
|
Sep 18 07:57:09 AM UTC 24 |
Sep 18 07:57:29 AM UTC 24 |
955104582 ps |
T414 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_tx_stretch_ctrl.4042961691 |
|
|
Sep 18 07:57:22 AM UTC 24 |
Sep 18 07:57:29 AM UTC 24 |
200476528 ps |
T415 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_smbus_maxlen.2439935882 |
|
|
Sep 18 07:57:24 AM UTC 24 |
Sep 18 07:57:29 AM UTC 24 |
1850517120 ps |
T416 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_alert_test.3972942355 |
|
|
Sep 18 07:57:27 AM UTC 24 |
Sep 18 07:57:29 AM UTC 24 |
19548882 ps |
T148 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_host_override.1602190669 |
|
|
Sep 18 07:57:28 AM UTC 24 |
Sep 18 07:57:29 AM UTC 24 |
92143825 ps |
T184 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_nack_txstretch.2072896638 |
|
|
Sep 18 07:57:26 AM UTC 24 |
Sep 18 07:57:30 AM UTC 24 |
133020105 ps |
T417 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull.3844198273 |
|
|
Sep 18 07:57:24 AM UTC 24 |
Sep 18 07:57:30 AM UTC 24 |
1053658003 ps |
T16 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_host_perf.3380494936 |
|
|
Sep 18 07:56:21 AM UTC 24 |
Sep 18 07:57:30 AM UTC 24 |
31096880021 ps |
T418 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull_addr.609476521 |
|
|
Sep 18 07:57:25 AM UTC 24 |
Sep 18 07:57:31 AM UTC 24 |
2464838686 ps |
T419 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_fmt.2882916865 |
|
|
Sep 18 07:57:30 AM UTC 24 |
Sep 18 07:57:33 AM UTC 24 |
206151279 ps |
T420 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_host_error_intr.79984070 |
|
|
Sep 18 07:57:31 AM UTC 24 |
Sep 18 07:57:34 AM UTC 24 |
551359251 ps |
T421 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_host_perf_precise.1023800579 |
|
|
Sep 18 07:57:31 AM UTC 24 |
Sep 18 07:57:35 AM UTC 24 |
92244424 ps |
T172 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_full.3141743231 |
|
|
Sep 18 07:56:46 AM UTC 24 |
Sep 18 07:57:36 AM UTC 24 |
18144027712 ps |
T119 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_watermark.4002711075 |
|
|
Sep 18 07:56:20 AM UTC 24 |
Sep 18 07:57:36 AM UTC 24 |
40592846276 ps |
T422 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_rx.2235058885 |
|
|
Sep 18 07:57:30 AM UTC 24 |
Sep 18 07:57:36 AM UTC 24 |
616377825 ps |
T86 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_smoke.2281254345 |
|
|
Sep 18 07:57:08 AM UTC 24 |
Sep 18 07:57:40 AM UTC 24 |
5237616910 ps |
T423 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_stretch.3615105483 |
|
|
Sep 18 07:57:37 AM UTC 24 |
Sep 18 07:57:41 AM UTC 24 |
1148861460 ps |
T424 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_host_smoke.3156596949 |
|
|
Sep 18 07:57:04 AM UTC 24 |
Sep 18 07:57:42 AM UTC 24 |
3552137203 ps |
T425 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_hrst.1136258340 |
|
|
Sep 18 07:58:11 AM UTC 24 |
Sep 18 07:58:16 AM UTC 24 |
363583720 ps |
T426 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_smoke.2219706663 |
|
|
Sep 18 07:57:33 AM UTC 24 |
Sep 18 07:57:44 AM UTC 24 |
1992462488 ps |
T427 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_overflow.4234787778 |
|
|
Sep 18 07:56:45 AM UTC 24 |
Sep 18 07:57:44 AM UTC 24 |
2204867422 ps |
T428 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_acq.1615304500 |
|
|
Sep 18 07:57:42 AM UTC 24 |
Sep 18 07:57:44 AM UTC 24 |
257849674 ps |
T429 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_tx.967848391 |
|
|
Sep 18 07:57:43 AM UTC 24 |
Sep 18 07:57:46 AM UTC 24 |
208119621 ps |
T57 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_intr_stress_wr.2701365689 |
|
|
Sep 18 07:57:38 AM UTC 24 |
Sep 18 07:58:06 AM UTC 24 |
14280022114 ps |
T430 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_intr_smoke.2805486672 |
|
|
Sep 18 07:57:37 AM UTC 24 |
Sep 18 07:57:47 AM UTC 24 |
2255063080 ps |
T431 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_fmt_empty.138981375 |
|
|
Sep 18 07:57:30 AM UTC 24 |
Sep 18 07:57:48 AM UTC 24 |
323593989 ps |
T432 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_hrst.967754882 |
|
|
Sep 18 07:57:45 AM UTC 24 |
Sep 18 07:57:50 AM UTC 24 |
1224027802 ps |
T24 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_host_mode_toggle.2200158406 |
|
|
Sep 18 07:57:47 AM UTC 24 |
Sep 18 07:57:50 AM UTC 24 |
91567784 ps |
T433 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_host_may_nack.2731403775 |
|
|
Sep 18 07:57:20 AM UTC 24 |
Sep 18 07:57:51 AM UTC 24 |
695701718 ps |
T434 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_host_fifo_full.1966209325 |
|
|
Sep 18 07:55:13 AM UTC 24 |
Sep 18 07:57:52 AM UTC 24 |
12187493430 ps |
T242 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_stress_all.687830707 |
|
|
Sep 18 07:55:22 AM UTC 24 |
Sep 18 07:57:52 AM UTC 24 |
68016582459 ps |
T435 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_bad_addr.2375968619 |
|
|
Sep 18 07:57:45 AM UTC 24 |
Sep 18 07:57:52 AM UTC 24 |
6107784261 ps |
T436 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_timeout.2068762914 |
|
|
Sep 18 07:57:40 AM UTC 24 |
Sep 18 07:57:53 AM UTC 24 |
1172589109 ps |
T437 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_host_smoke.2920022786 |
|
|
Sep 18 07:57:27 AM UTC 24 |
Sep 18 07:57:53 AM UTC 24 |
1317086825 ps |
T265 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_stress_all.1662513526 |
|
|
Sep 18 07:57:16 AM UTC 24 |
Sep 18 07:57:55 AM UTC 24 |
24398799805 ps |
T185 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_tx.3940435120 |
|
|
Sep 18 07:57:52 AM UTC 24 |
Sep 18 07:57:55 AM UTC 24 |
568416822 ps |
T438 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_host_stretch_timeout.2583388497 |
|
|
Sep 18 07:57:31 AM UTC 24 |
Sep 18 07:57:55 AM UTC 24 |
933896080 ps |
T439 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_host_fifo_full.2481909440 |
|
|
Sep 18 07:54:55 AM UTC 24 |
Sep 18 07:57:55 AM UTC 24 |
9411121651 ps |
T440 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_perf.1827591924 |
|
|
Sep 18 07:57:44 AM UTC 24 |
Sep 18 07:57:56 AM UTC 24 |
1924017992 ps |
T441 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_alert_test.987553616 |
|
|
Sep 18 07:57:54 AM UTC 24 |
Sep 18 07:57:56 AM UTC 24 |
30040643 ps |
T442 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_acq.3846767872 |
|
|
Sep 18 07:57:51 AM UTC 24 |
Sep 18 07:57:56 AM UTC 24 |
603644959 ps |
T443 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_perf.296673198 |
|
|
Sep 18 07:58:08 AM UTC 24 |
Sep 18 07:58:17 AM UTC 24 |
713904655 ps |
T444 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_tx_stretch_ctrl.4245876646 |
|
|
Sep 18 07:57:52 AM UTC 24 |
Sep 18 07:57:57 AM UTC 24 |
99755337 ps |
T149 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_host_override.4158755674 |
|
|
Sep 18 07:57:55 AM UTC 24 |
Sep 18 07:57:57 AM UTC 24 |
20376266 ps |
T445 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_rx.3068849544 |
|
|
Sep 18 07:57:57 AM UTC 24 |
Sep 18 07:58:08 AM UTC 24 |
161453454 ps |
T446 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull.3244509998 |
|
|
Sep 18 07:57:53 AM UTC 24 |
Sep 18 07:57:57 AM UTC 24 |
460808912 ps |
T447 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_smbus_maxlen.141163562 |
|
|
Sep 18 07:57:53 AM UTC 24 |
Sep 18 07:57:58 AM UTC 24 |
518048109 ps |
T448 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull_addr.3934501216 |
|
|
Sep 18 07:57:54 AM UTC 24 |
Sep 18 07:57:58 AM UTC 24 |
409150289 ps |
T449 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_fmt.3474239242 |
|
|
Sep 18 07:57:56 AM UTC 24 |
Sep 18 07:57:59 AM UTC 24 |
1221233383 ps |
T450 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_target_stress_rd.2497094532 |
|
|
Sep 18 07:56:51 AM UTC 24 |
Sep 18 07:58:00 AM UTC 24 |
1638785063 ps |
T451 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_host_may_nack.1759586212 |
|
|
Sep 18 07:57:49 AM UTC 24 |
Sep 18 07:58:00 AM UTC 24 |
2029335907 ps |
T452 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_host_error_intr.2424807712 |
|
|
Sep 18 07:57:59 AM UTC 24 |
Sep 18 07:58:01 AM UTC 24 |
598448481 ps |
T453 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_intr_stress_wr.4007445347 |
|
|
Sep 18 07:57:10 AM UTC 24 |
Sep 18 07:58:04 AM UTC 24 |
18020701816 ps |
T454 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_fmt_empty.3058093817 |
|
|
Sep 18 07:57:56 AM UTC 24 |
Sep 18 07:58:05 AM UTC 24 |
425826435 ps |
T186 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_acq.3996997649 |
|
|
Sep 18 07:58:06 AM UTC 24 |
Sep 18 07:58:10 AM UTC 24 |
248920918 ps |
T455 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_tx.1344560008 |
|
|
Sep 18 07:58:07 AM UTC 24 |
Sep 18 07:58:10 AM UTC 24 |
262891708 ps |
T456 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_tx.2423861252 |
|
|
Sep 18 07:58:15 AM UTC 24 |
Sep 18 07:58:17 AM UTC 24 |
55819404 ps |
T457 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_bad_addr.2630646006 |
|
|
Sep 18 07:58:10 AM UTC 24 |
Sep 18 07:58:18 AM UTC 24 |
1073670200 ps |
T266 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_stress_all.3332625598 |
|
|
Sep 18 07:54:44 AM UTC 24 |
Sep 18 07:58:18 AM UTC 24 |
23426407328 ps |
T458 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_acq.373517034 |
|
|
Sep 18 07:58:14 AM UTC 24 |
Sep 18 07:58:19 AM UTC 24 |
835386787 ps |
T459 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_timeout.272335006 |
|
|
Sep 18 07:58:05 AM UTC 24 |
Sep 18 07:58:19 AM UTC 24 |
6848591192 ps |
T460 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_alert_test.2267632009 |
|
|
Sep 18 07:58:18 AM UTC 24 |
Sep 18 07:58:20 AM UTC 24 |
26522405 ps |
T461 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_smbus_maxlen.1238993417 |
|
|
Sep 18 07:58:16 AM UTC 24 |
Sep 18 07:58:20 AM UTC 24 |
529594616 ps |
T462 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_tx_stretch_ctrl.3255841463 |
|
|
Sep 18 07:58:16 AM UTC 24 |
Sep 18 07:58:21 AM UTC 24 |
103554238 ps |
T463 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_host_override.1852005693 |
|
|
Sep 18 07:58:19 AM UTC 24 |
Sep 18 07:58:21 AM UTC 24 |
87045865 ps |
T187 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_nack_txstretch.3789919555 |
|
|
Sep 18 07:58:18 AM UTC 24 |
Sep 18 07:58:21 AM UTC 24 |
635959426 ps |
T464 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull.3416286253 |
|
|
Sep 18 07:58:17 AM UTC 24 |
Sep 18 07:58:22 AM UTC 24 |
2893528294 ps |
T465 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_host_fifo_watermark.4281811457 |
|
|
Sep 18 07:55:35 AM UTC 24 |
Sep 18 07:58:23 AM UTC 24 |
4069516738 ps |
T466 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull_addr.555664401 |
|
|
Sep 18 07:58:18 AM UTC 24 |
Sep 18 07:58:23 AM UTC 24 |
2599681894 ps |
T467 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_fmt.1253309041 |
|
|
Sep 18 07:58:22 AM UTC 24 |
Sep 18 07:58:24 AM UTC 24 |
582478628 ps |
T468 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_overflow.3185092273 |
|
|
Sep 18 07:57:30 AM UTC 24 |
Sep 18 07:58:25 AM UTC 24 |
2052628524 ps |
T469 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_host_perf_precise.2102170556 |
|
|
Sep 18 07:57:58 AM UTC 24 |
Sep 18 07:58:26 AM UTC 24 |
2647296710 ps |
T470 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_intr_stress_wr.2025229947 |
|
|
Sep 18 07:58:04 AM UTC 24 |
Sep 18 07:58:26 AM UTC 24 |
19199908976 ps |
T471 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_host_perf_precise.4229889862 |
|
|
Sep 18 07:58:24 AM UTC 24 |
Sep 18 07:58:26 AM UTC 24 |
63314070 ps |
T472 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_rx.3558224301 |
|
|
Sep 18 07:58:23 AM UTC 24 |
Sep 18 07:58:27 AM UTC 24 |
162106706 ps |
T473 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_host_may_nack.2395488818 |
|
|
Sep 18 07:58:14 AM UTC 24 |
Sep 18 07:58:27 AM UTC 24 |
1023076184 ps |
T474 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_host_error_intr.3122625378 |
|
|
Sep 18 07:58:25 AM UTC 24 |
Sep 18 07:58:28 AM UTC 24 |
423442622 ps |
T475 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_fmt_empty.2155383244 |
|
|
Sep 18 07:58:22 AM UTC 24 |
Sep 18 07:58:28 AM UTC 24 |
244218031 ps |
T476 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_host_smoke.3847652812 |
|
|
Sep 18 07:57:55 AM UTC 24 |
Sep 18 07:58:29 AM UTC 24 |
3194440758 ps |
T477 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_smoke.1035304676 |
|
|
Sep 18 07:57:59 AM UTC 24 |
Sep 18 07:58:29 AM UTC 24 |
3740085100 ps |
T478 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_target_stretch.2129006340 |
|
|
Sep 18 07:58:28 AM UTC 24 |
Sep 18 07:58:31 AM UTC 24 |
1800970535 ps |
T479 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_stress_all.2361289959 |
|
|
Sep 18 07:54:31 AM UTC 24 |
Sep 18 07:58:32 AM UTC 24 |
28829022578 ps |
T480 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_acq.771553032 |
|
|
Sep 18 07:58:30 AM UTC 24 |
Sep 18 07:58:33 AM UTC 24 |
202830087 ps |
T481 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_tx.2167474076 |
|
|
Sep 18 07:58:32 AM UTC 24 |
Sep 18 07:58:34 AM UTC 24 |
239240166 ps |
T482 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_host_stretch_timeout.30214503 |
|
|
Sep 18 07:58:24 AM UTC 24 |
Sep 18 07:58:35 AM UTC 24 |
2047608470 ps |
T483 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_target_timeout.217996928 |
|
|
Sep 18 07:58:30 AM UTC 24 |
Sep 18 07:58:38 AM UTC 24 |
1451706879 ps |
T484 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_target_intr_smoke.1840254677 |
|
|
Sep 18 07:58:28 AM UTC 24 |
Sep 18 07:58:39 AM UTC 24 |
1003591170 ps |
T485 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_host_override.139132001 |
|
|
Sep 18 07:59:22 AM UTC 24 |
Sep 18 07:59:24 AM UTC 24 |
21087310 ps |
T17 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_host_perf.682027897 |
|
|
Sep 18 07:57:06 AM UTC 24 |
Sep 18 07:58:40 AM UTC 24 |
12644677655 ps |
T486 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_host_stretch_timeout.2241984407 |
|
|
Sep 18 07:57:59 AM UTC 24 |
Sep 18 07:58:41 AM UTC 24 |
3804081423 ps |
T487 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_target_bad_addr.2280277976 |
|
|
Sep 18 07:58:34 AM UTC 24 |
Sep 18 07:58:43 AM UTC 24 |
8473330467 ps |
T488 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_target_perf.2518131743 |
|
|
Sep 18 07:58:33 AM UTC 24 |
Sep 18 07:58:43 AM UTC 24 |
3033088579 ps |
T489 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_tx.864940950 |
|
|
Sep 18 07:58:40 AM UTC 24 |
Sep 18 07:58:44 AM UTC 24 |
476345714 ps |
T490 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_overflow.1339289709 |
|
|
Sep 18 07:57:56 AM UTC 24 |
Sep 18 07:58:44 AM UTC 24 |
1516904014 ps |
T491 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_acq.1258243023 |
|
|
Sep 18 07:58:40 AM UTC 24 |
Sep 18 07:58:44 AM UTC 24 |
1279252641 ps |
T492 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_target_tx_stretch_ctrl.1316647633 |
|
|
Sep 18 07:58:41 AM UTC 24 |
Sep 18 07:58:45 AM UTC 24 |
82883825 ps |
T493 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_full.2108313928 |
|
|
Sep 18 07:57:05 AM UTC 24 |
Sep 18 07:58:46 AM UTC 24 |
3441079005 ps |
T494 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_target_smbus_maxlen.3693777244 |
|
|
Sep 18 07:58:41 AM UTC 24 |
Sep 18 07:58:46 AM UTC 24 |
1007780264 ps |
T495 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_smbus_maxlen.3094871180 |
|
|
Sep 18 07:59:20 AM UTC 24 |
Sep 18 07:59:24 AM UTC 24 |
420017992 ps |
T496 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_alert_test.707092424 |
|
|
Sep 18 07:58:47 AM UTC 24 |
Sep 18 07:58:49 AM UTC 24 |
55128688 ps |
T497 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_host_override.2864460875 |
|
|
Sep 18 07:58:47 AM UTC 24 |
Sep 18 07:58:49 AM UTC 24 |
16767582 ps |
T498 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_stress_rd.4193368564 |
|
|
Sep 18 07:58:01 AM UTC 24 |
Sep 18 07:58:49 AM UTC 24 |
3462374124 ps |
T499 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_target_stress_rd.4125588077 |
|
|
Sep 18 07:58:27 AM UTC 24 |
Sep 18 07:58:50 AM UTC 24 |
5184105778 ps |
T500 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull_addr.1935045915 |
|
|
Sep 18 07:58:43 AM UTC 24 |
Sep 18 07:58:50 AM UTC 24 |
2188366563 ps |
T501 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_host_smoke.2688310964 |
|
|
Sep 18 07:58:19 AM UTC 24 |
Sep 18 07:58:51 AM UTC 24 |
6428485009 ps |
T502 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_fmt.4001265182 |
|
|
Sep 18 07:58:49 AM UTC 24 |
Sep 18 07:58:51 AM UTC 24 |
100883229 ps |
T503 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull.1741411155 |
|
|
Sep 18 07:58:43 AM UTC 24 |
Sep 18 07:58:51 AM UTC 24 |
521487921 ps |
T255 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_host_may_nack.812452795 |
|
|
Sep 18 07:58:39 AM UTC 24 |
Sep 18 07:58:54 AM UTC 24 |
351232326 ps |
T504 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_host_perf.2134873152 |
|
|
Sep 18 07:57:58 AM UTC 24 |
Sep 18 07:59:27 AM UTC 24 |
12593381013 ps |
T505 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_host_error_intr.3208300613 |
|
|
Sep 18 07:58:52 AM UTC 24 |
Sep 18 07:58:57 AM UTC 24 |
1490956672 ps |
T506 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_fmt_empty.304682739 |
|
|
Sep 18 07:58:49 AM UTC 24 |
Sep 18 07:58:58 AM UTC 24 |
930805530 ps |
T507 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_target_stress_wr.2731376819 |
|
|
Sep 18 07:57:08 AM UTC 24 |
Sep 18 07:58:59 AM UTC 24 |
26039607057 ps |
T508 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_host_stretch_timeout.2314940465 |
|
|
Sep 18 07:58:52 AM UTC 24 |
Sep 18 07:59:01 AM UTC 24 |
308925074 ps |
T509 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_stress_all.3076111564 |
|
|
Sep 18 07:58:10 AM UTC 24 |
Sep 18 07:59:05 AM UTC 24 |
13446433519 ps |
T510 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_target_intr_stress_wr.1318435417 |
|
|
Sep 18 07:58:29 AM UTC 24 |
Sep 18 07:59:06 AM UTC 24 |
16124981774 ps |
T511 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_intr_smoke.3687746935 |
|
|
Sep 18 07:59:01 AM UTC 24 |
Sep 18 07:59:08 AM UTC 24 |
1208335956 ps |
T512 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_stress_wr.2147546536 |
|
|
Sep 18 07:58:57 AM UTC 24 |
Sep 18 07:59:09 AM UTC 24 |
16054959136 ps |
T513 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_rx.314201456 |
|
|
Sep 18 07:58:49 AM UTC 24 |
Sep 18 07:59:09 AM UTC 24 |
494391522 ps |
T514 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_overflow.3396025970 |
|
|
Sep 18 07:57:05 AM UTC 24 |
Sep 18 07:59:11 AM UTC 24 |
5705800019 ps |
T515 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_acq.3427760174 |
|
|
Sep 18 07:59:09 AM UTC 24 |
Sep 18 07:59:11 AM UTC 24 |
127391929 ps |
T516 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_tx.203846817 |
|
|
Sep 18 07:59:10 AM UTC 24 |
Sep 18 07:59:13 AM UTC 24 |
418269005 ps |
T517 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_hrst.3636305272 |
|
|
Sep 18 07:59:12 AM UTC 24 |
Sep 18 07:59:17 AM UTC 24 |
451376235 ps |
T518 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_host_perf.2936923371 |
|
|
Sep 18 07:58:23 AM UTC 24 |
Sep 18 07:59:18 AM UTC 24 |
8515087169 ps |
T519 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_timeout.3278957279 |
|
|
Sep 18 07:59:06 AM UTC 24 |
Sep 18 07:59:18 AM UTC 24 |
2586965250 ps |
T269 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_perf.3094458200 |
|
|
Sep 18 07:59:10 AM UTC 24 |
Sep 18 07:59:19 AM UTC 24 |
636135537 ps |
T520 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_full.173065941 |
|
|
Sep 18 07:57:30 AM UTC 24 |
Sep 18 07:59:20 AM UTC 24 |
14460520258 ps |
T521 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_tx.1326099149 |
|
|
Sep 18 07:59:18 AM UTC 24 |
Sep 18 07:59:21 AM UTC 24 |
165137423 ps |
T522 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_intr_stress_wr.4055758361 |
|
|
Sep 18 07:59:02 AM UTC 24 |
Sep 18 07:59:21 AM UTC 24 |
5018663263 ps |
T253 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_host_may_nack.1262965427 |
|
|
Sep 18 07:59:13 AM UTC 24 |
Sep 18 07:59:21 AM UTC 24 |
381258701 ps |
T523 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_acq.3936479538 |
|
|
Sep 18 07:59:17 AM UTC 24 |
Sep 18 07:59:21 AM UTC 24 |
611992412 ps |
T524 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_stress_rd.1154477857 |
|
|
Sep 18 07:58:58 AM UTC 24 |
Sep 18 07:59:23 AM UTC 24 |
3873645905 ps |
T525 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_bad_addr.1607362179 |
|
|
Sep 18 07:59:11 AM UTC 24 |
Sep 18 07:59:23 AM UTC 24 |
1244364960 ps |
T87 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_smoke.1104540804 |
|
|
Sep 18 07:58:54 AM UTC 24 |
Sep 18 07:59:25 AM UTC 24 |
2050229363 ps |
T526 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_alert_test.1175812286 |
|
|
Sep 18 07:59:22 AM UTC 24 |
Sep 18 07:59:24 AM UTC 24 |
19070977 ps |
T527 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_tx_stretch_ctrl.1255915604 |
|
|
Sep 18 07:59:19 AM UTC 24 |
Sep 18 07:59:25 AM UTC 24 |
361463996 ps |
T53 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull.2212727026 |
|
|
Sep 18 07:59:20 AM UTC 24 |
Sep 18 07:59:26 AM UTC 24 |
5594620754 ps |
T528 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_stress_rd.1649520563 |
|
|
Sep 18 07:59:28 AM UTC 24 |
Sep 18 08:00:34 AM UTC 24 |
4908531548 ps |
T529 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull_addr.1933894200 |
|
|
Sep 18 07:59:21 AM UTC 24 |
Sep 18 07:59:26 AM UTC 24 |
452278511 ps |
T530 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_fmt.993583450 |
|
|
Sep 18 07:59:24 AM UTC 24 |
Sep 18 07:59:27 AM UTC 24 |
112199829 ps |
T531 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_stretch.2047572377 |
|
|
Sep 18 07:58:01 AM UTC 24 |
Sep 18 07:59:27 AM UTC 24 |
4115367126 ps |
T88 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_target_smoke.383627963 |
|
|
Sep 18 07:58:27 AM UTC 24 |
Sep 18 07:59:27 AM UTC 24 |
1579320620 ps |
T532 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_rx.1325505590 |
|
|
Sep 18 07:59:24 AM UTC 24 |
Sep 18 07:59:31 AM UTC 24 |
245778002 ps |
T533 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_host_error_intr.3168514873 |
|
|
Sep 18 07:59:27 AM UTC 24 |
Sep 18 07:59:32 AM UTC 24 |
92566684 ps |
T534 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_fmt_empty.3256439735 |
|
|
Sep 18 07:59:24 AM UTC 24 |
Sep 18 07:59:32 AM UTC 24 |
1129873449 ps |
T241 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_host_perf_precise.2492623867 |
|
|
Sep 18 07:58:51 AM UTC 24 |
Sep 18 07:59:34 AM UTC 24 |
1764598561 ps |
T535 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_host_smoke.1468008071 |
|
|
Sep 18 07:59:46 AM UTC 24 |
Sep 18 08:00:39 AM UTC 24 |
4851759381 ps |
T120 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_watermark.693502993 |
|
|
Sep 18 07:58:19 AM UTC 24 |
Sep 18 07:59:37 AM UTC 24 |
19710872679 ps |
T536 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_host_perf_precise.1649531542 |
|
|
Sep 18 07:59:26 AM UTC 24 |
Sep 18 07:59:38 AM UTC 24 |
264144733 ps |
T537 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_stress_wr.3488668117 |
|
|
Sep 18 07:59:28 AM UTC 24 |
Sep 18 07:59:39 AM UTC 24 |
10211593226 ps |
T538 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_host_stretch_timeout.1331749684 |
|
|
Sep 18 07:59:26 AM UTC 24 |
Sep 18 07:59:39 AM UTC 24 |
526967581 ps |
T539 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_watermark.3968989087 |
|
|
Sep 18 07:57:56 AM UTC 24 |
Sep 18 07:59:39 AM UTC 24 |
9741883072 ps |
T540 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_tx.2242170049 |
|
|
Sep 18 07:59:38 AM UTC 24 |
Sep 18 07:59:40 AM UTC 24 |
301165881 ps |
T541 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_intr_smoke.2274257726 |
|
|
Sep 18 07:59:31 AM UTC 24 |
Sep 18 07:59:40 AM UTC 24 |
4384041085 ps |
T542 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_acq.3203873669 |
|
|
Sep 18 07:59:37 AM UTC 24 |
Sep 18 07:59:41 AM UTC 24 |
301274096 ps |
T543 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_watermark.4049239151 |
|
|
Sep 18 07:56:43 AM UTC 24 |
Sep 18 07:59:42 AM UTC 24 |
13630969084 ps |
T544 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_full.321383127 |
|
|
Sep 18 07:57:57 AM UTC 24 |
Sep 18 07:59:42 AM UTC 24 |
14192220120 ps |
T545 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_intr_stress_wr.1844029513 |
|
|
Sep 18 07:59:33 AM UTC 24 |
Sep 18 07:59:44 AM UTC 24 |
8125552629 ps |
T546 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_host_smoke.4143591220 |
|
|
Sep 18 07:58:47 AM UTC 24 |
Sep 18 07:59:44 AM UTC 24 |
1427068968 ps |
T547 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_hrst.2945914538 |
|
|
Sep 18 07:59:41 AM UTC 24 |
Sep 18 07:59:45 AM UTC 24 |
512440452 ps |
T548 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_timeout.895306156 |
|
|
Sep 18 07:59:33 AM UTC 24 |
Sep 18 07:59:45 AM UTC 24 |
1163834865 ps |
T549 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_acq.2816785345 |
|
|
Sep 18 07:59:42 AM UTC 24 |
Sep 18 07:59:45 AM UTC 24 |
175160654 ps |
T550 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_tx.1220126970 |
|
|
Sep 18 07:59:43 AM UTC 24 |
Sep 18 07:59:46 AM UTC 24 |
174093354 ps |
T551 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_perf.3235479710 |
|
|
Sep 18 07:59:39 AM UTC 24 |
Sep 18 07:59:46 AM UTC 24 |
678441424 ps |
T552 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_watermark.1644219420 |
|
|
Sep 18 07:57:04 AM UTC 24 |
Sep 18 07:59:47 AM UTC 24 |
5892767562 ps |
T553 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_smbus_maxlen.4200884662 |
|
|
Sep 18 07:59:44 AM UTC 24 |
Sep 18 07:59:48 AM UTC 24 |
790511098 ps |
T554 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_bad_addr.674599422 |
|
|
Sep 18 07:59:40 AM UTC 24 |
Sep 18 07:59:48 AM UTC 24 |
787452710 ps |
T555 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_alert_test.2982607664 |
|
|
Sep 18 07:59:46 AM UTC 24 |
Sep 18 07:59:48 AM UTC 24 |
193643909 ps |
T25 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_host_mode_toggle.2424305726 |
|
|
Sep 18 07:59:41 AM UTC 24 |
Sep 18 07:59:49 AM UTC 24 |
143674888 ps |
T556 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_nack_txstretch.3040582081 |
|
|
Sep 18 07:59:46 AM UTC 24 |
Sep 18 07:59:49 AM UTC 24 |
526936149 ps |
T557 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_host_override.4097559255 |
|
|
Sep 18 07:59:47 AM UTC 24 |
Sep 18 07:59:49 AM UTC 24 |
30066922 ps |
T558 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_smoke.3507797917 |
|
|
Sep 18 07:59:28 AM UTC 24 |
Sep 18 07:59:50 AM UTC 24 |
1074129835 ps |
T559 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_host_may_nack.3784534244 |
|
|
Sep 18 07:59:41 AM UTC 24 |
Sep 18 07:59:51 AM UTC 24 |
1252510086 ps |
T560 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull_addr.3042470509 |
|
|
Sep 18 07:59:46 AM UTC 24 |
Sep 18 07:59:51 AM UTC 24 |
1738558039 ps |
T561 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_fmt.1775733833 |
|
|
Sep 18 07:59:49 AM UTC 24 |
Sep 18 07:59:51 AM UTC 24 |
1026946710 ps |
T562 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull.872524840 |
|
|
Sep 18 07:59:45 AM UTC 24 |
Sep 18 07:59:51 AM UTC 24 |
1591140113 ps |
T563 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_target_tx_stretch_ctrl.2329101955 |
|
|
Sep 18 07:59:43 AM UTC 24 |
Sep 18 07:59:52 AM UTC 24 |
416290705 ps |
T564 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_host_perf.4253251460 |
|
|
Sep 18 07:57:31 AM UTC 24 |
Sep 18 07:59:55 AM UTC 24 |
13649872291 ps |
T565 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_fmt_empty.1520102800 |
|
|
Sep 18 07:59:50 AM UTC 24 |
Sep 18 07:59:57 AM UTC 24 |
216245994 ps |
T566 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_rx.1873922431 |
|
|
Sep 18 07:59:50 AM UTC 24 |
Sep 18 07:59:57 AM UTC 24 |
629506887 ps |
T567 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_host_error_intr.3520671837 |
|
|
Sep 18 07:59:52 AM UTC 24 |
Sep 18 07:59:58 AM UTC 24 |
216091763 ps |
T568 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_host_perf.681776847 |
|
|
Sep 18 07:59:51 AM UTC 24 |
Sep 18 08:00:00 AM UTC 24 |
495241290 ps |
T569 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_overflow.3025712953 |
|
|
Sep 18 07:58:21 AM UTC 24 |
Sep 18 08:00:01 AM UTC 24 |
5600375583 ps |
T570 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_smoke.4213069947 |
|
|
Sep 18 07:59:52 AM UTC 24 |
Sep 18 08:00:02 AM UTC 24 |
1980718579 ps |
T571 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_watermark.3124048759 |
|
|
Sep 18 07:57:29 AM UTC 24 |
Sep 18 08:00:05 AM UTC 24 |
22597517494 ps |
T572 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_host_perf.3065002620 |
|
|
Sep 18 07:55:37 AM UTC 24 |
Sep 18 08:00:06 AM UTC 24 |
27559236360 ps |
T573 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_overflow.1744164288 |
|
|
Sep 18 07:58:48 AM UTC 24 |
Sep 18 08:00:07 AM UTC 24 |
8533343062 ps |
T574 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_intr_smoke.84706625 |
|
|
Sep 18 07:59:59 AM UTC 24 |
Sep 18 08:00:08 AM UTC 24 |
1565275346 ps |
T575 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_host_stretch_timeout.3209289401 |
|
|
Sep 18 07:59:51 AM UTC 24 |
Sep 18 08:00:08 AM UTC 24 |
633767177 ps |
T576 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_overflow.1677149103 |
|
|
Sep 18 07:59:24 AM UTC 24 |
Sep 18 08:00:08 AM UTC 24 |
1327839529 ps |
T89 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_acq.4048278113 |
|
|
Sep 18 08:00:03 AM UTC 24 |
Sep 18 08:00:09 AM UTC 24 |
452729631 ps |
T267 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_target_stress_all.2498693001 |
|
|
Sep 18 07:56:56 AM UTC 24 |
Sep 18 08:00:10 AM UTC 24 |
60594887118 ps |
T577 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_tx.2325960336 |
|
|
Sep 18 08:00:07 AM UTC 24 |
Sep 18 08:00:10 AM UTC 24 |
463552886 ps |
T79 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_host_mode_toggle.2961774068 |
|
|
Sep 18 08:00:09 AM UTC 24 |
Sep 18 08:00:13 AM UTC 24 |
562931097 ps |
T578 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_hrst.2937529065 |
|
|
Sep 18 08:00:09 AM UTC 24 |
Sep 18 08:00:13 AM UTC 24 |
933429401 ps |
T579 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_host_smoke.1947505229 |
|
|
Sep 18 07:59:22 AM UTC 24 |
Sep 18 08:00:13 AM UTC 24 |
22507456660 ps |
T580 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_timeout.1496273864 |
|
|
Sep 18 08:00:01 AM UTC 24 |
Sep 18 08:00:14 AM UTC 24 |
4897737434 ps |
T581 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_tx.1266519077 |
|
|
Sep 18 08:00:10 AM UTC 24 |
Sep 18 08:00:14 AM UTC 24 |
624503936 ps |
T582 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_tx_stretch_ctrl.4290034588 |
|
|
Sep 18 08:00:10 AM UTC 24 |
Sep 18 08:00:14 AM UTC 24 |
113258083 ps |
T583 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_bad_addr.1873472075 |
|
|
Sep 18 08:00:09 AM UTC 24 |
Sep 18 08:00:16 AM UTC 24 |
1203477761 ps |
T584 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_host_may_nack.1166961946 |
|
|
Sep 18 08:00:09 AM UTC 24 |
Sep 18 08:00:16 AM UTC 24 |
3789584313 ps |
T585 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_alert_test.1156799722 |
|
|
Sep 18 08:00:15 AM UTC 24 |
Sep 18 08:00:17 AM UTC 24 |
20560224 ps |
T586 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_acq.3510552485 |
|
|
Sep 18 08:00:10 AM UTC 24 |
Sep 18 08:00:17 AM UTC 24 |
1087406531 ps |
T587 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_full.1503865801 |
|
|
Sep 18 07:59:26 AM UTC 24 |
Sep 18 08:00:17 AM UTC 24 |
7129834021 ps |
T588 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_nack_txstretch.2717303484 |
|
|
Sep 18 08:00:15 AM UTC 24 |
Sep 18 08:00:18 AM UTC 24 |
607218223 ps |
T589 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull.494653594 |
|
|
Sep 18 08:00:14 AM UTC 24 |
Sep 18 08:00:18 AM UTC 24 |
1005785996 ps |
T590 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/15.i2c_host_override.3672641744 |
|
|
Sep 18 08:00:17 AM UTC 24 |
Sep 18 08:00:19 AM UTC 24 |
15760961 ps |
T591 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_perf.3172545760 |
|
|
Sep 18 08:00:07 AM UTC 24 |
Sep 18 08:00:19 AM UTC 24 |
969739671 ps |
T592 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_smbus_maxlen.371652330 |
|
|
Sep 18 08:00:14 AM UTC 24 |
Sep 18 08:00:19 AM UTC 24 |
922380192 ps |
T593 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull_addr.2565620215 |
|
|
Sep 18 08:00:15 AM UTC 24 |
Sep 18 08:00:20 AM UTC 24 |
465541718 ps |
T594 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_fmt.1482374456 |
|
|
Sep 18 08:00:18 AM UTC 24 |
Sep 18 08:00:21 AM UTC 24 |
93754271 ps |
T595 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/15.i2c_host_error_intr.2284509502 |
|
|
Sep 18 08:00:21 AM UTC 24 |
Sep 18 08:00:25 AM UTC 24 |
645693025 ps |
T596 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_fmt_empty.2652528242 |
|
|
Sep 18 08:00:18 AM UTC 24 |
Sep 18 08:00:26 AM UTC 24 |
314094745 ps |
T597 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_rx.3577090054 |
|
|
Sep 18 08:00:19 AM UTC 24 |
Sep 18 08:00:28 AM UTC 24 |
564764081 ps |
T121 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_watermark.3725919127 |
|
|
Sep 18 07:59:23 AM UTC 24 |
Sep 18 08:00:33 AM UTC 24 |
3331561068 ps |
T598 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_overflow.372071321 |
|
|
Sep 18 07:59:49 AM UTC 24 |
Sep 18 08:00:45 AM UTC 24 |
3430625915 ps |
T599 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/15.i2c_target_intr_smoke.1542719512 |
|
|
Sep 18 08:00:35 AM UTC 24 |
Sep 18 08:00:48 AM UTC 24 |
4073065147 ps |
T600 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/15.i2c_target_stretch.1681005338 |
|
|
Sep 18 08:00:34 AM UTC 24 |
Sep 18 08:00:49 AM UTC 24 |
1091585725 ps |
T601 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_host_perf.2431468622 |
|
|
Sep 18 07:55:14 AM UTC 24 |
Sep 18 08:00:50 AM UTC 24 |
47465380579 ps |
T602 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_acq.1887357341 |
|
|
Sep 18 08:00:49 AM UTC 24 |
Sep 18 08:00:53 AM UTC 24 |
661870370 ps |
T603 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_host_perf_precise.2484254947 |
|
|
Sep 18 07:59:51 AM UTC 24 |
Sep 18 08:00:54 AM UTC 24 |
6419367013 ps |
T604 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_tx.1386722177 |
|
|
Sep 18 08:00:50 AM UTC 24 |
Sep 18 08:00:54 AM UTC 24 |
179877895 ps |
T605 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/15.i2c_target_timeout.2885724295 |
|
|
Sep 18 08:00:45 AM UTC 24 |
Sep 18 08:00:56 AM UTC 24 |
5590621708 ps |
T36 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_host_perf.2628472947 |
|
|
Sep 18 07:54:56 AM UTC 24 |
Sep 18 08:00:56 AM UTC 24 |
13033767935 ps |
T606 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/15.i2c_target_smoke.4109082583 |
|
|
Sep 18 08:00:26 AM UTC 24 |
Sep 18 08:00:57 AM UTC 24 |
3442085213 ps |
T607 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_stretch.3529266946 |
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Sep 18 07:59:57 AM UTC 24 |
Sep 18 08:00:58 AM UTC 24 |
4716818184 ps |
T608 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/15.i2c_target_perf.2585423003 |
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Sep 18 08:00:54 AM UTC 24 |
Sep 18 08:01:00 AM UTC 24 |
2553085639 ps |
T609 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/15.i2c_host_stretch_timeout.40853781 |
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Sep 18 08:00:21 AM UTC 24 |
Sep 18 08:01:01 AM UTC 24 |
728817108 ps |
T610 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_watermarks_tx.1321470478 |
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Sep 18 08:00:59 AM UTC 24 |
Sep 18 08:01:02 AM UTC 24 |
633603449 ps |
T611 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/15.i2c_target_bad_addr.1224140367 |
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Sep 18 08:00:55 AM UTC 24 |
Sep 18 08:01:03 AM UTC 24 |
1400823788 ps |
T612 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_watermarks_acq.2270156198 |
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Sep 18 08:00:58 AM UTC 24 |
Sep 18 08:01:04 AM UTC 24 |
432744865 ps |