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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
91.26 97.20 89.46 97.22 72.02 94.23 98.47 90.21


Total test records in report: 1857
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T293 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/20.i2c_target_stress_all.3286959447 Sep 18 08:03:30 AM UTC 24 Sep 18 08:05:15 AM UTC 24 109830009260 ps
T837 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_overflow.4197401741 Sep 18 08:03:44 AM UTC 24 Sep 18 08:05:15 AM UTC 24 5638463835 ps
T838 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_host_perf_precise.4024104321 Sep 18 08:05:13 AM UTC 24 Sep 18 08:05:16 AM UTC 24 75717739 ps
T839 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_reset_rx.366127893 Sep 18 08:05:10 AM UTC 24 Sep 18 08:05:17 AM UTC 24 139945824 ps
T840 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/17.i2c_host_stress_all.3407960903 Sep 18 08:01:44 AM UTC 24 Sep 18 08:05:17 AM UTC 24 12489787693 ps
T841 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_fmt_empty.3385496274 Sep 18 08:05:09 AM UTC 24 Sep 18 08:05:18 AM UTC 24 405505047 ps
T842 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/19.i2c_target_stress_all.306170089 Sep 18 08:02:48 AM UTC 24 Sep 18 08:05:19 AM UTC 24 48672883116 ps
T843 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_intr_stress_wr.2776443033 Sep 18 07:59:59 AM UTC 24 Sep 18 08:05:19 AM UTC 24 20274380542 ps
T844 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_full.849003559 Sep 18 08:01:39 AM UTC 24 Sep 18 08:05:19 AM UTC 24 3412843373 ps
T845 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_overflow.2149444345 Sep 18 08:04:20 AM UTC 24 Sep 18 08:05:19 AM UTC 24 2971074057 ps
T846 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_host_error_intr.1865963153 Sep 18 08:05:15 AM UTC 24 Sep 18 08:05:21 AM UTC 24 148335013 ps
T847 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_acq.1692184205 Sep 18 08:05:20 AM UTC 24 Sep 18 08:05:23 AM UTC 24 218808601 ps
T848 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_host_stretch_timeout.3767199983 Sep 18 08:05:13 AM UTC 24 Sep 18 08:05:24 AM UTC 24 3645654070 ps
T849 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_tx.2780105082 Sep 18 08:05:21 AM UTC 24 Sep 18 08:05:25 AM UTC 24 276075754 ps
T850 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_stretch.4185516356 Sep 18 08:05:19 AM UTC 24 Sep 18 08:05:28 AM UTC 24 354146396 ps
T851 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_timeout.1573263266 Sep 18 08:05:20 AM UTC 24 Sep 18 08:05:28 AM UTC 24 12368046472 ps
T852 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_intr_smoke.2299444134 Sep 18 08:05:19 AM UTC 24 Sep 18 08:05:30 AM UTC 24 3637300782 ps
T853 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_smoke.1926561560 Sep 18 08:05:16 AM UTC 24 Sep 18 08:05:30 AM UTC 24 943243902 ps
T854 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_host_mode_toggle.2140763714 Sep 18 08:05:28 AM UTC 24 Sep 18 08:05:31 AM UTC 24 62087392 ps
T855 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_hrst.1958099441 Sep 18 08:05:26 AM UTC 24 Sep 18 08:05:32 AM UTC 24 1364755920 ps
T856 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_watermark.3659802751 Sep 18 08:03:44 AM UTC 24 Sep 18 08:05:33 AM UTC 24 4708806367 ps
T857 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_full.1048984183 Sep 18 08:04:20 AM UTC 24 Sep 18 08:05:33 AM UTC 24 2945555816 ps
T858 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_tx.1041364609 Sep 18 08:05:32 AM UTC 24 Sep 18 08:05:34 AM UTC 24 222674364 ps
T859 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_perf.1681416534 Sep 18 08:05:24 AM UTC 24 Sep 18 08:05:35 AM UTC 24 938632706 ps
T860 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_acq.1800376084 Sep 18 08:05:31 AM UTC 24 Sep 18 08:05:35 AM UTC 24 1524536233 ps
T861 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_stress_rd.1697379604 Sep 18 08:05:18 AM UTC 24 Sep 18 08:05:36 AM UTC 24 1100384235 ps
T248 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_host_may_nack.844113952 Sep 18 08:05:29 AM UTC 24 Sep 18 08:05:36 AM UTC 24 1179369310 ps
T862 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_bad_addr.855528066 Sep 18 08:05:25 AM UTC 24 Sep 18 08:05:36 AM UTC 24 2331320202 ps
T863 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_tx_stretch_ctrl.1259230273 Sep 18 08:05:32 AM UTC 24 Sep 18 08:05:37 AM UTC 24 130421170 ps
T864 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_alert_test.1771345473 Sep 18 08:05:36 AM UTC 24 Sep 18 08:05:38 AM UTC 24 59587393 ps
T865 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_smbus_maxlen.3130732657 Sep 18 08:05:33 AM UTC 24 Sep 18 08:05:38 AM UTC 24 962811441 ps
T866 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull_addr.853005689 Sep 18 08:05:34 AM UTC 24 Sep 18 08:05:39 AM UTC 24 570691716 ps
T867 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/22.i2c_target_stress_rd.3647755130 Sep 18 08:04:29 AM UTC 24 Sep 18 08:05:50 AM UTC 24 6180857441 ps
T868 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull.4068699716 Sep 18 08:05:34 AM UTC 24 Sep 18 08:05:39 AM UTC 24 921788789 ps
T869 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_host_override.3998329836 Sep 18 08:05:37 AM UTC 24 Sep 18 08:05:39 AM UTC 24 79064156 ps
T870 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/22.i2c_host_smoke.415269674 Sep 18 08:04:16 AM UTC 24 Sep 18 08:05:40 AM UTC 24 1591727902 ps
T871 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_fmt.2970242734 Sep 18 08:05:37 AM UTC 24 Sep 18 08:05:40 AM UTC 24 228159614 ps
T872 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_intr_stress_wr.425856305 Sep 18 08:05:20 AM UTC 24 Sep 18 08:05:40 AM UTC 24 14123526456 ps
T873 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/21.i2c_host_perf.2072254464 Sep 18 08:03:46 AM UTC 24 Sep 18 08:05:42 AM UTC 24 8106787417 ps
T874 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_host_perf_precise.1245637417 Sep 18 08:05:40 AM UTC 24 Sep 18 08:05:42 AM UTC 24 55156925 ps
T875 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_host_error_intr.3105067042 Sep 18 08:05:41 AM UTC 24 Sep 18 08:05:45 AM UTC 24 303228858 ps
T876 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_host_smoke.682562737 Sep 18 08:05:04 AM UTC 24 Sep 18 08:05:52 AM UTC 24 1905277964 ps
T877 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_acq.1201900297 Sep 18 08:05:56 AM UTC 24 Sep 18 08:05:58 AM UTC 24 141661643 ps
T878 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_target_stress_wr.195194579 Sep 18 07:59:52 AM UTC 24 Sep 18 08:05:59 AM UTC 24 39417512771 ps
T879 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_fmt_empty.3847615108 Sep 18 08:05:38 AM UTC 24 Sep 18 08:05:59 AM UTC 24 324863799 ps
T880 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/16.i2c_target_stress_wr.1625060612 Sep 18 08:01:13 AM UTC 24 Sep 18 08:06:00 AM UTC 24 54574769540 ps
T881 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_intr_smoke.2930166299 Sep 18 08:05:50 AM UTC 24 Sep 18 08:06:01 AM UTC 24 4604246847 ps
T882 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_tx.3498882823 Sep 18 08:05:58 AM UTC 24 Sep 18 08:06:01 AM UTC 24 252514854 ps
T883 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_stress_wr.1931099461 Sep 18 08:05:43 AM UTC 24 Sep 18 08:06:02 AM UTC 24 18246361771 ps
T884 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_smoke.2032676913 Sep 18 08:05:41 AM UTC 24 Sep 18 08:06:02 AM UTC 24 1944898597 ps
T885 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_timeout.711512918 Sep 18 08:05:51 AM UTC 24 Sep 18 08:06:05 AM UTC 24 10231929968 ps
T886 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_acq.2475341879 Sep 18 08:06:02 AM UTC 24 Sep 18 08:06:05 AM UTC 24 274067980 ps
T887 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_hrst.2985661328 Sep 18 08:06:01 AM UTC 24 Sep 18 08:06:05 AM UTC 24 328630098 ps
T888 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_tx.2508555528 Sep 18 08:06:03 AM UTC 24 Sep 18 08:06:06 AM UTC 24 95711913 ps
T889 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_perf.619340545 Sep 18 08:05:59 AM UTC 24 Sep 18 08:06:06 AM UTC 24 3073383802 ps
T890 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_host_may_nack.3370465013 Sep 18 08:06:02 AM UTC 24 Sep 18 08:06:07 AM UTC 24 427288455 ps
T891 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_tx_stretch_ctrl.2511539213 Sep 18 08:06:03 AM UTC 24 Sep 18 08:06:08 AM UTC 24 184201827 ps
T892 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_alert_test.604638390 Sep 18 08:06:07 AM UTC 24 Sep 18 08:06:09 AM UTC 24 19506976 ps
T893 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/21.i2c_target_intr_stress_wr.2264346312 Sep 18 08:04:01 AM UTC 24 Sep 18 08:06:09 AM UTC 24 10066035316 ps
T894 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_bad_addr.2287572480 Sep 18 08:06:01 AM UTC 24 Sep 18 08:06:09 AM UTC 24 3931455329 ps
T895 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull.1645307970 Sep 18 08:06:04 AM UTC 24 Sep 18 08:06:09 AM UTC 24 562285925 ps
T896 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_smbus_maxlen.4123939546 Sep 18 08:06:04 AM UTC 24 Sep 18 08:06:09 AM UTC 24 1972783157 ps
T897 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_nack_txstretch.3605317634 Sep 18 08:06:07 AM UTC 24 Sep 18 08:06:10 AM UTC 24 212574421 ps
T898 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_host_override.1655553390 Sep 18 08:06:08 AM UTC 24 Sep 18 08:06:10 AM UTC 24 20229410 ps
T899 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull_addr.287355668 Sep 18 08:06:06 AM UTC 24 Sep 18 08:06:10 AM UTC 24 1027443165 ps
T900 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_fmt.1486243425 Sep 18 08:06:09 AM UTC 24 Sep 18 08:06:11 AM UTC 24 111867320 ps
T901 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_full.2474893153 Sep 18 08:05:11 AM UTC 24 Sep 18 08:06:13 AM UTC 24 5948952944 ps
T902 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_host_error_intr.380160963 Sep 18 08:06:11 AM UTC 24 Sep 18 08:06:15 AM UTC 24 274563057 ps
T903 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_host_smoke.3451505252 Sep 18 08:05:36 AM UTC 24 Sep 18 08:06:16 AM UTC 24 3528635091 ps
T904 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_host_perf_precise.442471340 Sep 18 08:06:10 AM UTC 24 Sep 18 08:06:16 AM UTC 24 80298608 ps
T905 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/22.i2c_target_stress_wr.3283929572 Sep 18 08:04:25 AM UTC 24 Sep 18 08:06:21 AM UTC 24 46650946856 ps
T906 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/19.i2c_target_intr_stress_wr.3342748879 Sep 18 08:02:39 AM UTC 24 Sep 18 08:06:22 AM UTC 24 17737021635 ps
T907 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_stress_all.2555186111 Sep 18 08:05:25 AM UTC 24 Sep 18 08:06:24 AM UTC 24 38800269175 ps
T908 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_rx.1274333323 Sep 18 08:06:10 AM UTC 24 Sep 18 08:06:24 AM UTC 24 365616402 ps
T909 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/22.i2c_target_intr_stress_wr.2653709944 Sep 18 08:04:33 AM UTC 24 Sep 18 08:06:27 AM UTC 24 14696867344 ps
T910 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_acq.503741119 Sep 18 08:06:25 AM UTC 24 Sep 18 08:06:28 AM UTC 24 315229992 ps
T911 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_fmt_empty.2002161832 Sep 18 08:06:10 AM UTC 24 Sep 18 08:06:29 AM UTC 24 298084823 ps
T912 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_intr_smoke.1571526676 Sep 18 08:06:17 AM UTC 24 Sep 18 08:06:29 AM UTC 24 4950879198 ps
T913 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_timeout.1119530615 Sep 18 08:06:23 AM UTC 24 Sep 18 08:06:30 AM UTC 24 6512637644 ps
T914 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_smoke.1514005276 Sep 18 08:06:12 AM UTC 24 Sep 18 08:06:31 AM UTC 24 2014011391 ps
T915 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_watermark.1735342519 Sep 18 08:05:07 AM UTC 24 Sep 18 08:06:31 AM UTC 24 7050747472 ps
T916 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_tx.3135650181 Sep 18 08:06:28 AM UTC 24 Sep 18 08:06:32 AM UTC 24 224350433 ps
T917 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_full.130471172 Sep 18 08:02:05 AM UTC 24 Sep 18 08:06:32 AM UTC 24 15541838453 ps
T918 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_stress_rd.1413163683 Sep 18 08:06:16 AM UTC 24 Sep 18 08:06:35 AM UTC 24 1211967058 ps
T919 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_host_stretch_timeout.11408412 Sep 18 08:05:40 AM UTC 24 Sep 18 08:06:35 AM UTC 24 1030573841 ps
T920 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_tx.1547898587 Sep 18 08:06:33 AM UTC 24 Sep 18 08:06:35 AM UTC 24 779809048 ps
T921 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_acq.4147581239 Sep 18 08:06:33 AM UTC 24 Sep 18 08:06:37 AM UTC 24 2680159368 ps
T922 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_tx.3551970736 Sep 18 08:07:12 AM UTC 24 Sep 18 08:07:15 AM UTC 24 138429841 ps
T923 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_tx_stretch_ctrl.607814610 Sep 18 08:06:33 AM UTC 24 Sep 18 08:06:38 AM UTC 24 88693213 ps
T924 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_alert_test.1327028979 Sep 18 08:06:36 AM UTC 24 Sep 18 08:06:38 AM UTC 24 28472708 ps
T925 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_smbus_maxlen.2222330961 Sep 18 08:06:35 AM UTC 24 Sep 18 08:06:39 AM UTC 24 470983874 ps
T926 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_nack_txstretch.1165994856 Sep 18 08:06:36 AM UTC 24 Sep 18 08:06:40 AM UTC 24 1368897908 ps
T927 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_full.1875865774 Sep 18 08:05:40 AM UTC 24 Sep 18 08:06:40 AM UTC 24 2059512847 ps
T928 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_perf.3031810138 Sep 18 08:06:28 AM UTC 24 Sep 18 08:06:40 AM UTC 24 1686901668 ps
T929 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_bad_addr.3095479967 Sep 18 08:06:30 AM UTC 24 Sep 18 08:06:40 AM UTC 24 4676855397 ps
T930 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_host_override.2767240256 Sep 18 08:06:38 AM UTC 24 Sep 18 08:06:40 AM UTC 24 49139699 ps
T931 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull.3587196963 Sep 18 08:06:36 AM UTC 24 Sep 18 08:06:41 AM UTC 24 6680854943 ps
T932 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull_addr.3122887856 Sep 18 08:06:36 AM UTC 24 Sep 18 08:06:41 AM UTC 24 10012888297 ps
T933 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_stress_rd.3437800294 Sep 18 08:05:43 AM UTC 24 Sep 18 08:06:43 AM UTC 24 16525032215 ps
T934 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_fmt.530743313 Sep 18 08:06:40 AM UTC 24 Sep 18 08:06:43 AM UTC 24 138121836 ps
T935 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_fmt_empty.2423657156 Sep 18 08:06:40 AM UTC 24 Sep 18 08:06:46 AM UTC 24 198827984 ps
T936 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_host_error_intr.3795463549 Sep 18 08:06:43 AM UTC 24 Sep 18 08:06:47 AM UTC 24 104326191 ps
T937 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_host_stretch_timeout.1093358243 Sep 18 08:06:10 AM UTC 24 Sep 18 08:06:48 AM UTC 24 669715750 ps
T938 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_rx.1878706217 Sep 18 08:06:40 AM UTC 24 Sep 18 08:06:53 AM UTC 24 866271641 ps
T939 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_overflow.2603943515 Sep 18 08:05:37 AM UTC 24 Sep 18 08:06:55 AM UTC 24 1812268597 ps
T940 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_target_smoke.4250657360 Sep 18 08:06:44 AM UTC 24 Sep 18 08:06:56 AM UTC 24 3077218322 ps
T941 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_target_intr_smoke.1806078260 Sep 18 08:06:54 AM UTC 24 Sep 18 08:07:02 AM UTC 24 4077047549 ps
T942 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_stretch.1836328901 Sep 18 08:05:45 AM UTC 24 Sep 18 08:07:03 AM UTC 24 4634633749 ps
T943 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_target_stretch.1859891782 Sep 18 08:06:48 AM UTC 24 Sep 18 08:07:03 AM UTC 24 2624646222 ps
T944 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_host_may_nack.1703930962 Sep 18 08:06:33 AM UTC 24 Sep 18 08:07:05 AM UTC 24 591652126 ps
T945 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_acq.4003602405 Sep 18 08:07:03 AM UTC 24 Sep 18 08:07:05 AM UTC 24 327086791 ps
T946 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_tx.3060529113 Sep 18 08:07:04 AM UTC 24 Sep 18 08:07:06 AM UTC 24 957637611 ps
T947 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_target_timeout.2236473176 Sep 18 08:06:56 AM UTC 24 Sep 18 08:07:09 AM UTC 24 1473153218 ps
T948 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_target_perf.1545381195 Sep 18 08:07:04 AM UTC 24 Sep 18 08:07:11 AM UTC 24 13073546853 ps
T949 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_target_bad_addr.1252132661 Sep 18 08:07:06 AM UTC 24 Sep 18 08:07:15 AM UTC 24 8244750386 ps
T950 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_host_may_nack.1840554905 Sep 18 08:07:10 AM UTC 24 Sep 18 08:07:15 AM UTC 24 284235900 ps
T951 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_acq.1346028334 Sep 18 08:07:11 AM UTC 24 Sep 18 08:07:16 AM UTC 24 12194044575 ps
T952 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_host_stretch_timeout.3137694137 Sep 18 08:06:42 AM UTC 24 Sep 18 08:07:19 AM UTC 24 1348982092 ps
T953 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_host_smoke.1256177835 Sep 18 08:06:38 AM UTC 24 Sep 18 08:07:19 AM UTC 24 9843702171 ps
T954 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_target_stress_rd.1698961348 Sep 18 08:06:47 AM UTC 24 Sep 18 08:07:20 AM UTC 24 1654616688 ps
T48 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull_addr.3642617042 Sep 18 08:07:16 AM UTC 24 Sep 18 08:07:21 AM UTC 24 1052906190 ps
T955 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_target_tx_stretch_ctrl.1457796943 Sep 18 08:07:15 AM UTC 24 Sep 18 08:07:21 AM UTC 24 339980964 ps
T956 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_target_smbus_maxlen.3898504262 Sep 18 08:07:16 AM UTC 24 Sep 18 08:07:21 AM UTC 24 483557679 ps
T957 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_alert_test.2313791742 Sep 18 08:07:20 AM UTC 24 Sep 18 08:07:22 AM UTC 24 16960390 ps
T958 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull.2898883830 Sep 18 08:07:16 AM UTC 24 Sep 18 08:07:22 AM UTC 24 552934351 ps
T959 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull.2378192493 Sep 18 08:08:24 AM UTC 24 Sep 18 08:08:28 AM UTC 24 6141303765 ps
T960 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_host_perf.1558730402 Sep 18 08:05:11 AM UTC 24 Sep 18 08:07:23 AM UTC 24 5439517243 ps
T78 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_host_stress_all.3419553869 Sep 18 08:05:41 AM UTC 24 Sep 18 08:07:24 AM UTC 24 18297617657 ps
T154 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_host_override.1682860064 Sep 18 08:07:22 AM UTC 24 Sep 18 08:07:24 AM UTC 24 47379030 ps
T961 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_host_perf_precise.3850847854 Sep 18 08:06:42 AM UTC 24 Sep 18 08:07:24 AM UTC 24 2048230749 ps
T962 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_fmt.651085641 Sep 18 08:07:23 AM UTC 24 Sep 18 08:07:26 AM UTC 24 97424561 ps
T963 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_stress_all.1578391494 Sep 18 08:06:00 AM UTC 24 Sep 18 08:07:26 AM UTC 24 16703059819 ps
T964 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_overflow.1159338078 Sep 18 08:05:08 AM UTC 24 Sep 18 08:07:27 AM UTC 24 8373623120 ps
T37 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/18.i2c_host_stress_all.3857860474 Sep 18 08:02:06 AM UTC 24 Sep 18 08:07:27 AM UTC 24 58943949884 ps
T965 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_rx.1700984425 Sep 18 08:07:24 AM UTC 24 Sep 18 08:07:30 AM UTC 24 586907160 ps
T966 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_host_perf.450563567 Sep 18 08:06:42 AM UTC 24 Sep 18 08:07:30 AM UTC 24 7090442856 ps
T967 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_host_error_intr.3692223801 Sep 18 08:07:26 AM UTC 24 Sep 18 08:07:30 AM UTC 24 231241761 ps
T968 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_fmt_empty.3644581476 Sep 18 08:07:23 AM UTC 24 Sep 18 08:07:33 AM UTC 24 1283041579 ps
T969 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_target_stress_wr.1743836193 Sep 18 08:06:46 AM UTC 24 Sep 18 08:07:38 AM UTC 24 15278186198 ps
T970 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_smoke.3602841472 Sep 18 08:07:28 AM UTC 24 Sep 18 08:07:38 AM UTC 24 3157970839 ps
T971 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_stress_rd.3702276493 Sep 18 08:07:31 AM UTC 24 Sep 18 08:07:38 AM UTC 24 1754897002 ps
T972 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_intr_smoke.3006676410 Sep 18 08:07:31 AM UTC 24 Sep 18 08:07:39 AM UTC 24 1274697817 ps
T973 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_host_smoke.2916103817 Sep 18 08:06:07 AM UTC 24 Sep 18 08:07:41 AM UTC 24 9554253457 ps
T974 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_target_bad_addr.1843847165 Sep 18 08:08:18 AM UTC 24 Sep 18 08:08:28 AM UTC 24 10285760694 ps
T975 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_stretch.3321903564 Sep 18 08:06:17 AM UTC 24 Sep 18 08:07:42 AM UTC 24 5548517981 ps
T976 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_host_stretch_timeout.759379393 Sep 18 08:07:25 AM UTC 24 Sep 18 08:07:42 AM UTC 24 2908340385 ps
T977 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_acq.3008474687 Sep 18 08:07:39 AM UTC 24 Sep 18 08:07:42 AM UTC 24 251586720 ps
T978 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_tx.1058204173 Sep 18 08:07:40 AM UTC 24 Sep 18 08:07:43 AM UTC 24 369742779 ps
T979 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_target_stress_all.78048439 Sep 18 08:07:06 AM UTC 24 Sep 18 08:07:44 AM UTC 24 22223279317 ps
T980 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_host_override.4204410670 Sep 18 08:08:28 AM UTC 24 Sep 18 08:08:30 AM UTC 24 32206298 ps
T981 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_intr_stress_wr.2953532352 Sep 18 08:06:22 AM UTC 24 Sep 18 08:07:46 AM UTC 24 7712554265 ps
T982 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_tx.2647605325 Sep 18 08:07:45 AM UTC 24 Sep 18 08:07:47 AM UTC 24 611886434 ps
T983 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_host_perf_precise.3077611473 Sep 18 08:07:25 AM UTC 24 Sep 18 08:07:48 AM UTC 24 456281247 ps
T984 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_timeout.3676504477 Sep 18 08:07:39 AM UTC 24 Sep 18 08:07:49 AM UTC 24 5075760017 ps
T985 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_acq.2208235400 Sep 18 08:07:44 AM UTC 24 Sep 18 08:07:49 AM UTC 24 1115424743 ps
T986 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_bad_addr.672165464 Sep 18 08:07:42 AM UTC 24 Sep 18 08:07:51 AM UTC 24 5414606844 ps
T987 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_smbus_maxlen.622425290 Sep 18 08:07:47 AM UTC 24 Sep 18 08:07:52 AM UTC 24 609575177 ps
T988 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_alert_test.2214577669 Sep 18 08:07:50 AM UTC 24 Sep 18 08:07:52 AM UTC 24 16535816 ps
T989 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_perf.541691242 Sep 18 08:07:41 AM UTC 24 Sep 18 08:07:53 AM UTC 24 812819156 ps
T990 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull.1600427623 Sep 18 08:07:48 AM UTC 24 Sep 18 08:07:53 AM UTC 24 1166367478 ps
T991 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_nack_txstretch.4210450926 Sep 18 08:07:50 AM UTC 24 Sep 18 08:07:54 AM UTC 24 535643896 ps
T992 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull_addr.2331237193 Sep 18 08:07:49 AM UTC 24 Sep 18 08:07:55 AM UTC 24 588365200 ps
T993 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_target_intr_stress_wr.2141995567 Sep 18 08:05:51 AM UTC 24 Sep 18 08:07:55 AM UTC 24 15633079498 ps
T994 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_stretch.1728234091 Sep 18 08:07:31 AM UTC 24 Sep 18 08:07:55 AM UTC 24 574037711 ps
T995 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_host_override.2556357871 Sep 18 08:07:53 AM UTC 24 Sep 18 08:07:55 AM UTC 24 44327976 ps
T996 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_fmt.3922902132 Sep 18 08:07:54 AM UTC 24 Sep 18 08:07:56 AM UTC 24 214971121 ps
T997 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_target_stress_wr.345628977 Sep 18 08:06:15 AM UTC 24 Sep 18 08:07:57 AM UTC 24 41053787593 ps
T998 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_tx_stretch_ctrl.3935486360 Sep 18 08:07:47 AM UTC 24 Sep 18 08:07:58 AM UTC 24 459955676 ps
T999 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_host_perf_precise.2596973183 Sep 18 08:07:56 AM UTC 24 Sep 18 08:07:59 AM UTC 24 270044915 ps
T1000 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/13.i2c_host_stress_all.2912377960 Sep 18 07:59:27 AM UTC 24 Sep 18 08:08:01 AM UTC 24 39621579718 ps
T1001 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_full.1817646827 Sep 18 08:06:42 AM UTC 24 Sep 18 08:08:01 AM UTC 24 11134265805 ps
T1002 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_overflow.3062831635 Sep 18 08:06:09 AM UTC 24 Sep 18 08:08:03 AM UTC 24 1661869087 ps
T1003 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_rx.3845685050 Sep 18 08:07:56 AM UTC 24 Sep 18 08:08:03 AM UTC 24 163164833 ps
T1004 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_watermark.3235065856 Sep 18 08:04:18 AM UTC 24 Sep 18 08:08:04 AM UTC 24 3595303685 ps
T1005 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_host_error_intr.3568367436 Sep 18 08:07:58 AM UTC 24 Sep 18 08:08:04 AM UTC 24 213757028 ps
T1006 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_host_may_nack.2496526364 Sep 18 08:07:44 AM UTC 24 Sep 18 08:08:09 AM UTC 24 719756508 ps
T1007 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_target_stretch.1928598147 Sep 18 08:08:03 AM UTC 24 Sep 18 08:08:11 AM UTC 24 1175803513 ps
T1008 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_acq.4010387657 Sep 18 08:08:12 AM UTC 24 Sep 18 08:08:14 AM UTC 24 141253869 ps
T1009 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_target_stress_rd.2055796406 Sep 18 08:08:01 AM UTC 24 Sep 18 08:08:15 AM UTC 24 785190400 ps
T1010 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_target_smoke.3072301323 Sep 18 08:08:00 AM UTC 24 Sep 18 08:08:17 AM UTC 24 3401169843 ps
T1011 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_tx.2270963437 Sep 18 08:08:14 AM UTC 24 Sep 18 08:08:17 AM UTC 24 222306722 ps
T1012 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_target_timeout.3591632192 Sep 18 08:08:05 AM UTC 24 Sep 18 08:08:17 AM UTC 24 2849190702 ps
T1013 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_target_intr_smoke.1348678190 Sep 18 08:08:04 AM UTC 24 Sep 18 08:08:18 AM UTC 24 1455810484 ps
T1014 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_host_stretch_timeout.684242337 Sep 18 08:07:57 AM UTC 24 Sep 18 08:08:20 AM UTC 24 1938445051 ps
T1015 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_host_may_nack.3186170883 Sep 18 08:08:19 AM UTC 24 Sep 18 08:08:29 AM UTC 24 982661619 ps
T1016 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_full.3041542484 Sep 18 08:06:10 AM UTC 24 Sep 18 08:08:22 AM UTC 24 2342836384 ps
T1017 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_target_perf.1053779506 Sep 18 08:08:15 AM UTC 24 Sep 18 08:08:23 AM UTC 24 2189857882 ps
T1018 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_target_hrst.695388146 Sep 18 08:08:18 AM UTC 24 Sep 18 08:08:23 AM UTC 24 293905099 ps
T1019 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_tx.3659518186 Sep 18 08:08:21 AM UTC 24 Sep 18 08:08:24 AM UTC 24 443003337 ps
T1020 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_acq.1683193246 Sep 18 08:08:20 AM UTC 24 Sep 18 08:08:25 AM UTC 24 1069646670 ps
T1021 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_fmt_empty.3936282824 Sep 18 08:07:55 AM UTC 24 Sep 18 08:08:26 AM UTC 24 1054151222 ps
T1022 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_target_smbus_maxlen.118283749 Sep 18 08:08:23 AM UTC 24 Sep 18 08:08:28 AM UTC 24 450697554 ps
T1023 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_watermark.2428642150 Sep 18 08:06:39 AM UTC 24 Sep 18 08:08:28 AM UTC 24 9754470178 ps
T1024 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_alert_test.4176946823 Sep 18 08:08:26 AM UTC 24 Sep 18 08:08:28 AM UTC 24 46527017 ps
T1025 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull_addr.1816932397 Sep 18 08:08:25 AM UTC 24 Sep 18 08:08:29 AM UTC 24 1740330825 ps
T1026 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_target_tx_stretch_ctrl.1030659651 Sep 18 08:08:22 AM UTC 24 Sep 18 08:08:28 AM UTC 24 140744154 ps
T1027 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_fmt.2768419895 Sep 18 08:08:29 AM UTC 24 Sep 18 08:08:32 AM UTC 24 437936917 ps
T1028 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_rx.3000853161 Sep 18 08:08:29 AM UTC 24 Sep 18 08:08:35 AM UTC 24 1103795428 ps
T1029 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_host_error_intr.965298080 Sep 18 08:08:33 AM UTC 24 Sep 18 08:08:36 AM UTC 24 68016104 ps
T1030 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_host_smoke.3080491097 Sep 18 08:07:52 AM UTC 24 Sep 18 08:08:37 AM UTC 24 1927870165 ps
T1031 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_host_perf_precise.601089591 Sep 18 08:08:30 AM UTC 24 Sep 18 08:08:38 AM UTC 24 213490702 ps
T1032 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_overflow.4136265899 Sep 18 08:07:22 AM UTC 24 Sep 18 08:08:38 AM UTC 24 2256168303 ps
T1033 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_fmt_empty.3308523262 Sep 18 08:08:29 AM UTC 24 Sep 18 08:08:40 AM UTC 24 1348214955 ps
T1034 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_target_stretch.2343899762 Sep 18 08:08:39 AM UTC 24 Sep 18 08:08:43 AM UTC 24 1324458585 ps
T1035 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_target_stress_wr.682658054 Sep 18 08:08:38 AM UTC 24 Sep 18 08:08:44 AM UTC 24 12160324787 ps
T1036 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_watermark.1181642883 Sep 18 08:06:08 AM UTC 24 Sep 18 08:08:45 AM UTC 24 5201713255 ps
T1037 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_rx.3539571365 Sep 18 08:09:34 AM UTC 24 Sep 18 08:09:51 AM UTC 24 954057473 ps
T38 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_host_perf.2703825379 Sep 18 08:08:29 AM UTC 24 Sep 18 08:08:48 AM UTC 24 310321244 ps
T1038 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_host_stretch_timeout.443861287 Sep 18 08:08:31 AM UTC 24 Sep 18 08:08:48 AM UTC 24 3454313126 ps
T1039 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_target_stress_rd.2015608140 Sep 18 08:08:39 AM UTC 24 Sep 18 08:08:49 AM UTC 24 545714083 ps
T1040 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_acq.1658047900 Sep 18 08:08:48 AM UTC 24 Sep 18 08:08:51 AM UTC 24 484033502 ps
T1041 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_tx.1504906223 Sep 18 08:08:48 AM UTC 24 Sep 18 08:08:51 AM UTC 24 520482675 ps
T1042 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_target_intr_smoke.4125849939 Sep 18 08:08:41 AM UTC 24 Sep 18 08:08:52 AM UTC 24 9561651033 ps
T1043 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_target_timeout.4216547519 Sep 18 08:08:45 AM UTC 24 Sep 18 08:08:53 AM UTC 24 1118921564 ps
T1044 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_intr_stress_wr.489407314 Sep 18 08:07:33 AM UTC 24 Sep 18 08:08:55 AM UTC 24 16056883760 ps
T1045 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_watermark.3756439273 Sep 18 08:05:37 AM UTC 24 Sep 18 08:08:55 AM UTC 24 21181903255 ps
T1046 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_target_perf.3051947517 Sep 18 08:08:50 AM UTC 24 Sep 18 08:08:55 AM UTC 24 475621060 ps
T1047 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_target_stress_all.1620915591 Sep 18 08:08:16 AM UTC 24 Sep 18 08:08:56 AM UTC 24 84993281624 ps
T1048 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_full.3035322783 Sep 18 08:07:24 AM UTC 24 Sep 18 08:08:56 AM UTC 24 1515627972 ps
T240 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/22.i2c_host_stress_all.1276497085 Sep 18 08:04:25 AM UTC 24 Sep 18 08:08:57 AM UTC 24 10574092352 ps
T1049 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_host_mode_toggle.1326432981 Sep 18 08:08:53 AM UTC 24 Sep 18 08:08:58 AM UTC 24 490130338 ps
T1050 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_tx.986563582 Sep 18 08:08:56 AM UTC 24 Sep 18 08:08:59 AM UTC 24 111718248 ps
T1051 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_host_may_nack.2493411492 Sep 18 08:08:54 AM UTC 24 Sep 18 08:08:59 AM UTC 24 332524173 ps
T1052 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_target_bad_addr.3619441214 Sep 18 08:08:52 AM UTC 24 Sep 18 08:08:59 AM UTC 24 2868015428 ps
T1053 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_watermark.3155755289 Sep 18 08:07:22 AM UTC 24 Sep 18 08:08:59 AM UTC 24 20613155420 ps
T1054 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_target_smbus_maxlen.3334403258 Sep 18 08:08:56 AM UTC 24 Sep 18 08:09:00 AM UTC 24 617143835 ps
T1055 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_acq.13088320 Sep 18 08:08:56 AM UTC 24 Sep 18 08:09:01 AM UTC 24 403200965 ps
T1056 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/30.i2c_host_override.1717124447 Sep 18 08:09:00 AM UTC 24 Sep 18 08:09:02 AM UTC 24 51255322 ps
T1057 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/30.i2c_target_tx_stretch_ctrl.2669112496 Sep 18 08:09:29 AM UTC 24 Sep 18 08:09:43 AM UTC 24 555651110 ps
T1058 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_target_smoke.518535113 Sep 18 08:08:37 AM UTC 24 Sep 18 08:09:02 AM UTC 24 2337674563 ps
T1059 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_alert_test.3802553574 Sep 18 08:09:00 AM UTC 24 Sep 18 08:09:02 AM UTC 24 18677173 ps
T1060 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull.3203350900 Sep 18 08:08:57 AM UTC 24 Sep 18 08:09:03 AM UTC 24 2359139893 ps
T1061 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull_addr.2091541018 Sep 18 08:08:58 AM UTC 24 Sep 18 08:09:03 AM UTC 24 451406612 ps
T1062 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_fmt.819325773 Sep 18 08:09:02 AM UTC 24 Sep 18 08:09:04 AM UTC 24 632110108 ps
T1063 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_watermark.2988452995 Sep 18 08:07:53 AM UTC 24 Sep 18 08:09:07 AM UTC 24 2893586137 ps
T1064 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/29.i2c_target_tx_stretch_ctrl.3966358767 Sep 18 08:08:56 AM UTC 24 Sep 18 08:09:07 AM UTC 24 350696227 ps
T1065 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/30.i2c_host_error_intr.2383188342 Sep 18 08:09:05 AM UTC 24 Sep 18 08:09:08 AM UTC 24 83921576 ps
T1066 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_rx.1811800741 Sep 18 08:09:03 AM UTC 24 Sep 18 08:09:10 AM UTC 24 798489805 ps
T1067 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_host_smoke.2812271260 Sep 18 08:07:21 AM UTC 24 Sep 18 08:09:11 AM UTC 24 8209535365 ps
T1068 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/17.i2c_host_perf.487145516 Sep 18 08:01:39 AM UTC 24 Sep 18 08:09:14 AM UTC 24 51312778623 ps
T1069 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/30.i2c_host_perf_precise.402103411 Sep 18 08:09:04 AM UTC 24 Sep 18 08:09:17 AM UTC 24 225481233 ps
T1070 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/23.i2c_target_stress_wr.3354796009 Sep 18 08:05:18 AM UTC 24 Sep 18 08:09:17 AM UTC 24 68290139924 ps
T1071 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/30.i2c_target_stretch.679136794 Sep 18 08:09:13 AM UTC 24 Sep 18 08:09:19 AM UTC 24 511485882 ps
T1072 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/30.i2c_host_stretch_timeout.1118813216 Sep 18 08:09:04 AM UTC 24 Sep 18 08:09:20 AM UTC 24 3469863985 ps
T1073 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/22.i2c_target_stress_all.1380039182 Sep 18 08:04:45 AM UTC 24 Sep 18 08:09:21 AM UTC 24 36690207123 ps
T1074 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_acq.3377374148 Sep 18 08:09:20 AM UTC 24 Sep 18 08:09:23 AM UTC 24 745296312 ps
T1075 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_fmt_empty.2783950495 Sep 18 08:09:03 AM UTC 24 Sep 18 08:09:23 AM UTC 24 347289523 ps
T1076 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_tx.3090913617 Sep 18 08:09:21 AM UTC 24 Sep 18 08:09:23 AM UTC 24 425371349 ps
T1077 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/30.i2c_target_smoke.2144384045 Sep 18 08:09:07 AM UTC 24 Sep 18 08:09:26 AM UTC 24 5734264857 ps
T1078 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_full.768658769 Sep 18 08:07:56 AM UTC 24 Sep 18 08:09:26 AM UTC 24 12563510539 ps
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