Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
91.26 97.20 89.46 97.22 72.02 94.23 98.47 90.21


Total tests in report: 1857
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
64.75 64.75 82.12 82.12 61.01 61.01 89.68 89.68 22.62 22.62 73.63 73.63 88.21 88.21 36.00 36.00 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_bad_addr.1315844273
75.45 10.70 92.67 10.56 75.69 14.68 91.88 2.20 42.86 20.24 87.31 13.68 90.61 2.40 47.16 11.16 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_error_intr.3356454540
79.55 4.09 93.04 0.37 76.74 1.05 92.11 0.23 67.26 24.40 87.88 0.57 91.05 0.44 48.74 1.58 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_glitch.4154229393
82.78 3.23 94.28 1.23 78.81 2.07 92.34 0.23 67.26 0.00 88.52 0.64 91.48 0.44 66.74 18.00 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_host_stress_all.4205530150
84.08 1.31 94.31 0.03 80.17 1.35 93.27 0.93 67.26 0.00 88.60 0.07 94.98 3.49 70.00 3.26 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/2.i2c_tl_errors.666009013
84.97 0.89 94.71 0.40 81.41 1.24 93.50 0.23 67.26 0.00 89.45 0.86 94.98 0.00 73.47 3.47 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_host_may_nack.1476585788
85.81 0.84 94.92 0.22 82.80 1.39 93.74 0.23 67.26 0.00 89.81 0.36 95.20 0.22 76.95 3.47 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_host_fifo_reset_rx.3572447005
86.52 0.71 95.35 0.43 84.57 1.77 94.20 0.46 67.86 0.60 91.16 1.35 95.41 0.22 77.05 0.11 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_nack_txstretch.652261736
87.00 0.48 95.63 0.28 85.17 0.60 94.43 0.23 67.86 0.00 91.95 0.78 95.41 0.00 78.53 1.47 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_host_override.355039104
87.45 0.45 95.78 0.15 85.92 0.75 94.66 0.23 68.45 0.60 92.30 0.36 95.41 0.00 79.58 1.05 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_timeout.1451892035
87.88 0.44 95.81 0.03 86.04 0.11 96.75 2.09 68.45 0.00 92.37 0.07 95.63 0.22 80.11 0.53 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_sec_cm.3670837925
88.28 0.40 96.24 0.43 86.07 0.04 96.75 0.00 69.64 1.19 92.80 0.43 95.63 0.00 80.84 0.74 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_nack_acqfull_addr.3750607455
88.64 0.36 96.55 0.31 86.98 0.90 96.75 0.00 69.64 0.00 93.23 0.43 96.07 0.44 81.26 0.42 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_fifo_watermark.757968334
88.92 0.28 96.61 0.06 87.05 0.08 96.75 0.00 70.24 0.60 93.37 0.14 96.07 0.00 82.32 1.05 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/26.i2c_host_stress_all.2165981377
89.15 0.23 96.61 0.00 87.05 0.00 96.75 0.00 70.24 0.00 93.37 0.00 97.60 1.53 82.42 0.11 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/4.i2c_csr_rw.466204911
89.35 0.20 96.77 0.15 87.24 0.19 96.75 0.00 70.83 0.60 93.66 0.29 97.60 0.00 82.63 0.21 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_stress_all.3965907601
89.52 0.16 96.89 0.12 87.32 0.08 96.75 0.00 71.43 0.60 93.80 0.14 97.82 0.22 82.63 0.00 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_nack_acqfull.3356697180
89.67 0.15 96.89 0.00 87.62 0.30 96.75 0.00 71.43 0.00 93.80 0.00 97.82 0.00 83.37 0.74 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/5.i2c_tl_intg_err.1465657394
89.80 0.13 96.89 0.00 87.69 0.08 96.75 0.00 71.43 0.00 93.80 0.00 97.82 0.00 84.21 0.84 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_host_fifo_reset_fmt.2809916113
89.92 0.13 96.92 0.03 87.73 0.04 96.75 0.00 71.43 0.00 93.87 0.07 97.82 0.00 84.95 0.74 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_host_perf.2431468622
90.05 0.12 97.05 0.12 87.73 0.00 96.75 0.00 72.02 0.60 94.01 0.14 97.82 0.00 84.95 0.00 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull.2212727026
90.16 0.11 97.05 0.00 87.77 0.04 96.75 0.00 72.02 0.00 94.01 0.00 97.82 0.00 85.68 0.74 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/24.i2c_host_stress_all.3419553869
90.26 0.10 97.05 0.00 88.07 0.30 96.75 0.00 72.02 0.00 94.08 0.07 98.03 0.22 85.79 0.11 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_fifo_full.2735204493
90.34 0.09 97.05 0.00 88.45 0.38 96.98 0.23 72.02 0.00 94.08 0.00 98.03 0.00 85.79 0.00 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_fifo_overflow.3708929231
90.42 0.08 97.05 0.00 88.45 0.00 96.98 0.00 72.02 0.00 94.08 0.00 98.03 0.00 86.32 0.53 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_fifo_watermarks_acq.749965590
90.49 0.07 97.17 0.12 88.56 0.11 97.22 0.23 72.02 0.00 94.08 0.00 98.03 0.00 86.32 0.00 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_alert_test.1091198021
90.55 0.06 97.17 0.00 88.56 0.00 97.22 0.00 72.02 0.00 94.08 0.00 98.25 0.22 86.53 0.21 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_reset_tx.352376509
90.61 0.06 97.17 0.00 88.56 0.00 97.22 0.00 72.02 0.00 94.08 0.00 98.25 0.00 86.95 0.42 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/0.i2c_intr_test.407647626
90.66 0.06 97.17 0.00 88.63 0.08 97.22 0.00 72.02 0.00 94.08 0.00 98.25 0.00 87.26 0.32 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_host_fifo_fmt_empty.683545389
90.71 0.05 97.17 0.00 88.71 0.08 97.22 0.00 72.02 0.00 94.16 0.07 98.25 0.00 87.47 0.21 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/16.i2c_target_stress_all.3807274553
90.76 0.05 97.17 0.00 88.71 0.00 97.22 0.00 72.02 0.00 94.16 0.00 98.25 0.00 87.79 0.32 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/18.i2c_same_csr_outstanding.3432734695
90.80 0.05 97.17 0.00 88.71 0.00 97.22 0.00 72.02 0.00 94.16 0.00 98.25 0.00 88.11 0.32 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_host_may_nack.32991224
90.84 0.04 97.17 0.00 88.75 0.04 97.22 0.00 72.02 0.00 94.16 0.00 98.25 0.00 88.32 0.21 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/12.i2c_tl_intg_err.3692519374
90.88 0.04 97.17 0.00 88.78 0.04 97.22 0.00 72.02 0.00 94.16 0.00 98.25 0.00 88.53 0.21 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_stress_rd.2547388313
90.91 0.03 97.17 0.00 88.78 0.00 97.22 0.00 72.02 0.00 94.16 0.00 98.47 0.22 88.53 0.00 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_host_override.4158755674
90.94 0.03 97.17 0.00 88.78 0.00 97.22 0.00 72.02 0.00 94.16 0.00 98.47 0.00 88.74 0.21 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/10.i2c_intr_test.1007498402
90.97 0.03 97.17 0.00 88.78 0.00 97.22 0.00 72.02 0.00 94.16 0.00 98.47 0.00 88.95 0.21 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/21.i2c_host_stress_all.493500050
91.00 0.03 97.17 0.00 88.78 0.00 97.22 0.00 72.02 0.00 94.16 0.00 98.47 0.00 89.16 0.21 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_fmt.3237732931
91.03 0.03 97.17 0.00 88.78 0.00 97.22 0.00 72.02 0.00 94.16 0.00 98.47 0.00 89.37 0.21 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_host_may_nack.3110006177
91.05 0.03 97.17 0.00 88.97 0.19 97.22 0.00 72.02 0.00 94.16 0.00 98.47 0.00 89.37 0.00 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/14.i2c_host_mode_toggle.2961774068
91.07 0.02 97.20 0.03 89.09 0.11 97.22 0.00 72.02 0.00 94.16 0.00 98.47 0.00 89.37 0.00 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/0.i2c_tl_intg_err.4289869095
91.09 0.02 97.20 0.00 89.12 0.04 97.22 0.00 72.02 0.00 94.16 0.00 98.47 0.00 89.47 0.11 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_fifo_reset_acq.2544927750
91.11 0.02 97.20 0.00 89.24 0.11 97.22 0.00 72.02 0.00 94.16 0.00 98.47 0.00 89.47 0.00 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_glitch.3398551322
91.13 0.02 97.20 0.00 89.27 0.04 97.22 0.00 72.02 0.00 94.23 0.07 98.47 0.00 89.47 0.00 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/18.i2c_host_stress_all.3857860474
91.14 0.02 97.20 0.00 89.27 0.00 97.22 0.00 72.02 0.00 94.23 0.00 98.47 0.00 89.58 0.11 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_may_nack.1512854048
91.16 0.02 97.20 0.00 89.27 0.00 97.22 0.00 72.02 0.00 94.23 0.00 98.47 0.00 89.68 0.11 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_stretch_timeout.3280210972
91.17 0.02 97.20 0.00 89.27 0.00 97.22 0.00 72.02 0.00 94.23 0.00 98.47 0.00 89.79 0.11 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_tx_stretch_ctrl.4289987363
91.19 0.02 97.20 0.00 89.27 0.00 97.22 0.00 72.02 0.00 94.23 0.00 98.47 0.00 89.89 0.11 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/10.i2c_target_stress_wr.2468236944
91.20 0.02 97.20 0.00 89.27 0.00 97.22 0.00 72.02 0.00 94.23 0.00 98.47 0.00 90.00 0.11 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/32.i2c_host_may_nack.3200222842
91.22 0.02 97.20 0.00 89.27 0.00 97.22 0.00 72.02 0.00 94.23 0.00 98.47 0.00 90.11 0.11 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/37.i2c_host_mode_toggle.3286933926
91.23 0.02 97.20 0.00 89.27 0.00 97.22 0.00 72.02 0.00 94.23 0.00 98.47 0.00 90.21 0.11 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_host_override.1982613914
91.24 0.01 97.20 0.00 89.35 0.08 97.22 0.00 72.02 0.00 94.23 0.00 98.47 0.00 90.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/0.i2c_tl_errors.2000744926
91.25 0.01 97.20 0.00 89.42 0.08 97.22 0.00 72.02 0.00 94.23 0.00 98.47 0.00 90.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/8.i2c_tl_intg_err.1277656199
91.26 0.01 97.20 0.00 89.46 0.04 97.22 0.00 72.02 0.00 94.23 0.00 98.47 0.00 90.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/17.i2c_tl_intg_err.3777696936

Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/0.i2c_csr_aliasing.2614343588
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/0.i2c_csr_bit_bash.4265161439
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/0.i2c_csr_hw_reset.406661115
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/0.i2c_csr_mem_rw_with_rand_reset.270371012
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/0.i2c_csr_rw.699200084
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/0.i2c_same_csr_outstanding.625380007
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/1.i2c_csr_aliasing.1582859793
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/1.i2c_csr_bit_bash.1747711741
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/1.i2c_csr_hw_reset.2700254575
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/1.i2c_csr_mem_rw_with_rand_reset.3427049641
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/1.i2c_csr_rw.1938682403
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/1.i2c_intr_test.1278410346
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/1.i2c_same_csr_outstanding.1309689515
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/1.i2c_tl_errors.3253078590
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/1.i2c_tl_intg_err.2177144004
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/10.i2c_csr_mem_rw_with_rand_reset.1271061657
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/10.i2c_csr_rw.3789486774
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/10.i2c_same_csr_outstanding.1503941736
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/10.i2c_tl_errors.1887024365
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/10.i2c_tl_intg_err.1565777410
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/11.i2c_csr_mem_rw_with_rand_reset.2786584135
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/11.i2c_csr_rw.3496509525
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/11.i2c_intr_test.3097856483
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/11.i2c_same_csr_outstanding.2036644485
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/11.i2c_tl_errors.435432290
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/11.i2c_tl_intg_err.2205018273
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/12.i2c_csr_mem_rw_with_rand_reset.1652601265
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/12.i2c_csr_rw.1536325455
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/12.i2c_intr_test.3804000656
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/12.i2c_same_csr_outstanding.4125227638
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/12.i2c_tl_errors.2054411135
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/13.i2c_csr_mem_rw_with_rand_reset.605804954
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/13.i2c_csr_rw.1132417133
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/13.i2c_intr_test.1358548240
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/13.i2c_same_csr_outstanding.20863986
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/13.i2c_tl_errors.498790098
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/13.i2c_tl_intg_err.3187155873
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/14.i2c_csr_mem_rw_with_rand_reset.3794900458
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/14.i2c_csr_rw.1739134111
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/cover_reg_top/14.i2c_intr_test.117638903
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Total test records in report: 1857
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TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_override.910016387 Sep 18 07:54:24 AM UTC 24 Sep 18 07:54:26 AM UTC 24 17345417 ps
T2 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_fifo_reset_fmt.161199759 Sep 18 07:54:25 AM UTC 24 Sep 18 07:54:28 AM UTC 24 390695253 ps
T3 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_fifo_reset_rx.3059859891 Sep 18 07:54:25 AM UTC 24 Sep 18 07:54:30 AM UTC 24 626151814 ps
T4 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_perf_precise.477862720 Sep 18 07:54:27 AM UTC 24 Sep 18 07:54:30 AM UTC 24 236226092 ps
T5 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_error_intr.3356454540 Sep 18 07:54:28 AM UTC 24 Sep 18 07:54:31 AM UTC 24 583486187 ps
T6 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_fifo_reset_acq.2544927750 Sep 18 07:54:30 AM UTC 24 Sep 18 07:54:34 AM UTC 24 579474256 ps
T7 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_fifo_reset_tx.3685334432 Sep 18 07:54:30 AM UTC 24 Sep 18 07:54:34 AM UTC 24 202875131 ps
T8 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_hrst.3944242018 Sep 18 07:54:32 AM UTC 24 Sep 18 07:54:36 AM UTC 24 266223915 ps
T9 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_fifo_watermarks_tx.3841026398 Sep 18 07:54:34 AM UTC 24 Sep 18 07:54:37 AM UTC 24 126309030 ps
T10 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_bad_addr.1315844273 Sep 18 07:54:31 AM UTC 24 Sep 18 07:54:37 AM UTC 24 3006427045 ps
T45 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_fifo_watermarks_acq.749965590 Sep 18 07:54:33 AM UTC 24 Sep 18 07:54:38 AM UTC 24 487140362 ps
T46 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_intr_smoke.2083353444 Sep 18 07:54:29 AM UTC 24 Sep 18 07:54:38 AM UTC 24 1389264216 ps
T74 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_alert_test.1091198021 Sep 18 07:54:36 AM UTC 24 Sep 18 07:54:38 AM UTC 24 39875292 ps
T75 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_sec_cm.3670837925 Sep 18 07:54:36 AM UTC 24 Sep 18 07:54:39 AM UTC 24 41043559 ps
T69 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_timeout.758132703 Sep 18 07:55:01 AM UTC 24 Sep 18 07:55:14 AM UTC 24 6200694506 ps
T76 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_smbus_maxlen.1981103313 Sep 18 07:54:34 AM UTC 24 Sep 18 07:54:39 AM UTC 24 886764567 ps
T81 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_host_override.355039104 Sep 18 07:54:37 AM UTC 24 Sep 18 07:54:39 AM UTC 24 26288877 ps
T70 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_smoke.578806601 Sep 18 07:54:28 AM UTC 24 Sep 18 07:54:39 AM UTC 24 4702261949 ps
T61 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_nack_acqfull.3356697180 Sep 18 07:54:35 AM UTC 24 Sep 18 07:54:40 AM UTC 24 2161240635 ps
T71 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_perf.2329597100 Sep 18 07:54:31 AM UTC 24 Sep 18 07:54:40 AM UTC 24 2541098981 ps
T67 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_tx_stretch_ctrl.4289987363 Sep 18 07:54:34 AM UTC 24 Sep 18 07:54:40 AM UTC 24 188400680 ps
T72 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_timeout.1451892035 Sep 18 07:54:30 AM UTC 24 Sep 18 07:54:40 AM UTC 24 1367327225 ps
T62 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_nack_acqfull_addr.445959127 Sep 18 07:54:35 AM UTC 24 Sep 18 07:54:40 AM UTC 24 631808194 ps
T34 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_host_fifo_reset_fmt.3877540113 Sep 18 07:54:38 AM UTC 24 Sep 18 07:54:40 AM UTC 24 141758082 ps
T50 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_glitch.4154229393 Sep 18 07:54:28 AM UTC 24 Sep 18 07:54:43 AM UTC 24 7730602819 ps
T35 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_host_fifo_reset_fmt.2809916113 Sep 18 07:55:13 AM UTC 24 Sep 18 07:55:15 AM UTC 24 506378693 ps
T22 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_host_perf_precise.201890176 Sep 18 07:54:40 AM UTC 24 Sep 18 07:54:44 AM UTC 24 511235347 ps
T73 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_fifo_reset_acq.3081440835 Sep 18 07:54:41 AM UTC 24 Sep 18 07:54:44 AM UTC 24 167993991 ps
T29 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_fifo_fmt_empty.407501791 Sep 18 07:54:25 AM UTC 24 Sep 18 07:54:45 AM UTC 24 1377993250 ps
T14 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_host_error_intr.923803234 Sep 18 07:54:40 AM UTC 24 Sep 18 07:54:46 AM UTC 24 276260731 ps
T43 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_host_fifo_reset_rx.3572447005 Sep 18 07:54:40 AM UTC 24 Sep 18 07:54:46 AM UTC 24 155761539 ps
T163 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_stretch.2400651838 Sep 18 07:54:41 AM UTC 24 Sep 18 07:54:46 AM UTC 24 4169024032 ps
T297 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_fifo_reset_tx.2169217953 Sep 18 07:54:44 AM UTC 24 Sep 18 07:54:47 AM UTC 24 248385262 ps
T220 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_intr_smoke.89813111 Sep 18 07:54:41 AM UTC 24 Sep 18 07:54:49 AM UTC 24 960885623 ps
T44 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_host_perf_precise.229185209 Sep 18 07:55:14 AM UTC 24 Sep 18 07:55:16 AM UTC 24 107084769 ps
T11 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_may_nack.1512854048 Sep 18 07:54:33 AM UTC 24 Sep 18 07:54:50 AM UTC 24 453524196 ps
T298 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_perf.2376463412 Sep 18 07:54:44 AM UTC 24 Sep 18 07:54:50 AM UTC 24 627620665 ps
T68 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_tx_stretch_ctrl.2302893334 Sep 18 07:54:48 AM UTC 24 Sep 18 07:55:08 AM UTC 24 1096736464 ps
T271 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_fifo_watermarks_acq.624460133 Sep 18 07:54:47 AM UTC 24 Sep 18 07:54:51 AM UTC 24 2444673587 ps
T290 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_fifo_watermarks_tx.1795014705 Sep 18 07:54:48 AM UTC 24 Sep 18 07:54:51 AM UTC 24 163355421 ps
T77 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_timeout.3420221954 Sep 18 07:54:41 AM UTC 24 Sep 18 07:54:52 AM UTC 24 4232637978 ps
T299 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_smbus_maxlen.2877876867 Sep 18 07:54:48 AM UTC 24 Sep 18 07:54:52 AM UTC 24 792375373 ps
T41 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_host_fifo_fmt_empty.31046924 Sep 18 07:54:40 AM UTC 24 Sep 18 07:54:53 AM UTC 24 211174743 ps
T102 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_alert_test.1660809632 Sep 18 07:54:51 AM UTC 24 Sep 18 07:54:53 AM UTC 24 27029148 ps
T58 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_nack_txstretch.652261736 Sep 18 07:54:50 AM UTC 24 Sep 18 07:54:54 AM UTC 24 318931288 ps
T188 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_sec_cm.1157988299 Sep 18 07:54:51 AM UTC 24 Sep 18 07:54:54 AM UTC 24 801128393 ps
T64 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_bad_addr.1348704414 Sep 18 07:54:46 AM UTC 24 Sep 18 07:54:54 AM UTC 24 2894839009 ps
T104 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_host_override.879107208 Sep 18 07:54:52 AM UTC 24 Sep 18 07:54:54 AM UTC 24 35008255 ps
T189 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_stretch.2610453825 Sep 18 07:54:28 AM UTC 24 Sep 18 07:54:56 AM UTC 24 3932461944 ps
T47 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_nack_acqfull_addr.3750607455 Sep 18 07:54:50 AM UTC 24 Sep 18 07:54:56 AM UTC 24 512544564 ps
T190 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_host_fifo_reset_fmt.3875062021 Sep 18 07:54:55 AM UTC 24 Sep 18 07:54:57 AM UTC 24 83021174 ps
T63 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_nack_acqfull.3960869000 Sep 18 07:54:50 AM UTC 24 Sep 18 07:54:57 AM UTC 24 2468734329 ps
T12 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_host_may_nack.1476585788 Sep 18 07:54:47 AM UTC 24 Sep 18 07:54:58 AM UTC 24 2426543530 ps
T40 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_stretch_timeout.3280210972 Sep 18 07:54:27 AM UTC 24 Sep 18 07:54:58 AM UTC 24 1603640679 ps
T51 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_glitch.3398551322 Sep 18 07:54:41 AM UTC 24 Sep 18 07:55:00 AM UTC 24 8459729439 ps
T82 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_host_fifo_reset_rx.2516769751 Sep 18 07:54:55 AM UTC 24 Sep 18 07:55:00 AM UTC 24 554023725 ps
T179 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_host_perf_precise.2518977103 Sep 18 07:54:56 AM UTC 24 Sep 18 07:55:02 AM UTC 24 352303999 ps
T223 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_stress_rd.2547388313 Sep 18 07:54:28 AM UTC 24 Sep 18 07:55:02 AM UTC 24 1610523121 ps
T300 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_stress_wr.3715542541 Sep 18 07:54:58 AM UTC 24 Sep 18 07:55:03 AM UTC 24 16145434806 ps
T301 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_stress_wr.2095220052 Sep 18 07:54:28 AM UTC 24 Sep 18 07:55:04 AM UTC 24 10749951274 ps
T302 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_perf.995759379 Sep 18 07:55:05 AM UTC 24 Sep 18 07:55:09 AM UTC 24 1622730839 ps
T303 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_target_intr_stress_wr.1967171093 Sep 18 07:54:29 AM UTC 24 Sep 18 07:55:04 AM UTC 24 15897648928 ps
T18 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_host_error_intr.3097272151 Sep 18 07:54:57 AM UTC 24 Sep 18 07:55:05 AM UTC 24 313379381 ps
T304 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_fifo_reset_acq.4010968779 Sep 18 07:55:03 AM UTC 24 Sep 18 07:55:06 AM UTC 24 121278736 ps
T42 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_host_fifo_fmt_empty.683545389 Sep 18 07:54:55 AM UTC 24 Sep 18 07:55:10 AM UTC 24 3877721549 ps
T305 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_stress_rd.1594545068 Sep 18 07:54:59 AM UTC 24 Sep 18 07:55:06 AM UTC 24 400023023 ps
T306 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_fifo_reset_tx.2720646187 Sep 18 07:55:03 AM UTC 24 Sep 18 07:55:07 AM UTC 24 210166990 ps
T15 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_host_perf.3183030289 Sep 18 07:54:40 AM UTC 24 Sep 18 07:55:07 AM UTC 24 7862201393 ps
T307 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_intr_smoke.3544794903 Sep 18 07:55:00 AM UTC 24 Sep 18 07:55:09 AM UTC 24 1291892245 ps
T288 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_host_stretch_timeout.1234384013 Sep 18 07:54:40 AM UTC 24 Sep 18 07:55:10 AM UTC 24 2034722158 ps
T65 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_bad_addr.3288702271 Sep 18 07:55:06 AM UTC 24 Sep 18 07:55:10 AM UTC 24 605328918 ps
T165 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_nack_acqfull.1950852530 Sep 18 07:55:09 AM UTC 24 Sep 18 07:55:15 AM UTC 24 4383354275 ps
T308 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_fifo_watermarks_tx.3177704221 Sep 18 07:55:08 AM UTC 24 Sep 18 07:55:11 AM UTC 24 1179792401 ps
T13 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_host_may_nack.747601771 Sep 18 07:55:07 AM UTC 24 Sep 18 07:55:11 AM UTC 24 2030059361 ps
T294 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_tx_stretch_ctrl.3314298288 Sep 18 07:55:08 AM UTC 24 Sep 18 07:55:12 AM UTC 24 75715758 ps
T103 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_alert_test.3107564203 Sep 18 07:55:10 AM UTC 24 Sep 18 07:55:12 AM UTC 24 17065056 ps
T309 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_smbus_maxlen.4176003265 Sep 18 07:55:09 AM UTC 24 Sep 18 07:55:13 AM UTC 24 2011595014 ps
T201 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_sec_cm.3943776509 Sep 18 07:55:10 AM UTC 24 Sep 18 07:55:13 AM UTC 24 130265759 ps
T272 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_fifo_watermarks_acq.171977732 Sep 18 07:55:07 AM UTC 24 Sep 18 07:55:13 AM UTC 24 2286204762 ps
T310 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_host_override.1158795191 Sep 18 07:55:11 AM UTC 24 Sep 18 07:55:13 AM UTC 24 80681199 ps
T59 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_nack_txstretch.1724151307 Sep 18 07:55:10 AM UTC 24 Sep 18 07:55:14 AM UTC 24 136022971 ps
T66 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_nack_acqfull_addr.466849356 Sep 18 07:55:09 AM UTC 24 Sep 18 07:55:16 AM UTC 24 2578663806 ps
T289 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_host_smoke.3875895278 Sep 18 07:54:52 AM UTC 24 Sep 18 07:55:17 AM UTC 24 4426967625 ps
T26 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_host_error_intr.1117477278 Sep 18 07:55:14 AM UTC 24 Sep 18 07:55:19 AM UTC 24 1149411728 ps
T191 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_host_fifo_reset_rx.2999098805 Sep 18 07:55:13 AM UTC 24 Sep 18 07:55:19 AM UTC 24 487736194 ps
T311 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_alert_test.3283472945 Sep 18 07:56:17 AM UTC 24 Sep 18 07:56:19 AM UTC 24 74622598 ps
T312 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_stress_rd.671485253 Sep 18 07:54:41 AM UTC 24 Sep 18 07:55:19 AM UTC 24 722351521 ps
T52 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_intr_stress_wr.724356325 Sep 18 07:55:01 AM UTC 24 Sep 18 07:55:20 AM UTC 24 9686054453 ps
T246 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_host_fifo_fmt_empty.1806714255 Sep 18 07:55:13 AM UTC 24 Sep 18 07:55:21 AM UTC 24 946758050 ps
T313 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_fifo_reset_acq.3998184449 Sep 18 07:55:20 AM UTC 24 Sep 18 07:55:22 AM UTC 24 110976705 ps
T314 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_fifo_reset_tx.50788394 Sep 18 07:55:20 AM UTC 24 Sep 18 07:55:23 AM UTC 24 763342167 ps
T315 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_smoke.1218623069 Sep 18 07:54:58 AM UTC 24 Sep 18 07:55:24 AM UTC 24 732085628 ps
T295 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_stress_wr.2236371302 Sep 18 07:54:41 AM UTC 24 Sep 18 07:55:24 AM UTC 24 25970940377 ps
T270 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_intr_smoke.591652913 Sep 18 07:55:17 AM UTC 24 Sep 18 07:55:27 AM UTC 24 795577426 ps
T195 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_host_stretch_timeout.3699709187 Sep 18 07:55:14 AM UTC 24 Sep 18 07:55:28 AM UTC 24 831161638 ps
T198 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_hrst.1840810455 Sep 18 07:55:24 AM UTC 24 Sep 18 07:55:29 AM UTC 24 482405161 ps
T23 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_host_mode_toggle.2958188398 Sep 18 07:55:25 AM UTC 24 Sep 18 07:55:29 AM UTC 24 197409581 ps
T316 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_perf.3247093464 Sep 18 07:55:22 AM UTC 24 Sep 18 07:55:29 AM UTC 24 813849078 ps
T317 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_bad_addr.1763808194 Sep 18 07:55:23 AM UTC 24 Sep 18 07:55:30 AM UTC 24 6172507322 ps
T318 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_stretch.3912149968 Sep 18 07:55:16 AM UTC 24 Sep 18 07:55:32 AM UTC 24 3120037801 ps
T319 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_fifo_watermarks_acq.2238886422 Sep 18 07:55:29 AM UTC 24 Sep 18 07:55:32 AM UTC 24 84747788 ps
T320 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_fifo_watermarks_tx.2760134817 Sep 18 07:55:29 AM UTC 24 Sep 18 07:55:32 AM UTC 24 161488860 ps
T321 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_timeout.927826744 Sep 18 07:55:19 AM UTC 24 Sep 18 07:55:33 AM UTC 24 4673757597 ps
T322 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_smoke.3743735638 Sep 18 07:54:41 AM UTC 24 Sep 18 07:55:33 AM UTC 24 12207705317 ps
T323 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_smbus_maxlen.2378753613 Sep 18 07:55:29 AM UTC 24 Sep 18 07:55:34 AM UTC 24 411666611 ps
T324 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_tx_stretch_ctrl.738366821 Sep 18 07:55:29 AM UTC 24 Sep 18 07:55:35 AM UTC 24 107619706 ps
T31 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_host_may_nack.1376000620 Sep 18 07:55:27 AM UTC 24 Sep 18 07:55:35 AM UTC 24 1544058749 ps
T202 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_sec_cm.4127723781 Sep 18 07:55:33 AM UTC 24 Sep 18 07:55:35 AM UTC 24 147907442 ps
T325 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_alert_test.1089852284 Sep 18 07:55:34 AM UTC 24 Sep 18 07:55:36 AM UTC 24 27852069 ps
T326 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_host_override.2576737256 Sep 18 07:55:34 AM UTC 24 Sep 18 07:55:36 AM UTC 24 29553235 ps
T60 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_nack_txstretch.918311812 Sep 18 07:55:32 AM UTC 24 Sep 18 07:55:36 AM UTC 24 365927796 ps
T166 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_nack_acqfull.52927654 Sep 18 07:55:30 AM UTC 24 Sep 18 07:55:36 AM UTC 24 4356028315 ps
T327 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_smoke.437917415 Sep 18 07:55:15 AM UTC 24 Sep 18 07:55:37 AM UTC 24 1345582631 ps
T167 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_nack_acqfull_addr.803994675 Sep 18 07:55:31 AM UTC 24 Sep 18 07:55:37 AM UTC 24 2212766928 ps
T328 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_stress_wr.1095836773 Sep 18 07:55:16 AM UTC 24 Sep 18 07:55:38 AM UTC 24 22131320166 ps
T329 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_host_fifo_reset_fmt.2346327159 Sep 18 07:55:36 AM UTC 24 Sep 18 07:55:38 AM UTC 24 181201642 ps
T330 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_host_perf.3862876878 Sep 18 07:55:59 AM UTC 24 Sep 18 07:56:20 AM UTC 24 1269964095 ps
T19 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_host_error_intr.1701614401 Sep 18 07:55:37 AM UTC 24 Sep 18 07:55:40 AM UTC 24 161283600 ps
T331 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_smoke.64808611 Sep 18 07:54:24 AM UTC 24 Sep 18 07:55:41 AM UTC 24 1827355889 ps
T332 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_host_perf_precise.110793251 Sep 18 07:55:37 AM UTC 24 Sep 18 07:55:42 AM UTC 24 63233375 ps
T333 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_fifo_reset_acq.3091668500 Sep 18 07:56:07 AM UTC 24 Sep 18 07:56:10 AM UTC 24 222673272 ps
T196 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_host_stretch_timeout.1152084476 Sep 18 07:54:57 AM UTC 24 Sep 18 07:55:43 AM UTC 24 7444832685 ps
T192 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_host_fifo_reset_rx.1273742346 Sep 18 07:55:36 AM UTC 24 Sep 18 07:55:45 AM UTC 24 175409847 ps
T334 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_host_fifo_fmt_empty.3522040531 Sep 18 07:55:36 AM UTC 24 Sep 18 07:55:47 AM UTC 24 801531533 ps
T335 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_fifo_reset_tx.1841662660 Sep 18 07:55:46 AM UTC 24 Sep 18 07:55:48 AM UTC 24 238272571 ps
T336 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_host_smoke.3250129063 Sep 18 07:54:37 AM UTC 24 Sep 18 07:55:48 AM UTC 24 3107731188 ps
T337 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_fifo_reset_acq.2239852762 Sep 18 07:55:46 AM UTC 24 Sep 18 07:55:49 AM UTC 24 162444713 ps
T105 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_host_fifo_overflow.815948287 Sep 18 07:54:52 AM UTC 24 Sep 18 07:55:50 AM UTC 24 11129337618 ps
T180 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_host_stretch_timeout.2908712506 Sep 18 07:55:37 AM UTC 24 Sep 18 07:55:51 AM UTC 24 685699549 ps
T32 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_fifo_watermark.757968334 Sep 18 07:54:24 AM UTC 24 Sep 18 07:55:53 AM UTC 24 20936795938 ps
T125 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_hrst.126352966 Sep 18 07:55:49 AM UTC 24 Sep 18 07:55:53 AM UTC 24 883406857 ps
T126 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_timeout.4014241695 Sep 18 07:55:44 AM UTC 24 Sep 18 07:55:54 AM UTC 24 1804501513 ps
T127 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_fifo_watermarks_tx.3206074032 Sep 18 07:55:52 AM UTC 24 Sep 18 07:55:54 AM UTC 24 484330757 ps
T128 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_bad_addr.3561162315 Sep 18 07:55:48 AM UTC 24 Sep 18 07:55:54 AM UTC 24 3445401542 ps
T129 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_intr_smoke.3174364220 Sep 18 07:55:43 AM UTC 24 Sep 18 07:55:55 AM UTC 24 1194341294 ps
T130 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_perf.1499869983 Sep 18 07:55:47 AM UTC 24 Sep 18 07:55:56 AM UTC 24 6321763555 ps
T131 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_fifo_watermarks_acq.3589008828 Sep 18 07:55:52 AM UTC 24 Sep 18 07:55:56 AM UTC 24 517607434 ps
T132 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_alert_test.2206530827 Sep 18 07:55:55 AM UTC 24 Sep 18 07:55:57 AM UTC 24 26502632 ps
T133 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_sec_cm.2418722888 Sep 18 07:55:55 AM UTC 24 Sep 18 07:55:57 AM UTC 24 78196556 ps
T338 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_timeout.3257178685 Sep 18 07:56:04 AM UTC 24 Sep 18 07:56:12 AM UTC 24 4502314274 ps
T339 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_smoke.2767496275 Sep 18 07:55:38 AM UTC 24 Sep 18 07:55:57 AM UTC 24 6057369099 ps
T340 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_smbus_maxlen.1336359180 Sep 18 07:55:53 AM UTC 24 Sep 18 07:55:57 AM UTC 24 949701881 ps
T341 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_host_stretch_timeout.232929075 Sep 18 07:55:59 AM UTC 24 Sep 18 07:56:14 AM UTC 24 1356809830 ps
T342 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_nack_acqfull_addr.727851446 Sep 18 07:55:54 AM UTC 24 Sep 18 07:55:58 AM UTC 24 503994265 ps
T343 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_host_override.1255181044 Sep 18 07:55:56 AM UTC 24 Sep 18 07:55:58 AM UTC 24 19544581 ps
T344 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_nack_acqfull.2406335781 Sep 18 07:55:53 AM UTC 24 Sep 18 07:55:58 AM UTC 24 515118283 ps
T345 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_host_smoke.208516441 Sep 18 07:55:34 AM UTC 24 Sep 18 07:56:11 AM UTC 24 1778945393 ps
T244 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_host_fifo_reset_fmt.2917807835 Sep 18 07:55:57 AM UTC 24 Sep 18 07:56:00 AM UTC 24 145827624 ps
T346 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_host_perf_precise.1958417347 Sep 18 07:55:59 AM UTC 24 Sep 18 07:56:01 AM UTC 24 55593495 ps
T347 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_intr_smoke.2804642560 Sep 18 07:56:02 AM UTC 24 Sep 18 07:56:11 AM UTC 24 2100358191 ps
T249 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_host_may_nack.3110006177 Sep 18 07:55:51 AM UTC 24 Sep 18 07:56:01 AM UTC 24 632531510 ps
T30 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_host_error_intr.1376349124 Sep 18 07:55:59 AM UTC 24 Sep 18 07:56:02 AM UTC 24 251687579 ps
T348 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_hrst.2954446727 Sep 18 07:56:11 AM UTC 24 Sep 18 07:56:14 AM UTC 24 846380903 ps
T349 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_tx_stretch_ctrl.3985279591 Sep 18 07:55:53 AM UTC 24 Sep 18 07:56:04 AM UTC 24 366555203 ps
T219 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_host_fifo_fmt_empty.2546483647 Sep 18 07:55:57 AM UTC 24 Sep 18 07:56:06 AM UTC 24 267353262 ps
T27 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_host_fifo_full.998119052 Sep 18 07:54:40 AM UTC 24 Sep 18 07:56:06 AM UTC 24 3487056230 ps
T168 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_host_fifo_reset_rx.103339531 Sep 18 07:55:58 AM UTC 24 Sep 18 07:56:07 AM UTC 24 1850754444 ps
T173 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_stress_rd.2320381864 Sep 18 07:55:40 AM UTC 24 Sep 18 07:56:07 AM UTC 24 3195865913 ps
T174 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_perf.816894153 Sep 18 07:56:08 AM UTC 24 Sep 18 07:56:15 AM UTC 24 2815738290 ps
T175 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_fifo_reset_tx.1930519837 Sep 18 07:56:07 AM UTC 24 Sep 18 07:56:10 AM UTC 24 340401536 ps
T176 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_stress_rd.3493450146 Sep 18 07:55:16 AM UTC 24 Sep 18 07:56:10 AM UTC 24 4686215297 ps
T177 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_stress_wr.3125283179 Sep 18 07:56:01 AM UTC 24 Sep 18 07:56:15 AM UTC 24 14146893279 ps
T54 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_intr_stress_wr.4081793903 Sep 18 07:55:43 AM UTC 24 Sep 18 07:56:12 AM UTC 24 17161648014 ps
T178 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_intr_stress_wr.1857015566 Sep 18 07:56:03 AM UTC 24 Sep 18 07:56:14 AM UTC 24 8434600131 ps
T83 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_host_fifo_watermark.4096920953 Sep 18 07:54:38 AM UTC 24 Sep 18 07:56:17 AM UTC 24 18694740272 ps
T84 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_host_fifo_watermark.3610259836 Sep 18 07:55:12 AM UTC 24 Sep 18 07:56:17 AM UTC 24 15046823408 ps
T350 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_alert_test.199791716 Sep 18 07:57:03 AM UTC 24 Sep 18 07:57:05 AM UTC 24 56297170 ps
T351 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_fifo_watermarks_tx.1738259396 Sep 18 07:56:14 AM UTC 24 Sep 18 07:56:17 AM UTC 24 152069609 ps
T352 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_smoke.2821475251 Sep 18 07:56:01 AM UTC 24 Sep 18 07:56:17 AM UTC 24 2349876459 ps
T353 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_stretch.1629173049 Sep 18 07:56:02 AM UTC 24 Sep 18 07:56:18 AM UTC 24 1162884114 ps
T262 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_stress_rd.3362071084 Sep 18 07:56:02 AM UTC 24 Sep 18 07:56:19 AM UTC 24 641048172 ps
T354 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_fifo_watermarks_acq.194841728 Sep 18 07:56:13 AM UTC 24 Sep 18 07:56:19 AM UTC 24 590738447 ps
T181 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_nack_txstretch.831490813 Sep 18 07:56:16 AM UTC 24 Sep 18 07:56:19 AM UTC 24 469630365 ps
T146 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_host_override.3071085328 Sep 18 07:56:17 AM UTC 24 Sep 18 07:56:19 AM UTC 24 193656329 ps
T156 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_nack_acqfull.252259177 Sep 18 07:56:15 AM UTC 24 Sep 18 07:56:20 AM UTC 24 900646740 ps
T157 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_bad_addr.3761168397 Sep 18 07:56:10 AM UTC 24 Sep 18 07:56:20 AM UTC 24 3295983880 ps
T158 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_smbus_maxlen.3943441709 Sep 18 07:56:15 AM UTC 24 Sep 18 07:56:20 AM UTC 24 1342286923 ps
T159 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_nack_acqfull_addr.881320361 Sep 18 07:56:16 AM UTC 24 Sep 18 07:56:20 AM UTC 24 998920490 ps
T33 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_host_smoke.3660916616 Sep 18 07:55:55 AM UTC 24 Sep 18 07:56:21 AM UTC 24 6943961169 ps
T160 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_reset_fmt.2448988971 Sep 18 07:56:20 AM UTC 24 Sep 18 07:56:22 AM UTC 24 255753641 ps
T28 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_fifo_full.2735204493 Sep 18 07:54:25 AM UTC 24 Sep 18 07:56:22 AM UTC 24 23524053780 ps
T161 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_host_error_intr.2762535626 Sep 18 07:56:21 AM UTC 24 Sep 18 07:56:27 AM UTC 24 976967415 ps
T162 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_target_intr_stress_wr.4007471522 Sep 18 07:55:17 AM UTC 24 Sep 18 07:56:29 AM UTC 24 7350878638 ps
T252 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_host_may_nack.4177676031 Sep 18 07:56:13 AM UTC 24 Sep 18 07:56:30 AM UTC 24 1341848145 ps
T355 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_target_bad_addr.1892458855 Sep 18 07:56:56 AM UTC 24 Sep 18 07:57:05 AM UTC 24 1906379238 ps
T287 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_host_smoke.2303165611 Sep 18 07:55:10 AM UTC 24 Sep 18 07:56:31 AM UTC 24 3803321833 ps
T106 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_host_fifo_overflow.612819210 Sep 18 07:55:36 AM UTC 24 Sep 18 07:56:31 AM UTC 24 8647737493 ps
T356 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_reset_rx.3924198406 Sep 18 07:56:21 AM UTC 24 Sep 18 07:56:32 AM UTC 24 163177335 ps
T357 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_target_smbus_maxlen.194452686 Sep 18 07:57:01 AM UTC 24 Sep 18 07:57:06 AM UTC 24 1905863152 ps
T358 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_fmt_empty.135007450 Sep 18 07:56:21 AM UTC 24 Sep 18 07:56:33 AM UTC 24 397808101 ps
T197 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_fifo_reset_tx.2143906564 Sep 18 07:56:32 AM UTC 24 Sep 18 07:56:34 AM UTC 24 240061860 ps
T359 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_fifo_reset_acq.3924930409 Sep 18 07:56:32 AM UTC 24 Sep 18 07:56:35 AM UTC 24 274461288 ps
T360 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_tx_stretch_ctrl.2815426946 Sep 18 07:56:15 AM UTC 24 Sep 18 07:56:36 AM UTC 24 1429299778 ps
T361 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_intr_smoke.1867713608 Sep 18 07:56:23 AM UTC 24 Sep 18 07:56:36 AM UTC 24 2357479560 ps
T107 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/3.i2c_host_fifo_overflow.1139329433 Sep 18 07:55:12 AM UTC 24 Sep 18 07:56:37 AM UTC 24 11015049295 ps
T362 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_timeout.1862828701 Sep 18 07:56:31 AM UTC 24 Sep 18 07:56:39 AM UTC 24 2369353532 ps
T363 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_fifo_watermarks_tx.237146389 Sep 18 07:56:37 AM UTC 24 Sep 18 07:56:39 AM UTC 24 623553131 ps
T364 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_bad_addr.2555922919 Sep 18 07:56:33 AM UTC 24 Sep 18 07:56:40 AM UTC 24 2047605363 ps
T365 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_fifo_watermarks_acq.141089133 Sep 18 07:56:36 AM UTC 24 Sep 18 07:56:41 AM UTC 24 2117486154 ps
T366 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_perf.2146978176 Sep 18 07:56:32 AM UTC 24 Sep 18 07:56:41 AM UTC 24 2675934682 ps
T367 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_host_may_nack.3574347739 Sep 18 07:56:36 AM UTC 24 Sep 18 07:56:42 AM UTC 24 1062728256 ps
T182 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_nack_txstretch.802447435 Sep 18 07:56:41 AM UTC 24 Sep 18 07:56:44 AM UTC 24 369201361 ps
T368 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_nack_acqfull.4058066704 Sep 18 07:56:39 AM UTC 24 Sep 18 07:56:45 AM UTC 24 3653609058 ps
T369 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_alert_test.1253043689 Sep 18 07:56:43 AM UTC 24 Sep 18 07:56:45 AM UTC 24 17042250 ps
T147 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_host_override.719147624 Sep 18 07:56:43 AM UTC 24 Sep 18 07:56:45 AM UTC 24 27558356 ps
T370 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_intr_stress_wr.1943415791 Sep 18 07:56:29 AM UTC 24 Sep 18 07:56:45 AM UTC 24 6311920738 ps
T371 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_tx_stretch_ctrl.4042005052 Sep 18 07:56:38 AM UTC 24 Sep 18 07:56:45 AM UTC 24 289683454 ps
T372 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_smbus_maxlen.2079759992 Sep 18 07:56:39 AM UTC 24 Sep 18 07:56:45 AM UTC 24 2127436187 ps
T373 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_stress_wr.2611104948 Sep 18 07:56:21 AM UTC 24 Sep 18 07:56:45 AM UTC 24 16617654769 ps
T374 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_nack_acqfull_addr.1122395966 Sep 18 07:56:41 AM UTC 24 Sep 18 07:56:46 AM UTC 24 445322622 ps
T375 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_reset_fmt.2198410424 Sep 18 07:56:46 AM UTC 24 Sep 18 07:56:49 AM UTC 24 523942815 ps
T376 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_host_smoke.412257345 Sep 18 07:56:17 AM UTC 24 Sep 18 07:56:49 AM UTC 24 2786175781 ps
T85 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_smoke.1192244650 Sep 18 07:56:21 AM UTC 24 Sep 18 07:56:49 AM UTC 24 1706466907 ps
T93 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_host_perf_precise.3132148087 Sep 18 07:56:46 AM UTC 24 Sep 18 07:56:51 AM UTC 24 220930820 ps
T94 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/0.i2c_host_fifo_overflow.3708929231 Sep 18 07:54:25 AM UTC 24 Sep 18 07:56:51 AM UTC 24 15991884861 ps
T95 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_stress_rd.1465583935 Sep 18 07:56:23 AM UTC 24 Sep 18 07:56:51 AM UTC 24 6268027709 ps
T96 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_stretch.3909063005 Sep 18 07:55:40 AM UTC 24 Sep 18 07:56:53 AM UTC 24 3464293997 ps
T97 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_target_stretch.474530648 Sep 18 07:56:23 AM UTC 24 Sep 18 07:56:54 AM UTC 24 4194972903 ps
T98 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_target_stress_all.3902351443 Sep 18 07:56:10 AM UTC 24 Sep 18 07:56:55 AM UTC 24 27095684963 ps
T99 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_host_stretch_timeout.3994367459 Sep 18 07:56:21 AM UTC 24 Sep 18 07:56:55 AM UTC 24 4352145203 ps
T100 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_reset_rx.2227517129 Sep 18 07:56:46 AM UTC 24 Sep 18 07:56:55 AM UTC 24 2436363929 ps
T101 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_host_fifo_overflow.3723538807 Sep 18 07:54:38 AM UTC 24 Sep 18 07:56:56 AM UTC 24 9562781115 ps
T193 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_host_fifo_overflow.961258356 Sep 18 07:55:56 AM UTC 24 Sep 18 07:56:56 AM UTC 24 1983759046 ps
T39 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_host_fifo_full.2627133646 Sep 18 07:55:36 AM UTC 24 Sep 18 07:56:57 AM UTC 24 9292057814 ps
T194 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_overflow.1250728782 Sep 18 07:56:20 AM UTC 24 Sep 18 07:56:57 AM UTC 24 1337746082 ps
T247 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_host_may_nack.32991224 Sep 18 07:56:58 AM UTC 24 Sep 18 07:57:10 AM UTC 24 2664379140 ps
T377 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_target_smoke.1245106325 Sep 18 07:56:49 AM UTC 24 Sep 18 07:56:57 AM UTC 24 2695860358 ps
T118 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_host_fifo_watermark.1177206583 Sep 18 07:55:56 AM UTC 24 Sep 18 07:57:06 AM UTC 24 7662621798 ps
T378 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_target_fifo_reset_acq.3388740221 Sep 18 07:56:55 AM UTC 24 Sep 18 07:56:58 AM UTC 24 151822620 ps
T379 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_host_error_intr.3299285178 Sep 18 07:56:47 AM UTC 24 Sep 18 07:56:58 AM UTC 24 2461418133 ps
T380 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_target_fifo_reset_tx.3725569356 Sep 18 07:56:56 AM UTC 24 Sep 18 07:56:59 AM UTC 24 194466074 ps
T169 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/5.i2c_host_fifo_full.1410532548 Sep 18 07:55:58 AM UTC 24 Sep 18 07:57:00 AM UTC 24 2081003720 ps
T381 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_target_intr_smoke.3448730697 Sep 18 07:56:52 AM UTC 24 Sep 18 07:57:00 AM UTC 24 6580936108 ps
T382 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_target_perf.1467833260 Sep 18 07:56:56 AM UTC 24 Sep 18 07:57:01 AM UTC 24 1912471811 ps
T383 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_host_override.2483514259 Sep 18 07:57:04 AM UTC 24 Sep 18 07:57:06 AM UTC 24 37388812 ps
T384 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_fmt_empty.2682814236 Sep 18 07:56:46 AM UTC 24 Sep 18 07:57:02 AM UTC 24 579828246 ps
T385 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_target_nack_acqfull_addr.3506337826 Sep 18 07:57:02 AM UTC 24 Sep 18 07:57:06 AM UTC 24 494788272 ps
T386 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_target_fifo_watermarks_tx.3901439686 Sep 18 07:57:00 AM UTC 24 Sep 18 07:57:03 AM UTC 24 254084023 ps
T387 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_target_timeout.3410501836 Sep 18 07:56:54 AM UTC 24 Sep 18 07:57:03 AM UTC 24 5915225054 ps
T388 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_host_fifo_watermark.575725604 Sep 18 07:54:52 AM UTC 24 Sep 18 07:57:04 AM UTC 24 20974177650 ps
T268 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_target_fifo_watermarks_acq.2421992146 Sep 18 07:56:59 AM UTC 24 Sep 18 07:57:05 AM UTC 24 1968065983 ps
T170 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_host_perf.1291422254 Sep 18 07:56:46 AM UTC 24 Sep 18 07:57:05 AM UTC 24 3132667658 ps
T389 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_target_nack_acqfull.1756978780 Sep 18 07:57:02 AM UTC 24 Sep 18 07:57:07 AM UTC 24 1989020309 ps
T390 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/1.i2c_target_intr_stress_wr.3274765523 Sep 18 07:54:41 AM UTC 24 Sep 18 07:57:06 AM UTC 24 21902888754 ps
T183 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/7.i2c_target_nack_txstretch.718034792 Sep 18 07:57:03 AM UTC 24 Sep 18 07:57:06 AM UTC 24 169892291 ps
T391 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_reset_fmt.663477130 Sep 18 07:57:05 AM UTC 24 Sep 18 07:57:08 AM UTC 24 131967773 ps
T55 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/4.i2c_target_stress_wr.1114592085 Sep 18 07:55:39 AM UTC 24 Sep 18 07:57:09 AM UTC 24 33503417117 ps
T56 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/2.i2c_target_stress_all.3965907601 Sep 18 07:55:06 AM UTC 24 Sep 18 07:58:14 AM UTC 24 69794446610 ps
T392 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_fmt_empty.1262008821 Sep 18 07:57:05 AM UTC 24 Sep 18 07:57:10 AM UTC 24 584994514 ps
T393 /workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_reset_rx.1600983734 Sep 18 07:57:05 AM UTC 24 Sep 18 07:57:13 AM UTC 24 195486797 ps
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