T1321 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_host_override.1930306280 |
|
|
Sep 18 08:14:08 AM UTC 24 |
Sep 18 08:14:10 AM UTC 24 |
132000576 ps |
T1322 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull_addr.2744958248 |
|
|
Sep 18 08:14:04 AM UTC 24 |
Sep 18 08:14:10 AM UTC 24 |
10785812008 ps |
T1323 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/32.i2c_host_perf.1418774480 |
|
|
Sep 18 08:10:14 AM UTC 24 |
Sep 18 08:14:10 AM UTC 24 |
20060810411 ps |
T1324 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/37.i2c_host_smoke.2159244609 |
|
|
Sep 18 08:13:29 AM UTC 24 |
Sep 18 08:14:12 AM UTC 24 |
12931308628 ps |
T1325 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_fmt.2733478803 |
|
|
Sep 18 08:14:10 AM UTC 24 |
Sep 18 08:14:12 AM UTC 24 |
101099897 ps |
T1326 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_host_perf_precise.1477402679 |
|
|
Sep 18 08:14:13 AM UTC 24 |
Sep 18 08:14:16 AM UTC 24 |
361434211 ps |
T1327 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_overflow.1241149866 |
|
|
Sep 18 08:13:30 AM UTC 24 |
Sep 18 08:14:16 AM UTC 24 |
8329201444 ps |
T1328 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_rx.2851244764 |
|
|
Sep 18 08:14:11 AM UTC 24 |
Sep 18 08:14:19 AM UTC 24 |
331004873 ps |
T1329 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_host_error_intr.822118060 |
|
|
Sep 18 08:14:16 AM UTC 24 |
Sep 18 08:14:26 AM UTC 24 |
613706312 ps |
T1330 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_host_stretch_timeout.1924892147 |
|
|
Sep 18 08:14:13 AM UTC 24 |
Sep 18 08:14:29 AM UTC 24 |
759212636 ps |
T1331 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/33.i2c_target_stress_all.2523097509 |
|
|
Sep 18 08:11:16 AM UTC 24 |
Sep 18 08:14:32 AM UTC 24 |
82203592125 ps |
T1332 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_target_stretch.2050156137 |
|
|
Sep 18 08:14:27 AM UTC 24 |
Sep 18 08:14:32 AM UTC 24 |
2663115118 ps |
T1333 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_host_perf.4123222643 |
|
|
Sep 18 08:14:11 AM UTC 24 |
Sep 18 08:14:33 AM UTC 24 |
3685205178 ps |
T1334 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/36.i2c_host_smoke.162674820 |
|
|
Sep 18 08:12:52 AM UTC 24 |
Sep 18 08:14:37 AM UTC 24 |
2767774953 ps |
T1335 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_tx.1437969122 |
|
|
Sep 18 08:14:37 AM UTC 24 |
Sep 18 08:14:39 AM UTC 24 |
166448174 ps |
T1336 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_target_intr_smoke.2029132790 |
|
|
Sep 18 08:14:30 AM UTC 24 |
Sep 18 08:14:39 AM UTC 24 |
20332326447 ps |
T1337 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_acq.2821125433 |
|
|
Sep 18 08:14:37 AM UTC 24 |
Sep 18 08:14:40 AM UTC 24 |
169484628 ps |
T1338 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_target_intr_stress_wr.1058738892 |
|
|
Sep 18 08:14:33 AM UTC 24 |
Sep 18 08:14:41 AM UTC 24 |
10580190775 ps |
T1339 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_target_smoke.1995195863 |
|
|
Sep 18 08:14:20 AM UTC 24 |
Sep 18 08:14:42 AM UTC 24 |
2383750365 ps |
T1340 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_target_timeout.2744968336 |
|
|
Sep 18 08:14:33 AM UTC 24 |
Sep 18 08:14:42 AM UTC 24 |
1430478790 ps |
T1341 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/36.i2c_target_intr_stress_wr.2185543367 |
|
|
Sep 18 08:13:10 AM UTC 24 |
Sep 18 08:14:43 AM UTC 24 |
24714393351 ps |
T1342 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_target_bad_addr.2400537116 |
|
|
Sep 18 08:14:40 AM UTC 24 |
Sep 18 08:14:46 AM UTC 24 |
789253461 ps |
T1343 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_tx.1579843710 |
|
|
Sep 18 08:14:47 AM UTC 24 |
Sep 18 08:14:49 AM UTC 24 |
156975676 ps |
T1344 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_acq.935401239 |
|
|
Sep 18 08:14:44 AM UTC 24 |
Sep 18 08:14:49 AM UTC 24 |
896634076 ps |
T1345 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_target_perf.1893339395 |
|
|
Sep 18 08:14:40 AM UTC 24 |
Sep 18 08:14:50 AM UTC 24 |
3574824635 ps |
T1346 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_watermark.1820511789 |
|
|
Sep 18 08:12:53 AM UTC 24 |
Sep 18 08:14:52 AM UTC 24 |
4761171674 ps |
T1347 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_target_tx_stretch_ctrl.3927394313 |
|
|
Sep 18 08:14:48 AM UTC 24 |
Sep 18 08:14:53 AM UTC 24 |
256884753 ps |
T1348 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_watermark.1714950590 |
|
|
Sep 18 08:13:30 AM UTC 24 |
Sep 18 08:14:54 AM UTC 24 |
13471354617 ps |
T1349 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull.2706013880 |
|
|
Sep 18 08:14:50 AM UTC 24 |
Sep 18 08:14:55 AM UTC 24 |
2057474781 ps |
T1350 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_target_smbus_maxlen.2506070972 |
|
|
Sep 18 08:14:50 AM UTC 24 |
Sep 18 08:14:55 AM UTC 24 |
587952440 ps |
T1351 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_smoke.1930986100 |
|
|
Sep 18 08:15:34 AM UTC 24 |
Sep 18 08:15:48 AM UTC 24 |
2677541875 ps |
T1352 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/37.i2c_host_perf_precise.2579713883 |
|
|
Sep 18 08:13:34 AM UTC 24 |
Sep 18 08:14:56 AM UTC 24 |
6081072164 ps |
T1353 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_alert_test.582033489 |
|
|
Sep 18 08:14:54 AM UTC 24 |
Sep 18 08:14:56 AM UTC 24 |
22212194 ps |
T1354 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_host_may_nack.2570972955 |
|
|
Sep 18 08:14:44 AM UTC 24 |
Sep 18 08:14:56 AM UTC 24 |
1672735178 ps |
T1355 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull_addr.436438277 |
|
|
Sep 18 08:14:51 AM UTC 24 |
Sep 18 08:14:57 AM UTC 24 |
1901315835 ps |
T1356 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/34.i2c_target_stress_all.2086637852 |
|
|
Sep 18 08:11:58 AM UTC 24 |
Sep 18 08:14:57 AM UTC 24 |
17901717472 ps |
T261 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_host_override.1982613914 |
|
|
Sep 18 08:14:55 AM UTC 24 |
Sep 18 08:14:57 AM UTC 24 |
18555942 ps |
T1357 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_fmt.4155645240 |
|
|
Sep 18 08:14:56 AM UTC 24 |
Sep 18 08:14:59 AM UTC 24 |
245753990 ps |
T1358 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_full.2958789142 |
|
|
Sep 18 08:12:11 AM UTC 24 |
Sep 18 08:14:59 AM UTC 24 |
5153085994 ps |
T1359 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_host_error_intr.1801075617 |
|
|
Sep 18 08:15:00 AM UTC 24 |
Sep 18 08:15:03 AM UTC 24 |
341221321 ps |
T1360 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_rx.1866772055 |
|
|
Sep 18 08:14:58 AM UTC 24 |
Sep 18 08:15:04 AM UTC 24 |
156862755 ps |
T1361 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_fmt_empty.3804685996 |
|
|
Sep 18 08:14:58 AM UTC 24 |
Sep 18 08:15:06 AM UTC 24 |
306169533 ps |
T243 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/21.i2c_host_stress_all.493500050 |
|
|
Sep 18 08:03:50 AM UTC 24 |
Sep 18 08:15:09 AM UTC 24 |
59534661452 ps |
T1362 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_host_stretch_timeout.1730097154 |
|
|
Sep 18 08:15:00 AM UTC 24 |
Sep 18 08:15:09 AM UTC 24 |
916376729 ps |
T1363 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_target_stress_rd.1654016621 |
|
|
Sep 18 08:14:25 AM UTC 24 |
Sep 18 08:15:10 AM UTC 24 |
3367455755 ps |
T1364 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/37.i2c_target_stress_all.2227316926 |
|
|
Sep 18 08:13:56 AM UTC 24 |
Sep 18 08:15:12 AM UTC 24 |
41364188932 ps |
T1365 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_host_perf_precise.837017807 |
|
|
Sep 18 08:14:59 AM UTC 24 |
Sep 18 08:15:12 AM UTC 24 |
798157083 ps |
T1366 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_stress_wr.1739565816 |
|
|
Sep 18 08:15:05 AM UTC 24 |
Sep 18 08:15:13 AM UTC 24 |
21182571713 ps |
T1367 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_acq.1012906637 |
|
|
Sep 18 08:15:14 AM UTC 24 |
Sep 18 08:15:16 AM UTC 24 |
535060261 ps |
T1368 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_full.1322172025 |
|
|
Sep 18 08:14:11 AM UTC 24 |
Sep 18 08:15:17 AM UTC 24 |
10279601970 ps |
T1369 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/35.i2c_target_stress_all.601366207 |
|
|
Sep 18 08:12:39 AM UTC 24 |
Sep 18 08:15:17 AM UTC 24 |
105152496870 ps |
T1370 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_tx.891108504 |
|
|
Sep 18 08:15:16 AM UTC 24 |
Sep 18 08:15:18 AM UTC 24 |
1376773431 ps |
T1371 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_timeout.3054103736 |
|
|
Sep 18 08:15:13 AM UTC 24 |
Sep 18 08:15:20 AM UTC 24 |
4249884110 ps |
T1372 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/35.i2c_target_intr_stress_wr.3879263004 |
|
|
Sep 18 08:12:30 AM UTC 24 |
Sep 18 08:15:20 AM UTC 24 |
11064433906 ps |
T1373 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_intr_smoke.2834131110 |
|
|
Sep 18 08:15:10 AM UTC 24 |
Sep 18 08:15:22 AM UTC 24 |
2438088658 ps |
T1374 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_host_smoke.1260919910 |
|
|
Sep 18 08:14:06 AM UTC 24 |
Sep 18 08:15:22 AM UTC 24 |
1495032603 ps |
T1375 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_stress_rd.782689149 |
|
|
Sep 18 08:15:07 AM UTC 24 |
Sep 18 08:15:23 AM UTC 24 |
598216715 ps |
T1376 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_perf.248500995 |
|
|
Sep 18 08:15:17 AM UTC 24 |
Sep 18 08:15:24 AM UTC 24 |
505684858 ps |
T1377 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_tx.1181723521 |
|
|
Sep 18 08:15:22 AM UTC 24 |
Sep 18 08:15:25 AM UTC 24 |
149385887 ps |
T1378 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_host_mode_toggle.2089327205 |
|
|
Sep 18 08:15:21 AM UTC 24 |
Sep 18 08:15:25 AM UTC 24 |
901551274 ps |
T1379 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_host_smoke.3819535103 |
|
|
Sep 18 08:14:54 AM UTC 24 |
Sep 18 08:15:26 AM UTC 24 |
1400576017 ps |
T1380 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_acq.2456604548 |
|
|
Sep 18 08:15:21 AM UTC 24 |
Sep 18 08:15:27 AM UTC 24 |
6732728113 ps |
T1381 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_bad_addr.838643892 |
|
|
Sep 18 08:15:18 AM UTC 24 |
Sep 18 08:15:27 AM UTC 24 |
790610225 ps |
T1382 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/30.i2c_target_stress_all.977719453 |
|
|
Sep 18 08:09:21 AM UTC 24 |
Sep 18 08:15:28 AM UTC 24 |
46564423877 ps |
T1383 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_tx_stretch_ctrl.3291436237 |
|
|
Sep 18 08:15:22 AM UTC 24 |
Sep 18 08:15:28 AM UTC 24 |
110094267 ps |
T1384 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_alert_test.1659111437 |
|
|
Sep 18 08:15:27 AM UTC 24 |
Sep 18 08:15:29 AM UTC 24 |
99669548 ps |
T1385 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_overflow.192014929 |
|
|
Sep 18 08:12:54 AM UTC 24 |
Sep 18 08:15:29 AM UTC 24 |
2340555392 ps |
T1386 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_smbus_maxlen.1193552883 |
|
|
Sep 18 08:15:24 AM UTC 24 |
Sep 18 08:15:29 AM UTC 24 |
427398718 ps |
T1387 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_host_may_nack.2388974471 |
|
|
Sep 18 08:15:21 AM UTC 24 |
Sep 18 08:15:29 AM UTC 24 |
421448663 ps |
T1388 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_host_perf.915767871 |
|
|
Sep 18 08:14:58 AM UTC 24 |
Sep 18 08:15:29 AM UTC 24 |
3008173375 ps |
T1389 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull.1196129595 |
|
|
Sep 18 08:15:25 AM UTC 24 |
Sep 18 08:15:30 AM UTC 24 |
563163619 ps |
T1390 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_host_override.1163000872 |
|
|
Sep 18 08:15:28 AM UTC 24 |
Sep 18 08:15:30 AM UTC 24 |
50154510 ps |
T1391 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_nack_txstretch.3662025396 |
|
|
Sep 18 08:15:27 AM UTC 24 |
Sep 18 08:15:30 AM UTC 24 |
393601682 ps |
T1392 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/9.i2c_target_stress_wr.23484384 |
|
|
Sep 18 07:57:35 AM UTC 24 |
Sep 18 08:15:32 AM UTC 24 |
57841586241 ps |
T1393 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull_addr.512841856 |
|
|
Sep 18 08:15:27 AM UTC 24 |
Sep 18 08:15:32 AM UTC 24 |
571230832 ps |
T1394 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_fmt.877871372 |
|
|
Sep 18 08:15:30 AM UTC 24 |
Sep 18 08:15:33 AM UTC 24 |
152996292 ps |
T1395 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_intr_stress_wr.4046176560 |
|
|
Sep 18 08:15:10 AM UTC 24 |
Sep 18 08:15:34 AM UTC 24 |
14210466324 ps |
T1396 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_rx.2439246960 |
|
|
Sep 18 08:15:30 AM UTC 24 |
Sep 18 08:15:36 AM UTC 24 |
261747092 ps |
T1397 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_stretch.455085722 |
|
|
Sep 18 08:15:09 AM UTC 24 |
Sep 18 08:15:36 AM UTC 24 |
3652880570 ps |
T1398 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_host_error_intr.3656969206 |
|
|
Sep 18 08:15:31 AM UTC 24 |
Sep 18 08:15:37 AM UTC 24 |
401809932 ps |
T1399 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/37.i2c_target_intr_stress_wr.2720984687 |
|
|
Sep 18 08:13:48 AM UTC 24 |
Sep 18 08:15:41 AM UTC 24 |
20719395738 ps |
T1400 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_host_perf_precise.1497042148 |
|
|
Sep 18 08:15:30 AM UTC 24 |
Sep 18 08:15:44 AM UTC 24 |
3039213256 ps |
T1401 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_stress_rd.2590976736 |
|
|
Sep 18 08:15:35 AM UTC 24 |
Sep 18 08:15:45 AM UTC 24 |
1470892387 ps |
T1402 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/33.i2c_target_stress_wr.2063113086 |
|
|
Sep 18 08:10:59 AM UTC 24 |
Sep 18 08:15:45 AM UTC 24 |
48823990900 ps |
T1403 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_intr_smoke.90455393 |
|
|
Sep 18 08:15:37 AM UTC 24 |
Sep 18 08:15:46 AM UTC 24 |
3018470428 ps |
T1404 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_acq.3929388962 |
|
|
Sep 18 08:15:44 AM UTC 24 |
Sep 18 08:15:48 AM UTC 24 |
835229296 ps |
T296 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_tx.959925640 |
|
|
Sep 18 08:15:45 AM UTC 24 |
Sep 18 08:15:49 AM UTC 24 |
387937900 ps |
T1405 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_stress_wr.3649110565 |
|
|
Sep 18 08:15:34 AM UTC 24 |
Sep 18 08:15:50 AM UTC 24 |
23008422131 ps |
T1406 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_timeout.39391579 |
|
|
Sep 18 08:15:37 AM UTC 24 |
Sep 18 08:15:50 AM UTC 24 |
7158529802 ps |
T1407 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_watermark.3194529339 |
|
|
Sep 18 08:14:09 AM UTC 24 |
Sep 18 08:15:50 AM UTC 24 |
3966513953 ps |
T1408 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_host_perf.1971857887 |
|
|
Sep 18 08:15:30 AM UTC 24 |
Sep 18 08:15:51 AM UTC 24 |
1198614723 ps |
T1409 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_perf.3741539722 |
|
|
Sep 18 08:15:45 AM UTC 24 |
Sep 18 08:15:53 AM UTC 24 |
3050366435 ps |
T1410 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_full.383676041 |
|
|
Sep 18 08:12:58 AM UTC 24 |
Sep 18 08:15:54 AM UTC 24 |
2795523976 ps |
T1411 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_tx.59500173 |
|
|
Sep 18 08:15:51 AM UTC 24 |
Sep 18 08:15:54 AM UTC 24 |
2083077729 ps |
T1412 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_watermark.964645483 |
|
|
Sep 18 08:11:31 AM UTC 24 |
Sep 18 08:15:54 AM UTC 24 |
17993208820 ps |
T1413 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_bad_addr.3996493566 |
|
|
Sep 18 08:15:48 AM UTC 24 |
Sep 18 08:15:55 AM UTC 24 |
3748053650 ps |
T1414 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_overflow.2133771292 |
|
|
Sep 18 08:14:09 AM UTC 24 |
Sep 18 08:15:55 AM UTC 24 |
1598298833 ps |
T1415 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_acq.3839544491 |
|
|
Sep 18 08:15:51 AM UTC 24 |
Sep 18 08:15:55 AM UTC 24 |
483392615 ps |
T1416 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_stretch.650152391 |
|
|
Sep 18 08:15:36 AM UTC 24 |
Sep 18 08:15:56 AM UTC 24 |
4146340937 ps |
T1417 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_fmt_empty.824493112 |
|
|
Sep 18 08:15:30 AM UTC 24 |
Sep 18 08:15:57 AM UTC 24 |
462757338 ps |
T1418 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_host_may_nack.1048350174 |
|
|
Sep 18 08:15:50 AM UTC 24 |
Sep 18 08:15:57 AM UTC 24 |
1188185708 ps |
T1419 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_smbus_maxlen.1122617617 |
|
|
Sep 18 08:15:52 AM UTC 24 |
Sep 18 08:15:57 AM UTC 24 |
564418324 ps |
T1420 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_alert_test.446490947 |
|
|
Sep 18 08:15:55 AM UTC 24 |
Sep 18 08:15:57 AM UTC 24 |
37838700 ps |
T1421 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_host_mode_toggle.2126925024 |
|
|
Sep 18 08:16:38 AM UTC 24 |
Sep 18 08:16:42 AM UTC 24 |
302294914 ps |
T1422 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_nack_txstretch.599228033 |
|
|
Sep 18 08:15:55 AM UTC 24 |
Sep 18 08:15:58 AM UTC 24 |
299884194 ps |
T1423 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_host_override.3809188112 |
|
|
Sep 18 08:15:56 AM UTC 24 |
Sep 18 08:15:58 AM UTC 24 |
102721853 ps |
T1424 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_full.3636390755 |
|
|
Sep 18 08:14:58 AM UTC 24 |
Sep 18 08:15:58 AM UTC 24 |
2184444490 ps |
T1425 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_smoke.820902556 |
|
|
Sep 18 08:15:04 AM UTC 24 |
Sep 18 08:15:59 AM UTC 24 |
2350771933 ps |
T1426 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_tx_stretch_ctrl.4195175726 |
|
|
Sep 18 08:15:51 AM UTC 24 |
Sep 18 08:15:59 AM UTC 24 |
391530437 ps |
T1427 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull.2190461552 |
|
|
Sep 18 08:15:54 AM UTC 24 |
Sep 18 08:15:59 AM UTC 24 |
2559836255 ps |
T1428 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull_addr.2532463172 |
|
|
Sep 18 08:15:55 AM UTC 24 |
Sep 18 08:16:00 AM UTC 24 |
1935161169 ps |
T1429 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_fmt.859435112 |
|
|
Sep 18 08:15:58 AM UTC 24 |
Sep 18 08:16:00 AM UTC 24 |
567408127 ps |
T1430 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_target_intr_stress_wr.3789110804 |
|
|
Sep 18 08:15:37 AM UTC 24 |
Sep 18 08:16:02 AM UTC 24 |
7277176770 ps |
T1431 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_fmt_empty.3879442397 |
|
|
Sep 18 08:15:58 AM UTC 24 |
Sep 18 08:16:04 AM UTC 24 |
254625992 ps |
T1432 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_rx.2325402569 |
|
|
Sep 18 08:15:58 AM UTC 24 |
Sep 18 08:16:04 AM UTC 24 |
200125643 ps |
T1433 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_host_error_intr.2753219291 |
|
|
Sep 18 08:15:59 AM UTC 24 |
Sep 18 08:16:05 AM UTC 24 |
361901022 ps |
T273 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_host_stress_all.843574775 |
|
|
Sep 18 08:07:27 AM UTC 24 |
Sep 18 08:16:08 AM UTC 24 |
18736206808 ps |
T1434 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_hrst.3770601306 |
|
|
Sep 18 08:16:38 AM UTC 24 |
Sep 18 08:16:42 AM UTC 24 |
520527097 ps |
T1435 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_acq.1914369800 |
|
|
Sep 18 08:16:06 AM UTC 24 |
Sep 18 08:16:09 AM UTC 24 |
285139674 ps |
T1436 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_host_smoke.3012739873 |
|
|
Sep 18 08:15:28 AM UTC 24 |
Sep 18 08:16:09 AM UTC 24 |
18128201839 ps |
T1437 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_tx.2261546927 |
|
|
Sep 18 08:16:09 AM UTC 24 |
Sep 18 08:16:11 AM UTC 24 |
162407872 ps |
T91 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_smoke.568679876 |
|
|
Sep 18 08:16:00 AM UTC 24 |
Sep 18 08:16:12 AM UTC 24 |
3863925980 ps |
T1438 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_host_stretch_timeout.4045305864 |
|
|
Sep 18 08:15:59 AM UTC 24 |
Sep 18 08:16:12 AM UTC 24 |
568140243 ps |
T1439 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_hrst.4060996050 |
|
|
Sep 18 08:16:12 AM UTC 24 |
Sep 18 08:16:15 AM UTC 24 |
257747695 ps |
T1440 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_intr_smoke.2361788134 |
|
|
Sep 18 08:16:02 AM UTC 24 |
Sep 18 08:16:16 AM UTC 24 |
1336196132 ps |
T1441 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_timeout.863522240 |
|
|
Sep 18 08:16:05 AM UTC 24 |
Sep 18 08:16:16 AM UTC 24 |
2484842132 ps |
T1442 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_host_mode_toggle.2841833460 |
|
|
Sep 18 08:16:13 AM UTC 24 |
Sep 18 08:16:16 AM UTC 24 |
119237210 ps |
T1443 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_intr_stress_wr.1924569179 |
|
|
Sep 18 08:16:04 AM UTC 24 |
Sep 18 08:16:16 AM UTC 24 |
7533338598 ps |
T1444 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_host_stretch_timeout.278306566 |
|
|
Sep 18 08:15:30 AM UTC 24 |
Sep 18 08:16:16 AM UTC 24 |
4024883585 ps |
T1445 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_full.370658678 |
|
|
Sep 18 08:13:32 AM UTC 24 |
Sep 18 08:16:17 AM UTC 24 |
4845670887 ps |
T1446 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_target_stress_all.4132240683 |
|
|
Sep 18 08:15:18 AM UTC 24 |
Sep 18 08:16:17 AM UTC 24 |
38142688982 ps |
T1447 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_bad_addr.442303071 |
|
|
Sep 18 08:16:10 AM UTC 24 |
Sep 18 08:16:18 AM UTC 24 |
2270586859 ps |
T1448 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_perf.719331745 |
|
|
Sep 18 08:16:09 AM UTC 24 |
Sep 18 08:16:19 AM UTC 24 |
1440529461 ps |
T1449 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_tx.4249169741 |
|
|
Sep 18 08:16:16 AM UTC 24 |
Sep 18 08:16:19 AM UTC 24 |
449479202 ps |
T1450 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_alert_test.2387595826 |
|
|
Sep 18 08:16:19 AM UTC 24 |
Sep 18 08:16:21 AM UTC 24 |
28935678 ps |
T1451 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_nack_txstretch.1002175003 |
|
|
Sep 18 08:16:18 AM UTC 24 |
Sep 18 08:16:21 AM UTC 24 |
549720134 ps |
T1452 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull.1244079196 |
|
|
Sep 18 08:16:18 AM UTC 24 |
Sep 18 08:16:22 AM UTC 24 |
2069551833 ps |
T1453 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_host_may_nack.3038943072 |
|
|
Sep 18 08:16:13 AM UTC 24 |
Sep 18 08:16:22 AM UTC 24 |
5373086642 ps |
T1454 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_acq.4068382989 |
|
|
Sep 18 08:16:16 AM UTC 24 |
Sep 18 08:16:22 AM UTC 24 |
888188147 ps |
T1455 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_host_override.2677699696 |
|
|
Sep 18 08:16:20 AM UTC 24 |
Sep 18 08:16:22 AM UTC 24 |
38223547 ps |
T1456 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_host_perf_precise.427226615 |
|
|
Sep 18 08:15:59 AM UTC 24 |
Sep 18 08:16:22 AM UTC 24 |
6043633629 ps |
T1457 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_smbus_maxlen.2418863789 |
|
|
Sep 18 08:16:17 AM UTC 24 |
Sep 18 08:16:23 AM UTC 24 |
506636920 ps |
T1458 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull_addr.3323175975 |
|
|
Sep 18 08:16:18 AM UTC 24 |
Sep 18 08:16:23 AM UTC 24 |
1990714131 ps |
T1459 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_fmt.2165087224 |
|
|
Sep 18 08:16:22 AM UTC 24 |
Sep 18 08:16:25 AM UTC 24 |
149211465 ps |
T1460 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_stretch.894074862 |
|
|
Sep 18 08:16:01 AM UTC 24 |
Sep 18 08:16:26 AM UTC 24 |
2658819673 ps |
T1461 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/36.i2c_target_stress_all.2529773943 |
|
|
Sep 18 08:13:18 AM UTC 24 |
Sep 18 08:16:26 AM UTC 24 |
38599259309 ps |
T1462 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_watermark.2639582877 |
|
|
Sep 18 08:14:56 AM UTC 24 |
Sep 18 08:16:27 AM UTC 24 |
13611404202 ps |
T1463 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_fmt_empty.544241010 |
|
|
Sep 18 08:16:22 AM UTC 24 |
Sep 18 08:16:27 AM UTC 24 |
1257574180 ps |
T1464 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_tx_stretch_ctrl.1353812084 |
|
|
Sep 18 08:16:16 AM UTC 24 |
Sep 18 08:16:28 AM UTC 24 |
456884787 ps |
T1465 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_rx.3364989016 |
|
|
Sep 18 08:16:23 AM UTC 24 |
Sep 18 08:16:30 AM UTC 24 |
164553754 ps |
T1466 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_overflow.528733996 |
|
|
Sep 18 08:14:56 AM UTC 24 |
Sep 18 08:16:31 AM UTC 24 |
10131688218 ps |
T1467 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_host_error_intr.1039904181 |
|
|
Sep 18 08:16:25 AM UTC 24 |
Sep 18 08:16:33 AM UTC 24 |
2516474767 ps |
T1468 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/19.i2c_host_perf.1531151999 |
|
|
Sep 18 08:02:31 AM UTC 24 |
Sep 18 08:16:34 AM UTC 24 |
19027797776 ps |
T1469 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_target_stress_rd.2859334453 |
|
|
Sep 18 08:16:01 AM UTC 24 |
Sep 18 08:16:34 AM UTC 24 |
2726760426 ps |
T1470 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_intr_smoke.2118409876 |
|
|
Sep 18 08:16:28 AM UTC 24 |
Sep 18 08:16:34 AM UTC 24 |
1083121123 ps |
T1471 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_host_perf.40710898 |
|
|
Sep 18 08:15:59 AM UTC 24 |
Sep 18 08:16:35 AM UTC 24 |
7906048157 ps |
T1472 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_acq.2813482361 |
|
|
Sep 18 08:16:34 AM UTC 24 |
Sep 18 08:16:37 AM UTC 24 |
226465446 ps |
T1473 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_stress_wr.1189382898 |
|
|
Sep 18 08:16:27 AM UTC 24 |
Sep 18 08:16:37 AM UTC 24 |
14073012987 ps |
T1474 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_host_stretch_timeout.3081952188 |
|
|
Sep 18 08:16:23 AM UTC 24 |
Sep 18 08:16:38 AM UTC 24 |
732699790 ps |
T1475 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_tx.3695431176 |
|
|
Sep 18 08:16:35 AM UTC 24 |
Sep 18 08:16:39 AM UTC 24 |
256025304 ps |
T1476 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_smoke.1332939767 |
|
|
Sep 18 08:16:27 AM UTC 24 |
Sep 18 08:16:39 AM UTC 24 |
3857688092 ps |
T1477 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_timeout.2046692506 |
|
|
Sep 18 08:16:32 AM UTC 24 |
Sep 18 08:16:41 AM UTC 24 |
9098212042 ps |
T1478 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_perf.1917188133 |
|
|
Sep 18 08:16:35 AM UTC 24 |
Sep 18 08:16:41 AM UTC 24 |
4478700971 ps |
T1479 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_tx.3531660329 |
|
|
Sep 18 08:16:40 AM UTC 24 |
Sep 18 08:16:42 AM UTC 24 |
69132431 ps |
T1480 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_tx_stretch_ctrl.3743556303 |
|
|
Sep 18 08:16:40 AM UTC 24 |
Sep 18 08:16:43 AM UTC 24 |
77698480 ps |
T1481 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_acq.623273282 |
|
|
Sep 18 08:16:39 AM UTC 24 |
Sep 18 08:16:45 AM UTC 24 |
764484857 ps |
T1482 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_stretch.4038848027 |
|
|
Sep 18 08:16:28 AM UTC 24 |
Sep 18 08:16:45 AM UTC 24 |
1627323311 ps |
T1483 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_alert_test.2308287213 |
|
|
Sep 18 08:16:43 AM UTC 24 |
Sep 18 08:16:45 AM UTC 24 |
20229279 ps |
T1484 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_intr_stress_wr.3760973338 |
|
|
Sep 18 08:16:30 AM UTC 24 |
Sep 18 08:16:46 AM UTC 24 |
3408045215 ps |
T1485 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_overflow.1847572578 |
|
|
Sep 18 08:15:57 AM UTC 24 |
Sep 18 08:17:50 AM UTC 24 |
37736739007 ps |
T1486 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_smbus_maxlen.3284145346 |
|
|
Sep 18 08:16:42 AM UTC 24 |
Sep 18 08:16:47 AM UTC 24 |
4317200053 ps |
T1487 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull.1379423305 |
|
|
Sep 18 08:16:42 AM UTC 24 |
Sep 18 08:16:47 AM UTC 24 |
423895397 ps |
T1488 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_host_override.3540228540 |
|
|
Sep 18 08:16:45 AM UTC 24 |
Sep 18 08:16:47 AM UTC 24 |
85816832 ps |
T1489 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_watermark.722035997 |
|
|
Sep 18 08:15:29 AM UTC 24 |
Sep 18 08:16:48 AM UTC 24 |
20824636038 ps |
T1490 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull_addr.1832762768 |
|
|
Sep 18 08:16:42 AM UTC 24 |
Sep 18 08:16:48 AM UTC 24 |
3747120417 ps |
T1491 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_bad_addr.2473094980 |
|
|
Sep 18 08:16:37 AM UTC 24 |
Sep 18 08:16:48 AM UTC 24 |
2677516420 ps |
T1492 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_host_may_nack.291379411 |
|
|
Sep 18 08:16:38 AM UTC 24 |
Sep 18 08:16:50 AM UTC 24 |
1132858734 ps |
T1493 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_fmt.185676716 |
|
|
Sep 18 08:16:48 AM UTC 24 |
Sep 18 08:16:50 AM UTC 24 |
134877331 ps |
T1494 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_stress_rd.2059992032 |
|
|
Sep 18 08:16:28 AM UTC 24 |
Sep 18 08:16:52 AM UTC 24 |
1946111662 ps |
T1495 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_rx.1397800876 |
|
|
Sep 18 08:16:48 AM UTC 24 |
Sep 18 08:16:53 AM UTC 24 |
447714700 ps |
T1496 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_host_perf_precise.4022301416 |
|
|
Sep 18 08:16:49 AM UTC 24 |
Sep 18 08:16:54 AM UTC 24 |
298712011 ps |
T1497 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_host_error_intr.2025048216 |
|
|
Sep 18 08:16:49 AM UTC 24 |
Sep 18 08:16:57 AM UTC 24 |
573545957 ps |
T1498 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_fmt_empty.1673896817 |
|
|
Sep 18 08:16:48 AM UTC 24 |
Sep 18 08:16:57 AM UTC 24 |
1105639275 ps |
T1499 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_full.2560199612 |
|
|
Sep 18 08:15:58 AM UTC 24 |
Sep 18 08:16:58 AM UTC 24 |
2541249171 ps |
T1500 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_host_stretch_timeout.1760251326 |
|
|
Sep 18 08:16:49 AM UTC 24 |
Sep 18 08:17:00 AM UTC 24 |
626047644 ps |
T1501 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_acq.2786542258 |
|
|
Sep 18 08:17:01 AM UTC 24 |
Sep 18 08:17:04 AM UTC 24 |
158849678 ps |
T135 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/34.i2c_host_stress_all.1908074799 |
|
|
Sep 18 08:11:40 AM UTC 24 |
Sep 18 08:17:04 AM UTC 24 |
12986320771 ps |
T1502 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_tx.3421600398 |
|
|
Sep 18 08:17:02 AM UTC 24 |
Sep 18 08:17:05 AM UTC 24 |
619658238 ps |
T1503 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_target_intr_smoke.1150989458 |
|
|
Sep 18 08:16:57 AM UTC 24 |
Sep 18 08:17:07 AM UTC 24 |
9904668649 ps |
T1504 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_target_stress_all.154592257 |
|
|
Sep 18 08:16:35 AM UTC 24 |
Sep 18 08:17:07 AM UTC 24 |
25158362651 ps |
T1505 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_target_intr_stress_wr.273287835 |
|
|
Sep 18 08:16:59 AM UTC 24 |
Sep 18 08:17:08 AM UTC 24 |
9053555296 ps |
T1506 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_target_timeout.1124028084 |
|
|
Sep 18 08:16:59 AM UTC 24 |
Sep 18 08:17:10 AM UTC 24 |
1138190293 ps |
T1507 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_target_hrst.2319170036 |
|
|
Sep 18 08:17:08 AM UTC 24 |
Sep 18 08:17:11 AM UTC 24 |
229623627 ps |
T1508 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_target_stretch.3647360239 |
|
|
Sep 18 08:16:54 AM UTC 24 |
Sep 18 08:17:12 AM UTC 24 |
6698265707 ps |
T1509 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_host_mode_toggle.4244758152 |
|
|
Sep 18 08:17:08 AM UTC 24 |
Sep 18 08:17:13 AM UTC 24 |
148203729 ps |
T1510 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_target_smoke.1859092037 |
|
|
Sep 18 08:16:51 AM UTC 24 |
Sep 18 08:17:13 AM UTC 24 |
1204806141 ps |
T1511 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_target_perf.2780221062 |
|
|
Sep 18 08:17:05 AM UTC 24 |
Sep 18 08:17:14 AM UTC 24 |
2268977442 ps |
T1512 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_target_bad_addr.3004482994 |
|
|
Sep 18 08:17:06 AM UTC 24 |
Sep 18 08:17:15 AM UTC 24 |
4086657489 ps |
T1513 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_host_perf.1033399504 |
|
|
Sep 18 08:16:23 AM UTC 24 |
Sep 18 08:17:16 AM UTC 24 |
5257613448 ps |
T1514 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_tx.1256315589 |
|
|
Sep 18 08:17:12 AM UTC 24 |
Sep 18 08:17:16 AM UTC 24 |
689888963 ps |
T1515 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_acq.1188893738 |
|
|
Sep 18 08:17:11 AM UTC 24 |
Sep 18 08:17:18 AM UTC 24 |
1410333253 ps |
T1516 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_alert_test.2495900380 |
|
|
Sep 18 08:17:17 AM UTC 24 |
Sep 18 08:17:19 AM UTC 24 |
42209406 ps |
T1517 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_target_smbus_maxlen.2626802757 |
|
|
Sep 18 08:17:13 AM UTC 24 |
Sep 18 08:17:19 AM UTC 24 |
1076788346 ps |
T1518 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_overflow.1224883823 |
|
|
Sep 18 08:16:21 AM UTC 24 |
Sep 18 08:17:19 AM UTC 24 |
22377747544 ps |
T1519 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_host_may_nack.840489130 |
|
|
Sep 18 08:17:09 AM UTC 24 |
Sep 18 08:17:19 AM UTC 24 |
494173043 ps |
T1520 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_alert_test.1773416837 |
|
|
Sep 18 08:17:48 AM UTC 24 |
Sep 18 08:17:50 AM UTC 24 |
15348923 ps |
T1521 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_target_tx_stretch_ctrl.2647093117 |
|
|
Sep 18 08:17:12 AM UTC 24 |
Sep 18 08:17:20 AM UTC 24 |
199536361 ps |
T1522 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull.572487684 |
|
|
Sep 18 08:17:15 AM UTC 24 |
Sep 18 08:17:20 AM UTC 24 |
528878645 ps |
T1523 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull_addr.2406149710 |
|
|
Sep 18 08:17:15 AM UTC 24 |
Sep 18 08:17:21 AM UTC 24 |
703935692 ps |
T1524 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_host_override.4072990254 |
|
|
Sep 18 08:17:19 AM UTC 24 |
Sep 18 08:17:21 AM UTC 24 |
90991022 ps |
T1525 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_target_stress_rd.3968675153 |
|
|
Sep 18 08:16:53 AM UTC 24 |
Sep 18 08:17:21 AM UTC 24 |
473085179 ps |
T1526 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_watermark.1601118696 |
|
|
Sep 18 08:15:56 AM UTC 24 |
Sep 18 08:17:23 AM UTC 24 |
32276324770 ps |
T1527 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_fmt.3870974909 |
|
|
Sep 18 08:17:20 AM UTC 24 |
Sep 18 08:17:23 AM UTC 24 |
572332706 ps |
T1528 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_host_perf_precise.2191358051 |
|
|
Sep 18 08:17:22 AM UTC 24 |
Sep 18 08:17:25 AM UTC 24 |
41931731 ps |
T1529 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/37.i2c_target_stress_wr.1965278054 |
|
|
Sep 18 08:13:36 AM UTC 24 |
Sep 18 08:17:25 AM UTC 24 |
63728229249 ps |
T1530 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_rx.233554400 |
|
|
Sep 18 08:17:20 AM UTC 24 |
Sep 18 08:17:26 AM UTC 24 |
1818127790 ps |
T1531 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_host_error_intr.3652551933 |
|
|
Sep 18 08:17:23 AM UTC 24 |
Sep 18 08:17:29 AM UTC 24 |
2269547181 ps |
T1532 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/27.i2c_target_stress_wr.1778031734 |
|
|
Sep 18 08:07:28 AM UTC 24 |
Sep 18 08:17:34 AM UTC 24 |
47236543038 ps |
T1533 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_full.4189081287 |
|
|
Sep 18 08:15:30 AM UTC 24 |
Sep 18 08:17:35 AM UTC 24 |
4875381886 ps |
T1534 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/41.i2c_host_smoke.2123020525 |
|
|
Sep 18 08:15:55 AM UTC 24 |
Sep 18 08:17:35 AM UTC 24 |
2044745942 ps |
T1535 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_target_stretch.3583439035 |
|
|
Sep 18 08:17:26 AM UTC 24 |
Sep 18 08:17:36 AM UTC 24 |
5857428401 ps |
T1536 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_full.3852695332 |
|
|
Sep 18 08:16:23 AM UTC 24 |
Sep 18 08:17:36 AM UTC 24 |
2553352294 ps |
T1537 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/38.i2c_target_stress_all.1271179639 |
|
|
Sep 18 08:14:40 AM UTC 24 |
Sep 18 08:17:36 AM UTC 24 |
31756502022 ps |
T1538 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_target_intr_smoke.2259067885 |
|
|
Sep 18 08:17:30 AM UTC 24 |
Sep 18 08:17:37 AM UTC 24 |
628546917 ps |
T1539 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_host_smoke.409788236 |
|
|
Sep 18 08:17:17 AM UTC 24 |
Sep 18 08:17:38 AM UTC 24 |
5765304206 ps |
T1540 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_acq.1984404669 |
|
|
Sep 18 08:17:36 AM UTC 24 |
Sep 18 08:17:39 AM UTC 24 |
346871679 ps |
T1541 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_tx.1816458021 |
|
|
Sep 18 08:17:36 AM UTC 24 |
Sep 18 08:17:39 AM UTC 24 |
184616371 ps |
T1542 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_fmt_empty.3604816796 |
|
|
Sep 18 08:17:20 AM UTC 24 |
Sep 18 08:17:40 AM UTC 24 |
413068553 ps |
T1543 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_target_smoke.2830159903 |
|
|
Sep 18 08:17:25 AM UTC 24 |
Sep 18 08:17:43 AM UTC 24 |
1958738762 ps |
T1544 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_target_intr_stress_wr.3254194403 |
|
|
Sep 18 08:17:35 AM UTC 24 |
Sep 18 08:17:44 AM UTC 24 |
8695870837 ps |
T1545 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_acq.4194793795 |
|
|
Sep 18 08:17:41 AM UTC 24 |
Sep 18 08:17:46 AM UTC 24 |
1682528387 ps |
T1546 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_tx.759582967 |
|
|
Sep 18 08:17:43 AM UTC 24 |
Sep 18 08:17:46 AM UTC 24 |
144837076 ps |
T1547 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/42.i2c_host_smoke.311022921 |
|
|
Sep 18 08:16:19 AM UTC 24 |
Sep 18 08:17:46 AM UTC 24 |
3899447658 ps |
T1548 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_host_stretch_timeout.4242033527 |
|
|
Sep 18 08:17:22 AM UTC 24 |
Sep 18 08:17:48 AM UTC 24 |
2252134489 ps |
T1549 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_host_may_nack.307832831 |
|
|
Sep 18 08:17:40 AM UTC 24 |
Sep 18 08:17:48 AM UTC 24 |
420962949 ps |
T1550 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_overflow.3803651360 |
|
|
Sep 18 08:16:47 AM UTC 24 |
Sep 18 08:17:48 AM UTC 24 |
7450350836 ps |
T1551 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_target_perf.660655675 |
|
|
Sep 18 08:17:36 AM UTC 24 |
Sep 18 08:17:48 AM UTC 24 |
1822730158 ps |
T1552 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_target_timeout.2297225766 |
|
|
Sep 18 08:17:35 AM UTC 24 |
Sep 18 08:17:49 AM UTC 24 |
2474582961 ps |
T1553 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_target_bad_addr.796698468 |
|
|
Sep 18 08:17:40 AM UTC 24 |
Sep 18 08:17:49 AM UTC 24 |
932339122 ps |
T1554 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_target_smbus_maxlen.1292026193 |
|
|
Sep 18 08:17:45 AM UTC 24 |
Sep 18 08:17:50 AM UTC 24 |
1576884304 ps |
T1555 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_target_nack_txstretch.274361018 |
|
|
Sep 18 08:17:47 AM UTC 24 |
Sep 18 08:17:50 AM UTC 24 |
260056129 ps |
T1556 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull.4106529219 |
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Sep 18 08:17:47 AM UTC 24 |
Sep 18 08:17:51 AM UTC 24 |
2409325204 ps |
T1557 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/45.i2c_host_override.3697008431 |
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Sep 18 08:17:50 AM UTC 24 |
Sep 18 08:17:51 AM UTC 24 |
17229784 ps |
T1558 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_fmt.2225293935 |
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Sep 18 08:17:50 AM UTC 24 |
Sep 18 08:17:52 AM UTC 24 |
358009703 ps |
T1559 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_full.210103188 |
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Sep 18 08:16:48 AM UTC 24 |
Sep 18 08:17:53 AM UTC 24 |
9092775520 ps |
T1560 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull_addr.246068544 |
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Sep 18 08:17:47 AM UTC 24 |
Sep 18 08:17:53 AM UTC 24 |
739264481 ps |
T1561 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_target_tx_stretch_ctrl.871566061 |
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Sep 18 08:17:44 AM UTC 24 |
Sep 18 08:17:54 AM UTC 24 |
432322145 ps |
T1562 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_rx.3118323244 |
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Sep 18 08:17:51 AM UTC 24 |
Sep 18 08:17:55 AM UTC 24 |
285252314 ps |
T1563 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/45.i2c_host_error_intr.2993573640 |
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Sep 18 08:17:52 AM UTC 24 |
Sep 18 08:17:56 AM UTC 24 |
260445916 ps |
T1564 |
/workspaces/repo/scratch/os_regression_2024_09_17/i2c-sim-vcs/coverage/default/44.i2c_target_stress_rd.1987126577 |
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Sep 18 08:17:26 AM UTC 24 |
Sep 18 08:17:58 AM UTC 24 |
562125307 ps |