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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
91.26 97.26 89.54 97.22 72.02 94.30 98.47 90.00


Total test records in report: 1829
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html | tests35.html | tests36.html | tests37.html | tests38.html

T397 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_host_perf_precise.1593352271 Sep 24 08:17:55 AM UTC 24 Sep 24 08:18:01 AM UTC 24 80969514 ps
T398 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/7.i2c_target_stress_rd.1287856324 Sep 24 08:17:34 AM UTC 24 Sep 24 08:18:06 AM UTC 24 9020680762 ps
T399 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_target_smoke.2811562063 Sep 24 08:17:56 AM UTC 24 Sep 24 08:18:06 AM UTC 24 638580632 ps
T400 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_reset_acq.3198933217 Sep 24 08:18:03 AM UTC 24 Sep 24 08:18:07 AM UTC 24 185297229 ps
T401 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_reset_tx.1181147100 Sep 24 08:18:05 AM UTC 24 Sep 24 08:18:07 AM UTC 24 362308604 ps
T402 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_target_stress_wr.456316277 Sep 24 08:17:56 AM UTC 24 Sep 24 08:18:08 AM UTC 24 7751509663 ps
T403 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_target_timeout.217299241 Sep 24 08:18:00 AM UTC 24 Sep 24 08:18:11 AM UTC 24 2685318291 ps
T404 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_fmt_empty.245480095 Sep 24 08:17:52 AM UTC 24 Sep 24 08:18:14 AM UTC 24 313904044 ps
T405 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_target_intr_smoke.1229576799 Sep 24 08:17:59 AM UTC 24 Sep 24 08:18:14 AM UTC 24 1081848154 ps
T406 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_perf.507238619 Sep 24 08:19:15 AM UTC 24 Sep 24 08:19:24 AM UTC 24 3414607073 ps
T186 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/2.i2c_target_stress_all.1029124197 Sep 24 08:15:16 AM UTC 24 Sep 24 08:18:15 AM UTC 24 128917878929 ps
T407 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_target_bad_addr.173323018 Sep 24 08:18:08 AM UTC 24 Sep 24 08:18:17 AM UTC 24 1846625783 ps
T408 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_tx.3869313600 Sep 24 08:18:15 AM UTC 24 Sep 24 08:18:19 AM UTC 24 419099349 ps
T409 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_target_tx_stretch_ctrl.1877008023 Sep 24 08:18:15 AM UTC 24 Sep 24 08:18:20 AM UTC 24 73286547 ps
T410 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_target_smbus_maxlen.200927370 Sep 24 08:18:15 AM UTC 24 Sep 24 08:18:21 AM UTC 24 1729814629 ps
T411 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_acq.2537793406 Sep 24 08:18:15 AM UTC 24 Sep 24 08:18:21 AM UTC 24 509917171 ps
T300 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/4.i2c_target_stress_all.2647707851 Sep 24 08:16:20 AM UTC 24 Sep 24 08:19:15 AM UTC 24 81552388351 ps
T412 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_alert_test.3853735006 Sep 24 08:18:20 AM UTC 24 Sep 24 08:18:22 AM UTC 24 25839932 ps
T413 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull.16557280 Sep 24 08:18:15 AM UTC 24 Sep 24 08:18:22 AM UTC 24 2315836343 ps
T414 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull_addr.1378709058 Sep 24 08:18:16 AM UTC 24 Sep 24 08:18:23 AM UTC 24 564424143 ps
T141 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_host_override.1246358636 Sep 24 08:18:22 AM UTC 24 Sep 24 08:18:24 AM UTC 24 44528079 ps
T415 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_host_may_nack.3477757893 Sep 24 08:18:13 AM UTC 24 Sep 24 08:18:25 AM UTC 24 201578119 ps
T416 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_fmt.3508606292 Sep 24 08:18:23 AM UTC 24 Sep 24 08:18:26 AM UTC 24 87196892 ps
T278 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_target_intr_stress_wr.180937214 Sep 24 08:17:59 AM UTC 24 Sep 24 08:18:26 AM UTC 24 2871558371 ps
T417 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_host_perf_precise.900784718 Sep 24 08:18:26 AM UTC 24 Sep 24 08:18:29 AM UTC 24 169693800 ps
T418 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_rx.4280008902 Sep 24 08:18:24 AM UTC 24 Sep 24 08:18:31 AM UTC 24 309978025 ps
T419 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_fmt_empty.2707161611 Sep 24 08:18:23 AM UTC 24 Sep 24 08:18:35 AM UTC 24 1569006499 ps
T420 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_host_error_intr.2094855171 Sep 24 08:18:30 AM UTC 24 Sep 24 08:18:35 AM UTC 24 1380264509 ps
T421 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_host_smoke.2155088840 Sep 24 08:17:51 AM UTC 24 Sep 24 08:18:39 AM UTC 24 4158977123 ps
T422 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_tx.697601738 Sep 24 08:19:13 AM UTC 24 Sep 24 08:19:15 AM UTC 24 627794534 ps
T423 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_target_stretch.296856155 Sep 24 08:17:58 AM UTC 24 Sep 24 08:18:41 AM UTC 24 2291341382 ps
T424 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_host_stretch_timeout.2201788541 Sep 24 08:18:27 AM UTC 24 Sep 24 08:18:41 AM UTC 24 2923510618 ps
T425 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_host_stretch_timeout.649427887 Sep 24 08:17:55 AM UTC 24 Sep 24 08:18:42 AM UTC 24 4267713195 ps
T426 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_overflow.1762535136 Sep 24 08:17:25 AM UTC 24 Sep 24 08:18:42 AM UTC 24 5349623254 ps
T427 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_stretch.2552976022 Sep 24 08:18:40 AM UTC 24 Sep 24 08:18:43 AM UTC 24 436627567 ps
T428 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/5.i2c_host_fifo_watermark.2908924922 Sep 24 08:16:29 AM UTC 24 Sep 24 08:18:44 AM UTC 24 5208837635 ps
T429 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_smoke.1877241678 Sep 24 08:18:33 AM UTC 24 Sep 24 08:18:45 AM UTC 24 550747458 ps
T430 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_watermark.288563603 Sep 24 08:16:53 AM UTC 24 Sep 24 08:19:17 AM UTC 24 21686480743 ps
T431 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_tx.3766299021 Sep 24 08:18:43 AM UTC 24 Sep 24 08:18:46 AM UTC 24 510700315 ps
T432 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_acq.263657850 Sep 24 08:18:43 AM UTC 24 Sep 24 08:18:47 AM UTC 24 403782248 ps
T433 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_intr_smoke.640424077 Sep 24 08:18:40 AM UTC 24 Sep 24 08:18:47 AM UTC 24 2742743616 ps
T434 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_hrst.1913778406 Sep 24 08:18:45 AM UTC 24 Sep 24 08:18:50 AM UTC 24 1786076214 ps
T435 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_bad_addr.519749927 Sep 24 08:18:44 AM UTC 24 Sep 24 08:18:52 AM UTC 24 2259593968 ps
T436 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_intr_smoke.3793058419 Sep 24 08:19:06 AM UTC 24 Sep 24 08:19:20 AM UTC 24 1158319724 ps
T437 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_timeout.1256976671 Sep 24 08:18:42 AM UTC 24 Sep 24 08:18:54 AM UTC 24 1263476947 ps
T438 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/7.i2c_target_stress_all.388215392 Sep 24 08:17:42 AM UTC 24 Sep 24 08:18:54 AM UTC 24 24650112199 ps
T439 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_tx.127769536 Sep 24 08:18:52 AM UTC 24 Sep 24 08:18:54 AM UTC 24 99906236 ps
T440 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_acq.1606131273 Sep 24 08:18:48 AM UTC 24 Sep 24 08:18:54 AM UTC 24 555807904 ps
T262 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_host_may_nack.604720180 Sep 24 08:18:48 AM UTC 24 Sep 24 08:18:55 AM UTC 24 2463477167 ps
T441 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_tx_stretch_ctrl.2733108792 Sep 24 08:18:52 AM UTC 24 Sep 24 08:18:55 AM UTC 24 49497932 ps
T442 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_perf.94681421 Sep 24 08:18:44 AM UTC 24 Sep 24 08:18:56 AM UTC 24 2031914091 ps
T443 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_alert_test.2674567015 Sep 24 08:18:55 AM UTC 24 Sep 24 08:18:57 AM UTC 24 79031299 ps
T444 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/7.i2c_target_stress_wr.368862564 Sep 24 08:17:32 AM UTC 24 Sep 24 08:18:57 AM UTC 24 29634806418 ps
T142 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_host_override.2874922971 Sep 24 08:18:55 AM UTC 24 Sep 24 08:18:57 AM UTC 24 34054966 ps
T445 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_host_stretch_timeout.99729332 Sep 24 08:19:00 AM UTC 24 Sep 24 08:19:16 AM UTC 24 2910958540 ps
T53 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull.3093988087 Sep 24 08:18:53 AM UTC 24 Sep 24 08:18:58 AM UTC 24 2756930932 ps
T446 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_smbus_maxlen.1412469218 Sep 24 08:18:53 AM UTC 24 Sep 24 08:18:58 AM UTC 24 2953511896 ps
T164 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_nack_txstretch.549110192 Sep 24 08:18:55 AM UTC 24 Sep 24 08:18:59 AM UTC 24 127332927 ps
T447 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_fmt.1176635426 Sep 24 08:18:56 AM UTC 24 Sep 24 08:18:59 AM UTC 24 96917728 ps
T448 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_alert_test.317369182 Sep 24 08:19:21 AM UTC 24 Sep 24 08:19:23 AM UTC 24 52833447 ps
T449 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull_addr.1602739248 Sep 24 08:18:54 AM UTC 24 Sep 24 08:19:00 AM UTC 24 516743077 ps
T450 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_stress_wr.334831487 Sep 24 08:18:36 AM UTC 24 Sep 24 08:19:01 AM UTC 24 27845333325 ps
T451 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_host_smoke.2794075284 Sep 24 08:18:21 AM UTC 24 Sep 24 08:19:02 AM UTC 24 2063427140 ps
T452 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_target_stress_rd.2686171416 Sep 24 08:17:57 AM UTC 24 Sep 24 08:19:03 AM UTC 24 5221284069 ps
T18 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_host_error_intr.1010473746 Sep 24 08:19:00 AM UTC 24 Sep 24 08:19:03 AM UTC 24 97021320 ps
T453 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_overflow.1113516136 Sep 24 08:17:51 AM UTC 24 Sep 24 08:19:05 AM UTC 24 10416329926 ps
T454 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_rx.3870657827 Sep 24 08:18:59 AM UTC 24 Sep 24 08:19:06 AM UTC 24 4134306890 ps
T113 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_watermark.3923632813 Sep 24 08:17:24 AM UTC 24 Sep 24 08:19:08 AM UTC 24 16894080372 ps
T455 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_hrst.1721898119 Sep 24 08:19:16 AM UTC 24 Sep 24 08:19:20 AM UTC 24 1114412205 ps
T456 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_host_perf.3141676041 Sep 24 08:18:59 AM UTC 24 Sep 24 08:19:08 AM UTC 24 972129040 ps
T457 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_stress_rd.1171562662 Sep 24 08:19:04 AM UTC 24 Sep 24 08:19:12 AM UTC 24 250664391 ps
T458 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_fmt_empty.2010469241 Sep 24 08:18:57 AM UTC 24 Sep 24 08:19:13 AM UTC 24 1353939758 ps
T459 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/4.i2c_target_stress_wr.220662264 Sep 24 08:16:03 AM UTC 24 Sep 24 08:19:16 AM UTC 24 59518743927 ps
T460 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_stress_rd.3722795828 Sep 24 08:18:37 AM UTC 24 Sep 24 08:19:15 AM UTC 24 657870866 ps
T461 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_acq.4020186144 Sep 24 08:19:11 AM UTC 24 Sep 24 08:19:15 AM UTC 24 432651108 ps
T462 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_host_perf_precise.2925444811 Sep 24 08:19:00 AM UTC 24 Sep 24 08:19:15 AM UTC 24 614307649 ps
T463 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_tx.2790005894 Sep 24 08:19:17 AM UTC 24 Sep 24 08:19:20 AM UTC 24 403908864 ps
T464 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_fmt.483639222 Sep 24 08:20:19 AM UTC 24 Sep 24 08:20:21 AM UTC 24 182870380 ps
T465 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_timeout.3442890841 Sep 24 08:19:08 AM UTC 24 Sep 24 08:19:22 AM UTC 24 9706237038 ps
T466 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_acq.181425030 Sep 24 08:19:17 AM UTC 24 Sep 24 08:19:22 AM UTC 24 3607503415 ps
T467 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_smoke.3251363967 Sep 24 08:19:02 AM UTC 24 Sep 24 08:19:22 AM UTC 24 1301378230 ps
T468 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_smbus_maxlen.1563479042 Sep 24 08:19:18 AM UTC 24 Sep 24 08:19:23 AM UTC 24 1071991829 ps
T469 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_bad_addr.1932047656 Sep 24 08:19:16 AM UTC 24 Sep 24 08:19:24 AM UTC 24 8115103662 ps
T470 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_tx_stretch_ctrl.3750125191 Sep 24 08:19:17 AM UTC 24 Sep 24 08:19:24 AM UTC 24 285895287 ps
T259 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_host_may_nack.714812812 Sep 24 08:19:16 AM UTC 24 Sep 24 08:19:25 AM UTC 24 1828091089 ps
T165 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_nack_txstretch.1621442520 Sep 24 08:19:21 AM UTC 24 Sep 24 08:19:25 AM UTC 24 446015964 ps
T471 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_host_override.1608890699 Sep 24 08:19:23 AM UTC 24 Sep 24 08:19:25 AM UTC 24 28572413 ps
T472 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull.244439248 Sep 24 08:19:19 AM UTC 24 Sep 24 08:19:25 AM UTC 24 1016979101 ps
T473 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull_addr.2425468736 Sep 24 08:19:20 AM UTC 24 Sep 24 08:19:26 AM UTC 24 968374893 ps
T247 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_fmt.77600495 Sep 24 08:19:24 AM UTC 24 Sep 24 08:19:27 AM UTC 24 690952041 ps
T474 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_overflow.2015817768 Sep 24 08:16:53 AM UTC 24 Sep 24 08:19:27 AM UTC 24 7272031043 ps
T475 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_host_perf_precise.4162397766 Sep 24 08:19:25 AM UTC 24 Sep 24 08:19:28 AM UTC 24 117765840 ps
T476 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_host_smoke.1443192443 Sep 24 08:18:55 AM UTC 24 Sep 24 08:19:29 AM UTC 24 3471933458 ps
T477 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/6.i2c_host_perf.1626391107 Sep 24 08:16:57 AM UTC 24 Sep 24 08:20:19 AM UTC 24 7315429485 ps
T143 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_host_override.3694896892 Sep 24 08:20:18 AM UTC 24 Sep 24 08:20:20 AM UTC 24 30585730 ps
T28 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/5.i2c_host_fifo_full.1207396721 Sep 24 08:16:31 AM UTC 24 Sep 24 08:19:30 AM UTC 24 11479417464 ps
T478 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_rx.3090182736 Sep 24 08:19:25 AM UTC 24 Sep 24 08:19:34 AM UTC 24 807604852 ps
T19 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_host_error_intr.2293719203 Sep 24 08:19:26 AM UTC 24 Sep 24 08:19:37 AM UTC 24 993848061 ps
T479 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_host_perf_precise.3013539639 Sep 24 08:20:21 AM UTC 24 Sep 24 08:20:25 AM UTC 24 41915112 ps
T480 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_target_intr_smoke.632618860 Sep 24 08:19:30 AM UTC 24 Sep 24 08:19:38 AM UTC 24 2516063824 ps
T481 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_tx.3069040557 Sep 24 08:19:39 AM UTC 24 Sep 24 08:19:42 AM UTC 24 153429927 ps
T482 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_full.3122926606 Sep 24 08:16:56 AM UTC 24 Sep 24 08:19:42 AM UTC 24 3676026577 ps
T483 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_overflow.3893942852 Sep 24 08:18:23 AM UTC 24 Sep 24 08:19:42 AM UTC 24 5014277127 ps
T484 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_acq.2385461091 Sep 24 08:19:38 AM UTC 24 Sep 24 08:19:42 AM UTC 24 450033484 ps
T485 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_watermark.1997332613 Sep 24 08:18:23 AM UTC 24 Sep 24 08:19:45 AM UTC 24 3213677365 ps
T486 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull.160941250 Sep 24 08:20:16 AM UTC 24 Sep 24 08:20:24 AM UTC 24 2381619106 ps
T487 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_target_timeout.2256187925 Sep 24 08:19:32 AM UTC 24 Sep 24 08:19:45 AM UTC 24 1574003090 ps
T488 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_target_intr_stress_wr.335287571 Sep 24 08:19:31 AM UTC 24 Sep 24 08:19:45 AM UTC 24 4659683564 ps
T489 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/4.i2c_host_fifo_full.1709900012 Sep 24 08:16:01 AM UTC 24 Sep 24 08:19:48 AM UTC 24 13283937654 ps
T490 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_target_perf.1276349488 Sep 24 08:19:39 AM UTC 24 Sep 24 08:19:48 AM UTC 24 1294192425 ps
T491 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_fmt_empty.1729413162 Sep 24 08:19:24 AM UTC 24 Sep 24 08:19:48 AM UTC 24 468942278 ps
T492 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_tx.3280732799 Sep 24 08:19:47 AM UTC 24 Sep 24 08:19:49 AM UTC 24 109112812 ps
T493 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_acq.4220606061 Sep 24 08:19:45 AM UTC 24 Sep 24 08:19:50 AM UTC 24 952193299 ps
T494 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_target_tx_stretch_ctrl.3791366333 Sep 24 08:19:47 AM UTC 24 Sep 24 08:19:51 AM UTC 24 111971847 ps
T495 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_target_smbus_maxlen.2611791423 Sep 24 08:19:48 AM UTC 24 Sep 24 08:19:52 AM UTC 24 440583079 ps
T496 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_alert_test.763747355 Sep 24 08:19:50 AM UTC 24 Sep 24 08:19:52 AM UTC 24 24709731 ps
T497 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_tx_stretch_ctrl.273617904 Sep 24 08:20:14 AM UTC 24 Sep 24 08:20:20 AM UTC 24 142030388 ps
T498 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_target_bad_addr.4002142526 Sep 24 08:19:42 AM UTC 24 Sep 24 08:19:53 AM UTC 24 878619488 ps
T144 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_host_override.1886491280 Sep 24 08:19:51 AM UTC 24 Sep 24 08:19:53 AM UTC 24 35077369 ps
T499 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull.3386560905 Sep 24 08:19:49 AM UTC 24 Sep 24 08:19:54 AM UTC 24 444314631 ps
T500 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull_addr.1511754539 Sep 24 08:19:49 AM UTC 24 Sep 24 08:19:55 AM UTC 24 1855514653 ps
T501 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_host_smoke.3607753357 Sep 24 08:19:23 AM UTC 24 Sep 24 08:19:55 AM UTC 24 1544491714 ps
T502 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_full.3413756560 Sep 24 08:17:26 AM UTC 24 Sep 24 08:19:55 AM UTC 24 4665540972 ps
T503 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_fmt.610533195 Sep 24 08:19:53 AM UTC 24 Sep 24 08:19:56 AM UTC 24 100540494 ps
T504 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_full.3474635387 Sep 24 08:18:59 AM UTC 24 Sep 24 08:19:58 AM UTC 24 7490483043 ps
T505 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_full.1974950262 Sep 24 08:17:54 AM UTC 24 Sep 24 08:20:27 AM UTC 24 7805244261 ps
T506 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_target_stress_rd.4225563107 Sep 24 08:19:29 AM UTC 24 Sep 24 08:19:58 AM UTC 24 2814804305 ps
T507 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_host_perf_precise.3866737878 Sep 24 08:19:56 AM UTC 24 Sep 24 08:20:00 AM UTC 24 95425622 ps
T508 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_stress_all.3006993782 Sep 24 08:18:44 AM UTC 24 Sep 24 08:20:01 AM UTC 24 38520011115 ps
T509 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_target_smoke.758722549 Sep 24 08:19:27 AM UTC 24 Sep 24 08:20:03 AM UTC 24 1015894404 ps
T510 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_fmt_empty.3815382326 Sep 24 08:19:53 AM UTC 24 Sep 24 08:20:03 AM UTC 24 344272885 ps
T255 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_host_may_nack.2563235958 Sep 24 08:19:45 AM UTC 24 Sep 24 08:20:04 AM UTC 24 1593770792 ps
T511 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_overflow.3512004204 Sep 24 08:19:24 AM UTC 24 Sep 24 08:20:07 AM UTC 24 6315192924 ps
T512 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_host_error_intr.1651987066 Sep 24 08:20:21 AM UTC 24 Sep 24 08:20:28 AM UTC 24 2037425639 ps
T513 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_target_intr_stress_wr.4247152950 Sep 24 08:18:42 AM UTC 24 Sep 24 08:20:08 AM UTC 24 7408111293 ps
T514 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_intr_stress_wr.634465148 Sep 24 08:20:04 AM UTC 24 Sep 24 08:20:09 AM UTC 24 4528908234 ps
T515 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_stress_rd.2991523773 Sep 24 08:19:59 AM UTC 24 Sep 24 08:20:09 AM UTC 24 462173038 ps
T516 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_overflow.993150798 Sep 24 08:18:56 AM UTC 24 Sep 24 08:20:10 AM UTC 24 11385055942 ps
T166 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_acq.3781843833 Sep 24 08:20:08 AM UTC 24 Sep 24 08:20:10 AM UTC 24 383265753 ps
T517 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_rx.360252630 Sep 24 08:19:53 AM UTC 24 Sep 24 08:20:11 AM UTC 24 422202855 ps
T518 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_tx.3005146871 Sep 24 08:20:09 AM UTC 24 Sep 24 08:20:12 AM UTC 24 2813881234 ps
T519 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_target_stress_wr.4221579985 Sep 24 08:19:27 AM UTC 24 Sep 24 08:20:14 AM UTC 24 30058637219 ps
T270 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_host_mode_toggle.1409867440 Sep 24 08:20:11 AM UTC 24 Sep 24 08:20:14 AM UTC 24 318736680 ps
T277 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_intr_smoke.576113932 Sep 24 08:20:02 AM UTC 24 Sep 24 08:20:15 AM UTC 24 1361600914 ps
T520 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_host_stretch_timeout.2516541545 Sep 24 08:19:26 AM UTC 24 Sep 24 08:20:15 AM UTC 24 1601732659 ps
T521 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_host_perf.1768295032 Sep 24 08:18:25 AM UTC 24 Sep 24 08:20:16 AM UTC 24 6823775359 ps
T522 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_perf.1897304869 Sep 24 08:20:09 AM UTC 24 Sep 24 08:20:16 AM UTC 24 529572827 ps
T523 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_hrst.2040068042 Sep 24 08:20:11 AM UTC 24 Sep 24 08:20:16 AM UTC 24 1059864471 ps
T524 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_tx.873417197 Sep 24 08:20:14 AM UTC 24 Sep 24 08:20:17 AM UTC 24 103755603 ps
T525 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_acq.626830873 Sep 24 08:20:13 AM UTC 24 Sep 24 08:20:17 AM UTC 24 746383719 ps
T526 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_host_stretch_timeout.3640424977 Sep 24 08:19:56 AM UTC 24 Sep 24 08:20:17 AM UTC 24 2356296284 ps
T527 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_bad_addr.2398185032 Sep 24 08:20:10 AM UTC 24 Sep 24 08:20:17 AM UTC 24 860244474 ps
T528 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_timeout.2115430034 Sep 24 08:20:04 AM UTC 24 Sep 24 08:20:17 AM UTC 24 6518710690 ps
T258 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_host_may_nack.1246375308 Sep 24 08:20:11 AM UTC 24 Sep 24 08:20:18 AM UTC 24 2388510019 ps
T529 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_alert_test.681866411 Sep 24 08:20:17 AM UTC 24 Sep 24 08:20:19 AM UTC 24 15576952 ps
T167 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_nack_txstretch.3901876165 Sep 24 08:20:17 AM UTC 24 Sep 24 08:20:20 AM UTC 24 502223694 ps
T530 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_smbus_maxlen.3896543152 Sep 24 08:20:15 AM UTC 24 Sep 24 08:20:21 AM UTC 24 515588526 ps
T531 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull_addr.4007351072 Sep 24 08:20:16 AM UTC 24 Sep 24 08:20:21 AM UTC 24 5495766258 ps
T114 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_watermark.2805178883 Sep 24 08:18:56 AM UTC 24 Sep 24 08:20:23 AM UTC 24 6013250226 ps
T532 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/7.i2c_host_perf.7182185 Sep 24 08:17:26 AM UTC 24 Sep 24 08:20:30 AM UTC 24 13419761777 ps
T533 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_rx.3783543057 Sep 24 08:20:20 AM UTC 24 Sep 24 08:20:32 AM UTC 24 734157151 ps
T15 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_host_perf.3053145587 Sep 24 08:20:20 AM UTC 24 Sep 24 08:20:34 AM UTC 24 3198006031 ps
T534 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_stretch.1252904254 Sep 24 08:20:26 AM UTC 24 Sep 24 08:20:35 AM UTC 24 1169951711 ps
T168 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_acq.2704487576 Sep 24 08:20:34 AM UTC 24 Sep 24 08:20:38 AM UTC 24 810489367 ps
T535 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_tx.3309977764 Sep 24 08:20:36 AM UTC 24 Sep 24 08:20:41 AM UTC 24 320860978 ps
T536 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_host_stretch_timeout.3022126403 Sep 24 08:20:21 AM UTC 24 Sep 24 08:20:43 AM UTC 24 2123378142 ps
T537 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_intr_smoke.3434594955 Sep 24 08:20:28 AM UTC 24 Sep 24 08:20:43 AM UTC 24 3738573166 ps
T538 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_timeout.2429354015 Sep 24 08:20:31 AM UTC 24 Sep 24 08:20:44 AM UTC 24 4681108733 ps
T539 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_fmt_empty.2423652052 Sep 24 08:20:19 AM UTC 24 Sep 24 08:20:45 AM UTC 24 1668754319 ps
T216 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_intr_stress_wr.3225551144 Sep 24 08:20:29 AM UTC 24 Sep 24 08:20:45 AM UTC 24 6209273743 ps
T84 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_smoke.1275835306 Sep 24 08:20:22 AM UTC 24 Sep 24 08:20:45 AM UTC 24 12855570195 ps
T540 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_perf.1091614315 Sep 24 08:20:36 AM UTC 24 Sep 24 08:20:45 AM UTC 24 2241938760 ps
T541 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_bad_addr.4140618613 Sep 24 08:20:39 AM UTC 24 Sep 24 08:20:48 AM UTC 24 5381781779 ps
T542 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_hrst.4137652536 Sep 24 08:21:51 AM UTC 24 Sep 24 08:21:57 AM UTC 24 875242219 ps
T543 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_acq.4148926862 Sep 24 08:20:45 AM UTC 24 Sep 24 08:20:50 AM UTC 24 555925690 ps
T544 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_smoke.3656751550 Sep 24 08:19:59 AM UTC 24 Sep 24 08:20:51 AM UTC 24 1363614565 ps
T545 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_stretch.2618175427 Sep 24 08:20:01 AM UTC 24 Sep 24 08:20:51 AM UTC 24 2681608526 ps
T16 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_host_perf.1617636500 Sep 24 08:19:25 AM UTC 24 Sep 24 08:20:53 AM UTC 24 8499572143 ps
T546 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_alert_test.3089379473 Sep 24 08:20:52 AM UTC 24 Sep 24 08:20:57 AM UTC 24 24176338 ps
T547 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_host_may_nack.1310476515 Sep 24 08:20:44 AM UTC 24 Sep 24 08:20:57 AM UTC 24 1029175887 ps
T548 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_tx.262758815 Sep 24 08:20:46 AM UTC 24 Sep 24 08:20:57 AM UTC 24 641996025 ps
T549 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_full.3991825333 Sep 24 08:19:25 AM UTC 24 Sep 24 08:20:58 AM UTC 24 5832746963 ps
T550 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_nack_txstretch.2941306935 Sep 24 08:20:52 AM UTC 24 Sep 24 08:20:58 AM UTC 24 482224735 ps
T551 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_host_override.1799530226 Sep 24 08:20:55 AM UTC 24 Sep 24 08:20:59 AM UTC 24 30008429 ps
T552 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_host_perf.1328281711 Sep 24 08:17:54 AM UTC 24 Sep 24 08:20:59 AM UTC 24 4905981211 ps
T553 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_smbus_maxlen.876323789 Sep 24 08:20:46 AM UTC 24 Sep 24 08:20:59 AM UTC 24 405868988 ps
T554 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_tx_stretch_ctrl.808677238 Sep 24 08:20:46 AM UTC 24 Sep 24 08:20:59 AM UTC 24 123079447 ps
T555 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull.2928181706 Sep 24 08:20:46 AM UTC 24 Sep 24 08:20:59 AM UTC 24 1899075210 ps
T556 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/5.i2c_target_stress_wr.3359898134 Sep 24 08:16:34 AM UTC 24 Sep 24 08:21:01 AM UTC 24 34251880905 ps
T557 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull_addr.2599220973 Sep 24 08:20:51 AM UTC 24 Sep 24 08:21:01 AM UTC 24 2064308858 ps
T558 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_fmt.999594089 Sep 24 08:20:58 AM UTC 24 Sep 24 08:21:02 AM UTC 24 350989262 ps
T559 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_host_smoke.441742073 Sep 24 08:19:51 AM UTC 24 Sep 24 08:21:02 AM UTC 24 5684058484 ps
T560 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_rx.1307264972 Sep 24 08:21:00 AM UTC 24 Sep 24 08:21:05 AM UTC 24 583151633 ps
T561 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_host_error_intr.2238155622 Sep 24 08:21:01 AM UTC 24 Sep 24 08:21:05 AM UTC 24 239102600 ps
T562 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_host_perf.2175788241 Sep 24 08:19:55 AM UTC 24 Sep 24 08:21:06 AM UTC 24 19886220744 ps
T563 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_fmt_empty.1433878180 Sep 24 08:20:58 AM UTC 24 Sep 24 08:21:08 AM UTC 24 613200991 ps
T564 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_host_perf_precise.2213151517 Sep 24 08:21:00 AM UTC 24 Sep 24 08:21:08 AM UTC 24 816711545 ps
T565 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_tx.3216849456 Sep 24 08:21:10 AM UTC 24 Sep 24 08:21:12 AM UTC 24 144407846 ps
T566 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_acq.2398378258 Sep 24 08:21:10 AM UTC 24 Sep 24 08:21:13 AM UTC 24 562031488 ps
T567 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_stress_all.1403341412 Sep 24 08:20:10 AM UTC 24 Sep 24 08:21:13 AM UTC 24 21008778250 ps
T280 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_host_stretch_timeout.2598407092 Sep 24 08:21:01 AM UTC 24 Sep 24 08:21:14 AM UTC 24 2217197430 ps
T568 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_intr_smoke.3140635434 Sep 24 08:21:05 AM UTC 24 Sep 24 08:21:15 AM UTC 24 736288716 ps
T569 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_overflow.1362817381 Sep 24 08:19:52 AM UTC 24 Sep 24 08:21:17 AM UTC 24 1378040823 ps
T570 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_timeout.193169876 Sep 24 08:21:06 AM UTC 24 Sep 24 08:21:18 AM UTC 24 1107179865 ps
T571 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_bad_addr.1560871432 Sep 24 08:21:51 AM UTC 24 Sep 24 08:21:58 AM UTC 24 783063299 ps
T572 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_perf.2822476620 Sep 24 08:21:11 AM UTC 24 Sep 24 08:21:20 AM UTC 24 4517155211 ps
T573 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_bad_addr.2052395534 Sep 24 08:21:13 AM UTC 24 Sep 24 08:21:21 AM UTC 24 719249219 ps
T574 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_stress_wr.4211915413 Sep 24 08:20:24 AM UTC 24 Sep 24 08:21:21 AM UTC 24 16866349381 ps
T575 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_perf.2992064138 Sep 24 08:21:48 AM UTC 24 Sep 24 08:21:56 AM UTC 24 5943327538 ps
T576 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_tx.615783970 Sep 24 08:21:20 AM UTC 24 Sep 24 08:21:23 AM UTC 24 147638385 ps
T577 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_host_may_nack.582642784 Sep 24 08:21:15 AM UTC 24 Sep 24 08:21:24 AM UTC 24 815071698 ps
T578 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_acq.4071248389 Sep 24 08:21:19 AM UTC 24 Sep 24 08:21:26 AM UTC 24 5522283347 ps
T579 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_alert_test.1672521555 Sep 24 08:21:24 AM UTC 24 Sep 24 08:21:26 AM UTC 24 18347706 ps
T580 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_smbus_maxlen.1693524245 Sep 24 08:21:22 AM UTC 24 Sep 24 08:21:27 AM UTC 24 975968493 ps
T581 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_nack_txstretch.2248256830 Sep 24 08:21:24 AM UTC 24 Sep 24 08:21:27 AM UTC 24 409753416 ps
T582 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull.2252728100 Sep 24 08:21:22 AM UTC 24 Sep 24 08:21:27 AM UTC 24 1614319876 ps
T583 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_host_override.2051879624 Sep 24 08:21:26 AM UTC 24 Sep 24 08:21:28 AM UTC 24 33978214 ps
T584 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull_addr.1982927754 Sep 24 08:21:22 AM UTC 24 Sep 24 08:21:28 AM UTC 24 1003959275 ps
T585 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_tx_stretch_ctrl.2371760736 Sep 24 08:21:22 AM UTC 24 Sep 24 08:21:28 AM UTC 24 358098421 ps
T586 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_intr_stress_wr.1313186208 Sep 24 08:19:07 AM UTC 24 Sep 24 08:21:30 AM UTC 24 23066906568 ps
T587 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_host_smoke.3517946700 Sep 24 08:21:26 AM UTC 24 Sep 24 08:22:00 AM UTC 24 1417129636 ps
T588 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_fmt.128423845 Sep 24 08:21:28 AM UTC 24 Sep 24 08:21:31 AM UTC 24 97936170 ps
T217 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_intr_stress_wr.629591848 Sep 24 08:21:06 AM UTC 24 Sep 24 08:21:32 AM UTC 24 16669214889 ps
T589 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_smoke.2079170679 Sep 24 08:21:02 AM UTC 24 Sep 24 08:21:35 AM UTC 24 4458632367 ps
T590 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_full.390370533 Sep 24 08:18:25 AM UTC 24 Sep 24 08:21:58 AM UTC 24 14412780834 ps
T591 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_host_perf_precise.1170432177 Sep 24 08:21:33 AM UTC 24 Sep 24 08:21:37 AM UTC 24 80746524 ps
T592 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_fmt_empty.2233899815 Sep 24 08:21:28 AM UTC 24 Sep 24 08:21:38 AM UTC 24 365059425 ps
T593 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_full.2019071309 Sep 24 08:20:20 AM UTC 24 Sep 24 08:21:42 AM UTC 24 3228684022 ps
T594 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_host_smoke.3678135575 Sep 24 08:20:18 AM UTC 24 Sep 24 08:21:44 AM UTC 24 1816178989 ps
T595 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_rx.3130081278 Sep 24 08:21:30 AM UTC 24 Sep 24 08:21:45 AM UTC 24 320497013 ps
T596 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_stress_rd.773036758 Sep 24 08:20:25 AM UTC 24 Sep 24 08:21:45 AM UTC 24 4383883609 ps
T597 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_stress_rd.3185422602 Sep 24 08:21:03 AM UTC 24 Sep 24 08:21:46 AM UTC 24 3574663345 ps
T598 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_full.112433887 Sep 24 08:19:55 AM UTC 24 Sep 24 08:21:47 AM UTC 24 6743428842 ps
T599 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_acq.3298442653 Sep 24 08:21:46 AM UTC 24 Sep 24 08:21:49 AM UTC 24 507291699 ps
T600 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_tx.2516571811 Sep 24 08:21:46 AM UTC 24 Sep 24 08:21:50 AM UTC 24 188176715 ps
T298 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_target_stress_all.1026607998 Sep 24 08:18:07 AM UTC 24 Sep 24 08:21:51 AM UTC 24 58818358830 ps
T601 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/6.i2c_target_intr_stress_wr.1425184692 Sep 24 08:17:02 AM UTC 24 Sep 24 08:21:55 AM UTC 24 41531031384 ps
T602 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_intr_stress_wr.2911494412 Sep 24 08:21:45 AM UTC 24 Sep 24 08:21:57 AM UTC 24 15906925967 ps
T603 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_intr_smoke.3757768781 Sep 24 08:21:44 AM UTC 24 Sep 24 08:21:58 AM UTC 24 8719582855 ps
T604 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_timeout.3340765996 Sep 24 08:21:45 AM UTC 24 Sep 24 08:21:58 AM UTC 24 1561226831 ps
T605 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_smoke.1117003076 Sep 24 08:21:37 AM UTC 24 Sep 24 08:21:58 AM UTC 24 3740170584 ps
T606 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_watermarks_tx.2309383102 Sep 24 08:21:56 AM UTC 24 Sep 24 08:21:59 AM UTC 24 525646536 ps
T607 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_watermarks_acq.3298061183 Sep 24 08:21:55 AM UTC 24 Sep 24 08:22:00 AM UTC 24 2386564456 ps
T608 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_alert_test.970951283 Sep 24 08:21:58 AM UTC 24 Sep 24 08:22:00 AM UTC 24 17941156 ps
T609 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_host_may_nack.2129461474 Sep 24 08:21:53 AM UTC 24 Sep 24 08:22:01 AM UTC 24 2361249659 ps
T610 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_smbus_maxlen.1045406261 Sep 24 08:21:57 AM UTC 24 Sep 24 08:22:01 AM UTC 24 442203076 ps
T611 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_host_override.656579611 Sep 24 08:22:00 AM UTC 24 Sep 24 08:22:02 AM UTC 24 25572950 ps
T612 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_nack_txstretch.2282631757 Sep 24 08:21:58 AM UTC 24 Sep 24 08:22:02 AM UTC 24 1699116110 ps
T613 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_nack_acqfull_addr.2399080174 Sep 24 08:21:58 AM UTC 24 Sep 24 08:22:02 AM UTC 24 2990083676 ps
T614 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_nack_acqfull.233011614 Sep 24 08:21:57 AM UTC 24 Sep 24 08:22:03 AM UTC 24 4145630213 ps
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