T1322 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_host_may_nack.2120154909 |
|
|
Sep 24 08:33:37 AM UTC 24 |
Sep 24 08:33:43 AM UTC 24 |
236880307 ps |
T1323 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_tx.1872802337 |
|
|
Sep 24 08:33:39 AM UTC 24 |
Sep 24 08:33:43 AM UTC 24 |
358102113 ps |
T1324 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_full.1697366856 |
|
|
Sep 24 08:32:11 AM UTC 24 |
Sep 24 08:33:45 AM UTC 24 |
5596425561 ps |
T1325 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_acq.3702871762 |
|
|
Sep 24 08:33:38 AM UTC 24 |
Sep 24 08:33:45 AM UTC 24 |
544763095 ps |
T1326 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_fmt_empty.1919343662 |
|
|
Sep 24 08:33:16 AM UTC 24 |
Sep 24 08:33:46 AM UTC 24 |
1010700388 ps |
T1327 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_alert_test.3492921556 |
|
|
Sep 24 08:33:44 AM UTC 24 |
Sep 24 08:33:46 AM UTC 24 |
56766226 ps |
T1328 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_host_smoke.3575390570 |
|
|
Sep 24 08:33:13 AM UTC 24 |
Sep 24 08:33:46 AM UTC 24 |
6035327799 ps |
T1329 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull.3507055433 |
|
|
Sep 24 08:33:43 AM UTC 24 |
Sep 24 08:33:48 AM UTC 24 |
4065910911 ps |
T1330 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull_addr.2248125729 |
|
|
Sep 24 08:33:44 AM UTC 24 |
Sep 24 08:33:49 AM UTC 24 |
427770310 ps |
T1331 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_stretch.3830088981 |
|
|
Sep 24 08:33:25 AM UTC 24 |
Sep 24 08:33:50 AM UTC 24 |
5498787474 ps |
T1332 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_fmt.646567523 |
|
|
Sep 24 08:33:47 AM UTC 24 |
Sep 24 08:33:50 AM UTC 24 |
335093756 ps |
T1333 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_tx_stretch_ctrl.1779212546 |
|
|
Sep 24 08:33:40 AM UTC 24 |
Sep 24 08:33:52 AM UTC 24 |
817887989 ps |
T1334 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_target_stress_wr.1675463331 |
|
|
Sep 24 08:32:22 AM UTC 24 |
Sep 24 08:33:52 AM UTC 24 |
57648014219 ps |
T1335 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_smoke.1809110330 |
|
|
Sep 24 08:33:23 AM UTC 24 |
Sep 24 08:33:53 AM UTC 24 |
1605115652 ps |
T1336 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_host_error_intr.2212596686 |
|
|
Sep 24 08:33:51 AM UTC 24 |
Sep 24 08:33:54 AM UTC 24 |
636167315 ps |
T1337 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_host_perf_precise.2507075262 |
|
|
Sep 24 08:33:50 AM UTC 24 |
Sep 24 08:33:56 AM UTC 24 |
94653432 ps |
T1338 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_stress_rd.3616926326 |
|
|
Sep 24 08:32:54 AM UTC 24 |
Sep 24 08:33:56 AM UTC 24 |
2544230680 ps |
T1339 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_rx.361211873 |
|
|
Sep 24 08:33:48 AM UTC 24 |
Sep 24 08:33:56 AM UTC 24 |
618237344 ps |
T1340 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_target_stretch.2731848191 |
|
|
Sep 24 08:33:57 AM UTC 24 |
Sep 24 08:34:00 AM UTC 24 |
393439987 ps |
T1341 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_target_intr_smoke.3921733979 |
|
|
Sep 24 08:33:57 AM UTC 24 |
Sep 24 08:34:03 AM UTC 24 |
806758596 ps |
T1342 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_full.3915871699 |
|
|
Sep 24 08:30:42 AM UTC 24 |
Sep 24 08:34:05 AM UTC 24 |
3196851331 ps |
T1343 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_host_stretch_timeout.2997231288 |
|
|
Sep 24 08:33:51 AM UTC 24 |
Sep 24 08:34:06 AM UTC 24 |
630476031 ps |
T1344 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_acq.2786119520 |
|
|
Sep 24 08:34:04 AM UTC 24 |
Sep 24 08:34:07 AM UTC 24 |
199949249 ps |
T1345 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_target_smoke.1630220432 |
|
|
Sep 24 08:33:53 AM UTC 24 |
Sep 24 08:34:08 AM UTC 24 |
1782750734 ps |
T1346 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_tx.3363811063 |
|
|
Sep 24 08:34:07 AM UTC 24 |
Sep 24 08:34:09 AM UTC 24 |
643949701 ps |
T1347 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_target_timeout.407903875 |
|
|
Sep 24 08:34:00 AM UTC 24 |
Sep 24 08:34:09 AM UTC 24 |
19256678163 ps |
T1348 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_host_smoke.1738620040 |
|
|
Sep 24 08:32:45 AM UTC 24 |
Sep 24 08:34:09 AM UTC 24 |
8267690544 ps |
T1349 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_target_perf.3015695154 |
|
|
Sep 24 08:34:07 AM UTC 24 |
Sep 24 08:34:13 AM UTC 24 |
2369741936 ps |
T1350 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_target_hrst.766650234 |
|
|
Sep 24 08:34:09 AM UTC 24 |
Sep 24 08:34:14 AM UTC 24 |
354745586 ps |
T1351 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_target_stress_rd.1173013734 |
|
|
Sep 24 08:33:55 AM UTC 24 |
Sep 24 08:34:14 AM UTC 24 |
5891384247 ps |
T1352 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_acq.1630333275 |
|
|
Sep 24 08:34:10 AM UTC 24 |
Sep 24 08:34:16 AM UTC 24 |
1946905187 ps |
T1353 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_tx.2234137248 |
|
|
Sep 24 08:34:13 AM UTC 24 |
Sep 24 08:34:16 AM UTC 24 |
156150235 ps |
T1354 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_target_bad_addr.3342394821 |
|
|
Sep 24 08:34:08 AM UTC 24 |
Sep 24 08:34:17 AM UTC 24 |
2247624542 ps |
T1355 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_host_perf_precise.3576707789 |
|
|
Sep 24 08:31:41 AM UTC 24 |
Sep 24 08:34:17 AM UTC 24 |
23147845691 ps |
T1356 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull.2460786686 |
|
|
Sep 24 08:34:15 AM UTC 24 |
Sep 24 08:34:19 AM UTC 24 |
3105000887 ps |
T1357 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_alert_test.2463134184 |
|
|
Sep 24 08:34:18 AM UTC 24 |
Sep 24 08:34:20 AM UTC 24 |
17956031 ps |
T1358 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_stress_rd.3917787342 |
|
|
Sep 24 08:34:29 AM UTC 24 |
Sep 24 08:35:02 AM UTC 24 |
1731543314 ps |
T1359 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_host_smoke.4161398557 |
|
|
Sep 24 08:33:46 AM UTC 24 |
Sep 24 08:34:20 AM UTC 24 |
2070838503 ps |
T1360 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_target_smbus_maxlen.2557694960 |
|
|
Sep 24 08:34:15 AM UTC 24 |
Sep 24 08:34:20 AM UTC 24 |
365695281 ps |
T1361 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_fmt_empty.4100458902 |
|
|
Sep 24 08:34:52 AM UTC 24 |
Sep 24 08:35:01 AM UTC 24 |
1275892867 ps |
T1362 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull_addr.266555502 |
|
|
Sep 24 08:34:16 AM UTC 24 |
Sep 24 08:34:21 AM UTC 24 |
1938770564 ps |
T1363 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_host_override.3751897111 |
|
|
Sep 24 08:34:20 AM UTC 24 |
Sep 24 08:34:22 AM UTC 24 |
30593294 ps |
T1364 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_target_tx_stretch_ctrl.2950196397 |
|
|
Sep 24 08:34:14 AM UTC 24 |
Sep 24 08:34:22 AM UTC 24 |
285907018 ps |
T1365 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_fmt.3219806829 |
|
|
Sep 24 08:34:21 AM UTC 24 |
Sep 24 08:34:23 AM UTC 24 |
89720117 ps |
T1366 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_watermark.1939021787 |
|
|
Sep 24 08:29:30 AM UTC 24 |
Sep 24 08:34:26 AM UTC 24 |
9828741424 ps |
T1367 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_watermark.2049828376 |
|
|
Sep 24 08:32:47 AM UTC 24 |
Sep 24 08:34:26 AM UTC 24 |
15815302075 ps |
T1368 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_stress_all.3343348168 |
|
|
Sep 24 08:33:04 AM UTC 24 |
Sep 24 08:34:27 AM UTC 24 |
42541779666 ps |
T1369 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_host_may_nack.1828178285 |
|
|
Sep 24 08:34:10 AM UTC 24 |
Sep 24 08:34:27 AM UTC 24 |
389703489 ps |
T1370 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_overflow.2882253184 |
|
|
Sep 24 08:33:14 AM UTC 24 |
Sep 24 08:34:27 AM UTC 24 |
5035206140 ps |
T1371 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_host_perf.2114971433 |
|
|
Sep 24 08:33:49 AM UTC 24 |
Sep 24 08:34:28 AM UTC 24 |
7357643388 ps |
T1372 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_rx.3537897798 |
|
|
Sep 24 08:34:22 AM UTC 24 |
Sep 24 08:34:28 AM UTC 24 |
263124541 ps |
T1373 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_host_error_intr.2616288465 |
|
|
Sep 24 08:34:26 AM UTC 24 |
Sep 24 08:34:30 AM UTC 24 |
713908656 ps |
T1374 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_host_perf_precise.1193530859 |
|
|
Sep 24 08:34:23 AM UTC 24 |
Sep 24 08:34:32 AM UTC 24 |
521849021 ps |
T1375 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_fmt_empty.1549002462 |
|
|
Sep 24 08:33:47 AM UTC 24 |
Sep 24 08:34:32 AM UTC 24 |
707484555 ps |
T1376 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_fmt_empty.3987889407 |
|
|
Sep 24 08:34:21 AM UTC 24 |
Sep 24 08:34:34 AM UTC 24 |
571354967 ps |
T1377 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_host_perf.1445363537 |
|
|
Sep 24 08:34:23 AM UTC 24 |
Sep 24 08:34:39 AM UTC 24 |
7177251824 ps |
T1378 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_intr_smoke.3839847095 |
|
|
Sep 24 08:34:30 AM UTC 24 |
Sep 24 08:34:39 AM UTC 24 |
3381719654 ps |
T1379 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_acq.2037200159 |
|
|
Sep 24 08:34:35 AM UTC 24 |
Sep 24 08:34:39 AM UTC 24 |
423949179 ps |
T1380 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_stretch.3823685331 |
|
|
Sep 24 08:34:29 AM UTC 24 |
Sep 24 08:34:40 AM UTC 24 |
1627475235 ps |
T1381 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_tx.3126416190 |
|
|
Sep 24 08:34:37 AM UTC 24 |
Sep 24 08:34:42 AM UTC 24 |
277798647 ps |
T1382 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_timeout.4244746508 |
|
|
Sep 24 08:34:32 AM UTC 24 |
Sep 24 08:34:43 AM UTC 24 |
4462388842 ps |
T1383 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_host_smoke.1811739085 |
|
|
Sep 24 08:34:19 AM UTC 24 |
Sep 24 08:34:44 AM UTC 24 |
1119280862 ps |
T1384 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_smoke.1382621247 |
|
|
Sep 24 08:34:28 AM UTC 24 |
Sep 24 08:34:45 AM UTC 24 |
1117324464 ps |
T1385 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_full.3972485407 |
|
|
Sep 24 08:33:49 AM UTC 24 |
Sep 24 08:34:45 AM UTC 24 |
1717199109 ps |
T1386 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_hrst.3829750704 |
|
|
Sep 24 08:34:41 AM UTC 24 |
Sep 24 08:34:45 AM UTC 24 |
959301258 ps |
T1387 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_target_intr_stress_wr.369155016 |
|
|
Sep 24 08:33:57 AM UTC 24 |
Sep 24 08:34:45 AM UTC 24 |
8630485610 ps |
T1388 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_perf.970860129 |
|
|
Sep 24 08:34:39 AM UTC 24 |
Sep 24 08:34:45 AM UTC 24 |
1092222709 ps |
T1389 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_host_perf.3034154041 |
|
|
Sep 24 08:21:30 AM UTC 24 |
Sep 24 08:35:03 AM UTC 24 |
27322860130 ps |
T1390 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_intr_stress_wr.1829766798 |
|
|
Sep 24 08:34:31 AM UTC 24 |
Sep 24 08:34:46 AM UTC 24 |
5408732982 ps |
T1391 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_bad_addr.2275062049 |
|
|
Sep 24 08:34:41 AM UTC 24 |
Sep 24 08:34:49 AM UTC 24 |
1454085916 ps |
T1392 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_acq.3651343344 |
|
|
Sep 24 08:34:45 AM UTC 24 |
Sep 24 08:34:49 AM UTC 24 |
249058172 ps |
T1393 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_alert_test.3312283101 |
|
|
Sep 24 08:34:47 AM UTC 24 |
Sep 24 08:34:49 AM UTC 24 |
37029002 ps |
T1394 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_tx.362394936 |
|
|
Sep 24 08:34:46 AM UTC 24 |
Sep 24 08:34:49 AM UTC 24 |
525776106 ps |
T1395 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_nack_txstretch.825069139 |
|
|
Sep 24 08:34:47 AM UTC 24 |
Sep 24 08:34:51 AM UTC 24 |
1891448607 ps |
T1396 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_tx_stretch_ctrl.30746926 |
|
|
Sep 24 08:34:46 AM UTC 24 |
Sep 24 08:34:51 AM UTC 24 |
95482045 ps |
T1397 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull_addr.1629985297 |
|
|
Sep 24 08:34:46 AM UTC 24 |
Sep 24 08:34:51 AM UTC 24 |
3267972686 ps |
T1398 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_smbus_maxlen.717839924 |
|
|
Sep 24 08:34:46 AM UTC 24 |
Sep 24 08:34:51 AM UTC 24 |
422828485 ps |
T266 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_host_override.3466703396 |
|
|
Sep 24 08:34:50 AM UTC 24 |
Sep 24 08:34:52 AM UTC 24 |
28377024 ps |
T1399 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull.113626484 |
|
|
Sep 24 08:34:46 AM UTC 24 |
Sep 24 08:34:52 AM UTC 24 |
699766781 ps |
T1400 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_host_may_nack.3083744308 |
|
|
Sep 24 08:34:44 AM UTC 24 |
Sep 24 08:34:53 AM UTC 24 |
1275794026 ps |
T1401 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_watermark.3007462236 |
|
|
Sep 24 08:31:08 AM UTC 24 |
Sep 24 08:34:54 AM UTC 24 |
17582350819 ps |
T1402 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_fmt.1838307514 |
|
|
Sep 24 08:34:52 AM UTC 24 |
Sep 24 08:34:55 AM UTC 24 |
85333459 ps |
T1403 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_target_stress_wr.3015201128 |
|
|
Sep 24 08:34:28 AM UTC 24 |
Sep 24 08:34:55 AM UTC 24 |
23007614218 ps |
T1404 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_host_stretch_timeout.2052076949 |
|
|
Sep 24 08:34:24 AM UTC 24 |
Sep 24 08:35:02 AM UTC 24 |
3243803851 ps |
T1405 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_host_perf_precise.1957606064 |
|
|
Sep 24 08:34:53 AM UTC 24 |
Sep 24 08:34:56 AM UTC 24 |
125805463 ps |
T1406 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_stress_all.3174651089 |
|
|
Sep 24 08:33:33 AM UTC 24 |
Sep 24 08:34:58 AM UTC 24 |
42275428602 ps |
T1407 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_rx.2937049927 |
|
|
Sep 24 08:34:52 AM UTC 24 |
Sep 24 08:34:59 AM UTC 24 |
860953150 ps |
T1408 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_acq.1310070747 |
|
|
Sep 24 08:35:04 AM UTC 24 |
Sep 24 08:35:06 AM UTC 24 |
118473860 ps |
T1409 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_watermark.3905903991 |
|
|
Sep 24 08:32:08 AM UTC 24 |
Sep 24 08:35:09 AM UTC 24 |
2846057675 ps |
T241 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_tx.3839407005 |
|
|
Sep 24 08:35:06 AM UTC 24 |
Sep 24 08:35:09 AM UTC 24 |
167259973 ps |
T1410 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_timeout.2683205412 |
|
|
Sep 24 08:35:03 AM UTC 24 |
Sep 24 08:35:14 AM UTC 24 |
1320564755 ps |
T1411 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_watermark.3545371807 |
|
|
Sep 24 08:33:14 AM UTC 24 |
Sep 24 08:35:14 AM UTC 24 |
8135738735 ps |
T1412 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_perf.1518898401 |
|
|
Sep 24 08:35:07 AM UTC 24 |
Sep 24 08:35:15 AM UTC 24 |
2539147007 ps |
T1413 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_stress_rd.2517420531 |
|
|
Sep 24 08:34:58 AM UTC 24 |
Sep 24 08:35:18 AM UTC 24 |
4347175009 ps |
T1414 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_intr_stress_wr.1141299913 |
|
|
Sep 24 08:35:02 AM UTC 24 |
Sep 24 08:35:18 AM UTC 24 |
1714662788 ps |
T1415 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_acq.2204281333 |
|
|
Sep 24 08:35:16 AM UTC 24 |
Sep 24 08:35:19 AM UTC 24 |
608882707 ps |
T1416 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_smoke.816197644 |
|
|
Sep 24 08:34:56 AM UTC 24 |
Sep 24 08:35:19 AM UTC 24 |
1348489513 ps |
T1417 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_bad_addr.2071433417 |
|
|
Sep 24 08:35:09 AM UTC 24 |
Sep 24 08:35:20 AM UTC 24 |
2470517135 ps |
T1418 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_overflow.4107437808 |
|
|
Sep 24 08:33:47 AM UTC 24 |
Sep 24 08:35:21 AM UTC 24 |
5608953573 ps |
T1419 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_tx_stretch_ctrl.1229073027 |
|
|
Sep 24 08:35:19 AM UTC 24 |
Sep 24 08:35:22 AM UTC 24 |
44856172 ps |
T1420 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_tx.499744057 |
|
|
Sep 24 08:35:19 AM UTC 24 |
Sep 24 08:35:22 AM UTC 24 |
129730365 ps |
T1421 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_host_stretch_timeout.2872065876 |
|
|
Sep 24 08:34:54 AM UTC 24 |
Sep 24 08:35:22 AM UTC 24 |
1260045655 ps |
T1422 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_overflow.2993558520 |
|
|
Sep 24 08:34:21 AM UTC 24 |
Sep 24 08:35:22 AM UTC 24 |
2378250965 ps |
T1423 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_smbus_maxlen.1426252884 |
|
|
Sep 24 08:35:20 AM UTC 24 |
Sep 24 08:35:24 AM UTC 24 |
1869497107 ps |
T1424 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_alert_test.306494464 |
|
|
Sep 24 08:35:22 AM UTC 24 |
Sep 24 08:35:24 AM UTC 24 |
25136612 ps |
T1425 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull.763112411 |
|
|
Sep 24 08:35:20 AM UTC 24 |
Sep 24 08:35:24 AM UTC 24 |
588931504 ps |
T1426 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_nack_txstretch.1928565782 |
|
|
Sep 24 08:35:22 AM UTC 24 |
Sep 24 08:35:25 AM UTC 24 |
147809385 ps |
T1427 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_host_override.1812661375 |
|
|
Sep 24 08:35:23 AM UTC 24 |
Sep 24 08:35:25 AM UTC 24 |
34832642 ps |
T1428 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_host_may_nack.2273852570 |
|
|
Sep 24 08:35:15 AM UTC 24 |
Sep 24 08:35:25 AM UTC 24 |
567269158 ps |
T1429 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_stress_wr.1457475202 |
|
|
Sep 24 08:29:37 AM UTC 24 |
Sep 24 08:35:25 AM UTC 24 |
40714862716 ps |
T1430 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull_addr.2475538126 |
|
|
Sep 24 08:35:21 AM UTC 24 |
Sep 24 08:35:25 AM UTC 24 |
1609418010 ps |
T1431 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_host_smoke.1834302465 |
|
|
Sep 24 08:34:49 AM UTC 24 |
Sep 24 08:35:26 AM UTC 24 |
1393898822 ps |
T1432 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_fmt.3948599263 |
|
|
Sep 24 08:35:25 AM UTC 24 |
Sep 24 08:35:27 AM UTC 24 |
372850561 ps |
T1433 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_host_stress_all.884406057 |
|
|
Sep 24 08:27:25 AM UTC 24 |
Sep 24 08:35:29 AM UTC 24 |
94994768868 ps |
T129 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_host_stress_all.1835482549 |
|
|
Sep 24 08:32:20 AM UTC 24 |
Sep 24 08:35:30 AM UTC 24 |
8626967093 ps |
T29 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_host_error_intr.484339055 |
|
|
Sep 24 08:35:27 AM UTC 24 |
Sep 24 08:35:31 AM UTC 24 |
839227629 ps |
T1434 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_host_perf_precise.1127110680 |
|
|
Sep 24 08:35:27 AM UTC 24 |
Sep 24 08:35:34 AM UTC 24 |
258996214 ps |
T1435 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_rx.286856696 |
|
|
Sep 24 08:35:26 AM UTC 24 |
Sep 24 08:35:36 AM UTC 24 |
122611286 ps |
T1436 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_target_stretch.3341415724 |
|
|
Sep 24 08:35:31 AM UTC 24 |
Sep 24 08:35:37 AM UTC 24 |
1474160126 ps |
T1437 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_full.1593093904 |
|
|
Sep 24 08:34:22 AM UTC 24 |
Sep 24 08:35:40 AM UTC 24 |
2656945082 ps |
T1438 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_fmt_empty.1132600634 |
|
|
Sep 24 08:35:25 AM UTC 24 |
Sep 24 08:35:42 AM UTC 24 |
728662488 ps |
T1439 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_target_intr_smoke.3328019358 |
|
|
Sep 24 08:35:31 AM UTC 24 |
Sep 24 08:35:42 AM UTC 24 |
13188330402 ps |
T1440 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_host_stretch_timeout.2126270915 |
|
|
Sep 24 08:35:27 AM UTC 24 |
Sep 24 08:35:43 AM UTC 24 |
2252708792 ps |
T1441 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_acq.3152207212 |
|
|
Sep 24 08:35:41 AM UTC 24 |
Sep 24 08:35:44 AM UTC 24 |
630777313 ps |
T1442 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_target_stress_rd.1661914955 |
|
|
Sep 24 08:35:30 AM UTC 24 |
Sep 24 08:35:45 AM UTC 24 |
663063731 ps |
T1443 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_tx.3734249890 |
|
|
Sep 24 08:35:43 AM UTC 24 |
Sep 24 08:35:46 AM UTC 24 |
241756563 ps |
T1444 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_target_smoke.3747597236 |
|
|
Sep 24 08:35:28 AM UTC 24 |
Sep 24 08:35:48 AM UTC 24 |
2398928072 ps |
T1445 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_target_timeout.2902611267 |
|
|
Sep 24 08:35:37 AM UTC 24 |
Sep 24 08:35:48 AM UTC 24 |
1103382719 ps |
T1446 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_stretch.2658487911 |
|
|
Sep 24 08:34:59 AM UTC 24 |
Sep 24 08:35:48 AM UTC 24 |
4046132128 ps |
T1447 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_target_hrst.2857458446 |
|
|
Sep 24 08:35:44 AM UTC 24 |
Sep 24 08:35:50 AM UTC 24 |
1934180071 ps |
T1448 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_target_perf.4066017508 |
|
|
Sep 24 08:35:43 AM UTC 24 |
Sep 24 08:35:52 AM UTC 24 |
741162173 ps |
T1449 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_tx.1424616711 |
|
|
Sep 24 08:35:50 AM UTC 24 |
Sep 24 08:35:53 AM UTC 24 |
174049360 ps |
T1450 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_host_perf.1839192499 |
|
|
Sep 24 08:33:18 AM UTC 24 |
Sep 24 08:35:53 AM UTC 24 |
12622990431 ps |
T1451 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_target_bad_addr.3450312962 |
|
|
Sep 24 08:35:44 AM UTC 24 |
Sep 24 08:35:54 AM UTC 24 |
3906316479 ps |
T1452 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_target_tx_stretch_ctrl.2591038980 |
|
|
Sep 24 08:35:50 AM UTC 24 |
Sep 24 08:35:54 AM UTC 24 |
137614136 ps |
T1453 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_host_may_nack.3583388676 |
|
|
Sep 24 08:35:48 AM UTC 24 |
Sep 24 08:35:54 AM UTC 24 |
524726584 ps |
T1454 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_overflow.2152880006 |
|
|
Sep 24 08:34:51 AM UTC 24 |
Sep 24 08:35:55 AM UTC 24 |
4260655531 ps |
T1455 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_acq.3972801956 |
|
|
Sep 24 08:35:50 AM UTC 24 |
Sep 24 08:35:55 AM UTC 24 |
497089781 ps |
T1456 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_target_smbus_maxlen.1415912570 |
|
|
Sep 24 08:35:52 AM UTC 24 |
Sep 24 08:35:57 AM UTC 24 |
771297987 ps |
T1457 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_target_nack_txstretch.3479267103 |
|
|
Sep 24 08:35:54 AM UTC 24 |
Sep 24 08:35:58 AM UTC 24 |
2544303591 ps |
T1458 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_watermark.2233932341 |
|
|
Sep 24 08:34:21 AM UTC 24 |
Sep 24 08:35:58 AM UTC 24 |
66253094947 ps |
T1459 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_alert_test.3550797967 |
|
|
Sep 24 08:35:56 AM UTC 24 |
Sep 24 08:35:58 AM UTC 24 |
48845625 ps |
T1460 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull_addr.1270798618 |
|
|
Sep 24 08:35:54 AM UTC 24 |
Sep 24 08:35:58 AM UTC 24 |
1842263076 ps |
T1461 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_host_override.3471138000 |
|
|
Sep 24 08:35:56 AM UTC 24 |
Sep 24 08:35:58 AM UTC 24 |
16686743 ps |
T1462 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_fmt.2044983602 |
|
|
Sep 24 08:35:56 AM UTC 24 |
Sep 24 08:35:59 AM UTC 24 |
500228203 ps |
T1463 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_host_smoke.3140108480 |
|
|
Sep 24 08:35:22 AM UTC 24 |
Sep 24 08:35:59 AM UTC 24 |
1791509995 ps |
T1464 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull.2215286510 |
|
|
Sep 24 08:35:54 AM UTC 24 |
Sep 24 08:36:00 AM UTC 24 |
2043570747 ps |
T1465 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_host_perf_precise.640117232 |
|
|
Sep 24 08:36:01 AM UTC 24 |
Sep 24 08:36:04 AM UTC 24 |
473133128 ps |
T1466 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_full.3914664229 |
|
|
Sep 24 08:32:49 AM UTC 24 |
Sep 24 08:36:05 AM UTC 24 |
3275403314 ps |
T1467 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_rx.3924819369 |
|
|
Sep 24 08:35:59 AM UTC 24 |
Sep 24 08:36:10 AM UTC 24 |
157532681 ps |
T1468 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_fmt_empty.896603904 |
|
|
Sep 24 08:35:58 AM UTC 24 |
Sep 24 08:36:15 AM UTC 24 |
445078062 ps |
T1469 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_stress_all.2416148030 |
|
|
Sep 24 08:24:22 AM UTC 24 |
Sep 24 08:36:16 AM UTC 24 |
39293766459 ps |
T1470 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_intr_smoke.243318234 |
|
|
Sep 24 08:36:07 AM UTC 24 |
Sep 24 08:36:16 AM UTC 24 |
2761602024 ps |
T1471 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_tx.4197613173 |
|
|
Sep 24 08:36:18 AM UTC 24 |
Sep 24 08:36:21 AM UTC 24 |
212512067 ps |
T1472 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_acq.4145870684 |
|
|
Sep 24 08:36:18 AM UTC 24 |
Sep 24 08:36:21 AM UTC 24 |
144199406 ps |
T1473 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_stretch.3752077775 |
|
|
Sep 24 08:36:07 AM UTC 24 |
Sep 24 08:36:26 AM UTC 24 |
1897548231 ps |
T1474 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_smoke.4213769605 |
|
|
Sep 24 08:36:01 AM UTC 24 |
Sep 24 08:36:26 AM UTC 24 |
1302503071 ps |
T1475 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_hrst.1513410894 |
|
|
Sep 24 08:36:24 AM UTC 24 |
Sep 24 08:36:28 AM UTC 24 |
402682959 ps |
T1476 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_bad_addr.3438371234 |
|
|
Sep 24 08:36:22 AM UTC 24 |
Sep 24 08:36:28 AM UTC 24 |
5351360222 ps |
T1477 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_timeout.4054135115 |
|
|
Sep 24 08:36:17 AM UTC 24 |
Sep 24 08:36:31 AM UTC 24 |
1434884463 ps |
T1478 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_acq.86525276 |
|
|
Sep 24 08:36:28 AM UTC 24 |
Sep 24 08:36:33 AM UTC 24 |
895589977 ps |
T1479 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_tx.3786588073 |
|
|
Sep 24 08:36:29 AM UTC 24 |
Sep 24 08:36:33 AM UTC 24 |
141436098 ps |
T1480 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_host_smoke.447421685 |
|
|
Sep 24 08:35:56 AM UTC 24 |
Sep 24 08:36:34 AM UTC 24 |
7301855636 ps |
T1481 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_intr_stress_wr.506179364 |
|
|
Sep 24 08:36:11 AM UTC 24 |
Sep 24 08:36:34 AM UTC 24 |
3549679386 ps |
T1482 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_perf.2505035013 |
|
|
Sep 24 08:36:20 AM UTC 24 |
Sep 24 08:36:34 AM UTC 24 |
7824907575 ps |
T1483 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_stress_rd.1365952914 |
|
|
Sep 24 08:36:05 AM UTC 24 |
Sep 24 08:36:37 AM UTC 24 |
11191719102 ps |
T1484 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_host_stretch_timeout.3666442672 |
|
|
Sep 24 08:36:01 AM UTC 24 |
Sep 24 08:36:37 AM UTC 24 |
1347549451 ps |
T1485 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_alert_test.2696702960 |
|
|
Sep 24 08:36:35 AM UTC 24 |
Sep 24 08:36:37 AM UTC 24 |
50662449 ps |
T1486 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_tx_stretch_ctrl.1921551310 |
|
|
Sep 24 08:36:31 AM UTC 24 |
Sep 24 08:36:38 AM UTC 24 |
155533138 ps |
T1487 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_smbus_maxlen.1375917054 |
|
|
Sep 24 08:36:33 AM UTC 24 |
Sep 24 08:36:38 AM UTC 24 |
1820395680 ps |
T1488 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_nack_txstretch.3617582043 |
|
|
Sep 24 08:36:35 AM UTC 24 |
Sep 24 08:36:39 AM UTC 24 |
135482289 ps |
T1489 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_host_override.136283956 |
|
|
Sep 24 08:36:37 AM UTC 24 |
Sep 24 08:36:39 AM UTC 24 |
48259449 ps |
T1490 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull_addr.209321919 |
|
|
Sep 24 08:36:34 AM UTC 24 |
Sep 24 08:36:39 AM UTC 24 |
475464009 ps |
T1491 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull.638660798 |
|
|
Sep 24 08:36:34 AM UTC 24 |
Sep 24 08:36:40 AM UTC 24 |
535754686 ps |
T1492 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_host_may_nack.1906803937 |
|
|
Sep 24 08:36:27 AM UTC 24 |
Sep 24 08:36:41 AM UTC 24 |
1102981212 ps |
T1493 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_fmt.2394075274 |
|
|
Sep 24 08:36:39 AM UTC 24 |
Sep 24 08:36:42 AM UTC 24 |
144722711 ps |
T1494 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_host_error_intr.3058331338 |
|
|
Sep 24 08:36:43 AM UTC 24 |
Sep 24 08:36:46 AM UTC 24 |
83597538 ps |
T1495 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_full.184332771 |
|
|
Sep 24 08:33:17 AM UTC 24 |
Sep 24 08:36:47 AM UTC 24 |
5807781609 ps |
T1496 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_rx.1421976505 |
|
|
Sep 24 08:36:39 AM UTC 24 |
Sep 24 08:36:48 AM UTC 24 |
1328432080 ps |
T1497 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_fmt_empty.3542964965 |
|
|
Sep 24 08:36:39 AM UTC 24 |
Sep 24 08:36:49 AM UTC 24 |
924921493 ps |
T1498 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_target_stress_wr.2699716049 |
|
|
Sep 24 08:36:01 AM UTC 24 |
Sep 24 08:36:50 AM UTC 24 |
28713665969 ps |
T1499 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_watermark.3820095757 |
|
|
Sep 24 08:33:47 AM UTC 24 |
Sep 24 08:36:54 AM UTC 24 |
41000794899 ps |
T1500 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_host_perf.2486960703 |
|
|
Sep 24 08:31:10 AM UTC 24 |
Sep 24 08:36:58 AM UTC 24 |
26281545840 ps |
T1501 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_overflow.988183831 |
|
|
Sep 24 08:35:56 AM UTC 24 |
Sep 24 08:36:58 AM UTC 24 |
32205649582 ps |
T1502 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_stress_wr.3018982088 |
|
|
Sep 24 08:34:57 AM UTC 24 |
Sep 24 08:36:59 AM UTC 24 |
42635681963 ps |
T1503 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_stress_rd.1094107684 |
|
|
Sep 24 08:36:50 AM UTC 24 |
Sep 24 08:36:59 AM UTC 24 |
1176563701 ps |
T1504 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_host_perf.1275513358 |
|
|
Sep 24 08:32:13 AM UTC 24 |
Sep 24 08:37:00 AM UTC 24 |
28275430653 ps |
T1505 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_acq.477288851 |
|
|
Sep 24 08:37:00 AM UTC 24 |
Sep 24 08:37:02 AM UTC 24 |
367562620 ps |
T1506 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_intr_smoke.2727323341 |
|
|
Sep 24 08:36:54 AM UTC 24 |
Sep 24 08:37:03 AM UTC 24 |
3050086481 ps |
T1507 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_tx.2425608228 |
|
|
Sep 24 08:37:01 AM UTC 24 |
Sep 24 08:37:03 AM UTC 24 |
463488499 ps |
T1508 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_smoke.37270287 |
|
|
Sep 24 08:36:48 AM UTC 24 |
Sep 24 08:37:08 AM UTC 24 |
2817327237 ps |
T1509 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_timeout.2153875549 |
|
|
Sep 24 08:36:58 AM UTC 24 |
Sep 24 08:37:11 AM UTC 24 |
1341722778 ps |
T1510 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_perf.4090304579 |
|
|
Sep 24 08:37:03 AM UTC 24 |
Sep 24 08:37:11 AM UTC 24 |
2696705229 ps |
T1511 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_bad_addr.3394893265 |
|
|
Sep 24 08:37:04 AM UTC 24 |
Sep 24 08:37:12 AM UTC 24 |
3218778892 ps |
T1512 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_host_perf_precise.2548537420 |
|
|
Sep 24 08:36:41 AM UTC 24 |
Sep 24 08:37:12 AM UTC 24 |
2393022701 ps |
T1513 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_host_mode_toggle.1001242452 |
|
|
Sep 24 08:37:09 AM UTC 24 |
Sep 24 08:37:13 AM UTC 24 |
336114648 ps |
T1514 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_smbus_maxlen.2082168941 |
|
|
Sep 24 08:37:13 AM UTC 24 |
Sep 24 08:37:17 AM UTC 24 |
5462482807 ps |
T1515 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_tx.3043097245 |
|
|
Sep 24 08:37:13 AM UTC 24 |
Sep 24 08:37:17 AM UTC 24 |
162811830 ps |
T1516 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_acq.2571990257 |
|
|
Sep 24 08:37:12 AM UTC 24 |
Sep 24 08:37:18 AM UTC 24 |
1869397413 ps |
T1517 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_tx_stretch_ctrl.3140256861 |
|
|
Sep 24 08:37:13 AM UTC 24 |
Sep 24 08:37:19 AM UTC 24 |
128485222 ps |
T1518 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_host_stretch_timeout.357963754 |
|
|
Sep 24 08:36:42 AM UTC 24 |
Sep 24 08:37:19 AM UTC 24 |
1323282185 ps |
T1519 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_alert_test.1063292122 |
|
|
Sep 24 08:37:20 AM UTC 24 |
Sep 24 08:37:22 AM UTC 24 |
48623142 ps |
T1520 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_nack_txstretch.1338485391 |
|
|
Sep 24 08:37:19 AM UTC 24 |
Sep 24 08:37:23 AM UTC 24 |
590237378 ps |
T1521 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull.1173549850 |
|
|
Sep 24 08:37:18 AM UTC 24 |
Sep 24 08:37:24 AM UTC 24 |
935765529 ps |
T1522 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull_addr.655247902 |
|
|
Sep 24 08:37:18 AM UTC 24 |
Sep 24 08:37:24 AM UTC 24 |
496944861 ps |
T1523 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_watermark.2281464137 |
|
|
Sep 24 08:35:56 AM UTC 24 |
Sep 24 08:37:25 AM UTC 24 |
3703145489 ps |
T1524 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_host_override.1355569621 |
|
|
Sep 24 08:37:23 AM UTC 24 |
Sep 24 08:37:25 AM UTC 24 |
47208918 ps |
T1525 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_overflow.1213325162 |
|
|
Sep 24 08:36:38 AM UTC 24 |
Sep 24 08:37:26 AM UTC 24 |
3172626359 ps |
T1526 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_stretch.55286212 |
|
|
Sep 24 08:36:51 AM UTC 24 |
Sep 24 08:37:26 AM UTC 24 |
1871769527 ps |
T1527 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_host_may_nack.3598009295 |
|
|
Sep 24 08:37:11 AM UTC 24 |
Sep 24 08:37:28 AM UTC 24 |
721865261 ps |
T1528 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_fmt.3388970168 |
|
|
Sep 24 08:37:25 AM UTC 24 |
Sep 24 08:37:29 AM UTC 24 |
100226546 ps |
T1529 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_full.2228041982 |
|
|
Sep 24 08:35:59 AM UTC 24 |
Sep 24 08:37:30 AM UTC 24 |
5706114389 ps |
T1530 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_full.1539797742 |
|
|
Sep 24 08:34:52 AM UTC 24 |
Sep 24 08:37:31 AM UTC 24 |
3616481828 ps |
T1531 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_rx.496562361 |
|
|
Sep 24 08:37:26 AM UTC 24 |
Sep 24 08:37:34 AM UTC 24 |
149922506 ps |
T1532 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_host_error_intr.799900170 |
|
|
Sep 24 08:37:31 AM UTC 24 |
Sep 24 08:37:36 AM UTC 24 |
98605459 ps |
T1533 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_stress_all.1761898330 |
|
|
Sep 24 08:37:03 AM UTC 24 |
Sep 24 08:37:37 AM UTC 24 |
45096426852 ps |
T1534 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_host_perf.3555657375 |
|
|
Sep 24 08:36:41 AM UTC 24 |
Sep 24 08:37:39 AM UTC 24 |
2535491691 ps |
T1535 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_watermark.1358147054 |
|
|
Sep 24 08:34:51 AM UTC 24 |
Sep 24 08:37:42 AM UTC 24 |
5697872220 ps |
T1536 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_host_perf_precise.2408110376 |
|
|
Sep 24 08:37:30 AM UTC 24 |
Sep 24 08:37:44 AM UTC 24 |
529075362 ps |
T1537 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_watermark.3034929011 |
|
|
Sep 24 08:36:38 AM UTC 24 |
Sep 24 08:37:44 AM UTC 24 |
8472840858 ps |
T1538 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_fmt_empty.620060305 |
|
|
Sep 24 08:37:26 AM UTC 24 |
Sep 24 08:37:46 AM UTC 24 |
642405081 ps |
T1539 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_overflow.4166941351 |
|
|
Sep 24 08:35:23 AM UTC 24 |
Sep 24 08:37:47 AM UTC 24 |
37667090540 ps |
T1540 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_target_smoke.3121065894 |
|
|
Sep 24 08:37:35 AM UTC 24 |
Sep 24 08:37:48 AM UTC 24 |
1863018273 ps |
T1541 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_target_intr_smoke.154469542 |
|
|
Sep 24 08:37:39 AM UTC 24 |
Sep 24 08:37:48 AM UTC 24 |
1846916959 ps |
T1542 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_host_smoke.2947996488 |
|
|
Sep 24 08:36:35 AM UTC 24 |
Sep 24 08:37:49 AM UTC 24 |
5797042971 ps |
T1543 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_reset_tx.1780662269 |
|
|
Sep 24 08:37:48 AM UTC 24 |
Sep 24 08:37:50 AM UTC 24 |
656472887 ps |
T1544 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_reset_acq.2882137029 |
|
|
Sep 24 08:37:48 AM UTC 24 |
Sep 24 08:37:51 AM UTC 24 |
199425910 ps |
T1545 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_target_timeout.348599472 |
|
|
Sep 24 08:37:44 AM UTC 24 |
Sep 24 08:37:56 AM UTC 24 |
1303176035 ps |
T1546 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_target_perf.1909989347 |
|
|
Sep 24 08:37:49 AM UTC 24 |
Sep 24 08:37:57 AM UTC 24 |
1544978944 ps |
T1547 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_watermarks_tx.1935498983 |
|
|
Sep 24 08:37:54 AM UTC 24 |
Sep 24 08:37:57 AM UTC 24 |
92349305 ps |
T1548 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_target_bad_addr.2322750296 |
|
|
Sep 24 08:37:50 AM UTC 24 |
Sep 24 08:37:57 AM UTC 24 |
3166694279 ps |
T1549 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_host_smoke.945728647 |
|
|
Sep 24 08:37:20 AM UTC 24 |
Sep 24 08:37:59 AM UTC 24 |
6574503460 ps |
T1550 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_alert_test.2310088327 |
|
|
Sep 24 08:38:01 AM UTC 24 |
Sep 24 08:38:03 AM UTC 24 |
16548163 ps |
T1551 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_watermarks_acq.2158503001 |
|
|
Sep 24 08:37:54 AM UTC 24 |
Sep 24 08:38:00 AM UTC 24 |
1355243592 ps |
T1552 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_target_stress_rd.2931969741 |
|
|
Sep 24 08:37:37 AM UTC 24 |
Sep 24 08:38:01 AM UTC 24 |
1187359693 ps |
T1553 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_target_nack_acqfull.1793779175 |
|
|
Sep 24 08:37:58 AM UTC 24 |
Sep 24 08:38:02 AM UTC 24 |
1753282422 ps |
T1554 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_target_tx_stretch_ctrl.3613321878 |
|
|
Sep 24 08:37:57 AM UTC 24 |
Sep 24 08:38:02 AM UTC 24 |
153780808 ps |
T1555 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_target_nack_txstretch.415003653 |
|
|
Sep 24 08:38:00 AM UTC 24 |
Sep 24 08:38:03 AM UTC 24 |
496605617 ps |
T1556 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_target_smbus_maxlen.2595455619 |
|
|
Sep 24 08:37:58 AM UTC 24 |
Sep 24 08:38:03 AM UTC 24 |
900742159 ps |
T1557 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_target_nack_acqfull_addr.1043590636 |
|
|
Sep 24 08:37:58 AM UTC 24 |
Sep 24 08:38:04 AM UTC 24 |
1083351030 ps |
T1558 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/46.i2c_host_override.669510359 |
|
|
Sep 24 08:38:03 AM UTC 24 |
Sep 24 08:38:05 AM UTC 24 |
91031814 ps |
T1559 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/46.i2c_host_fifo_reset_fmt.2609403410 |
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|
Sep 24 08:38:04 AM UTC 24 |
Sep 24 08:38:07 AM UTC 24 |
129899312 ps |
T1560 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_host_may_nack.1276261042 |
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|
Sep 24 08:37:52 AM UTC 24 |
Sep 24 08:38:07 AM UTC 24 |
1398110680 ps |
T1561 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_host_stretch_timeout.1892435940 |
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|
Sep 24 08:37:30 AM UTC 24 |
Sep 24 08:38:08 AM UTC 24 |
850067420 ps |
T1562 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/46.i2c_host_fifo_reset_rx.641717651 |
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|
Sep 24 08:38:05 AM UTC 24 |
Sep 24 08:38:12 AM UTC 24 |
199966416 ps |
T1563 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/45.i2c_target_intr_stress_wr.319455615 |
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|
Sep 24 08:37:43 AM UTC 24 |
Sep 24 08:38:14 AM UTC 24 |
12967703594 ps |
T1564 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_stress_wr.3593998828 |
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|
Sep 24 08:32:53 AM UTC 24 |
Sep 24 08:38:20 AM UTC 24 |
51436013258 ps |
T1565 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/46.i2c_host_error_intr.1339747233 |
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|
Sep 24 08:38:09 AM UTC 24 |
Sep 24 08:38:23 AM UTC 24 |
630144011 ps |
T1566 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/46.i2c_host_fifo_fmt_empty.1500800170 |
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|
Sep 24 08:38:04 AM UTC 24 |
Sep 24 08:38:25 AM UTC 24 |
661918527 ps |
T1567 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/44.i2c_target_stress_wr.541094260 |
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|
Sep 24 08:36:49 AM UTC 24 |
Sep 24 08:38:26 AM UTC 24 |
24346583329 ps |