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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
91.26 97.26 89.54 97.22 72.02 94.30 98.47 90.00


Total test records in report: 1829
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html | tests35.html | tests36.html | tests37.html | tests38.html

T615 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_reset_fmt.398704478 Sep 24 08:22:01 AM UTC 24 Sep 24 08:22:03 AM UTC 24 225584286 ps
T616 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_tx_stretch_ctrl.3993232288 Sep 24 08:21:56 AM UTC 24 Sep 24 08:22:04 AM UTC 24 286428598 ps
T617 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_host_stretch_timeout.4042755022 Sep 24 08:21:33 AM UTC 24 Sep 24 08:22:06 AM UTC 24 827610105 ps
T618 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_host_error_intr.3776641318 Sep 24 08:22:03 AM UTC 24 Sep 24 08:22:07 AM UTC 24 111287782 ps
T619 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_reset_rx.285125573 Sep 24 08:22:01 AM UTC 24 Sep 24 08:22:07 AM UTC 24 183026216 ps
T620 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_overflow.1294511197 Sep 24 08:20:58 AM UTC 24 Sep 24 08:22:08 AM UTC 24 2655657487 ps
T621 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_host_perf_precise.2341380181 Sep 24 08:22:03 AM UTC 24 Sep 24 08:22:09 AM UTC 24 80702694 ps
T622 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_fmt_empty.3267697731 Sep 24 08:22:01 AM UTC 24 Sep 24 08:22:10 AM UTC 24 1598027912 ps
T623 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_watermark.3431370116 Sep 24 08:20:55 AM UTC 24 Sep 24 08:22:12 AM UTC 24 25309068400 ps
T624 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_host_smoke.695035329 Sep 24 08:20:55 AM UTC 24 Sep 24 08:22:14 AM UTC 24 1783819545 ps
T625 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_reset_acq.2663862528 Sep 24 08:22:13 AM UTC 24 Sep 24 08:22:16 AM UTC 24 865925699 ps
T626 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_reset_tx.3602729934 Sep 24 08:22:14 AM UTC 24 Sep 24 08:22:17 AM UTC 24 372707181 ps
T627 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_overflow.3782453620 Sep 24 08:21:28 AM UTC 24 Sep 24 08:22:18 AM UTC 24 6722183091 ps
T628 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_timeout.3165636823 Sep 24 08:22:10 AM UTC 24 Sep 24 08:22:18 AM UTC 24 5186418391 ps
T629 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_intr_stress_wr.248515327 Sep 24 08:22:10 AM UTC 24 Sep 24 08:22:19 AM UTC 24 13945945871 ps
T630 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_full.605646585 Sep 24 08:21:00 AM UTC 24 Sep 24 08:22:19 AM UTC 24 12325248118 ps
T631 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_intr_smoke.273094702 Sep 24 08:22:09 AM UTC 24 Sep 24 08:22:20 AM UTC 24 993372293 ps
T632 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_host_stretch_timeout.976856950 Sep 24 08:22:03 AM UTC 24 Sep 24 08:22:23 AM UTC 24 4155357403 ps
T633 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_watermarks_acq.2033187587 Sep 24 08:22:20 AM UTC 24 Sep 24 08:22:23 AM UTC 24 447880701 ps
T634 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_bad_addr.2522115870 Sep 24 08:22:18 AM UTC 24 Sep 24 08:22:25 AM UTC 24 2787400779 ps
T635 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_stress_rd.482898895 Sep 24 08:21:39 AM UTC 24 Sep 24 08:22:25 AM UTC 24 994535745 ps
T636 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_smoke.401440336 Sep 24 08:22:04 AM UTC 24 Sep 24 08:22:25 AM UTC 24 5993024761 ps
T77 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_host_mode_toggle.1896215818 Sep 24 08:22:19 AM UTC 24 Sep 24 08:22:25 AM UTC 24 448965001 ps
T637 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_watermarks_tx.94567077 Sep 24 08:22:21 AM UTC 24 Sep 24 08:22:25 AM UTC 24 1907285475 ps
T638 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_perf.3764539944 Sep 24 08:22:15 AM UTC 24 Sep 24 08:22:26 AM UTC 24 5491041002 ps
T639 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_host_smoke.3190134684 Sep 24 08:21:58 AM UTC 24 Sep 24 08:22:28 AM UTC 24 2614481277 ps
T640 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_alert_test.2608244809 Sep 24 08:22:26 AM UTC 24 Sep 24 08:22:28 AM UTC 24 33515921 ps
T641 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_smbus_maxlen.2202929955 Sep 24 08:22:25 AM UTC 24 Sep 24 08:22:28 AM UTC 24 601442851 ps
T642 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/2.i2c_target_stress_wr.3210627736 Sep 24 08:15:11 AM UTC 24 Sep 24 08:22:29 AM UTC 24 39447888732 ps
T643 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_nack_txstretch.2661560068 Sep 24 08:22:26 AM UTC 24 Sep 24 08:22:29 AM UTC 24 156737210 ps
T145 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_host_override.242609570 Sep 24 08:22:27 AM UTC 24 Sep 24 08:22:29 AM UTC 24 72386098 ps
T644 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_tx_stretch_ctrl.2044711388 Sep 24 08:22:24 AM UTC 24 Sep 24 08:22:31 AM UTC 24 151649537 ps
T645 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_nack_acqfull_addr.3178106396 Sep 24 08:22:26 AM UTC 24 Sep 24 08:22:31 AM UTC 24 1602570670 ps
T646 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_reset_fmt.318121163 Sep 24 08:22:29 AM UTC 24 Sep 24 08:22:32 AM UTC 24 97178946 ps
T647 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_nack_acqfull.2980741341 Sep 24 08:22:26 AM UTC 24 Sep 24 08:22:33 AM UTC 24 567189465 ps
T260 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_host_may_nack.2383644527 Sep 24 08:22:20 AM UTC 24 Sep 24 08:22:33 AM UTC 24 676215582 ps
T648 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_stretch.1359098703 Sep 24 08:22:07 AM UTC 24 Sep 24 08:22:38 AM UTC 24 3217306568 ps
T649 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_reset_rx.1933368726 Sep 24 08:22:30 AM UTC 24 Sep 24 08:22:38 AM UTC 24 3072491381 ps
T650 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_stretch.1603726939 Sep 24 08:22:40 AM UTC 24 Sep 24 08:22:43 AM UTC 24 382782280 ps
T651 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_stress_rd.2415574012 Sep 24 08:22:07 AM UTC 24 Sep 24 08:22:46 AM UTC 24 1581875648 ps
T652 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_watermark.2725284032 Sep 24 08:17:51 AM UTC 24 Sep 24 08:22:51 AM UTC 24 5149993393 ps
T653 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_stress_rd.2184986908 Sep 24 08:22:39 AM UTC 24 Sep 24 08:22:52 AM UTC 24 1298368279 ps
T654 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_stress_wr.2836040339 Sep 24 08:22:04 AM UTC 24 Sep 24 08:22:52 AM UTC 24 31112338033 ps
T655 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_intr_smoke.555690390 Sep 24 08:22:41 AM UTC 24 Sep 24 08:22:52 AM UTC 24 5256912337 ps
T656 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_host_stretch_timeout.3839957764 Sep 24 08:22:33 AM UTC 24 Sep 24 08:22:53 AM UTC 24 703320010 ps
T657 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_smoke.3317522651 Sep 24 08:22:38 AM UTC 24 Sep 24 08:22:54 AM UTC 24 1652113191 ps
T658 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_reset_acq.2651931194 Sep 24 08:22:51 AM UTC 24 Sep 24 08:22:55 AM UTC 24 2812022214 ps
T659 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/8.i2c_host_stress_all.2909460820 Sep 24 08:17:56 AM UTC 24 Sep 24 08:22:55 AM UTC 24 181594428188 ps
T660 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_reset_tx.2421527190 Sep 24 08:22:53 AM UTC 24 Sep 24 08:22:56 AM UTC 24 363055434 ps
T661 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_fmt_empty.3554534225 Sep 24 08:22:30 AM UTC 24 Sep 24 08:22:57 AM UTC 24 458882149 ps
T78 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_host_mode_toggle.3302598554 Sep 24 08:22:55 AM UTC 24 Sep 24 08:22:58 AM UTC 24 234317121 ps
T662 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_bad_addr.1285773398 Sep 24 08:22:54 AM UTC 24 Sep 24 08:23:00 AM UTC 24 705894527 ps
T663 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_watermarks_tx.2978910613 Sep 24 08:22:57 AM UTC 24 Sep 24 08:23:01 AM UTC 24 681598025 ps
T664 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_watermarks_acq.2567980218 Sep 24 08:22:56 AM UTC 24 Sep 24 08:23:02 AM UTC 24 479260553 ps
T665 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_timeout.3314950644 Sep 24 08:22:46 AM UTC 24 Sep 24 08:23:02 AM UTC 24 1298374994 ps
T666 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_tx_stretch_ctrl.1532155471 Sep 24 08:22:58 AM UTC 24 Sep 24 08:23:03 AM UTC 24 78808095 ps
T667 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_perf.1479347740 Sep 24 08:22:53 AM UTC 24 Sep 24 08:23:03 AM UTC 24 760659681 ps
T668 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_overflow.3061780850 Sep 24 08:20:19 AM UTC 24 Sep 24 08:23:03 AM UTC 24 2279895471 ps
T669 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_stretch.2688425169 Sep 24 08:21:03 AM UTC 24 Sep 24 08:23:04 AM UTC 24 7085481834 ps
T670 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_smbus_maxlen.2770963707 Sep 24 08:22:59 AM UTC 24 Sep 24 08:23:05 AM UTC 24 3996750448 ps
T671 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_overflow.1826952276 Sep 24 08:22:00 AM UTC 24 Sep 24 08:23:05 AM UTC 24 6150603911 ps
T672 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_alert_test.3863096960 Sep 24 08:23:04 AM UTC 24 Sep 24 08:23:06 AM UTC 24 16835747 ps
T673 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_host_override.4050930771 Sep 24 08:23:04 AM UTC 24 Sep 24 08:23:06 AM UTC 24 23530594 ps
T252 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_host_may_nack.2533283653 Sep 24 08:22:56 AM UTC 24 Sep 24 08:23:06 AM UTC 24 1174507240 ps
T674 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_nack_txstretch.3283574439 Sep 24 08:23:02 AM UTC 24 Sep 24 08:23:06 AM UTC 24 261259892 ps
T675 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_nack_acqfull.3141763443 Sep 24 08:23:01 AM UTC 24 Sep 24 08:23:06 AM UTC 24 557831889 ps
T676 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_nack_acqfull_addr.2467953587 Sep 24 08:23:01 AM UTC 24 Sep 24 08:23:07 AM UTC 24 1840219228 ps
T677 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_overflow.2830026705 Sep 24 08:22:29 AM UTC 24 Sep 24 08:23:07 AM UTC 24 8043082199 ps
T678 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_reset_fmt.822126006 Sep 24 08:23:06 AM UTC 24 Sep 24 08:23:10 AM UTC 24 201771078 ps
T679 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_stress_wr.4268358142 Sep 24 08:21:39 AM UTC 24 Sep 24 08:23:11 AM UTC 24 44079367022 ps
T680 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_stress_wr.2142160547 Sep 24 08:22:39 AM UTC 24 Sep 24 08:23:12 AM UTC 24 17734173135 ps
T681 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_host_error_intr.1398846511 Sep 24 08:23:08 AM UTC 24 Sep 24 08:23:13 AM UTC 24 187063294 ps
T682 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_fmt_empty.3070741961 Sep 24 08:23:06 AM UTC 24 Sep 24 08:23:15 AM UTC 24 363270829 ps
T683 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_full.685099183 Sep 24 08:21:30 AM UTC 24 Sep 24 08:24:21 AM UTC 24 2485583268 ps
T684 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_host_perf.1650388855 Sep 24 08:21:00 AM UTC 24 Sep 24 08:23:19 AM UTC 24 12281579823 ps
T685 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_reset_rx.3141515521 Sep 24 08:23:07 AM UTC 24 Sep 24 08:23:23 AM UTC 24 893593210 ps
T686 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_host_stretch_timeout.4247712058 Sep 24 08:23:07 AM UTC 24 Sep 24 08:23:24 AM UTC 24 822459823 ps
T687 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_reset_acq.396940401 Sep 24 08:23:25 AM UTC 24 Sep 24 08:23:27 AM UTC 24 400447836 ps
T688 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_full.2339462860 Sep 24 08:22:30 AM UTC 24 Sep 24 08:23:28 AM UTC 24 2096897464 ps
T689 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_intr_stress_wr.1376340887 Sep 24 08:23:20 AM UTC 24 Sep 24 08:23:28 AM UTC 24 8659157587 ps
T690 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_fmt_empty.2343720377 Sep 24 08:24:08 AM UTC 24 Sep 24 08:24:19 AM UTC 24 387790198 ps
T691 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_host_smoke.454230764 Sep 24 08:22:26 AM UTC 24 Sep 24 08:23:29 AM UTC 24 1523597396 ps
T692 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_reset_tx.2367064868 Sep 24 08:23:27 AM UTC 24 Sep 24 08:23:30 AM UTC 24 137534047 ps
T693 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_intr_smoke.732979940 Sep 24 08:23:16 AM UTC 24 Sep 24 08:23:30 AM UTC 24 4341635983 ps
T694 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_watermark.3703107228 Sep 24 08:19:23 AM UTC 24 Sep 24 08:23:31 AM UTC 24 8653783486 ps
T695 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_smoke.1829942985 Sep 24 08:23:10 AM UTC 24 Sep 24 08:23:31 AM UTC 24 513787272 ps
T696 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_timeout.145535951 Sep 24 08:23:20 AM UTC 24 Sep 24 08:23:33 AM UTC 24 3223039951 ps
T697 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_watermark.123569900 Sep 24 08:19:52 AM UTC 24 Sep 24 08:23:33 AM UTC 24 15846108400 ps
T698 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_watermarks_tx.770448067 Sep 24 08:23:33 AM UTC 24 Sep 24 08:23:35 AM UTC 24 528961637 ps
T699 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_bad_addr.2296287223 Sep 24 08:23:28 AM UTC 24 Sep 24 08:23:36 AM UTC 24 2386636964 ps
T700 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_watermarks_acq.1081850453 Sep 24 08:23:32 AM UTC 24 Sep 24 08:23:37 AM UTC 24 363440730 ps
T701 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_intr_stress_wr.1160482910 Sep 24 08:22:44 AM UTC 24 Sep 24 08:23:37 AM UTC 24 22165632980 ps
T702 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_perf.3566390712 Sep 24 08:23:28 AM UTC 24 Sep 24 08:23:38 AM UTC 24 815249219 ps
T703 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_alert_test.3538005713 Sep 24 08:23:37 AM UTC 24 Sep 24 08:23:39 AM UTC 24 17076436 ps
T704 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_tx_stretch_ctrl.722383486 Sep 24 08:23:34 AM UTC 24 Sep 24 08:23:39 AM UTC 24 160489478 ps
T705 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_nack_txstretch.2990009685 Sep 24 08:23:36 AM UTC 24 Sep 24 08:23:39 AM UTC 24 167711860 ps
T706 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_smbus_maxlen.639049270 Sep 24 08:23:34 AM UTC 24 Sep 24 08:23:40 AM UTC 24 533021327 ps
T707 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_nack_acqfull.1890241854 Sep 24 08:23:35 AM UTC 24 Sep 24 08:23:41 AM UTC 24 1065554067 ps
T708 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_host_override.4014427227 Sep 24 08:23:39 AM UTC 24 Sep 24 08:23:41 AM UTC 24 36142455 ps
T709 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_nack_acqfull_addr.71238210 Sep 24 08:23:36 AM UTC 24 Sep 24 08:23:42 AM UTC 24 3805244734 ps
T263 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_host_may_nack.2429599140 Sep 24 08:23:32 AM UTC 24 Sep 24 08:23:43 AM UTC 24 660823608 ps
T710 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_reset_fmt.1731595356 Sep 24 08:23:40 AM UTC 24 Sep 24 08:23:43 AM UTC 24 546113582 ps
T711 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/2.i2c_target_intr_stress_wr.1105435071 Sep 24 08:15:13 AM UTC 24 Sep 24 08:23:44 AM UTC 24 34216359634 ps
T712 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_host_smoke.4258236677 Sep 24 08:23:04 AM UTC 24 Sep 24 08:23:47 AM UTC 24 10878280000 ps
T713 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_overflow.1829215001 Sep 24 08:23:05 AM UTC 24 Sep 24 08:23:48 AM UTC 24 2906153682 ps
T714 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_stress_rd.214992853 Sep 24 08:23:13 AM UTC 24 Sep 24 08:23:49 AM UTC 24 5353654358 ps
T715 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_host_perf_precise.1703569307 Sep 24 08:23:44 AM UTC 24 Sep 24 08:23:50 AM UTC 24 388355394 ps
T716 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_host_perf_precise.4205428009 Sep 24 08:23:07 AM UTC 24 Sep 24 08:23:52 AM UTC 24 3153551882 ps
T717 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_fmt_empty.2465434882 Sep 24 08:23:40 AM UTC 24 Sep 24 08:23:53 AM UTC 24 317437058 ps
T718 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_reset_rx.1110611843 Sep 24 08:23:42 AM UTC 24 Sep 24 08:23:55 AM UTC 24 211203052 ps
T719 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_stretch.3736141416 Sep 24 08:23:51 AM UTC 24 Sep 24 08:23:55 AM UTC 24 330375334 ps
T720 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_host_stretch_timeout.3887452071 Sep 24 08:23:44 AM UTC 24 Sep 24 08:23:56 AM UTC 24 7194209665 ps
T721 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_stress_wr.3390194411 Sep 24 08:21:02 AM UTC 24 Sep 24 08:23:58 AM UTC 24 51791057454 ps
T722 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_target_stress_all.261982081 Sep 24 08:21:49 AM UTC 24 Sep 24 08:24:21 AM UTC 24 53631707438 ps
T723 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_host_error_intr.1621973178 Sep 24 08:23:45 AM UTC 24 Sep 24 08:23:58 AM UTC 24 230259176 ps
T724 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_reset_tx.3288623878 Sep 24 08:23:56 AM UTC 24 Sep 24 08:23:58 AM UTC 24 226923257 ps
T725 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_reset_acq.4237670110 Sep 24 08:23:56 AM UTC 24 Sep 24 08:23:58 AM UTC 24 228542995 ps
T726 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_host_perf_precise.48531172 Sep 24 08:22:33 AM UTC 24 Sep 24 08:23:59 AM UTC 24 2296265293 ps
T727 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_intr_smoke.1465822425 Sep 24 08:23:53 AM UTC 24 Sep 24 08:24:00 AM UTC 24 560138661 ps
T728 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_stress_all.1306576051 Sep 24 08:19:16 AM UTC 24 Sep 24 08:24:00 AM UTC 24 43914571502 ps
T729 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_timeout.1515449764 Sep 24 08:23:53 AM UTC 24 Sep 24 08:24:02 AM UTC 24 2305528598 ps
T730 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_watermarks_tx.4001622701 Sep 24 08:24:00 AM UTC 24 Sep 24 08:24:03 AM UTC 24 399859952 ps
T731 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_host_mode_toggle.1775318077 Sep 24 08:23:59 AM UTC 24 Sep 24 08:24:04 AM UTC 24 147167058 ps
T732 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_stretch.3817854248 Sep 24 08:23:15 AM UTC 24 Sep 24 08:24:04 AM UTC 24 2500574200 ps
T733 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_full.4250422978 Sep 24 08:22:02 AM UTC 24 Sep 24 08:24:04 AM UTC 24 29036956064 ps
T734 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_perf.3060865424 Sep 24 08:23:57 AM UTC 24 Sep 24 08:24:05 AM UTC 24 1009568171 ps
T735 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_host_may_nack.1290432883 Sep 24 08:23:59 AM UTC 24 Sep 24 08:24:05 AM UTC 24 543390192 ps
T736 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_watermarks_acq.1572639728 Sep 24 08:24:00 AM UTC 24 Sep 24 08:24:05 AM UTC 24 1941789812 ps
T737 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_smbus_maxlen.2638435055 Sep 24 08:24:02 AM UTC 24 Sep 24 08:24:06 AM UTC 24 8077978250 ps
T738 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_intr_stress_wr.31426748 Sep 24 08:23:53 AM UTC 24 Sep 24 08:24:06 AM UTC 24 15411070783 ps
T739 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_tx_stretch_ctrl.1690159357 Sep 24 08:24:01 AM UTC 24 Sep 24 08:24:07 AM UTC 24 303957664 ps
T740 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_bad_addr.3858713470 Sep 24 08:23:59 AM UTC 24 Sep 24 08:24:07 AM UTC 24 642562461 ps
T741 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_alert_test.1256713473 Sep 24 08:24:06 AM UTC 24 Sep 24 08:24:08 AM UTC 24 79719090 ps
T742 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_host_override.1423808246 Sep 24 08:24:06 AM UTC 24 Sep 24 08:24:08 AM UTC 24 104812759 ps
T743 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_nack_txstretch.3616550445 Sep 24 08:24:05 AM UTC 24 Sep 24 08:24:08 AM UTC 24 262105785 ps
T744 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_smoke.614206836 Sep 24 08:23:48 AM UTC 24 Sep 24 08:24:08 AM UTC 24 1239737477 ps
T248 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_reset_fmt.169551260 Sep 24 08:24:07 AM UTC 24 Sep 24 08:24:09 AM UTC 24 1233163131 ps
T54 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_nack_acqfull.621171804 Sep 24 08:24:03 AM UTC 24 Sep 24 08:24:10 AM UTC 24 2401363695 ps
T745 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_nack_acqfull_addr.1741182509 Sep 24 08:24:04 AM UTC 24 Sep 24 08:24:11 AM UTC 24 529976752 ps
T746 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_host_perf.985614846 Sep 24 08:22:02 AM UTC 24 Sep 24 08:24:12 AM UTC 24 27895831921 ps
T747 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_host_perf_precise.31132478 Sep 24 08:24:09 AM UTC 24 Sep 24 08:24:14 AM UTC 24 85146090 ps
T748 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_watermark.1418990573 Sep 24 08:22:00 AM UTC 24 Sep 24 08:24:16 AM UTC 24 4579957685 ps
T749 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/14.i2c_target_stress_all.760709473 Sep 24 08:21:13 AM UTC 24 Sep 24 08:24:19 AM UTC 24 37483709729 ps
T750 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_stress_rd.1769970287 Sep 24 08:23:50 AM UTC 24 Sep 24 08:24:20 AM UTC 24 1506428548 ps
T751 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_host_stretch_timeout.718400340 Sep 24 08:24:09 AM UTC 24 Sep 24 08:24:21 AM UTC 24 2259552350 ps
T752 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_reset_rx.3624918987 Sep 24 08:24:08 AM UTC 24 Sep 24 08:24:22 AM UTC 24 353200181 ps
T753 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_host_smoke.2817297442 Sep 24 08:23:38 AM UTC 24 Sep 24 08:24:23 AM UTC 24 1918207014 ps
T754 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_reset_tx.1722394620 Sep 24 08:24:21 AM UTC 24 Sep 24 08:24:25 AM UTC 24 284186576 ps
T755 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_intr_smoke.3341331454 Sep 24 08:24:17 AM UTC 24 Sep 24 08:24:25 AM UTC 24 2045078586 ps
T756 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_reset_acq.3222382397 Sep 24 08:24:21 AM UTC 24 Sep 24 08:24:25 AM UTC 24 214611960 ps
T757 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_watermarks_acq.1389448572 Sep 24 08:25:27 AM UTC 24 Sep 24 08:25:32 AM UTC 24 445513610 ps
T758 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_smoke.92800639 Sep 24 08:24:12 AM UTC 24 Sep 24 08:24:33 AM UTC 24 731286039 ps
T759 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_watermark.3335207339 Sep 24 08:20:18 AM UTC 24 Sep 24 08:24:34 AM UTC 24 4006129321 ps
T760 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_host_override.1535769005 Sep 24 08:25:32 AM UTC 24 Sep 24 08:25:34 AM UTC 24 194296226 ps
T761 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_timeout.799618515 Sep 24 08:24:20 AM UTC 24 Sep 24 08:24:35 AM UTC 24 2953542739 ps
T762 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_host_perf.176516724 Sep 24 08:25:09 AM UTC 24 Sep 24 08:25:30 AM UTC 24 6965587602 ps
T763 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_watermarks_tx.2362947585 Sep 24 08:25:28 AM UTC 24 Sep 24 08:25:31 AM UTC 24 833475815 ps
T764 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_overflow.2810796825 Sep 24 08:23:40 AM UTC 24 Sep 24 08:24:37 AM UTC 24 1610515373 ps
T765 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_watermarks_tx.3464415431 Sep 24 08:24:29 AM UTC 24 Sep 24 08:24:37 AM UTC 24 152842327 ps
T766 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_smbus_maxlen.4129062805 Sep 24 08:24:34 AM UTC 24 Sep 24 08:24:37 AM UTC 24 503756172 ps
T767 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_watermarks_acq.44554076 Sep 24 08:24:29 AM UTC 24 Sep 24 08:24:39 AM UTC 24 3055304662 ps
T768 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_perf.2157013790 Sep 24 08:24:22 AM UTC 24 Sep 24 08:24:39 AM UTC 24 683258364 ps
T769 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_bad_addr.852956213 Sep 24 08:24:22 AM UTC 24 Sep 24 08:24:40 AM UTC 24 1557394445 ps
T770 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_alert_test.267307445 Sep 24 08:24:36 AM UTC 24 Sep 24 08:24:40 AM UTC 24 16603604 ps
T146 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_host_override.2971188994 Sep 24 08:24:37 AM UTC 24 Sep 24 08:24:41 AM UTC 24 30920056 ps
T771 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_nack_acqfull.983920807 Sep 24 08:24:35 AM UTC 24 Sep 24 08:24:42 AM UTC 24 514583841 ps
T772 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_nack_txstretch.143601862 Sep 24 08:24:36 AM UTC 24 Sep 24 08:24:42 AM UTC 24 144981438 ps
T773 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/11.i2c_target_stress_all.3889875657 Sep 24 08:19:42 AM UTC 24 Sep 24 08:24:42 AM UTC 24 25630157648 ps
T774 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_nack_acqfull_addr.1989409363 Sep 24 08:24:35 AM UTC 24 Sep 24 08:24:42 AM UTC 24 489599046 ps
T256 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_host_may_nack.1288469429 Sep 24 08:24:29 AM UTC 24 Sep 24 08:24:43 AM UTC 24 9217578558 ps
T775 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_reset_fmt.714693245 Sep 24 08:24:40 AM UTC 24 Sep 24 08:24:43 AM UTC 24 319518077 ps
T776 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_watermark.4208630098 Sep 24 08:22:29 AM UTC 24 Sep 24 08:24:45 AM UTC 24 5268614460 ps
T777 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_stress_rd.685455738 Sep 24 08:24:15 AM UTC 24 Sep 24 08:24:49 AM UTC 24 2814493961 ps
T778 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_host_perf.2057549549 Sep 24 08:24:42 AM UTC 24 Sep 24 08:24:50 AM UTC 24 1724712633 ps
T779 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_reset_rx.1141197562 Sep 24 08:24:41 AM UTC 24 Sep 24 08:24:51 AM UTC 24 440904664 ps
T780 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_watermark.2333643626 Sep 24 08:21:28 AM UTC 24 Sep 24 08:24:56 AM UTC 24 3071240521 ps
T781 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_intr_stress_wr.4275924568 Sep 24 08:24:51 AM UTC 24 Sep 24 08:24:56 AM UTC 24 3881560539 ps
T782 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_host_perf.2273239584 Sep 24 08:22:31 AM UTC 24 Sep 24 08:24:57 AM UTC 24 5347698731 ps
T783 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_reset_tx.2435165135 Sep 24 08:24:57 AM UTC 24 Sep 24 08:24:59 AM UTC 24 669909772 ps
T784 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_reset_acq.3537374023 Sep 24 08:24:57 AM UTC 24 Sep 24 08:25:00 AM UTC 24 603748655 ps
T785 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_host_perf_precise.3728577144 Sep 24 08:24:43 AM UTC 24 Sep 24 08:25:01 AM UTC 24 676287243 ps
T786 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_intr_smoke.1736834539 Sep 24 08:24:50 AM UTC 24 Sep 24 08:25:01 AM UTC 24 913298574 ps
T787 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_host_stretch_timeout.2166212712 Sep 24 08:24:43 AM UTC 24 Sep 24 08:25:01 AM UTC 24 3079535098 ps
T788 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_timeout.3448447194 Sep 24 08:24:52 AM UTC 24 Sep 24 08:25:01 AM UTC 24 3035347136 ps
T789 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_intr_stress_wr.1908960846 Sep 24 08:24:20 AM UTC 24 Sep 24 08:25:02 AM UTC 24 10572676041 ps
T790 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_alert_test.3340033524 Sep 24 08:25:31 AM UTC 24 Sep 24 08:25:33 AM UTC 24 17050920 ps
T115 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_watermark.4111023797 Sep 24 08:23:39 AM UTC 24 Sep 24 08:25:04 AM UTC 24 3931097212 ps
T791 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_full.2762953935 Sep 24 08:23:43 AM UTC 24 Sep 24 08:25:04 AM UTC 24 2440881962 ps
T792 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_hrst.3810770915 Sep 24 08:25:00 AM UTC 24 Sep 24 08:25:05 AM UTC 24 981911099 ps
T793 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_smoke.4185181371 Sep 24 08:24:44 AM UTC 24 Sep 24 08:25:05 AM UTC 24 1468652881 ps
T794 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_perf.677597727 Sep 24 08:24:58 AM UTC 24 Sep 24 08:25:05 AM UTC 24 677993518 ps
T795 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/10.i2c_target_stress_wr.371390931 Sep 24 08:19:03 AM UTC 24 Sep 24 08:25:06 AM UTC 24 38188720295 ps
T796 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_watermarks_tx.623054495 Sep 24 08:25:02 AM UTC 24 Sep 24 08:25:06 AM UTC 24 239199357 ps
T797 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_watermarks_acq.346682931 Sep 24 08:25:02 AM UTC 24 Sep 24 08:25:06 AM UTC 24 458874928 ps
T798 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_smbus_maxlen.434938857 Sep 24 08:25:02 AM UTC 24 Sep 24 08:25:08 AM UTC 24 2072129050 ps
T799 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_alert_test.4291109763 Sep 24 08:25:06 AM UTC 24 Sep 24 08:25:08 AM UTC 24 80011151 ps
T800 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_host_override.2252938336 Sep 24 08:25:06 AM UTC 24 Sep 24 08:25:08 AM UTC 24 62413648 ps
T801 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_bad_addr.1011876385 Sep 24 08:24:59 AM UTC 24 Sep 24 08:25:08 AM UTC 24 756012620 ps
T802 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_perf.3932408346 Sep 24 08:25:24 AM UTC 24 Sep 24 08:25:33 AM UTC 24 961088166 ps
T803 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_tx_stretch_ctrl.6843935 Sep 24 08:25:02 AM UTC 24 Sep 24 08:25:09 AM UTC 24 184858983 ps
T804 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_nack_acqfull.1212087759 Sep 24 08:25:03 AM UTC 24 Sep 24 08:25:09 AM UTC 24 1213285109 ps
T805 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_nack_txstretch.1848702516 Sep 24 08:25:06 AM UTC 24 Sep 24 08:25:09 AM UTC 24 300973599 ps
T806 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_host_may_nack.2050891385 Sep 24 08:25:02 AM UTC 24 Sep 24 08:25:09 AM UTC 24 298345520 ps
T807 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_fmt_empty.613360171 Sep 24 08:24:41 AM UTC 24 Sep 24 08:25:09 AM UTC 24 4822637655 ps
T808 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_reset_fmt.1852911328 Sep 24 08:25:07 AM UTC 24 Sep 24 08:25:09 AM UTC 24 122972067 ps
T809 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_stress_rd.159253620 Sep 24 08:24:46 AM UTC 24 Sep 24 08:25:10 AM UTC 24 22476563841 ps
T49 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_nack_acqfull_addr.15640356 Sep 24 08:25:06 AM UTC 24 Sep 24 08:25:11 AM UTC 24 476360324 ps
T810 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/17.i2c_target_stress_all.1531585249 Sep 24 08:22:53 AM UTC 24 Sep 24 08:25:17 AM UTC 24 60229503182 ps
T811 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_reset_rx.1691423589 Sep 24 08:25:08 AM UTC 24 Sep 24 08:25:18 AM UTC 24 189808453 ps
T812 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_overflow.3413798199 Sep 24 08:24:07 AM UTC 24 Sep 24 08:25:20 AM UTC 24 10155376417 ps
T813 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_host_smoke.943132640 Sep 24 08:24:06 AM UTC 24 Sep 24 08:25:21 AM UTC 24 1535309943 ps
T814 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_intr_smoke.1442122511 Sep 24 08:25:13 AM UTC 24 Sep 24 08:25:23 AM UTC 24 1936826704 ps
T815 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_reset_acq.3404703362 Sep 24 08:25:21 AM UTC 24 Sep 24 08:25:24 AM UTC 24 612331129 ps
T816 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_smoke.277039938 Sep 24 08:25:11 AM UTC 24 Sep 24 08:25:24 AM UTC 24 3200292166 ps
T817 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_host_stretch_timeout.1104119218 Sep 24 08:25:09 AM UTC 24 Sep 24 08:25:26 AM UTC 24 2955341731 ps
T818 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_timeout.1443773363 Sep 24 08:25:18 AM UTC 24 Sep 24 08:25:26 AM UTC 24 2810347154 ps
T819 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_host_smoke.3655791243 Sep 24 08:25:06 AM UTC 24 Sep 24 08:25:26 AM UTC 24 2321347547 ps
T820 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_fmt_empty.751487100 Sep 24 08:25:08 AM UTC 24 Sep 24 08:25:26 AM UTC 24 304411876 ps
T821 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_reset_tx.1190525292 Sep 24 08:25:24 AM UTC 24 Sep 24 08:25:27 AM UTC 24 174093887 ps
T822 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_tx_stretch_ctrl.1649704604 Sep 24 08:24:29 AM UTC 24 Sep 24 08:25:27 AM UTC 24 2332335891 ps
T823 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_stretch.3207199686 Sep 24 08:25:12 AM UTC 24 Sep 24 08:25:30 AM UTC 24 814005648 ps
T824 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_nack_txstretch.3681391701 Sep 24 08:25:31 AM UTC 24 Sep 24 08:25:35 AM UTC 24 734543638 ps
T825 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_smbus_maxlen.131492280 Sep 24 08:25:30 AM UTC 24 Sep 24 08:25:35 AM UTC 24 1056150676 ps
T826 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_nack_acqfull_addr.1292455755 Sep 24 08:25:31 AM UTC 24 Sep 24 08:25:35 AM UTC 24 748560870 ps
T827 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_stress_rd.3687004727 Sep 24 08:25:11 AM UTC 24 Sep 24 08:25:36 AM UTC 24 5445775306 ps
T828 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_stress_all.2098577919 Sep 24 08:24:58 AM UTC 24 Sep 24 08:27:03 AM UTC 24 48655677921 ps
T253 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_host_may_nack.125110679 Sep 24 08:25:27 AM UTC 24 Sep 24 08:25:36 AM UTC 24 1862752607 ps
T829 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_bad_addr.700974308 Sep 24 08:25:24 AM UTC 24 Sep 24 08:25:36 AM UTC 24 2558127159 ps
T830 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_nack_acqfull.2020257375 Sep 24 08:25:31 AM UTC 24 Sep 24 08:25:37 AM UTC 24 2436079401 ps
T831 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_reset_fmt.3021335796 Sep 24 08:25:35 AM UTC 24 Sep 24 08:25:38 AM UTC 24 480943071 ps
T832 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_full.3547868164 Sep 24 08:24:08 AM UTC 24 Sep 24 08:25:39 AM UTC 24 13223042399 ps
T833 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_host_smoke.2140144529 Sep 24 08:24:37 AM UTC 24 Sep 24 08:25:39 AM UTC 24 5902248974 ps
T834 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_host_perf_precise.1541704840 Sep 24 08:25:37 AM UTC 24 Sep 24 08:25:40 AM UTC 24 99850978 ps
T835 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_reset_rx.1530585947 Sep 24 08:25:36 AM UTC 24 Sep 24 08:25:43 AM UTC 24 469314688 ps
T836 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/6.i2c_target_stress_all.1002667437 Sep 24 08:17:11 AM UTC 24 Sep 24 08:25:45 AM UTC 24 34021589452 ps
T837 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_stress_rd.1896558190 Sep 24 08:25:40 AM UTC 24 Sep 24 08:25:48 AM UTC 24 681982558 ps
T838 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_fmt_empty.2317792381 Sep 24 08:25:36 AM UTC 24 Sep 24 08:25:49 AM UTC 24 387453245 ps
T839 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_acq.2444936160 Sep 24 08:25:50 AM UTC 24 Sep 24 08:25:52 AM UTC 24 183831750 ps
T85 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_tx.4115743858 Sep 24 08:25:50 AM UTC 24 Sep 24 08:25:53 AM UTC 24 205068349 ps
T840 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_intr_smoke.3221914008 Sep 24 08:25:41 AM UTC 24 Sep 24 08:25:54 AM UTC 24 1696386792 ps
T841 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_host_stretch_timeout.216878376 Sep 24 08:25:37 AM UTC 24 Sep 24 08:25:55 AM UTC 24 1112736579 ps
T842 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_smoke.1987304308 Sep 24 08:25:40 AM UTC 24 Sep 24 08:25:55 AM UTC 24 1523555235 ps
T843 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_timeout.668263255 Sep 24 08:25:43 AM UTC 24 Sep 24 08:25:57 AM UTC 24 1263857406 ps
T844 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_perf.1386873095 Sep 24 08:25:50 AM UTC 24 Sep 24 08:25:58 AM UTC 24 4980512802 ps
T845 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_host_mode_toggle.17951963 Sep 24 08:25:56 AM UTC 24 Sep 24 08:25:59 AM UTC 24 159484433 ps
T846 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_bad_addr.1991932526 Sep 24 08:25:54 AM UTC 24 Sep 24 08:26:00 AM UTC 24 3364815292 ps
T847 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_overflow.1048962348 Sep 24 08:24:38 AM UTC 24 Sep 24 08:26:00 AM UTC 24 2729292861 ps
T848 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_tx.2084077890 Sep 24 08:25:58 AM UTC 24 Sep 24 08:26:01 AM UTC 24 544723492 ps
T849 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_stretch.3557697531 Sep 24 08:25:41 AM UTC 24 Sep 24 08:26:02 AM UTC 24 4218561312 ps
T850 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_acq.2515921625 Sep 24 08:25:58 AM UTC 24 Sep 24 08:26:03 AM UTC 24 330096449 ps
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