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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
91.26 97.26 89.54 97.22 72.02 94.30 98.47 90.00


Total test records in report: 1829
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html | tests35.html | tests36.html | tests37.html | tests38.html

T851 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_host_smoke.1739761169 Sep 24 08:25:31 AM UTC 24 Sep 24 08:26:03 AM UTC 24 1237142691 ps
T852 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_smbus_maxlen.988680024 Sep 24 08:26:00 AM UTC 24 Sep 24 08:26:04 AM UTC 24 1647570063 ps
T853 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_alert_test.3526744288 Sep 24 08:26:04 AM UTC 24 Sep 24 08:26:05 AM UTC 24 156641973 ps
T854 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_full.2582232966 Sep 24 08:23:07 AM UTC 24 Sep 24 08:26:06 AM UTC 24 3276454835 ps
T855 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_nack_txstretch.4136305698 Sep 24 08:26:04 AM UTC 24 Sep 24 08:26:07 AM UTC 24 595482735 ps
T856 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_host_override.1697965834 Sep 24 08:26:05 AM UTC 24 Sep 24 08:26:07 AM UTC 24 48000867 ps
T857 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_tx_stretch_ctrl.2658825789 Sep 24 08:26:00 AM UTC 24 Sep 24 08:26:07 AM UTC 24 255469223 ps
T858 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull.640069760 Sep 24 08:26:01 AM UTC 24 Sep 24 08:26:07 AM UTC 24 1109531083 ps
T859 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull_addr.3761134885 Sep 24 08:26:02 AM UTC 24 Sep 24 08:26:08 AM UTC 24 886950708 ps
T860 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_fmt.747880202 Sep 24 08:26:08 AM UTC 24 Sep 24 08:26:10 AM UTC 24 428536418 ps
T861 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_host_may_nack.2921208232 Sep 24 08:25:56 AM UTC 24 Sep 24 08:26:12 AM UTC 24 3407852966 ps
T862 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_host_perf_precise.251823597 Sep 24 08:25:09 AM UTC 24 Sep 24 08:26:13 AM UTC 24 2672027536 ps
T863 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_rx.3872306917 Sep 24 08:26:08 AM UTC 24 Sep 24 08:26:14 AM UTC 24 855741163 ps
T864 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_host_perf_precise.1384173520 Sep 24 08:26:11 AM UTC 24 Sep 24 08:26:15 AM UTC 24 41159216 ps
T865 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_fmt_empty.1679100263 Sep 24 08:26:08 AM UTC 24 Sep 24 08:26:17 AM UTC 24 521994844 ps
T116 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_watermark.1052463638 Sep 24 08:24:07 AM UTC 24 Sep 24 08:26:18 AM UTC 24 26507783587 ps
T866 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_host_error_intr.697234872 Sep 24 08:26:14 AM UTC 24 Sep 24 08:26:18 AM UTC 24 678410278 ps
T867 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/7.i2c_host_stress_all.3983708155 Sep 24 08:17:28 AM UTC 24 Sep 24 08:26:25 AM UTC 24 85339938804 ps
T868 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_host_stretch_timeout.2567198731 Sep 24 08:26:13 AM UTC 24 Sep 24 08:26:27 AM UTC 24 581764550 ps
T86 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_target_smoke.3530031902 Sep 24 08:26:16 AM UTC 24 Sep 24 08:26:31 AM UTC 24 4020305476 ps
T299 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_stress_all.1565004362 Sep 24 08:25:53 AM UTC 24 Sep 24 08:26:31 AM UTC 24 6401130124 ps
T869 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_stretch.2119103897 Sep 24 08:24:47 AM UTC 24 Sep 24 08:26:34 AM UTC 24 5114312941 ps
T870 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/16.i2c_target_stress_all.1082010162 Sep 24 08:22:17 AM UTC 24 Sep 24 08:26:34 AM UTC 24 72842835554 ps
T871 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_target_intr_smoke.3171127988 Sep 24 08:26:26 AM UTC 24 Sep 24 08:26:36 AM UTC 24 1364742141 ps
T872 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_acq.2127692673 Sep 24 08:26:34 AM UTC 24 Sep 24 08:26:37 AM UTC 24 153183856 ps
T873 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_tx.1328674834 Sep 24 08:26:35 AM UTC 24 Sep 24 08:26:38 AM UTC 24 546979583 ps
T874 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_host_perf.54633260 Sep 24 08:25:37 AM UTC 24 Sep 24 08:26:40 AM UTC 24 6380355000 ps
T875 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_stress_wr.3232849168 Sep 24 08:25:11 AM UTC 24 Sep 24 08:26:40 AM UTC 24 70908792094 ps
T876 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_stress_wr.273080250 Sep 24 08:25:40 AM UTC 24 Sep 24 08:26:41 AM UTC 24 21091898898 ps
T877 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_target_perf.2584591630 Sep 24 08:26:35 AM UTC 24 Sep 24 08:26:41 AM UTC 24 1229591664 ps
T878 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_host_perf.2878614166 Sep 24 08:26:52 AM UTC 24 Sep 24 08:27:03 AM UTC 24 759633936 ps
T879 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_target_intr_stress_wr.992717887 Sep 24 08:26:28 AM UTC 24 Sep 24 08:26:44 AM UTC 24 5952451853 ps
T880 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_tx.132604473 Sep 24 08:26:42 AM UTC 24 Sep 24 08:26:44 AM UTC 24 106770677 ps
T881 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_acq.529472582 Sep 24 08:26:41 AM UTC 24 Sep 24 08:26:44 AM UTC 24 356046066 ps
T882 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_target_bad_addr.2404762560 Sep 24 08:26:37 AM UTC 24 Sep 24 08:26:45 AM UTC 24 12967454232 ps
T883 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_target_timeout.1100882127 Sep 24 08:26:32 AM UTC 24 Sep 24 08:26:46 AM UTC 24 5539918869 ps
T884 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_target_stress_rd.69303015 Sep 24 08:26:19 AM UTC 24 Sep 24 08:26:47 AM UTC 24 1379395810 ps
T885 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_alert_test.2131546286 Sep 24 08:26:45 AM UTC 24 Sep 24 08:26:47 AM UTC 24 16102887 ps
T281 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_host_smoke.789265513 Sep 24 08:26:05 AM UTC 24 Sep 24 08:26:48 AM UTC 24 3593323844 ps
T886 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_target_smbus_maxlen.4183765179 Sep 24 08:26:43 AM UTC 24 Sep 24 08:26:48 AM UTC 24 5957980714 ps
T887 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_host_override.3095243206 Sep 24 08:26:47 AM UTC 24 Sep 24 08:26:49 AM UTC 24 29271538 ps
T888 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull_addr.1819951195 Sep 24 08:26:45 AM UTC 24 Sep 24 08:26:51 AM UTC 24 1138805043 ps
T249 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_fmt.3066017238 Sep 24 08:26:48 AM UTC 24 Sep 24 08:26:51 AM UTC 24 1494044888 ps
T889 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull.551373174 Sep 24 08:26:45 AM UTC 24 Sep 24 08:26:51 AM UTC 24 1122128197 ps
T890 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_host_perf_precise.2043581777 Sep 24 08:26:52 AM UTC 24 Sep 24 08:26:56 AM UTC 24 575398947 ps
T891 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_watermark.3214887894 Sep 24 08:24:38 AM UTC 24 Sep 24 08:26:56 AM UTC 24 2653680306 ps
T892 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_host_error_intr.2435669186 Sep 24 08:26:53 AM UTC 24 Sep 24 08:26:57 AM UTC 24 710754247 ps
T893 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_rx.729352697 Sep 24 08:26:50 AM UTC 24 Sep 24 08:26:57 AM UTC 24 587882535 ps
T894 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_target_stretch.2108179212 Sep 24 08:26:19 AM UTC 24 Sep 24 08:26:59 AM UTC 24 1638550566 ps
T895 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_overflow.2632098821 Sep 24 08:25:34 AM UTC 24 Sep 24 08:26:59 AM UTC 24 4843784908 ps
T896 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_fmt_empty.1683569530 Sep 24 08:26:48 AM UTC 24 Sep 24 08:27:04 AM UTC 24 495272969 ps
T897 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_stress_wr.529813886 Sep 24 08:23:49 AM UTC 24 Sep 24 08:27:05 AM UTC 24 60578066774 ps
T117 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_watermark.2859740657 Sep 24 08:26:07 AM UTC 24 Sep 24 08:27:08 AM UTC 24 13220523895 ps
T898 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_acq.2866004038 Sep 24 08:27:06 AM UTC 24 Sep 24 08:27:09 AM UTC 24 242510679 ps
T899 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_host_may_nack.2721447701 Sep 24 08:26:41 AM UTC 24 Sep 24 08:27:09 AM UTC 24 2520855450 ps
T900 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_tx.3292522910 Sep 24 08:27:08 AM UTC 24 Sep 24 08:27:10 AM UTC 24 221942810 ps
T901 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_intr_smoke.466785349 Sep 24 08:27:00 AM UTC 24 Sep 24 08:27:10 AM UTC 24 1250216995 ps
T902 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_host_perf.2988669146 Sep 24 08:23:43 AM UTC 24 Sep 24 08:27:11 AM UTC 24 30800793982 ps
T903 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_smoke.2559511356 Sep 24 08:26:57 AM UTC 24 Sep 24 08:27:15 AM UTC 24 980350903 ps
T904 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_perf.3771587575 Sep 24 08:27:09 AM UTC 24 Sep 24 08:27:16 AM UTC 24 2250711805 ps
T905 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_timeout.3889012065 Sep 24 08:27:05 AM UTC 24 Sep 24 08:27:16 AM UTC 24 2300916223 ps
T906 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_acq.3484544481 Sep 24 08:27:12 AM UTC 24 Sep 24 08:27:17 AM UTC 24 361537431 ps
T907 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_tx.1213957274 Sep 24 08:27:15 AM UTC 24 Sep 24 08:27:18 AM UTC 24 135797190 ps
T908 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_intr_stress_wr.3464459823 Sep 24 08:27:04 AM UTC 24 Sep 24 08:27:18 AM UTC 24 13758594515 ps
T909 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_full.3103664010 Sep 24 08:25:37 AM UTC 24 Sep 24 08:27:20 AM UTC 24 12232175350 ps
T910 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_smbus_maxlen.1664720018 Sep 24 08:27:16 AM UTC 24 Sep 24 08:27:20 AM UTC 24 459938531 ps
T911 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_host_may_nack.971482540 Sep 24 08:27:11 AM UTC 24 Sep 24 08:27:20 AM UTC 24 368264970 ps
T912 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_host_perf.2005099279 Sep 24 08:26:09 AM UTC 24 Sep 24 08:27:20 AM UTC 24 52572000100 ps
T913 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_alert_test.1833588641 Sep 24 08:27:19 AM UTC 24 Sep 24 08:27:20 AM UTC 24 21589047 ps
T914 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull.4163550573 Sep 24 08:27:16 AM UTC 24 Sep 24 08:27:21 AM UTC 24 427704924 ps
T915 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_nack_txstretch.845436103 Sep 24 08:27:19 AM UTC 24 Sep 24 08:27:21 AM UTC 24 399282743 ps
T916 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull_addr.3133498082 Sep 24 08:27:17 AM UTC 24 Sep 24 08:27:22 AM UTC 24 2593297995 ps
T917 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_bad_addr.3753491007 Sep 24 08:27:10 AM UTC 24 Sep 24 08:27:23 AM UTC 24 9389388208 ps
T147 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_host_override.2612816101 Sep 24 08:27:21 AM UTC 24 Sep 24 08:27:23 AM UTC 24 28874355 ps
T918 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_host_stretch_timeout.2570576400 Sep 24 08:26:52 AM UTC 24 Sep 24 08:27:24 AM UTC 24 3004206352 ps
T118 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_host_stress_all.3470015842 Sep 24 08:25:39 AM UTC 24 Sep 24 08:27:24 AM UTC 24 10908828255 ps
T130 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_fmt.114473228 Sep 24 08:27:22 AM UTC 24 Sep 24 08:27:25 AM UTC 24 332440260 ps
T131 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_stress_rd.1029986913 Sep 24 08:26:58 AM UTC 24 Sep 24 08:27:26 AM UTC 24 5184652972 ps
T132 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_rx.909500066 Sep 24 08:27:22 AM UTC 24 Sep 24 08:27:26 AM UTC 24 110333648 ps
T133 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_tx_stretch_ctrl.39906209 Sep 24 08:27:16 AM UTC 24 Sep 24 08:27:28 AM UTC 24 626234758 ps
T134 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_host_perf_precise.2048997831 Sep 24 08:27:23 AM UTC 24 Sep 24 08:27:29 AM UTC 24 2139585248 ps
T135 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_host_error_intr.396336860 Sep 24 08:27:25 AM UTC 24 Sep 24 08:27:31 AM UTC 24 1153902910 ps
T136 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_full.3226689800 Sep 24 08:24:42 AM UTC 24 Sep 24 08:27:31 AM UTC 24 16077652668 ps
T137 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_overflow.1154711013 Sep 24 08:26:07 AM UTC 24 Sep 24 08:27:33 AM UTC 24 2604574958 ps
T138 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_watermark.3686904159 Sep 24 08:23:04 AM UTC 24 Sep 24 08:27:35 AM UTC 24 20108408727 ps
T919 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_fmt_empty.1780972395 Sep 24 08:27:22 AM UTC 24 Sep 24 08:27:35 AM UTC 24 886644287 ps
T920 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_overflow.3126270632 Sep 24 08:25:07 AM UTC 24 Sep 24 08:27:36 AM UTC 24 4459016332 ps
T921 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_target_stress_wr.4108469424 Sep 24 08:26:19 AM UTC 24 Sep 24 08:27:37 AM UTC 24 23341488024 ps
T922 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_acq.823053931 Sep 24 08:27:35 AM UTC 24 Sep 24 08:27:38 AM UTC 24 361258122 ps
T923 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_tx.2536828415 Sep 24 08:27:36 AM UTC 24 Sep 24 08:27:39 AM UTC 24 149511963 ps
T924 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_intr_smoke.4149418714 Sep 24 08:27:31 AM UTC 24 Sep 24 08:27:40 AM UTC 24 5960108215 ps
T925 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_target_intr_stress_wr.33020174 Sep 24 08:25:41 AM UTC 24 Sep 24 08:27:41 AM UTC 24 11838249788 ps
T926 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/18.i2c_target_stress_wr.3159850890 Sep 24 08:23:12 AM UTC 24 Sep 24 08:27:43 AM UTC 24 34596341626 ps
T927 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_perf.3843607641 Sep 24 08:27:36 AM UTC 24 Sep 24 08:27:43 AM UTC 24 6685916470 ps
T928 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_host_stretch_timeout.2908074655 Sep 24 08:27:25 AM UTC 24 Sep 24 08:27:43 AM UTC 24 1939451942 ps
T929 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_host_mode_toggle.3534427607 Sep 24 08:27:39 AM UTC 24 Sep 24 08:27:44 AM UTC 24 110831306 ps
T930 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_bad_addr.1566887115 Sep 24 08:27:38 AM UTC 24 Sep 24 08:27:45 AM UTC 24 714455114 ps
T119 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_watermark.4198837121 Sep 24 08:25:34 AM UTC 24 Sep 24 08:27:46 AM UTC 24 5554645808 ps
T931 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_tx.2485874958 Sep 24 08:27:44 AM UTC 24 Sep 24 08:27:46 AM UTC 24 115736123 ps
T932 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_stretch.1547699643 Sep 24 08:26:59 AM UTC 24 Sep 24 08:27:46 AM UTC 24 1194448542 ps
T933 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_timeout.433769234 Sep 24 08:27:32 AM UTC 24 Sep 24 08:27:47 AM UTC 24 4865070035 ps
T934 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_alert_test.1779839613 Sep 24 08:27:46 AM UTC 24 Sep 24 08:27:48 AM UTC 24 41488276 ps
T935 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_smbus_maxlen.3175103860 Sep 24 08:27:45 AM UTC 24 Sep 24 08:27:49 AM UTC 24 835181407 ps
T936 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_acq.2598882523 Sep 24 08:27:42 AM UTC 24 Sep 24 08:27:49 AM UTC 24 1321794319 ps
T937 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_host_override.2177662341 Sep 24 08:27:47 AM UTC 24 Sep 24 08:27:49 AM UTC 24 82312555 ps
T938 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_nack_txstretch.3740347407 Sep 24 08:27:46 AM UTC 24 Sep 24 08:27:49 AM UTC 24 644007777 ps
T939 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_stress_wr.1281211128 Sep 24 08:26:58 AM UTC 24 Sep 24 08:27:49 AM UTC 24 15009103744 ps
T55 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull.3467548602 Sep 24 08:27:45 AM UTC 24 Sep 24 08:27:50 AM UTC 24 555274575 ps
T940 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull_addr.3898470878 Sep 24 08:27:45 AM UTC 24 Sep 24 08:27:50 AM UTC 24 1911127168 ps
T941 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_fmt.866685885 Sep 24 08:27:49 AM UTC 24 Sep 24 08:27:53 AM UTC 24 168743432 ps
T942 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/19.i2c_target_stress_all.4148350288 Sep 24 08:23:59 AM UTC 24 Sep 24 08:27:54 AM UTC 24 24416483759 ps
T943 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_stress_all.2059648556 Sep 24 08:25:24 AM UTC 24 Sep 24 08:27:55 AM UTC 24 49819690361 ps
T944 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_tx_stretch_ctrl.3736741058 Sep 24 08:27:44 AM UTC 24 Sep 24 08:27:56 AM UTC 24 471889036 ps
T945 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_host_perf_precise.2633634507 Sep 24 08:27:51 AM UTC 24 Sep 24 08:27:57 AM UTC 24 197000636 ps
T946 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_host_perf.923594150 Sep 24 08:27:51 AM UTC 24 Sep 24 08:27:58 AM UTC 24 922366179 ps
T947 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_host_error_intr.3168304005 Sep 24 08:27:54 AM UTC 24 Sep 24 08:27:58 AM UTC 24 121723069 ps
T948 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_full.3226368929 Sep 24 08:25:09 AM UTC 24 Sep 24 08:27:58 AM UTC 24 59797383185 ps
T949 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_stress_rd.2620278540 Sep 24 08:27:29 AM UTC 24 Sep 24 08:27:58 AM UTC 24 1497550692 ps
T950 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_fmt_empty.3185987916 Sep 24 08:27:49 AM UTC 24 Sep 24 08:27:59 AM UTC 24 730823359 ps
T951 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_host_may_nack.816272109 Sep 24 08:27:41 AM UTC 24 Sep 24 08:28:01 AM UTC 24 743091947 ps
T952 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_intr_stress_wr.452889400 Sep 24 08:27:58 AM UTC 24 Sep 24 08:28:03 AM UTC 24 4212853231 ps
T953 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_rx.3238812028 Sep 24 08:27:51 AM UTC 24 Sep 24 08:28:04 AM UTC 24 209844096 ps
T954 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_acq.1584173586 Sep 24 08:28:02 AM UTC 24 Sep 24 08:28:05 AM UTC 24 594439150 ps
T955 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_intr_smoke.603859132 Sep 24 08:27:58 AM UTC 24 Sep 24 08:28:06 AM UTC 24 2625521141 ps
T956 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_tx.170704589 Sep 24 08:28:04 AM UTC 24 Sep 24 08:28:07 AM UTC 24 341069816 ps
T957 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_overflow.1268311015 Sep 24 08:26:48 AM UTC 24 Sep 24 08:28:07 AM UTC 24 9498936062 ps
T958 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_timeout.3818873515 Sep 24 08:27:59 AM UTC 24 Sep 24 08:28:08 AM UTC 24 1994566825 ps
T959 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_full.623164966 Sep 24 08:26:51 AM UTC 24 Sep 24 08:28:08 AM UTC 24 2632098934 ps
T960 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_smoke.2148415107 Sep 24 08:27:28 AM UTC 24 Sep 24 08:28:09 AM UTC 24 1132012334 ps
T961 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_hrst.2387939309 Sep 24 08:28:07 AM UTC 24 Sep 24 08:28:10 AM UTC 24 518782698 ps
T962 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_target_stress_wr.3882957612 Sep 24 08:24:13 AM UTC 24 Sep 24 08:28:11 AM UTC 24 41222195639 ps
T963 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_host_mode_toggle.3899793044 Sep 24 08:28:08 AM UTC 24 Sep 24 08:28:11 AM UTC 24 82236551 ps
T964 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_stress_wr.3523717445 Sep 24 08:27:57 AM UTC 24 Sep 24 08:28:11 AM UTC 24 22121137961 ps
T965 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_tx.3690271477 Sep 24 08:28:09 AM UTC 24 Sep 24 08:28:12 AM UTC 24 367840615 ps
T966 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_perf.801018172 Sep 24 08:28:05 AM UTC 24 Sep 24 08:28:12 AM UTC 24 5131056198 ps
T967 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_stress_rd.215855641 Sep 24 08:27:58 AM UTC 24 Sep 24 08:28:12 AM UTC 24 538576363 ps
T968 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_timeout.319491122 Sep 24 08:28:47 AM UTC 24 Sep 24 08:28:59 AM UTC 24 1295158651 ps
T969 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_tx_stretch_ctrl.4036227135 Sep 24 08:28:10 AM UTC 24 Sep 24 08:28:13 AM UTC 24 53418705 ps
T970 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_bad_addr.3538217417 Sep 24 08:28:06 AM UTC 24 Sep 24 08:28:14 AM UTC 24 2184043241 ps
T971 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_acq.3168360623 Sep 24 08:28:09 AM UTC 24 Sep 24 08:28:14 AM UTC 24 786223498 ps
T972 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_alert_test.2877850665 Sep 24 08:28:12 AM UTC 24 Sep 24 08:28:14 AM UTC 24 15370712 ps
T973 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_stress_all.549548857 Sep 24 08:27:36 AM UTC 24 Sep 24 08:28:14 AM UTC 24 26207281531 ps
T974 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_host_override.1266313985 Sep 24 08:28:13 AM UTC 24 Sep 24 08:28:15 AM UTC 24 30281372 ps
T975 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_nack_txstretch.3287509783 Sep 24 08:28:12 AM UTC 24 Sep 24 08:28:16 AM UTC 24 136760912 ps
T976 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_smbus_maxlen.310683691 Sep 24 08:28:11 AM UTC 24 Sep 24 08:28:16 AM UTC 24 1164832154 ps
T977 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull.2666287636 Sep 24 08:28:11 AM UTC 24 Sep 24 08:28:16 AM UTC 24 917682063 ps
T978 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_fmt.1400613067 Sep 24 08:28:15 AM UTC 24 Sep 24 08:28:17 AM UTC 24 656734519 ps
T979 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_host_may_nack.2140348223 Sep 24 08:28:08 AM UTC 24 Sep 24 08:28:17 AM UTC 24 436565511 ps
T980 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull_addr.1657018713 Sep 24 08:28:12 AM UTC 24 Sep 24 08:28:18 AM UTC 24 923596726 ps
T981 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_host_smoke.1401570503 Sep 24 08:27:21 AM UTC 24 Sep 24 08:28:19 AM UTC 24 4377339264 ps
T982 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_fmt_empty.716801659 Sep 24 08:28:15 AM UTC 24 Sep 24 08:28:19 AM UTC 24 705024149 ps
T983 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_host_perf_precise.1610435563 Sep 24 08:28:17 AM UTC 24 Sep 24 08:28:20 AM UTC 24 73001239 ps
T984 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_host_stretch_timeout.3614493941 Sep 24 08:27:52 AM UTC 24 Sep 24 08:28:21 AM UTC 24 4668390775 ps
T985 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_smoke.1277242833 Sep 24 08:27:56 AM UTC 24 Sep 24 08:28:22 AM UTC 24 1181751837 ps
T986 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_host_smoke.442737573 Sep 24 08:26:46 AM UTC 24 Sep 24 08:28:22 AM UTC 24 13571697216 ps
T987 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_host_perf.772055002 Sep 24 08:28:16 AM UTC 24 Sep 24 08:28:26 AM UTC 24 4270917664 ps
T988 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_tx.2061786857 Sep 24 08:28:23 AM UTC 24 Sep 24 08:28:26 AM UTC 24 163632583 ps
T989 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_acq.1828521441 Sep 24 08:28:23 AM UTC 24 Sep 24 08:28:27 AM UTC 24 251647764 ps
T990 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_stretch.1440366361 Sep 24 08:28:19 AM UTC 24 Sep 24 08:28:28 AM UTC 24 2631666440 ps
T991 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_intr_smoke.2776595260 Sep 24 08:28:21 AM UTC 24 Sep 24 08:28:29 AM UTC 24 892026587 ps
T992 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_target_stress_all.2875846401 Sep 24 08:27:09 AM UTC 24 Sep 24 08:28:30 AM UTC 24 63962984839 ps
T993 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_rx.526370644 Sep 24 08:28:15 AM UTC 24 Sep 24 08:28:31 AM UTC 24 484652773 ps
T994 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_hrst.754409246 Sep 24 08:28:26 AM UTC 24 Sep 24 08:28:32 AM UTC 24 386717289 ps
T995 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_timeout.3676182075 Sep 24 08:28:22 AM UTC 24 Sep 24 08:28:33 AM UTC 24 1124124695 ps
T996 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_host_mode_toggle.463548834 Sep 24 08:28:27 AM UTC 24 Sep 24 08:28:33 AM UTC 24 518752363 ps
T997 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_bad_addr.3029594502 Sep 24 08:28:26 AM UTC 24 Sep 24 08:28:34 AM UTC 24 1192129362 ps
T279 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_target_stress_all.895479587 Sep 24 08:26:36 AM UTC 24 Sep 24 08:28:34 AM UTC 24 98752765630 ps
T998 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_tx.2285559915 Sep 24 08:28:30 AM UTC 24 Sep 24 08:28:34 AM UTC 24 254555879 ps
T999 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_perf.1724855449 Sep 24 08:28:25 AM UTC 24 Sep 24 08:28:35 AM UTC 24 875255407 ps
T1000 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_smoke.3029582286 Sep 24 08:28:18 AM UTC 24 Sep 24 08:28:35 AM UTC 24 1763569906 ps
T1001 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_acq.2133462730 Sep 24 08:28:29 AM UTC 24 Sep 24 08:28:36 AM UTC 24 2532297282 ps
T1002 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_alert_test.3237511727 Sep 24 08:28:35 AM UTC 24 Sep 24 08:28:37 AM UTC 24 43646597 ps
T1003 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_host_may_nack.3907451531 Sep 24 08:28:28 AM UTC 24 Sep 24 08:28:37 AM UTC 24 1648882658 ps
T1004 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_nack_txstretch.1440064450 Sep 24 08:28:35 AM UTC 24 Sep 24 08:28:38 AM UTC 24 253802898 ps
T1005 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_tx_stretch_ctrl.3627059298 Sep 24 08:28:32 AM UTC 24 Sep 24 08:28:38 AM UTC 24 173941338 ps
T1006 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_host_override.1463220364 Sep 24 08:28:36 AM UTC 24 Sep 24 08:28:38 AM UTC 24 85167894 ps
T1007 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_smbus_maxlen.4217860271 Sep 24 08:28:34 AM UTC 24 Sep 24 08:28:38 AM UTC 24 366685183 ps
T1008 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_full.3675954250 Sep 24 08:27:22 AM UTC 24 Sep 24 08:28:40 AM UTC 24 11611543792 ps
T1009 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull.337829972 Sep 24 08:28:35 AM UTC 24 Sep 24 08:28:40 AM UTC 24 2019377667 ps
T1010 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_fmt.1247556208 Sep 24 08:28:38 AM UTC 24 Sep 24 08:28:41 AM UTC 24 74471182 ps
T1011 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull_addr.4010255975 Sep 24 08:28:35 AM UTC 24 Sep 24 08:28:41 AM UTC 24 1001503313 ps
T1012 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_full.3187976422 Sep 24 08:26:08 AM UTC 24 Sep 24 08:28:41 AM UTC 24 11546046848 ps
T1013 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_host_perf_precise.2323214987 Sep 24 08:28:40 AM UTC 24 Sep 24 08:28:43 AM UTC 24 103225056 ps
T1014 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_rx.1251513821 Sep 24 08:28:38 AM UTC 24 Sep 24 08:28:43 AM UTC 24 255096644 ps
T1015 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_host_stretch_timeout.3411643690 Sep 24 08:28:17 AM UTC 24 Sep 24 08:28:45 AM UTC 24 527468500 ps
T1016 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_host_error_intr.2076831157 Sep 24 08:28:42 AM UTC 24 Sep 24 08:28:45 AM UTC 24 244512340 ps
T1017 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_host_smoke.2270037405 Sep 24 08:28:13 AM UTC 24 Sep 24 08:28:46 AM UTC 24 6141549156 ps
T1018 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_fmt_empty.3416620694 Sep 24 08:28:38 AM UTC 24 Sep 24 08:28:46 AM UTC 24 1156448585 ps
T1019 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_host_smoke.3091740452 Sep 24 08:27:47 AM UTC 24 Sep 24 08:28:49 AM UTC 24 6286923469 ps
T1020 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_stress_wr.381266390 Sep 24 08:28:43 AM UTC 24 Sep 24 08:28:50 AM UTC 24 8598015318 ps
T1021 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_acq.862569950 Sep 24 08:28:49 AM UTC 24 Sep 24 08:28:52 AM UTC 24 268518995 ps
T1022 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_stress_rd.258686101 Sep 24 08:28:19 AM UTC 24 Sep 24 08:28:52 AM UTC 24 3462111234 ps
T1023 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_tx.2269617595 Sep 24 08:28:52 AM UTC 24 Sep 24 08:28:54 AM UTC 24 1814868773 ps
T1024 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_overflow.4252127840 Sep 24 08:27:22 AM UTC 24 Sep 24 08:28:55 AM UTC 24 5377472458 ps
T1025 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_intr_smoke.171313627 Sep 24 08:28:45 AM UTC 24 Sep 24 08:28:56 AM UTC 24 1745586330 ps
T1026 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_stress_rd.2961543000 Sep 24 08:28:44 AM UTC 24 Sep 24 08:28:57 AM UTC 24 452142083 ps
T1027 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_stretch.3882570434 Sep 24 08:28:44 AM UTC 24 Sep 24 08:28:58 AM UTC 24 2794942977 ps
T1028 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_hrst.3700032525 Sep 24 08:28:55 AM UTC 24 Sep 24 08:28:58 AM UTC 24 930138346 ps
T1029 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_perf.3904954075 Sep 24 08:28:52 AM UTC 24 Sep 24 08:28:58 AM UTC 24 479570555 ps
T1030 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_tx.1069219518 Sep 24 08:28:59 AM UTC 24 Sep 24 08:29:02 AM UTC 24 490768321 ps
T1031 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_host_may_nack.430471955 Sep 24 08:28:57 AM UTC 24 Sep 24 08:29:02 AM UTC 24 268399802 ps
T1032 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_host_smoke.3274659652 Sep 24 08:28:35 AM UTC 24 Sep 24 08:29:03 AM UTC 24 1328949760 ps
T1033 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_acq.742634852 Sep 24 08:28:57 AM UTC 24 Sep 24 08:29:03 AM UTC 24 638887165 ps
T1034 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_overflow.1432592465 Sep 24 08:28:14 AM UTC 24 Sep 24 08:29:03 AM UTC 24 1943470510 ps
T1035 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull.1753577084 Sep 24 08:28:59 AM UTC 24 Sep 24 08:29:04 AM UTC 24 939242838 ps
T1036 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_bad_addr.2551151118 Sep 24 08:28:54 AM UTC 24 Sep 24 08:29:04 AM UTC 24 3869664102 ps
T1037 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_smbus_maxlen.3657980385 Sep 24 08:28:59 AM UTC 24 Sep 24 08:29:04 AM UTC 24 1943864332 ps
T1038 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull_addr.957010707 Sep 24 08:28:59 AM UTC 24 Sep 24 08:29:05 AM UTC 24 676982114 ps
T1039 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_nack_txstretch.4225168886 Sep 24 08:29:02 AM UTC 24 Sep 24 08:29:05 AM UTC 24 128509703 ps
T1040 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_watermark.3882040124 Sep 24 08:27:21 AM UTC 24 Sep 24 08:29:05 AM UTC 24 17524401658 ps
T1041 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_alert_test.4134672835 Sep 24 08:29:04 AM UTC 24 Sep 24 08:29:05 AM UTC 24 41220178 ps
T1042 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_host_override.1764397730 Sep 24 08:29:04 AM UTC 24 Sep 24 08:29:06 AM UTC 24 44441678 ps
T1043 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_tx_stretch_ctrl.1914760390 Sep 24 08:28:59 AM UTC 24 Sep 24 08:29:06 AM UTC 24 153504679 ps
T1044 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_stress_all.2223878403 Sep 24 08:28:25 AM UTC 24 Sep 24 08:29:06 AM UTC 24 26319295661 ps
T1045 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_fmt.1945686078 Sep 24 08:29:05 AM UTC 24 Sep 24 08:29:07 AM UTC 24 166655880 ps
T1046 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_host_perf_precise.4091406310 Sep 24 08:29:06 AM UTC 24 Sep 24 08:29:10 AM UTC 24 41710236 ps
T1047 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_host_stretch_timeout.4241336738 Sep 24 08:28:41 AM UTC 24 Sep 24 08:29:11 AM UTC 24 1284379528 ps
T1048 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_fmt_empty.2452832814 Sep 24 08:29:05 AM UTC 24 Sep 24 08:29:12 AM UTC 24 312190872 ps
T120 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_watermark.116486274 Sep 24 08:27:47 AM UTC 24 Sep 24 08:29:12 AM UTC 24 4359187860 ps
T1049 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_intr_stress_wr.1140400480 Sep 24 08:27:32 AM UTC 24 Sep 24 08:29:14 AM UTC 24 9686771156 ps
T1050 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_rx.750763249 Sep 24 08:29:06 AM UTC 24 Sep 24 08:29:18 AM UTC 24 303645450 ps
T1051 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_host_perf.1905996873 Sep 24 08:29:06 AM UTC 24 Sep 24 08:29:21 AM UTC 24 3272555781 ps
T1052 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_full.2697404487 Sep 24 08:27:51 AM UTC 24 Sep 24 08:29:21 AM UTC 24 12710146785 ps
T1053 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_host_smoke.1388857057 Sep 24 08:29:04 AM UTC 24 Sep 24 08:29:22 AM UTC 24 9901682556 ps
T1054 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_stretch.1502782136 Sep 24 08:27:58 AM UTC 24 Sep 24 08:29:23 AM UTC 24 4246798229 ps
T1055 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_watermark.1653703275 Sep 24 08:25:07 AM UTC 24 Sep 24 08:29:23 AM UTC 24 4167708246 ps
T1056 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_smoke.2102615467 Sep 24 08:29:09 AM UTC 24 Sep 24 08:29:23 AM UTC 24 640259526 ps
T1057 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_acq.2112176947 Sep 24 08:29:21 AM UTC 24 Sep 24 08:29:23 AM UTC 24 194625586 ps
T1058 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_intr_smoke.1901866614 Sep 24 08:29:13 AM UTC 24 Sep 24 08:29:23 AM UTC 24 4824149055 ps
T1059 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_host_stretch_timeout.393905040 Sep 24 08:29:06 AM UTC 24 Sep 24 08:29:24 AM UTC 24 871683989 ps
T1060 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_stretch.2189555418 Sep 24 08:29:13 AM UTC 24 Sep 24 08:29:25 AM UTC 24 3427537757 ps
T302 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_tx.2801431873 Sep 24 08:29:22 AM UTC 24 Sep 24 08:29:26 AM UTC 24 1778032374 ps
T1061 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_tx.543116489 Sep 24 08:29:25 AM UTC 24 Sep 24 08:29:28 AM UTC 24 1664000156 ps
T1062 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_perf.1203292021 Sep 24 08:29:22 AM UTC 24 Sep 24 08:29:28 AM UTC 24 2117143154 ps
T1063 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_tx_stretch_ctrl.1886874003 Sep 24 08:29:25 AM UTC 24 Sep 24 08:29:28 AM UTC 24 55180341 ps
T1064 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_target_intr_stress_wr.3961069249 Sep 24 08:28:22 AM UTC 24 Sep 24 08:29:28 AM UTC 24 7120762760 ps
T1065 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_host_mode_toggle.4286504466 Sep 24 08:29:24 AM UTC 24 Sep 24 08:29:28 AM UTC 24 108478046 ps
T1066 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_timeout.3148161659 Sep 24 08:29:15 AM UTC 24 Sep 24 08:29:29 AM UTC 24 8932280229 ps
T1067 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_hrst.1038635272 Sep 24 08:29:24 AM UTC 24 Sep 24 08:29:29 AM UTC 24 1947669978 ps
T1068 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_bad_addr.1394720658 Sep 24 08:29:22 AM UTC 24 Sep 24 08:29:29 AM UTC 24 712875625 ps
T1069 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_acq.3971288587 Sep 24 08:29:25 AM UTC 24 Sep 24 08:29:30 AM UTC 24 572023257 ps
T1070 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_smbus_maxlen.1274837721 Sep 24 08:29:26 AM UTC 24 Sep 24 08:29:30 AM UTC 24 921665970 ps
T1071 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_host_override.2720778475 Sep 24 08:29:29 AM UTC 24 Sep 24 08:29:31 AM UTC 24 51893811 ps
T1072 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_alert_test.3866900348 Sep 24 08:29:29 AM UTC 24 Sep 24 08:29:31 AM UTC 24 20062277 ps
T1073 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull.1548736905 Sep 24 08:29:27 AM UTC 24 Sep 24 08:29:32 AM UTC 24 1990112606 ps
T1074 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_nack_txstretch.1969107028 Sep 24 08:29:29 AM UTC 24 Sep 24 08:29:33 AM UTC 24 533624428 ps
T1075 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull_addr.2756873285 Sep 24 08:29:28 AM UTC 24 Sep 24 08:29:33 AM UTC 24 2366755431 ps
T1076 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_fmt.493839918 Sep 24 08:29:31 AM UTC 24 Sep 24 08:29:34 AM UTC 24 314675783 ps
T87 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_smoke.2041812353 Sep 24 08:28:42 AM UTC 24 Sep 24 08:29:35 AM UTC 24 1325050802 ps
T1077 /workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_host_error_intr.2410907433 Sep 24 08:29:33 AM UTC 24 Sep 24 08:29:36 AM UTC 24 121288476 ps
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