| T1078 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_host_perf_precise.737843926 |
|
|
Sep 24 08:29:33 AM UTC 24 |
Sep 24 08:29:36 AM UTC 24 |
46856229 ps |
| T1079 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_stress_rd.2188043145 |
|
|
Sep 24 08:29:11 AM UTC 24 |
Sep 24 08:29:37 AM UTC 24 |
2310731783 ps |
| T36 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/2.i2c_host_perf.1661788194 |
|
|
Sep 24 08:15:10 AM UTC 24 |
Sep 24 08:29:37 AM UTC 24 |
18066190396 ps |
| T1080 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_host_may_nack.3894803876 |
|
|
Sep 24 08:29:24 AM UTC 24 |
Sep 24 08:29:43 AM UTC 24 |
991727616 ps |
| T1081 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_rx.2340662324 |
|
|
Sep 24 08:29:32 AM UTC 24 |
Sep 24 08:29:44 AM UTC 24 |
219491873 ps |
| T1082 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_intr_smoke.160075342 |
|
|
Sep 24 08:29:38 AM UTC 24 |
Sep 24 08:29:48 AM UTC 24 |
785687669 ps |
| T1083 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_intr_stress_wr.4222870647 |
|
|
Sep 24 08:28:46 AM UTC 24 |
Sep 24 08:29:50 AM UTC 24 |
15518714110 ps |
| T1084 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_stress_wr.3791548289 |
|
|
Sep 24 08:29:10 AM UTC 24 |
Sep 24 08:29:51 AM UTC 24 |
15248573911 ps |
| T1085 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_acq.1434217010 |
|
|
Sep 24 08:29:51 AM UTC 24 |
Sep 24 08:29:53 AM UTC 24 |
203187780 ps |
| T1086 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_tx.3731338537 |
|
|
Sep 24 08:29:52 AM UTC 24 |
Sep 24 08:29:54 AM UTC 24 |
386514266 ps |
| T1087 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/22.i2c_target_intr_stress_wr.2207123370 |
|
|
Sep 24 08:25:18 AM UTC 24 |
Sep 24 08:29:56 AM UTC 24 |
17335679257 ps |
| T1088 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_target_stress_all.1186575346 |
|
|
Sep 24 08:28:53 AM UTC 24 |
Sep 24 08:29:56 AM UTC 24 |
42618906390 ps |
| T1089 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_timeout.4097538447 |
|
|
Sep 24 08:29:46 AM UTC 24 |
Sep 24 08:29:57 AM UTC 24 |
1297229075 ps |
| T1090 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_fmt_empty.1334409325 |
|
|
Sep 24 08:29:31 AM UTC 24 |
Sep 24 08:29:57 AM UTC 24 |
411452040 ps |
| T1091 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_full.3694969655 |
|
|
Sep 24 08:28:38 AM UTC 24 |
Sep 24 08:29:59 AM UTC 24 |
10422899335 ps |
| T1092 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_host_mode_toggle.2609880677 |
|
|
Sep 24 08:29:57 AM UTC 24 |
Sep 24 08:30:00 AM UTC 24 |
382777768 ps |
| T1093 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_tx.340276235 |
|
|
Sep 24 08:29:59 AM UTC 24 |
Sep 24 08:30:03 AM UTC 24 |
156244933 ps |
| T1094 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_acq.4154387407 |
|
|
Sep 24 08:29:58 AM UTC 24 |
Sep 24 08:30:03 AM UTC 24 |
2237273889 ps |
| T1095 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_host_stretch_timeout.629203262 |
|
|
Sep 24 08:29:33 AM UTC 24 |
Sep 24 08:30:03 AM UTC 24 |
498303802 ps |
| T1096 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_perf.1523387787 |
|
|
Sep 24 08:29:53 AM UTC 24 |
Sep 24 08:30:04 AM UTC 24 |
5285790782 ps |
| T1097 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_smbus_maxlen.3572546907 |
|
|
Sep 24 08:30:01 AM UTC 24 |
Sep 24 08:30:04 AM UTC 24 |
440259798 ps |
| T1098 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_tx_stretch_ctrl.1607569321 |
|
|
Sep 24 08:30:01 AM UTC 24 |
Sep 24 08:30:05 AM UTC 24 |
143171739 ps |
| T1099 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_bad_addr.1750388502 |
|
|
Sep 24 08:29:55 AM UTC 24 |
Sep 24 08:30:05 AM UTC 24 |
4497164642 ps |
| T1100 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_watermark.2560270772 |
|
|
Sep 24 08:28:36 AM UTC 24 |
Sep 24 08:30:07 AM UTC 24 |
4174938499 ps |
| T1101 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_alert_test.691609377 |
|
|
Sep 24 08:30:05 AM UTC 24 |
Sep 24 08:30:07 AM UTC 24 |
25210183 ps |
| T1102 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_nack_txstretch.3802071132 |
|
|
Sep 24 08:30:04 AM UTC 24 |
Sep 24 08:30:07 AM UTC 24 |
126398184 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/20.i2c_host_stress_all.196099108 |
|
|
Sep 24 08:24:10 AM UTC 24 |
Sep 24 08:30:08 AM UTC 24 |
52964741129 ps |
| T1103 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_host_override.1361344130 |
|
|
Sep 24 08:30:06 AM UTC 24 |
Sep 24 08:30:08 AM UTC 24 |
43425076 ps |
| T1104 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull_addr.2258636497 |
|
|
Sep 24 08:30:04 AM UTC 24 |
Sep 24 08:30:09 AM UTC 24 |
446933552 ps |
| T1105 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull.117391911 |
|
|
Sep 24 08:30:04 AM UTC 24 |
Sep 24 08:30:10 AM UTC 24 |
1104763690 ps |
| T1106 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_fmt.4157897446 |
|
|
Sep 24 08:30:08 AM UTC 24 |
Sep 24 08:30:11 AM UTC 24 |
130533070 ps |
| T1107 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_smoke.67470850 |
|
|
Sep 24 08:29:36 AM UTC 24 |
Sep 24 08:30:13 AM UTC 24 |
1859620471 ps |
| T1108 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_host_perf.2829965043 |
|
|
Sep 24 08:30:10 AM UTC 24 |
Sep 24 08:30:14 AM UTC 24 |
215979911 ps |
| T1109 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_host_perf_precise.3343689306 |
|
|
Sep 24 08:30:11 AM UTC 24 |
Sep 24 08:30:14 AM UTC 24 |
68331966 ps |
| T1110 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_rx.3088669986 |
|
|
Sep 24 08:30:08 AM UTC 24 |
Sep 24 08:30:15 AM UTC 24 |
328322089 ps |
| T1111 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_overflow.2473479195 |
|
|
Sep 24 08:27:48 AM UTC 24 |
Sep 24 08:30:15 AM UTC 24 |
4752609017 ps |
| T1112 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_fmt_empty.3062168439 |
|
|
Sep 24 08:30:08 AM UTC 24 |
Sep 24 08:30:16 AM UTC 24 |
825279156 ps |
| T22 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_host_error_intr.3676234830 |
|
|
Sep 24 08:30:14 AM UTC 24 |
Sep 24 08:30:18 AM UTC 24 |
87088892 ps |
| T1113 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_host_may_nack.1786103537 |
|
|
Sep 24 08:29:58 AM UTC 24 |
Sep 24 08:30:18 AM UTC 24 |
774047164 ps |
| T1114 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_target_intr_stress_wr.2736739355 |
|
|
Sep 24 08:29:14 AM UTC 24 |
Sep 24 08:30:21 AM UTC 24 |
25202391599 ps |
| T1115 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_stress_all.3347562331 |
|
|
Sep 24 08:29:54 AM UTC 24 |
Sep 24 08:30:22 AM UTC 24 |
3198891199 ps |
| T1116 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_host_stretch_timeout.734369136 |
|
|
Sep 24 08:30:12 AM UTC 24 |
Sep 24 08:30:23 AM UTC 24 |
820567771 ps |
| T1117 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_watermark.927567866 |
|
|
Sep 24 08:28:14 AM UTC 24 |
Sep 24 08:30:23 AM UTC 24 |
38357924184 ps |
| T1118 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_target_intr_smoke.4243526977 |
|
|
Sep 24 08:30:19 AM UTC 24 |
Sep 24 08:30:26 AM UTC 24 |
1896937537 ps |
| T1119 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_tx.1575354065 |
|
|
Sep 24 08:30:24 AM UTC 24 |
Sep 24 08:30:26 AM UTC 24 |
178300304 ps |
| T1120 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_acq.4210496948 |
|
|
Sep 24 08:30:24 AM UTC 24 |
Sep 24 08:30:27 AM UTC 24 |
525280792 ps |
| T1121 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_target_stretch.556886386 |
|
|
Sep 24 08:30:16 AM UTC 24 |
Sep 24 08:30:27 AM UTC 24 |
2757504830 ps |
| T1122 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_target_perf.275703222 |
|
|
Sep 24 08:30:26 AM UTC 24 |
Sep 24 08:30:33 AM UTC 24 |
2491800983 ps |
| T1123 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_overflow.3473987978 |
|
|
Sep 24 08:29:31 AM UTC 24 |
Sep 24 08:30:34 AM UTC 24 |
24935809620 ps |
| T1124 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_target_bad_addr.3770073128 |
|
|
Sep 24 08:30:27 AM UTC 24 |
Sep 24 08:30:34 AM UTC 24 |
758099363 ps |
| T1125 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_target_timeout.1511899055 |
|
|
Sep 24 08:30:21 AM UTC 24 |
Sep 24 08:30:34 AM UTC 24 |
7007908346 ps |
| T1126 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_target_stress_rd.3083212299 |
|
|
Sep 24 08:30:16 AM UTC 24 |
Sep 24 08:30:35 AM UTC 24 |
1994341475 ps |
| T1127 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_acq.3375342390 |
|
|
Sep 24 08:30:32 AM UTC 24 |
Sep 24 08:30:37 AM UTC 24 |
489814699 ps |
| T1128 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_tx.1029953026 |
|
|
Sep 24 08:30:34 AM UTC 24 |
Sep 24 08:30:37 AM UTC 24 |
110316016 ps |
| T1129 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_overflow.3618581179 |
|
|
Sep 24 08:28:37 AM UTC 24 |
Sep 24 08:30:37 AM UTC 24 |
4022486291 ps |
| T1130 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_stress_rd.902389164 |
|
|
Sep 24 08:29:37 AM UTC 24 |
Sep 24 08:30:37 AM UTC 24 |
2260030471 ps |
| T1131 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_host_smoke.2241716076 |
|
|
Sep 24 08:30:05 AM UTC 24 |
Sep 24 08:31:20 AM UTC 24 |
4550306827 ps |
| T1132 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_watermark.319640361 |
|
|
Sep 24 08:26:48 AM UTC 24 |
Sep 24 08:30:39 AM UTC 24 |
4211981922 ps |
| T1133 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_alert_test.3585625330 |
|
|
Sep 24 08:30:38 AM UTC 24 |
Sep 24 08:30:40 AM UTC 24 |
19191258 ps |
| T1134 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_target_tx_stretch_ctrl.2073589681 |
|
|
Sep 24 08:30:34 AM UTC 24 |
Sep 24 08:30:40 AM UTC 24 |
159699431 ps |
| T1135 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_intr_stress_wr.2466521440 |
|
|
Sep 24 08:29:45 AM UTC 24 |
Sep 24 08:30:41 AM UTC 24 |
10961703172 ps |
| T1136 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull.2960143175 |
|
|
Sep 24 08:30:35 AM UTC 24 |
Sep 24 08:30:41 AM UTC 24 |
445799462 ps |
| T1137 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_host_override.3655809847 |
|
|
Sep 24 08:30:39 AM UTC 24 |
Sep 24 08:30:41 AM UTC 24 |
47505209 ps |
| T1138 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_host_perf.2353621527 |
|
|
Sep 24 08:29:32 AM UTC 24 |
Sep 24 08:30:41 AM UTC 24 |
5864053890 ps |
| T1139 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull_addr.1646516899 |
|
|
Sep 24 08:30:35 AM UTC 24 |
Sep 24 08:30:41 AM UTC 24 |
493385632 ps |
| T1140 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_host_perf_precise.2780316526 |
|
|
Sep 24 08:31:10 AM UTC 24 |
Sep 24 08:31:16 AM UTC 24 |
369384438 ps |
| T1141 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_stress_wr.2981603973 |
|
|
Sep 24 08:30:45 AM UTC 24 |
Sep 24 08:31:19 AM UTC 24 |
32854743991 ps |
| T1142 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_target_smbus_maxlen.2180337034 |
|
|
Sep 24 08:30:35 AM UTC 24 |
Sep 24 08:30:42 AM UTC 24 |
587537445 ps |
| T1143 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_fmt.3885603606 |
|
|
Sep 24 08:30:41 AM UTC 24 |
Sep 24 08:30:43 AM UTC 24 |
608786814 ps |
| T1144 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_host_perf_precise.3714323328 |
|
|
Sep 24 08:30:42 AM UTC 24 |
Sep 24 08:30:46 AM UTC 24 |
85889943 ps |
| T1145 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_host_error_intr.3661649012 |
|
|
Sep 24 08:30:42 AM UTC 24 |
Sep 24 08:30:47 AM UTC 24 |
531218484 ps |
| T1146 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_host_smoke.943289058 |
|
|
Sep 24 08:29:29 AM UTC 24 |
Sep 24 08:30:49 AM UTC 24 |
1690108361 ps |
| T1147 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_rx.3323534277 |
|
|
Sep 24 08:30:42 AM UTC 24 |
Sep 24 08:30:49 AM UTC 24 |
155220359 ps |
| T1148 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_target_stretch.1146576016 |
|
|
Sep 24 08:29:37 AM UTC 24 |
Sep 24 08:30:50 AM UTC 24 |
4084025635 ps |
| T1149 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_target_smoke.2543357408 |
|
|
Sep 24 08:30:15 AM UTC 24 |
Sep 24 08:30:50 AM UTC 24 |
5458349974 ps |
| T1150 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_stress_rd.3900951230 |
|
|
Sep 24 08:30:47 AM UTC 24 |
Sep 24 08:31:23 AM UTC 24 |
2800427897 ps |
| T1151 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_fmt_empty.2710022415 |
|
|
Sep 24 08:30:41 AM UTC 24 |
Sep 24 08:30:54 AM UTC 24 |
2342082391 ps |
| T1152 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_intr_smoke.438092626 |
|
|
Sep 24 08:30:48 AM UTC 24 |
Sep 24 08:30:54 AM UTC 24 |
1211267799 ps |
| T1153 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_acq.1672655765 |
|
|
Sep 24 08:30:51 AM UTC 24 |
Sep 24 08:30:55 AM UTC 24 |
177298691 ps |
| T1154 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_smoke.4227326835 |
|
|
Sep 24 08:30:44 AM UTC 24 |
Sep 24 08:30:56 AM UTC 24 |
2693565511 ps |
| T1155 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_stretch.3480608438 |
|
|
Sep 24 08:30:48 AM UTC 24 |
Sep 24 08:30:56 AM UTC 24 |
1972006666 ps |
| T1156 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_tx.3177478515 |
|
|
Sep 24 08:30:55 AM UTC 24 |
Sep 24 08:30:59 AM UTC 24 |
1120153728 ps |
| T1157 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_target_stress_all.2593924690 |
|
|
Sep 24 08:30:27 AM UTC 24 |
Sep 24 08:30:59 AM UTC 24 |
4493834438 ps |
| T1158 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_intr_stress_wr.1672914439 |
|
|
Sep 24 08:30:50 AM UTC 24 |
Sep 24 08:30:59 AM UTC 24 |
9688223772 ps |
| T1159 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_tx.142614620 |
|
|
Sep 24 08:31:00 AM UTC 24 |
Sep 24 08:31:02 AM UTC 24 |
57362452 ps |
| T1160 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_perf.566956081 |
|
|
Sep 24 08:30:55 AM UTC 24 |
Sep 24 08:31:03 AM UTC 24 |
2483072674 ps |
| T1161 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_host_may_nack.763181301 |
|
|
Sep 24 08:30:30 AM UTC 24 |
Sep 24 08:31:04 AM UTC 24 |
2358123259 ps |
| T1162 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_acq.324417030 |
|
|
Sep 24 08:31:00 AM UTC 24 |
Sep 24 08:31:04 AM UTC 24 |
1618530246 ps |
| T1163 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_timeout.1390997814 |
|
|
Sep 24 08:30:50 AM UTC 24 |
Sep 24 08:31:05 AM UTC 24 |
14979693798 ps |
| T1164 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_bad_addr.1998784965 |
|
|
Sep 24 08:30:56 AM UTC 24 |
Sep 24 08:31:05 AM UTC 24 |
1141521581 ps |
| T1165 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_overflow.1871901985 |
|
|
Sep 24 08:30:07 AM UTC 24 |
Sep 24 08:31:06 AM UTC 24 |
6864532683 ps |
| T1166 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_host_smoke.3599008660 |
|
|
Sep 24 08:30:39 AM UTC 24 |
Sep 24 08:31:06 AM UTC 24 |
2849986005 ps |
| T1167 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_tx_stretch_ctrl.3691548804 |
|
|
Sep 24 08:31:01 AM UTC 24 |
Sep 24 08:31:06 AM UTC 24 |
133182578 ps |
| T1168 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_target_intr_stress_wr.139893916 |
|
|
Sep 24 08:30:19 AM UTC 24 |
Sep 24 08:31:07 AM UTC 24 |
25324912358 ps |
| T1169 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_smbus_maxlen.3114009975 |
|
|
Sep 24 08:31:03 AM UTC 24 |
Sep 24 08:31:08 AM UTC 24 |
432641538 ps |
| T1170 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_alert_test.2036165750 |
|
|
Sep 24 08:31:06 AM UTC 24 |
Sep 24 08:31:08 AM UTC 24 |
14987893 ps |
| T1171 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_host_stretch_timeout.3744871625 |
|
|
Sep 24 08:30:42 AM UTC 24 |
Sep 24 08:31:20 AM UTC 24 |
788874674 ps |
| T1172 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull_addr.4209858700 |
|
|
Sep 24 08:31:04 AM UTC 24 |
Sep 24 08:31:09 AM UTC 24 |
2749851622 ps |
| T1173 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull.1729054682 |
|
|
Sep 24 08:31:04 AM UTC 24 |
Sep 24 08:31:09 AM UTC 24 |
520504624 ps |
| T1174 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_host_override.66617936 |
|
|
Sep 24 08:31:07 AM UTC 24 |
Sep 24 08:31:10 AM UTC 24 |
85240517 ps |
| T1175 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_fmt.98434203 |
|
|
Sep 24 08:31:09 AM UTC 24 |
Sep 24 08:31:11 AM UTC 24 |
537200699 ps |
| T1176 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_fmt_empty.3760398721 |
|
|
Sep 24 08:31:09 AM UTC 24 |
Sep 24 08:31:15 AM UTC 24 |
845666877 ps |
| T1177 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_host_may_nack.1063553558 |
|
|
Sep 24 08:31:00 AM UTC 24 |
Sep 24 08:31:16 AM UTC 24 |
1190106702 ps |
| T1178 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_host_error_intr.2425373828 |
|
|
Sep 24 08:31:12 AM UTC 24 |
Sep 24 08:31:18 AM UTC 24 |
262261801 ps |
| T1179 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_host_stretch_timeout.3681996629 |
|
|
Sep 24 08:31:11 AM UTC 24 |
Sep 24 08:31:23 AM UTC 24 |
531519750 ps |
| T1180 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_full.365511075 |
|
|
Sep 24 08:30:10 AM UTC 24 |
Sep 24 08:31:24 AM UTC 24 |
4927265870 ps |
| T1181 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_rx.573123667 |
|
|
Sep 24 08:31:09 AM UTC 24 |
Sep 24 08:31:26 AM UTC 24 |
226652074 ps |
| T1182 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/13.i2c_target_stress_all.2621272528 |
|
|
Sep 24 08:20:36 AM UTC 24 |
Sep 24 08:31:27 AM UTC 24 |
54542423483 ps |
| T1183 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_stress_rd.3125848137 |
|
|
Sep 24 08:31:19 AM UTC 24 |
Sep 24 08:31:27 AM UTC 24 |
1289399436 ps |
| T1184 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_acq.3982558689 |
|
|
Sep 24 08:31:25 AM UTC 24 |
Sep 24 08:31:28 AM UTC 24 |
556989006 ps |
| T1185 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/21.i2c_target_stress_wr.749442600 |
|
|
Sep 24 08:24:44 AM UTC 24 |
Sep 24 08:31:29 AM UTC 24 |
57551152337 ps |
| T1186 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_intr_smoke.1689012706 |
|
|
Sep 24 08:31:20 AM UTC 24 |
Sep 24 08:31:30 AM UTC 24 |
3256011453 ps |
| T1187 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_tx.4084216441 |
|
|
Sep 24 08:31:27 AM UTC 24 |
Sep 24 08:31:30 AM UTC 24 |
242947851 ps |
| T1188 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_full.3581852852 |
|
|
Sep 24 08:29:06 AM UTC 24 |
Sep 24 08:31:32 AM UTC 24 |
9791071004 ps |
| T1189 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/12.i2c_target_stress_wr.3437505017 |
|
|
Sep 24 08:19:59 AM UTC 24 |
Sep 24 08:31:33 AM UTC 24 |
50027054951 ps |
| T1190 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_timeout.873573120 |
|
|
Sep 24 08:31:24 AM UTC 24 |
Sep 24 08:31:35 AM UTC 24 |
4292145684 ps |
| T1191 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_hrst.1138037513 |
|
|
Sep 24 08:31:29 AM UTC 24 |
Sep 24 08:31:35 AM UTC 24 |
899058068 ps |
| T271 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_host_mode_toggle.4079154071 |
|
|
Sep 24 08:31:30 AM UTC 24 |
Sep 24 08:31:35 AM UTC 24 |
291423614 ps |
| T1192 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_bad_addr.430697196 |
|
|
Sep 24 08:31:28 AM UTC 24 |
Sep 24 08:31:36 AM UTC 24 |
3156859763 ps |
| T1193 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_tx.896785562 |
|
|
Sep 24 08:31:32 AM UTC 24 |
Sep 24 08:31:36 AM UTC 24 |
129454239 ps |
| T1194 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_perf.2544301319 |
|
|
Sep 24 08:31:28 AM UTC 24 |
Sep 24 08:31:36 AM UTC 24 |
2408946095 ps |
| T1195 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_acq.4226901654 |
|
|
Sep 24 08:31:31 AM UTC 24 |
Sep 24 08:31:36 AM UTC 24 |
4629003756 ps |
| T1196 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_smoke.4020119105 |
|
|
Sep 24 08:31:17 AM UTC 24 |
Sep 24 08:31:37 AM UTC 24 |
4385516025 ps |
| T1197 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_watermark.3449162079 |
|
|
Sep 24 08:29:05 AM UTC 24 |
Sep 24 08:31:38 AM UTC 24 |
5496706754 ps |
| T1198 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_alert_test.220586674 |
|
|
Sep 24 08:31:37 AM UTC 24 |
Sep 24 08:31:39 AM UTC 24 |
19486719 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_host_override.724963550 |
|
|
Sep 24 08:31:37 AM UTC 24 |
Sep 24 08:31:39 AM UTC 24 |
19984297 ps |
| T1199 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_nack_txstretch.2160202388 |
|
|
Sep 24 08:31:36 AM UTC 24 |
Sep 24 08:31:39 AM UTC 24 |
141222192 ps |
| T1200 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_smbus_maxlen.1856858807 |
|
|
Sep 24 08:31:35 AM UTC 24 |
Sep 24 08:31:39 AM UTC 24 |
527036460 ps |
| T1201 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull_addr.3635935767 |
|
|
Sep 24 08:31:36 AM UTC 24 |
Sep 24 08:31:41 AM UTC 24 |
376652696 ps |
| T1202 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_fmt.3491477508 |
|
|
Sep 24 08:31:38 AM UTC 24 |
Sep 24 08:31:41 AM UTC 24 |
745410442 ps |
| T1203 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_tx_stretch_ctrl.1541146040 |
|
|
Sep 24 08:31:35 AM UTC 24 |
Sep 24 08:31:41 AM UTC 24 |
171484061 ps |
| T1204 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull.1808596669 |
|
|
Sep 24 08:31:36 AM UTC 24 |
Sep 24 08:31:41 AM UTC 24 |
1132060913 ps |
| T1205 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_host_smoke.3565801120 |
|
|
Sep 24 08:31:06 AM UTC 24 |
Sep 24 08:31:42 AM UTC 24 |
8308964378 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_host_may_nack.3603894878 |
|
|
Sep 24 08:31:31 AM UTC 24 |
Sep 24 08:31:43 AM UTC 24 |
563714381 ps |
| T1206 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_host_error_intr.3821555886 |
|
|
Sep 24 08:31:42 AM UTC 24 |
Sep 24 08:31:45 AM UTC 24 |
1509505479 ps |
| T1207 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_full.2062503086 |
|
|
Sep 24 08:28:16 AM UTC 24 |
Sep 24 08:31:46 AM UTC 24 |
13179910838 ps |
| T1208 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_fmt_empty.3669215485 |
|
|
Sep 24 08:31:38 AM UTC 24 |
Sep 24 08:31:47 AM UTC 24 |
3050095630 ps |
| T1209 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_stretch.110277632 |
|
|
Sep 24 08:31:44 AM UTC 24 |
Sep 24 08:31:49 AM UTC 24 |
248135902 ps |
| T1210 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_overflow.635048616 |
|
|
Sep 24 08:31:08 AM UTC 24 |
Sep 24 08:31:50 AM UTC 24 |
7005327968 ps |
| T1211 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_overflow.3217263136 |
|
|
Sep 24 08:29:05 AM UTC 24 |
Sep 24 08:31:51 AM UTC 24 |
5165543488 ps |
| T1212 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_rx.564087582 |
|
|
Sep 24 08:31:39 AM UTC 24 |
Sep 24 08:31:51 AM UTC 24 |
167368452 ps |
| T1213 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_acq.3713665369 |
|
|
Sep 24 08:31:50 AM UTC 24 |
Sep 24 08:31:53 AM UTC 24 |
665948226 ps |
| T1214 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_tx.487653167 |
|
|
Sep 24 08:31:52 AM UTC 24 |
Sep 24 08:31:55 AM UTC 24 |
240727809 ps |
| T1215 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_intr_smoke.2261973979 |
|
|
Sep 24 08:31:46 AM UTC 24 |
Sep 24 08:31:55 AM UTC 24 |
3358220278 ps |
| T1216 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_host_stretch_timeout.845514670 |
|
|
Sep 24 08:31:42 AM UTC 24 |
Sep 24 08:31:57 AM UTC 24 |
1506650886 ps |
| T1217 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_timeout.3672596097 |
|
|
Sep 24 08:31:48 AM UTC 24 |
Sep 24 08:31:59 AM UTC 24 |
6168302223 ps |
| T1218 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_stress_wr.3982266841 |
|
|
Sep 24 08:31:43 AM UTC 24 |
Sep 24 08:32:01 AM UTC 24 |
6549453403 ps |
| T1219 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_host_may_nack.3918713025 |
|
|
Sep 24 08:31:58 AM UTC 24 |
Sep 24 08:32:02 AM UTC 24 |
115430770 ps |
| T1220 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_perf.3829873587 |
|
|
Sep 24 08:31:53 AM UTC 24 |
Sep 24 08:32:02 AM UTC 24 |
695343629 ps |
| T1221 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_tx.3137828289 |
|
|
Sep 24 08:32:00 AM UTC 24 |
Sep 24 08:32:03 AM UTC 24 |
101238080 ps |
| T1222 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_acq.3265400414 |
|
|
Sep 24 08:31:59 AM UTC 24 |
Sep 24 08:32:03 AM UTC 24 |
517685389 ps |
| T1223 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_stress_rd.457411470 |
|
|
Sep 24 08:31:43 AM UTC 24 |
Sep 24 08:32:03 AM UTC 24 |
3357209075 ps |
| T1224 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_stretch.3360554181 |
|
|
Sep 24 08:31:19 AM UTC 24 |
Sep 24 08:32:04 AM UTC 24 |
3333399320 ps |
| T1225 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_bad_addr.2290637898 |
|
|
Sep 24 08:31:55 AM UTC 24 |
Sep 24 08:32:05 AM UTC 24 |
4645069963 ps |
| T1226 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_alert_test.420348492 |
|
|
Sep 24 08:32:05 AM UTC 24 |
Sep 24 08:32:07 AM UTC 24 |
25804343 ps |
| T1227 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_smbus_maxlen.417221750 |
|
|
Sep 24 08:32:02 AM UTC 24 |
Sep 24 08:32:08 AM UTC 24 |
424246465 ps |
| T1228 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_host_override.603978025 |
|
|
Sep 24 08:32:06 AM UTC 24 |
Sep 24 08:32:08 AM UTC 24 |
63750466 ps |
| T1229 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_nack_txstretch.4084190458 |
|
|
Sep 24 08:32:04 AM UTC 24 |
Sep 24 08:32:08 AM UTC 24 |
679765869 ps |
| T1230 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull_addr.3293415740 |
|
|
Sep 24 08:32:04 AM UTC 24 |
Sep 24 08:32:10 AM UTC 24 |
1979266701 ps |
| T1231 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull.59856646 |
|
|
Sep 24 08:32:03 AM UTC 24 |
Sep 24 08:32:10 AM UTC 24 |
2639826722 ps |
| T1232 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_fmt.721375362 |
|
|
Sep 24 08:32:09 AM UTC 24 |
Sep 24 08:32:12 AM UTC 24 |
197784433 ps |
| T1233 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_host_smoke.2961625543 |
|
|
Sep 24 08:31:37 AM UTC 24 |
Sep 24 08:32:12 AM UTC 24 |
7276895073 ps |
| T1234 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_tx_stretch_ctrl.755341805 |
|
|
Sep 24 08:32:02 AM UTC 24 |
Sep 24 08:32:14 AM UTC 24 |
513899235 ps |
| T1235 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_stress_wr.3322968338 |
|
|
Sep 24 08:31:17 AM UTC 24 |
Sep 24 08:32:14 AM UTC 24 |
29045015328 ps |
| T1236 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_smoke.3102022752 |
|
|
Sep 24 08:31:42 AM UTC 24 |
Sep 24 08:32:19 AM UTC 24 |
4619726777 ps |
| T1237 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_rx.2582804552 |
|
|
Sep 24 08:32:11 AM UTC 24 |
Sep 24 08:32:20 AM UTC 24 |
164482908 ps |
| T1238 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_overflow.3358874165 |
|
|
Sep 24 08:30:40 AM UTC 24 |
Sep 24 08:32:21 AM UTC 24 |
34626178520 ps |
| T1239 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_host_smoke.434055066 |
|
|
Sep 24 08:32:05 AM UTC 24 |
Sep 24 08:32:23 AM UTC 24 |
2154991224 ps |
| T1240 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_overflow.924034657 |
|
|
Sep 24 08:31:38 AM UTC 24 |
Sep 24 08:32:25 AM UTC 24 |
1617454579 ps |
| T1241 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_full.3782035621 |
|
|
Sep 24 08:31:10 AM UTC 24 |
Sep 24 08:32:26 AM UTC 24 |
3723686249 ps |
| T1242 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_full.2933260117 |
|
|
Sep 24 08:31:39 AM UTC 24 |
Sep 24 08:32:29 AM UTC 24 |
18835129534 ps |
| T1243 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_host_perf_precise.4057734440 |
|
|
Sep 24 08:32:13 AM UTC 24 |
Sep 24 08:32:32 AM UTC 24 |
337466777 ps |
| T1244 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_fmt_empty.1133975914 |
|
|
Sep 24 08:32:09 AM UTC 24 |
Sep 24 08:32:32 AM UTC 24 |
1481192496 ps |
| T1245 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_stress_all.1588453140 |
|
|
Sep 24 08:31:28 AM UTC 24 |
Sep 24 08:32:33 AM UTC 24 |
16708540310 ps |
| T1246 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_target_stress_rd.2471791280 |
|
|
Sep 24 08:32:22 AM UTC 24 |
Sep 24 08:32:34 AM UTC 24 |
2316783465 ps |
| T1247 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_tx.256327230 |
|
|
Sep 24 08:32:33 AM UTC 24 |
Sep 24 08:32:36 AM UTC 24 |
287729358 ps |
| T1248 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_acq.1798407272 |
|
|
Sep 24 08:32:32 AM UTC 24 |
Sep 24 08:32:35 AM UTC 24 |
363509636 ps |
| T1249 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_target_intr_smoke.4013670770 |
|
|
Sep 24 08:32:24 AM UTC 24 |
Sep 24 08:32:35 AM UTC 24 |
1225635128 ps |
| T1250 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_target_timeout.817763340 |
|
|
Sep 24 08:32:27 AM UTC 24 |
Sep 24 08:32:39 AM UTC 24 |
4492163508 ps |
| T1251 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_watermark.1258690246 |
|
|
Sep 24 08:30:06 AM UTC 24 |
Sep 24 08:32:41 AM UTC 24 |
21523962805 ps |
| T1252 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_target_perf.3649722951 |
|
|
Sep 24 08:32:34 AM UTC 24 |
Sep 24 08:32:43 AM UTC 24 |
1637200588 ps |
| T1253 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_tx.553079335 |
|
|
Sep 24 08:32:40 AM UTC 24 |
Sep 24 08:32:43 AM UTC 24 |
380288140 ps |
| T1254 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_host_may_nack.3066620091 |
|
|
Sep 24 08:32:37 AM UTC 24 |
Sep 24 08:32:44 AM UTC 24 |
202520114 ps |
| T1255 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_target_bad_addr.2557355374 |
|
|
Sep 24 08:32:35 AM UTC 24 |
Sep 24 08:32:44 AM UTC 24 |
879047037 ps |
| T1256 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_acq.1536007879 |
|
|
Sep 24 08:32:37 AM UTC 24 |
Sep 24 08:32:44 AM UTC 24 |
2358659776 ps |
| T1257 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_target_tx_stretch_ctrl.1979835500 |
|
|
Sep 24 08:32:42 AM UTC 24 |
Sep 24 08:32:46 AM UTC 24 |
79776233 ps |
| T1258 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_target_smbus_maxlen.13313988 |
|
|
Sep 24 08:32:42 AM UTC 24 |
Sep 24 08:32:47 AM UTC 24 |
3957428523 ps |
| T1259 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_alert_test.82886253 |
|
|
Sep 24 08:32:45 AM UTC 24 |
Sep 24 08:32:47 AM UTC 24 |
16028655 ps |
| T1260 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_host_override.1184879150 |
|
|
Sep 24 08:32:45 AM UTC 24 |
Sep 24 08:32:47 AM UTC 24 |
21425439 ps |
| T1261 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_smbus_maxlen.2997073748 |
|
|
Sep 24 08:33:41 AM UTC 24 |
Sep 24 08:33:46 AM UTC 24 |
439154622 ps |
| T1262 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull.3672078794 |
|
|
Sep 24 08:32:43 AM UTC 24 |
Sep 24 08:32:48 AM UTC 24 |
873696165 ps |
| T1263 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_host_perf.1981819691 |
|
|
Sep 24 08:31:41 AM UTC 24 |
Sep 24 08:32:49 AM UTC 24 |
5292128248 ps |
| T1264 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull_addr.2861099026 |
|
|
Sep 24 08:32:44 AM UTC 24 |
Sep 24 08:32:50 AM UTC 24 |
2221227188 ps |
| T1265 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_watermark.2520622729 |
|
|
Sep 24 08:30:40 AM UTC 24 |
Sep 24 08:32:50 AM UTC 24 |
3318709431 ps |
| T1266 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/27.i2c_target_stress_all.456161944 |
|
|
Sep 24 08:28:05 AM UTC 24 |
Sep 24 08:32:50 AM UTC 24 |
23566558476 ps |
| T1267 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/39.i2c_host_override.1176030284 |
|
|
Sep 24 08:33:46 AM UTC 24 |
Sep 24 08:33:48 AM UTC 24 |
222823136 ps |
| T1268 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_fmt.2034836970 |
|
|
Sep 24 08:32:49 AM UTC 24 |
Sep 24 08:32:52 AM UTC 24 |
3149396602 ps |
| T1269 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_host_stretch_timeout.3521254128 |
|
|
Sep 24 08:32:15 AM UTC 24 |
Sep 24 08:32:53 AM UTC 24 |
770407816 ps |
| T1270 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_host_perf_precise.458919641 |
|
|
Sep 24 08:32:50 AM UTC 24 |
Sep 24 08:32:53 AM UTC 24 |
95485774 ps |
| T1271 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_target_smoke.1478617117 |
|
|
Sep 24 08:32:21 AM UTC 24 |
Sep 24 08:32:54 AM UTC 24 |
956403582 ps |
| T1272 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_host_perf.3887932328 |
|
|
Sep 24 08:32:50 AM UTC 24 |
Sep 24 08:32:55 AM UTC 24 |
242826590 ps |
| T1273 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_rx.3981992343 |
|
|
Sep 24 08:32:49 AM UTC 24 |
Sep 24 08:32:57 AM UTC 24 |
1340516766 ps |
| T1274 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_host_error_intr.518350676 |
|
|
Sep 24 08:32:51 AM UTC 24 |
Sep 24 08:32:57 AM UTC 24 |
113574496 ps |
| T1275 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_target_intr_stress_wr.801396621 |
|
|
Sep 24 08:31:47 AM UTC 24 |
Sep 24 08:32:58 AM UTC 24 |
5342337164 ps |
| T1276 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_fmt_empty.2355518727 |
|
|
Sep 24 08:32:49 AM UTC 24 |
Sep 24 08:33:00 AM UTC 24 |
1467730056 ps |
| T1277 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/41.i2c_target_intr_smoke.2040362568 |
|
|
Sep 24 08:35:00 AM UTC 24 |
Sep 24 08:35:05 AM UTC 24 |
602559385 ps |
| T1278 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_full.3521091052 |
|
|
Sep 24 08:29:32 AM UTC 24 |
Sep 24 08:33:03 AM UTC 24 |
3189487776 ps |
| T1279 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_acq.214519211 |
|
|
Sep 24 08:33:01 AM UTC 24 |
Sep 24 08:33:04 AM UTC 24 |
111674191 ps |
| T1280 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_intr_smoke.2462806774 |
|
|
Sep 24 08:32:56 AM UTC 24 |
Sep 24 08:33:04 AM UTC 24 |
625646119 ps |
| T1281 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_smoke.1308162385 |
|
|
Sep 24 08:32:52 AM UTC 24 |
Sep 24 08:33:06 AM UTC 24 |
3159206041 ps |
| T1282 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_target_intr_stress_wr.2720353438 |
|
|
Sep 24 08:32:26 AM UTC 24 |
Sep 24 08:33:06 AM UTC 24 |
4696599248 ps |
| T1283 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_tx.2272668269 |
|
|
Sep 24 08:33:04 AM UTC 24 |
Sep 24 08:33:07 AM UTC 24 |
723289837 ps |
| T1284 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_host_mode_toggle.1367463521 |
|
|
Sep 24 08:33:06 AM UTC 24 |
Sep 24 08:33:10 AM UTC 24 |
60034336 ps |
| T1285 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_timeout.642851115 |
|
|
Sep 24 08:32:58 AM UTC 24 |
Sep 24 08:33:10 AM UTC 24 |
6995895672 ps |
| T1286 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_stretch.1337276468 |
|
|
Sep 24 08:32:55 AM UTC 24 |
Sep 24 08:33:10 AM UTC 24 |
3169476100 ps |
| T1287 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_hrst.2903617961 |
|
|
Sep 24 08:33:06 AM UTC 24 |
Sep 24 08:33:11 AM UTC 24 |
304272067 ps |
| T1288 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_host_stretch_timeout.2060388346 |
|
|
Sep 24 08:32:51 AM UTC 24 |
Sep 24 08:33:11 AM UTC 24 |
1404511136 ps |
| T1289 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_nack_txstretch.3351315085 |
|
|
Sep 24 08:33:44 AM UTC 24 |
Sep 24 08:33:47 AM UTC 24 |
507737681 ps |
| T1290 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_tx.1113878480 |
|
|
Sep 24 08:33:10 AM UTC 24 |
Sep 24 08:33:12 AM UTC 24 |
425157120 ps |
| T1291 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/33.i2c_target_stress_all.3016612765 |
|
|
Sep 24 08:30:55 AM UTC 24 |
Sep 24 08:33:13 AM UTC 24 |
18771629247 ps |
| T1292 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_perf.228859631 |
|
|
Sep 24 08:33:04 AM UTC 24 |
Sep 24 08:33:13 AM UTC 24 |
641007723 ps |
| T1293 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_bad_addr.2205907756 |
|
|
Sep 24 08:33:05 AM UTC 24 |
Sep 24 08:33:13 AM UTC 24 |
1408970671 ps |
| T1294 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_acq.2635615672 |
|
|
Sep 24 08:33:09 AM UTC 24 |
Sep 24 08:33:14 AM UTC 24 |
2546994101 ps |
| T1295 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_watermark.803653625 |
|
|
Sep 24 08:31:37 AM UTC 24 |
Sep 24 08:33:14 AM UTC 24 |
16690227471 ps |
| T1296 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_nack_txstretch.2816736309 |
|
|
Sep 24 08:33:12 AM UTC 24 |
Sep 24 08:33:15 AM UTC 24 |
922395087 ps |
| T1297 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_alert_test.1582707562 |
|
|
Sep 24 08:33:13 AM UTC 24 |
Sep 24 08:33:15 AM UTC 24 |
18157003 ps |
| T1298 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_smbus_maxlen.1865788547 |
|
|
Sep 24 08:33:11 AM UTC 24 |
Sep 24 08:33:16 AM UTC 24 |
2723733460 ps |
| T1299 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull_addr.2405819005 |
|
|
Sep 24 08:33:12 AM UTC 24 |
Sep 24 08:33:16 AM UTC 24 |
1948463285 ps |
| T1300 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_host_override.11491667 |
|
|
Sep 24 08:33:14 AM UTC 24 |
Sep 24 08:33:16 AM UTC 24 |
91278294 ps |
| T1301 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_tx_stretch_ctrl.2399515267 |
|
|
Sep 24 08:33:11 AM UTC 24 |
Sep 24 08:33:17 AM UTC 24 |
132374584 ps |
| T1302 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull.209619642 |
|
|
Sep 24 08:33:11 AM UTC 24 |
Sep 24 08:33:17 AM UTC 24 |
4991195381 ps |
| T1303 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_fmt.599132924 |
|
|
Sep 24 08:33:15 AM UTC 24 |
Sep 24 08:33:18 AM UTC 24 |
73091602 ps |
| T1304 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_host_may_nack.3621769043 |
|
|
Sep 24 08:33:08 AM UTC 24 |
Sep 24 08:33:22 AM UTC 24 |
5192664726 ps |
| T1305 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_target_stress_all.3614847341 |
|
|
Sep 24 08:32:34 AM UTC 24 |
Sep 24 08:33:24 AM UTC 24 |
11823600348 ps |
| T1306 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_host_perf_precise.677234989 |
|
|
Sep 24 08:33:18 AM UTC 24 |
Sep 24 08:33:24 AM UTC 24 |
544838310 ps |
| T1307 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_rx.1527821589 |
|
|
Sep 24 08:33:17 AM UTC 24 |
Sep 24 08:33:25 AM UTC 24 |
353927749 ps |
| T1308 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_host_stretch_timeout.3739031520 |
|
|
Sep 24 08:33:18 AM UTC 24 |
Sep 24 08:33:26 AM UTC 24 |
2601476430 ps |
| T1309 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/34.i2c_target_intr_stress_wr.3970081269 |
|
|
Sep 24 08:31:22 AM UTC 24 |
Sep 24 08:33:28 AM UTC 24 |
14801917067 ps |
| T1310 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_overflow.2835005689 |
|
|
Sep 24 08:32:09 AM UTC 24 |
Sep 24 08:33:29 AM UTC 24 |
4724363701 ps |
| T1311 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_host_error_intr.2771071393 |
|
|
Sep 24 08:33:18 AM UTC 24 |
Sep 24 08:33:31 AM UTC 24 |
3129342230 ps |
| T1312 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_overflow.2296614957 |
|
|
Sep 24 08:32:48 AM UTC 24 |
Sep 24 08:33:32 AM UTC 24 |
3651510668 ps |
| T1313 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_acq.261072121 |
|
|
Sep 24 08:33:30 AM UTC 24 |
Sep 24 08:33:32 AM UTC 24 |
228641585 ps |
| T1314 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_stress_rd.2398868998 |
|
|
Sep 24 08:33:24 AM UTC 24 |
Sep 24 08:33:35 AM UTC 24 |
473360994 ps |
| T1315 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_tx.2330002574 |
|
|
Sep 24 08:33:32 AM UTC 24 |
Sep 24 08:33:35 AM UTC 24 |
865850811 ps |
| T1316 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/26.i2c_target_stress_wr.1232165780 |
|
|
Sep 24 08:27:28 AM UTC 24 |
Sep 24 08:33:37 AM UTC 24 |
54378320736 ps |
| T1317 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_intr_smoke.664938015 |
|
|
Sep 24 08:33:26 AM UTC 24 |
Sep 24 08:33:38 AM UTC 24 |
1217180423 ps |
| T1318 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_intr_stress_wr.3170887848 |
|
|
Sep 24 08:33:26 AM UTC 24 |
Sep 24 08:33:39 AM UTC 24 |
5562321450 ps |
| T1319 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_timeout.834021483 |
|
|
Sep 24 08:33:27 AM UTC 24 |
Sep 24 08:33:41 AM UTC 24 |
5103604950 ps |
| T1320 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_bad_addr.2775791108 |
|
|
Sep 24 08:33:33 AM UTC 24 |
Sep 24 08:33:41 AM UTC 24 |
3662390920 ps |
| T1321 |
/workspaces/repo/scratch/os_regression_2024_09_23/i2c-sim-vcs/coverage/default/38.i2c_target_perf.3379043848 |
|
|
Sep 24 08:33:33 AM UTC 24 |
Sep 24 08:33:43 AM UTC 24 |
2933128544 ps |