| T396 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/7.i2c_host_may_nack.279376101 |
|
|
Oct 09 08:17:56 AM UTC 24 |
Oct 09 08:18:04 AM UTC 24 |
1523109955 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/7.i2c_target_smbus_maxlen.1626740783 |
|
|
Oct 09 08:18:02 AM UTC 24 |
Oct 09 08:18:05 AM UTC 24 |
1744285454 ps |
| T162 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/7.i2c_target_nack_txstretch.3068789520 |
|
|
Oct 09 08:18:04 AM UTC 24 |
Oct 09 08:18:07 AM UTC 24 |
505938118 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/7.i2c_alert_test.656098055 |
|
|
Oct 09 08:18:05 AM UTC 24 |
Oct 09 08:18:07 AM UTC 24 |
35397933 ps |
| T49 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/7.i2c_target_nack_acqfull_addr.1738176304 |
|
|
Oct 09 08:18:03 AM UTC 24 |
Oct 09 08:18:08 AM UTC 24 |
539882958 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/5.i2c_target_stress_all.2338385118 |
|
|
Oct 09 08:15:42 AM UTC 24 |
Oct 09 08:18:08 AM UTC 24 |
31019463296 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/7.i2c_target_nack_acqfull.779770962 |
|
|
Oct 09 08:18:02 AM UTC 24 |
Oct 09 08:18:08 AM UTC 24 |
594273770 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_host_override.2765323019 |
|
|
Oct 09 08:18:06 AM UTC 24 |
Oct 09 08:18:08 AM UTC 24 |
17114502 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_full.4228936464 |
|
|
Oct 09 08:17:16 AM UTC 24 |
Oct 09 08:18:10 AM UTC 24 |
1879987977 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_reset_fmt.3071053542 |
|
|
Oct 09 08:18:08 AM UTC 24 |
Oct 09 08:18:11 AM UTC 24 |
112018667 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_reset_rx.4014734648 |
|
|
Oct 09 08:18:09 AM UTC 24 |
Oct 09 08:18:16 AM UTC 24 |
359521766 ps |
| T25 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_host_error_intr.1540132385 |
|
|
Oct 09 08:18:16 AM UTC 24 |
Oct 09 08:18:21 AM UTC 24 |
94050699 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/7.i2c_host_smoke.3090516797 |
|
|
Oct 09 08:17:10 AM UTC 24 |
Oct 09 08:18:25 AM UTC 24 |
3668881644 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_host_perf.3798124702 |
|
|
Oct 09 08:18:13 AM UTC 24 |
Oct 09 08:18:29 AM UTC 24 |
672399961 ps |
| T267 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_host_smoke.45344263 |
|
|
Oct 09 08:18:05 AM UTC 24 |
Oct 09 08:18:30 AM UTC 24 |
6173794653 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_overflow.418135368 |
|
|
Oct 09 08:16:04 AM UTC 24 |
Oct 09 08:18:30 AM UTC 24 |
4472094894 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_host_perf_precise.1986831158 |
|
|
Oct 09 08:18:13 AM UTC 24 |
Oct 09 08:18:39 AM UTC 24 |
1558863526 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_host_stretch_timeout.3872382474 |
|
|
Oct 09 08:18:13 AM UTC 24 |
Oct 09 08:18:40 AM UTC 24 |
2121010696 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_fmt_empty.1210234060 |
|
|
Oct 09 08:18:09 AM UTC 24 |
Oct 09 08:18:41 AM UTC 24 |
418584118 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_rx.325585614 |
|
|
Oct 09 08:20:22 AM UTC 24 |
Oct 09 08:20:38 AM UTC 24 |
955361651 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_intr_smoke.2192458699 |
|
|
Oct 09 08:18:35 AM UTC 24 |
Oct 09 08:18:44 AM UTC 24 |
3870763674 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_smoke.1915894072 |
|
|
Oct 09 08:18:26 AM UTC 24 |
Oct 09 08:18:46 AM UTC 24 |
2031504935 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_reset_tx.3090949485 |
|
|
Oct 09 08:18:45 AM UTC 24 |
Oct 09 08:18:48 AM UTC 24 |
348306736 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_reset_acq.2574474431 |
|
|
Oct 09 08:18:45 AM UTC 24 |
Oct 09 08:18:50 AM UTC 24 |
823738057 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_overflow.1938200986 |
|
|
Oct 09 08:17:12 AM UTC 24 |
Oct 09 08:18:54 AM UTC 24 |
1642582948 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_timeout.1856553732 |
|
|
Oct 09 08:18:41 AM UTC 24 |
Oct 09 08:18:57 AM UTC 24 |
26243722757 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_perf.614608936 |
|
|
Oct 09 08:18:48 AM UTC 24 |
Oct 09 08:18:58 AM UTC 24 |
991646355 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_hrst.1486779283 |
|
|
Oct 09 08:18:55 AM UTC 24 |
Oct 09 08:19:00 AM UTC 24 |
1314239128 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_bad_addr.2109167773 |
|
|
Oct 09 08:18:51 AM UTC 24 |
Oct 09 08:19:00 AM UTC 24 |
4016818061 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_host_perf_precise.3995035456 |
|
|
Oct 09 08:20:22 AM UTC 24 |
Oct 09 08:20:25 AM UTC 24 |
144890093 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_stretch.144719068 |
|
|
Oct 09 08:18:32 AM UTC 24 |
Oct 09 08:19:03 AM UTC 24 |
655710871 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_acq.804502227 |
|
|
Oct 09 08:19:01 AM UTC 24 |
Oct 09 08:19:07 AM UTC 24 |
2253803999 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_tx.194999496 |
|
|
Oct 09 08:19:04 AM UTC 24 |
Oct 09 08:19:07 AM UTC 24 |
221821646 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_host_may_nack.4058513240 |
|
|
Oct 09 08:19:01 AM UTC 24 |
Oct 09 08:19:08 AM UTC 24 |
417139803 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_smbus_maxlen.2453228243 |
|
|
Oct 09 08:19:05 AM UTC 24 |
Oct 09 08:19:10 AM UTC 24 |
534724770 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_alert_test.1776926497 |
|
|
Oct 09 08:19:08 AM UTC 24 |
Oct 09 08:19:11 AM UTC 24 |
17839810 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_nack_txstretch.390332402 |
|
|
Oct 09 08:19:08 AM UTC 24 |
Oct 09 08:19:11 AM UTC 24 |
1611395396 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_tx_stretch_ctrl.254708069 |
|
|
Oct 09 08:19:04 AM UTC 24 |
Oct 09 08:19:11 AM UTC 24 |
319492394 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_stress_rd.828592507 |
|
|
Oct 09 08:18:31 AM UTC 24 |
Oct 09 08:19:12 AM UTC 24 |
3208395105 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull_addr.3473153608 |
|
|
Oct 09 08:19:07 AM UTC 24 |
Oct 09 08:19:12 AM UTC 24 |
444344733 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_host_override.330100665 |
|
|
Oct 09 08:19:11 AM UTC 24 |
Oct 09 08:19:13 AM UTC 24 |
94793449 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull.2420846713 |
|
|
Oct 09 08:19:07 AM UTC 24 |
Oct 09 08:19:13 AM UTC 24 |
1082441178 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_fmt.701180460 |
|
|
Oct 09 08:19:13 AM UTC 24 |
Oct 09 08:19:16 AM UTC 24 |
146413007 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_fmt_empty.3750072599 |
|
|
Oct 09 08:19:13 AM UTC 24 |
Oct 09 08:19:22 AM UTC 24 |
586447609 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_host_override.3776292217 |
|
|
Oct 09 08:20:19 AM UTC 24 |
Oct 09 08:20:21 AM UTC 24 |
25624858 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_rx.933834434 |
|
|
Oct 09 08:19:13 AM UTC 24 |
Oct 09 08:19:23 AM UTC 24 |
121711571 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_overflow.3183291062 |
|
|
Oct 09 08:18:07 AM UTC 24 |
Oct 09 08:19:25 AM UTC 24 |
24171641145 ps |
| T34 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_host_error_intr.1540357650 |
|
|
Oct 09 08:19:23 AM UTC 24 |
Oct 09 08:19:28 AM UTC 24 |
128947482 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_host_stretch_timeout.4085767197 |
|
|
Oct 09 08:19:19 AM UTC 24 |
Oct 09 08:19:31 AM UTC 24 |
524933276 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_stretch.3663491516 |
|
|
Oct 09 08:19:32 AM UTC 24 |
Oct 09 08:19:34 AM UTC 24 |
250561196 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_intr_smoke.3528716399 |
|
|
Oct 09 08:19:35 AM UTC 24 |
Oct 09 08:19:48 AM UTC 24 |
6480448870 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_smoke.377293393 |
|
|
Oct 09 08:19:24 AM UTC 24 |
Oct 09 08:19:54 AM UTC 24 |
1725393730 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_watermark.3816837860 |
|
|
Oct 09 08:16:03 AM UTC 24 |
Oct 09 08:19:54 AM UTC 24 |
17079975934 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_host_error_intr.94140450 |
|
|
Oct 09 08:20:26 AM UTC 24 |
Oct 09 08:20:30 AM UTC 24 |
189684251 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_acq.2812075087 |
|
|
Oct 09 08:19:56 AM UTC 24 |
Oct 09 08:19:59 AM UTC 24 |
190872595 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_host_smoke.839589825 |
|
|
Oct 09 08:19:09 AM UTC 24 |
Oct 09 08:20:01 AM UTC 24 |
2445395687 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_host_perf_precise.1824641013 |
|
|
Oct 09 08:19:16 AM UTC 24 |
Oct 09 08:20:03 AM UTC 24 |
2523510870 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_tx.3667526047 |
|
|
Oct 09 08:20:00 AM UTC 24 |
Oct 09 08:20:04 AM UTC 24 |
313756757 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_timeout.4017563413 |
|
|
Oct 09 08:19:50 AM UTC 24 |
Oct 09 08:20:04 AM UTC 24 |
1367759046 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_watermark.1108106541 |
|
|
Oct 09 08:17:12 AM UTC 24 |
Oct 09 08:20:04 AM UTC 24 |
2887266689 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_watermark.317865189 |
|
|
Oct 09 08:19:12 AM UTC 24 |
Oct 09 08:20:08 AM UTC 24 |
6257010294 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_perf.2130173412 |
|
|
Oct 09 08:20:00 AM UTC 24 |
Oct 09 08:20:10 AM UTC 24 |
4454224368 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_hrst.644561802 |
|
|
Oct 09 08:20:05 AM UTC 24 |
Oct 09 08:20:10 AM UTC 24 |
420758830 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_bad_addr.578880682 |
|
|
Oct 09 08:20:04 AM UTC 24 |
Oct 09 08:20:11 AM UTC 24 |
1211350057 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_watermark.3145740061 |
|
|
Oct 09 08:18:07 AM UTC 24 |
Oct 09 08:20:12 AM UTC 24 |
5359133538 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_intr_stress_wr.704193615 |
|
|
Oct 09 08:18:39 AM UTC 24 |
Oct 09 08:20:13 AM UTC 24 |
11850259265 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_tx.971373743 |
|
|
Oct 09 08:20:12 AM UTC 24 |
Oct 09 08:20:15 AM UTC 24 |
798701414 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_acq.3123868568 |
|
|
Oct 09 08:20:11 AM UTC 24 |
Oct 09 08:20:16 AM UTC 24 |
460218711 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_overflow.3547791906 |
|
|
Oct 09 08:19:13 AM UTC 24 |
Oct 09 08:20:16 AM UTC 24 |
8270950825 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_tx_stretch_ctrl.842015590 |
|
|
Oct 09 08:20:13 AM UTC 24 |
Oct 09 08:20:17 AM UTC 24 |
80963651 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_smbus_maxlen.3924115060 |
|
|
Oct 09 08:20:13 AM UTC 24 |
Oct 09 08:20:18 AM UTC 24 |
1021997283 ps |
| T269 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_host_may_nack.854696753 |
|
|
Oct 09 08:20:11 AM UTC 24 |
Oct 09 08:20:18 AM UTC 24 |
351866465 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_full.143406895 |
|
|
Oct 09 08:18:10 AM UTC 24 |
Oct 09 08:20:19 AM UTC 24 |
2503642451 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_alert_test.120735877 |
|
|
Oct 09 08:20:17 AM UTC 24 |
Oct 09 08:20:20 AM UTC 24 |
48430306 ps |
| T50 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull_addr.3672966956 |
|
|
Oct 09 08:20:16 AM UTC 24 |
Oct 09 08:20:21 AM UTC 24 |
2478794316 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull.2499653865 |
|
|
Oct 09 08:20:14 AM UTC 24 |
Oct 09 08:20:21 AM UTC 24 |
1260206603 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_stress_rd.209364255 |
|
|
Oct 09 08:19:29 AM UTC 24 |
Oct 09 08:20:42 AM UTC 24 |
1540472372 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_nack_txstretch.1564651313 |
|
|
Oct 09 08:20:17 AM UTC 24 |
Oct 09 08:20:21 AM UTC 24 |
136264650 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_fmt.3191778712 |
|
|
Oct 09 08:20:20 AM UTC 24 |
Oct 09 08:20:23 AM UTC 24 |
90899080 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_fmt_empty.2558300635 |
|
|
Oct 09 08:20:21 AM UTC 24 |
Oct 09 08:20:32 AM UTC 24 |
409711177 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_host_stretch_timeout.3181243593 |
|
|
Oct 09 08:20:24 AM UTC 24 |
Oct 09 08:20:38 AM UTC 24 |
1949957425 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_target_stress_rd.3803576561 |
|
|
Oct 09 08:20:37 AM UTC 24 |
Oct 09 08:20:44 AM UTC 24 |
216362430 ps |
| T271 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_stress_all.3277293417 |
|
|
Oct 09 08:18:49 AM UTC 24 |
Oct 09 08:20:45 AM UTC 24 |
94027285145 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_target_intr_smoke.2523801024 |
|
|
Oct 09 08:20:38 AM UTC 24 |
Oct 09 08:20:48 AM UTC 24 |
3298975602 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_acq.3761429979 |
|
|
Oct 09 08:20:47 AM UTC 24 |
Oct 09 08:20:50 AM UTC 24 |
192670539 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_target_stretch.147987742 |
|
|
Oct 09 08:20:38 AM UTC 24 |
Oct 09 08:20:52 AM UTC 24 |
2566205096 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_tx.3340562948 |
|
|
Oct 09 08:20:52 AM UTC 24 |
Oct 09 08:20:55 AM UTC 24 |
3442484491 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_target_timeout.3340033708 |
|
|
Oct 09 08:20:47 AM UTC 24 |
Oct 09 08:20:58 AM UTC 24 |
4465944385 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_target_stress_wr.2122781345 |
|
|
Oct 09 08:20:37 AM UTC 24 |
Oct 09 08:20:58 AM UTC 24 |
8977322168 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_target_perf.3322058113 |
|
|
Oct 09 08:20:52 AM UTC 24 |
Oct 09 08:21:00 AM UTC 24 |
2987770818 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_target_bad_addr.3127219899 |
|
|
Oct 09 08:20:52 AM UTC 24 |
Oct 09 08:21:02 AM UTC 24 |
952021542 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_stress_wr.1448379370 |
|
|
Oct 09 08:19:25 AM UTC 24 |
Oct 09 08:21:03 AM UTC 24 |
31119562559 ps |
| T26 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_host_mode_toggle.2961658879 |
|
|
Oct 09 08:23:02 AM UTC 24 |
Oct 09 08:23:06 AM UTC 24 |
335382146 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_target_hrst.3571168383 |
|
|
Oct 09 08:21:03 AM UTC 24 |
Oct 09 08:21:06 AM UTC 24 |
140935289 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_tx.827919313 |
|
|
Oct 09 08:21:04 AM UTC 24 |
Oct 09 08:21:07 AM UTC 24 |
2377304116 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_target_smbus_maxlen.3119607799 |
|
|
Oct 09 08:21:04 AM UTC 24 |
Oct 09 08:21:09 AM UTC 24 |
1915199029 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_acq.3478719835 |
|
|
Oct 09 08:21:03 AM UTC 24 |
Oct 09 08:21:09 AM UTC 24 |
2077911014 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_alert_test.736475885 |
|
|
Oct 09 08:21:08 AM UTC 24 |
Oct 09 08:21:10 AM UTC 24 |
19620020 ps |
| T27 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_host_mode_toggle.254167940 |
|
|
Oct 09 08:21:03 AM UTC 24 |
Oct 09 08:21:10 AM UTC 24 |
793269741 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_tx_stretch_ctrl.2857046322 |
|
|
Oct 09 08:23:02 AM UTC 24 |
Oct 09 08:23:06 AM UTC 24 |
104637842 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull.2368508070 |
|
|
Oct 09 08:21:05 AM UTC 24 |
Oct 09 08:21:11 AM UTC 24 |
1930897196 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull_addr.1056770133 |
|
|
Oct 09 08:21:07 AM UTC 24 |
Oct 09 08:21:11 AM UTC 24 |
491886769 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_host_override.1362076519 |
|
|
Oct 09 08:21:10 AM UTC 24 |
Oct 09 08:21:12 AM UTC 24 |
29834289 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_fmt.3991790964 |
|
|
Oct 09 08:21:12 AM UTC 24 |
Oct 09 08:21:14 AM UTC 24 |
128249063 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_target_smoke.4271572051 |
|
|
Oct 09 08:20:31 AM UTC 24 |
Oct 09 08:21:15 AM UTC 24 |
6109017525 ps |
| T255 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_host_may_nack.4282405303 |
|
|
Oct 09 08:21:03 AM UTC 24 |
Oct 09 08:21:15 AM UTC 24 |
1757025069 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_rx.3278348395 |
|
|
Oct 09 08:21:13 AM UTC 24 |
Oct 09 08:21:20 AM UTC 24 |
698060427 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_host_perf_precise.2510563497 |
|
|
Oct 09 08:21:16 AM UTC 24 |
Oct 09 08:21:25 AM UTC 24 |
2517854187 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/7.i2c_target_stress_all.490206320 |
|
|
Oct 09 08:17:51 AM UTC 24 |
Oct 09 08:21:29 AM UTC 24 |
69249235360 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_host_error_intr.2940247596 |
|
|
Oct 09 08:21:20 AM UTC 24 |
Oct 09 08:21:29 AM UTC 24 |
185380663 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_fmt_empty.2182423415 |
|
|
Oct 09 08:21:12 AM UTC 24 |
Oct 09 08:21:31 AM UTC 24 |
981070056 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_host_smoke.1454475429 |
|
|
Oct 09 08:20:17 AM UTC 24 |
Oct 09 08:21:32 AM UTC 24 |
1364741431 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_target_intr_stress_wr.586191644 |
|
|
Oct 09 08:20:47 AM UTC 24 |
Oct 09 08:21:36 AM UTC 24 |
24912207567 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_host_smoke.3273489020 |
|
|
Oct 09 08:21:10 AM UTC 24 |
Oct 09 08:21:37 AM UTC 24 |
4819064496 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_host_stretch_timeout.932852607 |
|
|
Oct 09 08:21:16 AM UTC 24 |
Oct 09 08:21:43 AM UTC 24 |
541892217 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_acq.3105007709 |
|
|
Oct 09 08:21:44 AM UTC 24 |
Oct 09 08:21:47 AM UTC 24 |
184224043 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_tx.4129735561 |
|
|
Oct 09 08:21:44 AM UTC 24 |
Oct 09 08:21:47 AM UTC 24 |
529971371 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_stress_rd.3245991711 |
|
|
Oct 09 08:21:44 AM UTC 24 |
Oct 09 08:21:50 AM UTC 24 |
886221718 ps |
| T83 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_smoke.1632930002 |
|
|
Oct 09 08:21:44 AM UTC 24 |
Oct 09 08:21:53 AM UTC 24 |
538807391 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_intr_smoke.3593760433 |
|
|
Oct 09 08:21:44 AM UTC 24 |
Oct 09 08:21:53 AM UTC 24 |
973614307 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_hrst.3990722584 |
|
|
Oct 09 08:21:51 AM UTC 24 |
Oct 09 08:21:54 AM UTC 24 |
340458987 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_host_perf.3548036084 |
|
|
Oct 09 08:20:22 AM UTC 24 |
Oct 09 08:21:56 AM UTC 24 |
12842640738 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_timeout.3502571032 |
|
|
Oct 09 08:21:44 AM UTC 24 |
Oct 09 08:21:56 AM UTC 24 |
4610474460 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_perf.4131101844 |
|
|
Oct 09 08:21:48 AM UTC 24 |
Oct 09 08:21:57 AM UTC 24 |
2036553656 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_bad_addr.962800695 |
|
|
Oct 09 08:21:49 AM UTC 24 |
Oct 09 08:21:58 AM UTC 24 |
4627678679 ps |
| T28 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_host_mode_toggle.2560906855 |
|
|
Oct 09 08:21:54 AM UTC 24 |
Oct 09 08:21:58 AM UTC 24 |
109215163 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_tx.3224788035 |
|
|
Oct 09 08:21:56 AM UTC 24 |
Oct 09 08:21:59 AM UTC 24 |
1860510362 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_watermark.1523683611 |
|
|
Oct 09 08:20:19 AM UTC 24 |
Oct 09 08:22:00 AM UTC 24 |
4546439215 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_stretch.2023491685 |
|
|
Oct 09 08:21:44 AM UTC 24 |
Oct 09 08:22:01 AM UTC 24 |
1334091053 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_acq.2912358565 |
|
|
Oct 09 08:21:55 AM UTC 24 |
Oct 09 08:22:01 AM UTC 24 |
561433609 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_host_may_nack.4061309534 |
|
|
Oct 09 08:21:54 AM UTC 24 |
Oct 09 08:22:04 AM UTC 24 |
2227476995 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_tx_stretch_ctrl.3163183936 |
|
|
Oct 09 08:21:57 AM UTC 24 |
Oct 09 08:22:06 AM UTC 24 |
365900195 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_alert_test.3082917743 |
|
|
Oct 09 08:22:05 AM UTC 24 |
Oct 09 08:22:07 AM UTC 24 |
44743427 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_host_override.2027157003 |
|
|
Oct 09 08:22:05 AM UTC 24 |
Oct 09 08:22:07 AM UTC 24 |
163252481 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_nack_txstretch.2675398003 |
|
|
Oct 09 08:22:05 AM UTC 24 |
Oct 09 08:22:09 AM UTC 24 |
186260402 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_fmt.1098515965 |
|
|
Oct 09 08:22:06 AM UTC 24 |
Oct 09 08:22:09 AM UTC 24 |
784388707 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull_addr.1907019344 |
|
|
Oct 09 08:22:05 AM UTC 24 |
Oct 09 08:22:10 AM UTC 24 |
1595675173 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_smbus_maxlen.1660931781 |
|
|
Oct 09 08:22:05 AM UTC 24 |
Oct 09 08:22:10 AM UTC 24 |
9054055191 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_full.1573404601 |
|
|
Oct 09 08:19:14 AM UTC 24 |
Oct 09 08:22:10 AM UTC 24 |
14882828256 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull.2006045996 |
|
|
Oct 09 08:22:05 AM UTC 24 |
Oct 09 08:22:11 AM UTC 24 |
4286244655 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_stress_wr.3248476012 |
|
|
Oct 09 08:21:44 AM UTC 24 |
Oct 09 08:22:12 AM UTC 24 |
23807135122 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_fmt_empty.1564928592 |
|
|
Oct 09 08:22:07 AM UTC 24 |
Oct 09 08:22:15 AM UTC 24 |
1248677613 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_host_perf.1547785609 |
|
|
Oct 09 08:22:11 AM UTC 24 |
Oct 09 08:22:18 AM UTC 24 |
1304830516 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_host_error_intr.1405373757 |
|
|
Oct 09 08:22:12 AM UTC 24 |
Oct 09 08:22:21 AM UTC 24 |
355198179 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_rx.3445161256 |
|
|
Oct 09 08:22:08 AM UTC 24 |
Oct 09 08:22:24 AM UTC 24 |
231982988 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_stretch.2632979492 |
|
|
Oct 09 08:22:22 AM UTC 24 |
Oct 09 08:22:33 AM UTC 24 |
432207502 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_smoke.2358308582 |
|
|
Oct 09 08:22:13 AM UTC 24 |
Oct 09 08:22:40 AM UTC 24 |
1543774134 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_intr_smoke.2912141587 |
|
|
Oct 09 08:22:24 AM UTC 24 |
Oct 09 08:22:40 AM UTC 24 |
1378305935 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_host_smoke.623137631 |
|
|
Oct 09 08:22:05 AM UTC 24 |
Oct 09 08:22:43 AM UTC 24 |
1841417728 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_host_stretch_timeout.250381699 |
|
|
Oct 09 08:22:12 AM UTC 24 |
Oct 09 08:22:47 AM UTC 24 |
667236159 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_tx.137858182 |
|
|
Oct 09 08:22:45 AM UTC 24 |
Oct 09 08:22:47 AM UTC 24 |
279240903 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_acq.3858880223 |
|
|
Oct 09 08:22:45 AM UTC 24 |
Oct 09 08:22:49 AM UTC 24 |
651235237 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_timeout.2204892870 |
|
|
Oct 09 08:22:41 AM UTC 24 |
Oct 09 08:22:52 AM UTC 24 |
1227391602 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/1.i2c_host_perf_precise.2566525792 |
|
|
Oct 09 08:08:11 AM UTC 24 |
Oct 09 08:22:54 AM UTC 24 |
23164217584 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_perf.692298669 |
|
|
Oct 09 08:22:45 AM UTC 24 |
Oct 09 08:22:55 AM UTC 24 |
946546252 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_tx.3509141838 |
|
|
Oct 09 08:23:02 AM UTC 24 |
Oct 09 08:23:05 AM UTC 24 |
101690647 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_alert_test.1354708526 |
|
|
Oct 09 08:23:11 AM UTC 24 |
Oct 09 08:23:13 AM UTC 24 |
18593755 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_acq.1525314628 |
|
|
Oct 09 08:23:02 AM UTC 24 |
Oct 09 08:23:09 AM UTC 24 |
2840945701 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_intr_stress_wr.4204113206 |
|
|
Oct 09 08:22:34 AM UTC 24 |
Oct 09 08:23:09 AM UTC 24 |
3747711561 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_stress_rd.1173350884 |
|
|
Oct 09 08:22:19 AM UTC 24 |
Oct 09 08:23:10 AM UTC 24 |
1534877133 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_smbus_maxlen.2705454186 |
|
|
Oct 09 08:23:06 AM UTC 24 |
Oct 09 08:23:11 AM UTC 24 |
4537912929 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_overflow.1115392701 |
|
|
Oct 09 08:21:11 AM UTC 24 |
Oct 09 08:23:12 AM UTC 24 |
4474230492 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_bad_addr.2113221648 |
|
|
Oct 09 08:23:00 AM UTC 24 |
Oct 09 08:23:13 AM UTC 24 |
4134300146 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull.3821391376 |
|
|
Oct 09 08:23:07 AM UTC 24 |
Oct 09 08:23:13 AM UTC 24 |
2183653985 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull_addr.2152491952 |
|
|
Oct 09 08:23:07 AM UTC 24 |
Oct 09 08:23:13 AM UTC 24 |
523466367 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_overflow.2558987038 |
|
|
Oct 09 08:20:20 AM UTC 24 |
Oct 09 08:23:13 AM UTC 24 |
9999563518 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_nack_txstretch.1991717441 |
|
|
Oct 09 08:23:09 AM UTC 24 |
Oct 09 08:23:13 AM UTC 24 |
1537533310 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_host_override.3056832743 |
|
|
Oct 09 08:23:12 AM UTC 24 |
Oct 09 08:23:14 AM UTC 24 |
32067478 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_fmt.2869098337 |
|
|
Oct 09 08:23:14 AM UTC 24 |
Oct 09 08:23:17 AM UTC 24 |
344098180 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_rx.2238127704 |
|
|
Oct 09 08:23:14 AM UTC 24 |
Oct 09 08:23:22 AM UTC 24 |
729963860 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_host_may_nack.2306540231 |
|
|
Oct 09 08:23:02 AM UTC 24 |
Oct 09 08:23:26 AM UTC 24 |
514212455 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_fmt_empty.1449003696 |
|
|
Oct 09 08:23:14 AM UTC 24 |
Oct 09 08:23:29 AM UTC 24 |
630056933 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_overflow.531847119 |
|
|
Oct 09 08:22:05 AM UTC 24 |
Oct 09 08:23:30 AM UTC 24 |
21498538730 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_host_error_intr.2835781715 |
|
|
Oct 09 08:23:31 AM UTC 24 |
Oct 09 08:23:36 AM UTC 24 |
608926062 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_host_stretch_timeout.2939954412 |
|
|
Oct 09 08:23:30 AM UTC 24 |
Oct 09 08:23:43 AM UTC 24 |
1059613851 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_watermark.1944658862 |
|
|
Oct 09 08:21:11 AM UTC 24 |
Oct 09 08:23:46 AM UTC 24 |
9775777253 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_host_smoke.3203274792 |
|
|
Oct 09 08:23:11 AM UTC 24 |
Oct 09 08:23:48 AM UTC 24 |
1737768817 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_intr_smoke.2652350997 |
|
|
Oct 09 08:23:38 AM UTC 24 |
Oct 09 08:23:49 AM UTC 24 |
1181638099 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/9.i2c_target_intr_stress_wr.4232416926 |
|
|
Oct 09 08:19:48 AM UTC 24 |
Oct 09 08:23:50 AM UTC 24 |
16810178205 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_fmt.3906190991 |
|
|
Oct 09 08:24:57 AM UTC 24 |
Oct 09 08:24:59 AM UTC 24 |
410274113 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_acq.2996339128 |
|
|
Oct 09 08:23:50 AM UTC 24 |
Oct 09 08:23:53 AM UTC 24 |
157094663 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_smoke.4100232096 |
|
|
Oct 09 08:23:31 AM UTC 24 |
Oct 09 08:23:54 AM UTC 24 |
2164072643 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_tx.2655749270 |
|
|
Oct 09 08:23:52 AM UTC 24 |
Oct 09 08:23:56 AM UTC 24 |
522809630 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_overflow.298056773 |
|
|
Oct 09 08:23:14 AM UTC 24 |
Oct 09 08:23:58 AM UTC 24 |
1672742173 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_timeout.2335897383 |
|
|
Oct 09 08:23:48 AM UTC 24 |
Oct 09 08:24:00 AM UTC 24 |
5703298162 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_host_mode_toggle.4014550840 |
|
|
Oct 09 08:23:57 AM UTC 24 |
Oct 09 08:24:00 AM UTC 24 |
173738031 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_host_perf_precise.413692820 |
|
|
Oct 09 08:23:16 AM UTC 24 |
Oct 09 08:24:01 AM UTC 24 |
2707191569 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_perf.1842223584 |
|
|
Oct 09 08:23:54 AM UTC 24 |
Oct 09 08:24:04 AM UTC 24 |
2122642659 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_tx.3530237211 |
|
|
Oct 09 08:24:01 AM UTC 24 |
Oct 09 08:24:04 AM UTC 24 |
137644960 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_tx_stretch_ctrl.1105499028 |
|
|
Oct 09 08:24:03 AM UTC 24 |
Oct 09 08:24:07 AM UTC 24 |
51866758 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_bad_addr.297572348 |
|
|
Oct 09 08:23:54 AM UTC 24 |
Oct 09 08:24:08 AM UTC 24 |
5370601866 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_stress_rd.3170290841 |
|
|
Oct 09 08:23:31 AM UTC 24 |
Oct 09 08:24:08 AM UTC 24 |
1380675562 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_acq.10746365 |
|
|
Oct 09 08:24:01 AM UTC 24 |
Oct 09 08:24:08 AM UTC 24 |
573951885 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_full.2201745662 |
|
|
Oct 09 08:20:22 AM UTC 24 |
Oct 09 08:24:09 AM UTC 24 |
15305944873 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_smbus_maxlen.516645116 |
|
|
Oct 09 08:24:05 AM UTC 24 |
Oct 09 08:24:11 AM UTC 24 |
1951236629 ps |
| T254 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_host_may_nack.1199984497 |
|
|
Oct 09 08:23:59 AM UTC 24 |
Oct 09 08:24:11 AM UTC 24 |
2608408371 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_alert_test.1308056357 |
|
|
Oct 09 08:24:10 AM UTC 24 |
Oct 09 08:24:12 AM UTC 24 |
169669114 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_host_override.3714730580 |
|
|
Oct 09 08:24:10 AM UTC 24 |
Oct 09 08:24:12 AM UTC 24 |
64268865 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull.2030006706 |
|
|
Oct 09 08:24:05 AM UTC 24 |
Oct 09 08:24:13 AM UTC 24 |
8670851949 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull_addr.1774044948 |
|
|
Oct 09 08:24:08 AM UTC 24 |
Oct 09 08:24:13 AM UTC 24 |
2271139366 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_nack_txstretch.3133647497 |
|
|
Oct 09 08:24:10 AM UTC 24 |
Oct 09 08:24:13 AM UTC 24 |
478715272 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_full.2172196930 |
|
|
Oct 09 08:21:14 AM UTC 24 |
Oct 09 08:24:14 AM UTC 24 |
5431240231 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_stretch.2018041273 |
|
|
Oct 09 08:23:36 AM UTC 24 |
Oct 09 08:24:17 AM UTC 24 |
3225039031 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_fmt.3387850398 |
|
|
Oct 09 08:24:14 AM UTC 24 |
Oct 09 08:24:18 AM UTC 24 |
716459091 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_host_perf_precise.653549555 |
|
|
Oct 09 08:24:16 AM UTC 24 |
Oct 09 08:24:24 AM UTC 24 |
218745743 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_rx.2560198559 |
|
|
Oct 09 08:24:15 AM UTC 24 |
Oct 09 08:24:24 AM UTC 24 |
171242432 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_fmt_empty.944910095 |
|
|
Oct 09 08:24:15 AM UTC 24 |
Oct 09 08:24:24 AM UTC 24 |
2742566692 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_watermark.2655947134 |
|
|
Oct 09 08:22:05 AM UTC 24 |
Oct 09 08:24:31 AM UTC 24 |
6384044973 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/7.i2c_target_stress_wr.2404612745 |
|
|
Oct 09 08:17:34 AM UTC 24 |
Oct 09 08:24:33 AM UTC 24 |
41950592871 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_host_perf_precise.4231170487 |
|
|
Oct 09 08:24:59 AM UTC 24 |
Oct 09 08:25:04 AM UTC 24 |
290218307 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_host_error_intr.4157147390 |
|
|
Oct 09 08:24:18 AM UTC 24 |
Oct 09 08:24:34 AM UTC 24 |
1257989355 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_full.1260919171 |
|
|
Oct 09 08:22:09 AM UTC 24 |
Oct 09 08:24:36 AM UTC 24 |
5534691725 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_target_stretch.4193720009 |
|
|
Oct 09 08:24:33 AM UTC 24 |
Oct 09 08:24:36 AM UTC 24 |
1922813991 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_full.655259819 |
|
|
Oct 09 08:23:14 AM UTC 24 |
Oct 09 08:25:05 AM UTC 24 |
6327322180 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_acq.2133683167 |
|
|
Oct 09 08:24:36 AM UTC 24 |
Oct 09 08:24:40 AM UTC 24 |
703367557 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_target_intr_smoke.2063046605 |
|
|
Oct 09 08:24:33 AM UTC 24 |
Oct 09 08:24:41 AM UTC 24 |
1847749978 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_host_perf.3633657386 |
|
|
Oct 09 08:23:15 AM UTC 24 |
Oct 09 08:24:42 AM UTC 24 |
6055872694 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_tx.772079585 |
|
|
Oct 09 08:24:37 AM UTC 24 |
Oct 09 08:24:42 AM UTC 24 |
1080952282 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_target_timeout.3927475752 |
|
|
Oct 09 08:24:34 AM UTC 24 |
Oct 09 08:24:47 AM UTC 24 |
13084761792 ps |
| T78 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_host_mode_toggle.432029325 |
|
|
Oct 09 08:24:43 AM UTC 24 |
Oct 09 08:24:47 AM UTC 24 |
127835652 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_target_perf.498750312 |
|
|
Oct 09 08:24:38 AM UTC 24 |
Oct 09 08:24:48 AM UTC 24 |
3521857172 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_target_bad_addr.3289853229 |
|
|
Oct 09 08:24:41 AM UTC 24 |
Oct 09 08:24:50 AM UTC 24 |
1238456658 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_tx.139739706 |
|
|
Oct 09 08:24:48 AM UTC 24 |
Oct 09 08:24:51 AM UTC 24 |
65542366 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_target_smoke.394828773 |
|
|
Oct 09 08:24:32 AM UTC 24 |
Oct 09 08:24:51 AM UTC 24 |
4251609455 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_acq.3077837741 |
|
|
Oct 09 08:24:47 AM UTC 24 |
Oct 09 08:24:51 AM UTC 24 |
1067229239 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_target_intr_stress_wr.1247058550 |
|
|
Oct 09 08:24:33 AM UTC 24 |
Oct 09 08:24:52 AM UTC 24 |
4881628251 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_target_tx_stretch_ctrl.675928579 |
|
|
Oct 09 08:24:50 AM UTC 24 |
Oct 09 08:24:54 AM UTC 24 |
68018453 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_host_smoke.3477442497 |
|
|
Oct 09 08:24:10 AM UTC 24 |
Oct 09 08:24:54 AM UTC 24 |
4346589000 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_host_stretch_timeout.1803761215 |
|
|
Oct 09 08:24:16 AM UTC 24 |
Oct 09 08:24:54 AM UTC 24 |
1564129947 ps |
| T256 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_host_may_nack.3037981134 |
|
|
Oct 09 08:24:43 AM UTC 24 |
Oct 09 08:24:55 AM UTC 24 |
1512338168 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_alert_test.4203299347 |
|
|
Oct 09 08:24:53 AM UTC 24 |
Oct 09 08:24:55 AM UTC 24 |
86316825 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_target_smbus_maxlen.2593052562 |
|
|
Oct 09 08:24:51 AM UTC 24 |
Oct 09 08:24:55 AM UTC 24 |
497451875 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_host_override.3656141778 |
|
|
Oct 09 08:24:55 AM UTC 24 |
Oct 09 08:24:57 AM UTC 24 |
73696771 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull_addr.4285014709 |
|
|
Oct 09 08:24:52 AM UTC 24 |
Oct 09 08:24:58 AM UTC 24 |
547176100 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull.3146814719 |
|
|
Oct 09 08:24:52 AM UTC 24 |
Oct 09 08:24:59 AM UTC 24 |
531122550 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_rx.3948773080 |
|
|
Oct 09 08:24:57 AM UTC 24 |
Oct 09 08:25:06 AM UTC 24 |
821297268 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_fmt_empty.2346786775 |
|
|
Oct 09 08:24:57 AM UTC 24 |
Oct 09 08:25:07 AM UTC 24 |
702304477 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_full.1828482010 |
|
|
Oct 09 08:24:15 AM UTC 24 |
Oct 09 08:25:08 AM UTC 24 |
1984217356 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_overflow.574130088 |
|
|
Oct 09 08:24:12 AM UTC 24 |
Oct 09 08:25:13 AM UTC 24 |
1754803639 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_watermark.3739804811 |
|
|
Oct 09 08:24:12 AM UTC 24 |
Oct 09 08:25:17 AM UTC 24 |
2712622521 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_host_stretch_timeout.3077522006 |
|
|
Oct 09 08:25:00 AM UTC 24 |
Oct 09 08:25:18 AM UTC 24 |
712579531 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_host_error_intr.1047036357 |
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|
Oct 09 08:25:05 AM UTC 24 |
Oct 09 08:25:18 AM UTC 24 |
236910533 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_stress_rd.3181364860 |
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|
Oct 09 08:25:09 AM UTC 24 |
Oct 09 08:25:22 AM UTC 24 |
1176819219 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_acq.3256376266 |
|
|
Oct 09 08:25:23 AM UTC 24 |
Oct 09 08:25:26 AM UTC 24 |
326507412 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_tx.3520368779 |
|
|
Oct 09 08:25:26 AM UTC 24 |
Oct 09 08:25:29 AM UTC 24 |
922936470 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_intr_smoke.799503838 |
|
|
Oct 09 08:25:18 AM UTC 24 |
Oct 09 08:25:30 AM UTC 24 |
858912670 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_host_perf_precise.2634947953 |
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|
Oct 09 08:22:11 AM UTC 24 |
Oct 09 08:25:31 AM UTC 24 |
23463057062 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_target_stress_rd.4224555989 |
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|
Oct 09 08:24:33 AM UTC 24 |
Oct 09 08:25:31 AM UTC 24 |
3849677336 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_perf.1075310835 |
|
|
Oct 09 08:25:27 AM UTC 24 |
Oct 09 08:25:33 AM UTC 24 |
832588745 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_timeout.97011292 |
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|
Oct 09 08:25:19 AM UTC 24 |
Oct 09 08:25:33 AM UTC 24 |
2952312766 ps |