| T616 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_host_perf.2892556675 |
|
|
Oct 09 08:21:15 AM UTC 24 |
Oct 09 08:25:34 AM UTC 24 |
5110296747 ps |
| T77 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_host_mode_toggle.4123939103 |
|
|
Oct 09 08:25:32 AM UTC 24 |
Oct 09 08:25:37 AM UTC 24 |
73199853 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/8.i2c_target_stress_wr.107352174 |
|
|
Oct 09 08:18:31 AM UTC 24 |
Oct 09 08:25:38 AM UTC 24 |
58769007951 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_host_smoke.681401421 |
|
|
Oct 09 08:24:55 AM UTC 24 |
Oct 09 08:25:39 AM UTC 24 |
952929398 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_bad_addr.2595421815 |
|
|
Oct 09 08:25:31 AM UTC 24 |
Oct 09 08:25:40 AM UTC 24 |
832589464 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_watermarks_acq.165208664 |
|
|
Oct 09 08:25:35 AM UTC 24 |
Oct 09 08:25:41 AM UTC 24 |
2369992961 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_watermarks_tx.1201575953 |
|
|
Oct 09 08:25:35 AM UTC 24 |
Oct 09 08:25:41 AM UTC 24 |
467211043 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_alert_test.687885215 |
|
|
Oct 09 08:25:41 AM UTC 24 |
Oct 09 08:25:44 AM UTC 24 |
46579571 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_nack_txstretch.330691701 |
|
|
Oct 09 08:25:41 AM UTC 24 |
Oct 09 08:25:46 AM UTC 24 |
169198093 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_smbus_maxlen.1967445611 |
|
|
Oct 09 08:25:38 AM UTC 24 |
Oct 09 08:25:46 AM UTC 24 |
475113519 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_nack_acqfull_addr.176508074 |
|
|
Oct 09 08:25:40 AM UTC 24 |
Oct 09 08:25:46 AM UTC 24 |
374268862 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_nack_acqfull.3043493175 |
|
|
Oct 09 08:25:40 AM UTC 24 |
Oct 09 08:25:47 AM UTC 24 |
2252151327 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_tx_stretch_ctrl.226029682 |
|
|
Oct 09 08:25:35 AM UTC 24 |
Oct 09 08:25:47 AM UTC 24 |
245045741 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_host_override.1167168204 |
|
|
Oct 09 08:25:45 AM UTC 24 |
Oct 09 08:25:47 AM UTC 24 |
37714855 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_reset_fmt.1524900572 |
|
|
Oct 09 08:25:48 AM UTC 24 |
Oct 09 08:25:51 AM UTC 24 |
541850112 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_smoke.3577241975 |
|
|
Oct 09 08:25:07 AM UTC 24 |
Oct 09 08:25:52 AM UTC 24 |
1143003259 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_stress_wr.512414192 |
|
|
Oct 09 08:25:08 AM UTC 24 |
Oct 09 08:25:52 AM UTC 24 |
33698254860 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_host_may_nack.3228879655 |
|
|
Oct 09 08:25:32 AM UTC 24 |
Oct 09 08:25:54 AM UTC 24 |
347427818 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_host_perf_precise.2997044553 |
|
|
Oct 09 08:25:53 AM UTC 24 |
Oct 09 08:25:56 AM UTC 24 |
72543042 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_host_error_intr.260717369 |
|
|
Oct 09 08:25:54 AM UTC 24 |
Oct 09 08:25:59 AM UTC 24 |
73158304 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_reset_rx.1504446191 |
|
|
Oct 09 08:25:49 AM UTC 24 |
Oct 09 08:26:04 AM UTC 24 |
380612368 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_stress_all.575455086 |
|
|
Oct 09 08:23:54 AM UTC 24 |
Oct 09 08:26:05 AM UTC 24 |
46602114732 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_smoke.1793694319 |
|
|
Oct 09 08:26:00 AM UTC 24 |
Oct 09 08:26:13 AM UTC 24 |
914738592 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_stretch.807385161 |
|
|
Oct 09 08:26:06 AM UTC 24 |
Oct 09 08:26:18 AM UTC 24 |
3716125871 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/12.i2c_target_stress_wr.3734495496 |
|
|
Oct 09 08:22:16 AM UTC 24 |
Oct 09 08:26:19 AM UTC 24 |
59377058123 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_fmt_empty.1134696396 |
|
|
Oct 09 08:25:48 AM UTC 24 |
Oct 09 08:26:21 AM UTC 24 |
1894952883 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_host_stretch_timeout.243893229 |
|
|
Oct 09 08:25:53 AM UTC 24 |
Oct 09 08:26:24 AM UTC 24 |
2422408366 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_reset_tx.3671575614 |
|
|
Oct 09 08:26:22 AM UTC 24 |
Oct 09 08:26:26 AM UTC 24 |
631384769 ps |
| T293 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_reset_acq.3458232822 |
|
|
Oct 09 08:26:22 AM UTC 24 |
Oct 09 08:26:26 AM UTC 24 |
239542562 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_intr_stress_wr.3789582849 |
|
|
Oct 09 08:25:18 AM UTC 24 |
Oct 09 08:26:27 AM UTC 24 |
23401536833 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_intr_smoke.3655370737 |
|
|
Oct 09 08:26:21 AM UTC 24 |
Oct 09 08:26:28 AM UTC 24 |
803739385 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_stress_all.3999788484 |
|
|
Oct 09 08:21:48 AM UTC 24 |
Oct 09 08:26:30 AM UTC 24 |
40395385352 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_timeout.1807560575 |
|
|
Oct 09 08:26:22 AM UTC 24 |
Oct 09 08:26:31 AM UTC 24 |
4661929796 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_host_smoke.2040435298 |
|
|
Oct 09 08:25:42 AM UTC 24 |
Oct 09 08:26:32 AM UTC 24 |
2140456366 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_overflow.3756258241 |
|
|
Oct 09 08:25:47 AM UTC 24 |
Oct 09 08:26:33 AM UTC 24 |
15092784207 ps |
| T270 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_perf.4022928293 |
|
|
Oct 09 08:26:25 AM UTC 24 |
Oct 09 08:26:34 AM UTC 24 |
826079679 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_hrst.1769274794 |
|
|
Oct 09 08:26:34 AM UTC 24 |
Oct 09 08:26:38 AM UTC 24 |
264709993 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_watermarks_tx.1231964969 |
|
|
Oct 09 08:26:35 AM UTC 24 |
Oct 09 08:26:39 AM UTC 24 |
2058746800 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_watermarks_acq.418767935 |
|
|
Oct 09 08:26:35 AM UTC 24 |
Oct 09 08:26:40 AM UTC 24 |
533898706 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_nack_acqfull_addr.384571444 |
|
|
Oct 09 08:26:36 AM UTC 24 |
Oct 09 08:26:40 AM UTC 24 |
1851694839 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_smbus_maxlen.2229910784 |
|
|
Oct 09 08:26:35 AM UTC 24 |
Oct 09 08:26:41 AM UTC 24 |
980453363 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_nack_acqfull.4003194323 |
|
|
Oct 09 08:26:35 AM UTC 24 |
Oct 09 08:26:42 AM UTC 24 |
2578045555 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_alert_test.496914759 |
|
|
Oct 09 08:26:40 AM UTC 24 |
Oct 09 08:26:42 AM UTC 24 |
17363653 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_nack_txstretch.15083200 |
|
|
Oct 09 08:26:39 AM UTC 24 |
Oct 09 08:26:42 AM UTC 24 |
540557642 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_bad_addr.2370068911 |
|
|
Oct 09 08:26:34 AM UTC 24 |
Oct 09 08:26:42 AM UTC 24 |
1564715148 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_tx_stretch_ctrl.3740130976 |
|
|
Oct 09 08:26:35 AM UTC 24 |
Oct 09 08:26:43 AM UTC 24 |
216010395 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_host_override.2704575673 |
|
|
Oct 09 08:26:41 AM UTC 24 |
Oct 09 08:26:43 AM UTC 24 |
48280420 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/6.i2c_host_perf_precise.3229301743 |
|
|
Oct 09 08:16:07 AM UTC 24 |
Oct 09 08:26:45 AM UTC 24 |
24284316448 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_reset_fmt.447317808 |
|
|
Oct 09 08:26:42 AM UTC 24 |
Oct 09 08:26:45 AM UTC 24 |
464926781 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_target_stress_all.2725092428 |
|
|
Oct 09 08:24:41 AM UTC 24 |
Oct 09 08:26:46 AM UTC 24 |
139588044458 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_stress_rd.1841363558 |
|
|
Oct 09 08:26:05 AM UTC 24 |
Oct 09 08:26:47 AM UTC 24 |
3155249971 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_target_stress_all.2539364737 |
|
|
Oct 09 08:25:30 AM UTC 24 |
Oct 09 08:26:48 AM UTC 24 |
82725552802 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_full.1262025359 |
|
|
Oct 09 08:24:58 AM UTC 24 |
Oct 09 08:26:49 AM UTC 24 |
16810594535 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_reset_rx.622554275 |
|
|
Oct 09 08:26:44 AM UTC 24 |
Oct 09 08:26:50 AM UTC 24 |
536042001 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_host_error_intr.606236529 |
|
|
Oct 09 08:26:46 AM UTC 24 |
Oct 09 08:26:53 AM UTC 24 |
190256054 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_host_perf.3347194306 |
|
|
Oct 09 08:26:44 AM UTC 24 |
Oct 09 08:26:53 AM UTC 24 |
392030479 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_fmt_empty.1913217657 |
|
|
Oct 09 08:26:42 AM UTC 24 |
Oct 09 08:26:55 AM UTC 24 |
3001507546 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_target_stretch.3789905561 |
|
|
Oct 09 08:26:52 AM UTC 24 |
Oct 09 08:26:55 AM UTC 24 |
187410113 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_host_perf_precise.529551480 |
|
|
Oct 09 08:26:44 AM UTC 24 |
Oct 09 08:26:57 AM UTC 24 |
234006776 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_stress_wr.294885333 |
|
|
Oct 09 08:26:03 AM UTC 24 |
Oct 09 08:26:58 AM UTC 24 |
25097680712 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_host_may_nack.1725649642 |
|
|
Oct 09 08:26:35 AM UTC 24 |
Oct 09 08:26:58 AM UTC 24 |
1669839924 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_reset_acq.4008586053 |
|
|
Oct 09 08:26:58 AM UTC 24 |
Oct 09 08:27:01 AM UTC 24 |
1079888948 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_target_intr_stress_wr.3674010110 |
|
|
Oct 09 08:26:22 AM UTC 24 |
Oct 09 08:27:02 AM UTC 24 |
20726104141 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_target_timeout.949229296 |
|
|
Oct 09 08:26:56 AM UTC 24 |
Oct 09 08:27:04 AM UTC 24 |
5162653802 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_target_intr_smoke.2997059980 |
|
|
Oct 09 08:26:54 AM UTC 24 |
Oct 09 08:27:04 AM UTC 24 |
1110676430 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_host_stretch_timeout.1345212574 |
|
|
Oct 09 08:26:46 AM UTC 24 |
Oct 09 08:27:05 AM UTC 24 |
806743464 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_host_smoke.3002588306 |
|
|
Oct 09 08:26:40 AM UTC 24 |
Oct 09 08:27:07 AM UTC 24 |
6428167439 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/14.i2c_host_perf.1388924717 |
|
|
Oct 09 08:24:16 AM UTC 24 |
Oct 09 08:28:41 AM UTC 24 |
24980342796 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_reset_tx.1939444329 |
|
|
Oct 09 08:27:09 AM UTC 24 |
Oct 09 08:27:13 AM UTC 24 |
436625104 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_watermarks_tx.3359237514 |
|
|
Oct 09 08:27:11 AM UTC 24 |
Oct 09 08:27:14 AM UTC 24 |
1356239707 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_target_stress_rd.170018444 |
|
|
Oct 09 08:26:50 AM UTC 24 |
Oct 09 08:27:16 AM UTC 24 |
5949130278 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_target_perf.3294721180 |
|
|
Oct 09 08:27:09 AM UTC 24 |
Oct 09 08:27:17 AM UTC 24 |
546110563 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_watermarks_acq.1160522766 |
|
|
Oct 09 08:27:11 AM UTC 24 |
Oct 09 08:27:18 AM UTC 24 |
640668222 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_target_nack_txstretch.3196361569 |
|
|
Oct 09 08:27:15 AM UTC 24 |
Oct 09 08:27:19 AM UTC 24 |
248174286 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_target_smbus_maxlen.996848603 |
|
|
Oct 09 08:27:14 AM UTC 24 |
Oct 09 08:27:19 AM UTC 24 |
513221888 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_target_nack_acqfull_addr.2083955160 |
|
|
Oct 09 08:27:14 AM UTC 24 |
Oct 09 08:27:20 AM UTC 24 |
1536270777 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_alert_test.3419266929 |
|
|
Oct 09 08:27:18 AM UTC 24 |
Oct 09 08:27:20 AM UTC 24 |
18303380 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_overflow.3495174163 |
|
|
Oct 09 08:24:57 AM UTC 24 |
Oct 09 08:27:20 AM UTC 24 |
8705911400 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_target_nack_acqfull.3848294580 |
|
|
Oct 09 08:27:14 AM UTC 24 |
Oct 09 08:27:20 AM UTC 24 |
543261441 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_target_bad_addr.3607936142 |
|
|
Oct 09 08:27:09 AM UTC 24 |
Oct 09 08:27:21 AM UTC 24 |
1186965359 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_host_override.366484808 |
|
|
Oct 09 08:27:19 AM UTC 24 |
Oct 09 08:27:21 AM UTC 24 |
26282140 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_target_stress_wr.2004020614 |
|
|
Oct 09 08:26:49 AM UTC 24 |
Oct 09 08:27:23 AM UTC 24 |
20234730105 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_reset_fmt.1925072824 |
|
|
Oct 09 08:27:21 AM UTC 24 |
Oct 09 08:27:23 AM UTC 24 |
184821395 ps |
| T84 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_target_smoke.3608413791 |
|
|
Oct 09 08:26:47 AM UTC 24 |
Oct 09 08:27:24 AM UTC 24 |
4203222018 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_reset_rx.26761133 |
|
|
Oct 09 08:27:21 AM UTC 24 |
Oct 09 08:27:29 AM UTC 24 |
194774864 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_intr_stress_wr.2726288432 |
|
|
Oct 09 08:23:44 AM UTC 24 |
Oct 09 08:27:32 AM UTC 24 |
15215211599 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_fmt_empty.3811233248 |
|
|
Oct 09 08:27:21 AM UTC 24 |
Oct 09 08:27:33 AM UTC 24 |
613184797 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_host_error_intr.3356868257 |
|
|
Oct 09 08:27:25 AM UTC 24 |
Oct 09 08:27:34 AM UTC 24 |
1691771804 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_host_may_nack.1995008473 |
|
|
Oct 09 08:27:11 AM UTC 24 |
Oct 09 08:27:34 AM UTC 24 |
481971777 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_host_stretch_timeout.275735510 |
|
|
Oct 09 08:27:24 AM UTC 24 |
Oct 09 08:27:39 AM UTC 24 |
6438370858 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_host_perf.4209251193 |
|
|
Oct 09 08:25:51 AM UTC 24 |
Oct 09 08:27:42 AM UTC 24 |
28456224299 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_host_perf_precise.3842272642 |
|
|
Oct 09 08:27:23 AM UTC 24 |
Oct 09 08:27:43 AM UTC 24 |
729527900 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_smoke.567450808 |
|
|
Oct 09 08:27:26 AM UTC 24 |
Oct 09 08:27:43 AM UTC 24 |
1666207438 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_intr_smoke.401776184 |
|
|
Oct 09 08:27:34 AM UTC 24 |
Oct 09 08:27:45 AM UTC 24 |
2482289122 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_overflow.2839215028 |
|
|
Oct 09 08:26:41 AM UTC 24 |
Oct 09 08:27:46 AM UTC 24 |
7771322765 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_reset_acq.2152944363 |
|
|
Oct 09 08:27:44 AM UTC 24 |
Oct 09 08:27:46 AM UTC 24 |
546966418 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_reset_tx.2279006848 |
|
|
Oct 09 08:27:44 AM UTC 24 |
Oct 09 08:27:47 AM UTC 24 |
182364788 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_host_perf.3189160059 |
|
|
Oct 09 08:27:21 AM UTC 24 |
Oct 09 08:27:49 AM UTC 24 |
5472263569 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_stress_wr.1045044025 |
|
|
Oct 09 08:27:30 AM UTC 24 |
Oct 09 08:27:50 AM UTC 24 |
14116449660 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_timeout.2550323610 |
|
|
Oct 09 08:27:41 AM UTC 24 |
Oct 09 08:27:51 AM UTC 24 |
1348521881 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_perf.539404636 |
|
|
Oct 09 08:27:45 AM UTC 24 |
Oct 09 08:27:52 AM UTC 24 |
715387879 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_host_mode_toggle.2671230096 |
|
|
Oct 09 08:27:48 AM UTC 24 |
Oct 09 08:27:53 AM UTC 24 |
475603352 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_watermarks_tx.895377687 |
|
|
Oct 09 08:27:52 AM UTC 24 |
Oct 09 08:27:55 AM UTC 24 |
1600020309 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_watermarks_acq.966185737 |
|
|
Oct 09 08:27:51 AM UTC 24 |
Oct 09 08:27:56 AM UTC 24 |
2436512008 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_smbus_maxlen.4064187212 |
|
|
Oct 09 08:27:53 AM UTC 24 |
Oct 09 08:27:58 AM UTC 24 |
2213069022 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_bad_addr.1100734681 |
|
|
Oct 09 08:27:47 AM UTC 24 |
Oct 09 08:27:59 AM UTC 24 |
2077636954 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_nack_acqfull.3867673817 |
|
|
Oct 09 08:27:54 AM UTC 24 |
Oct 09 08:28:00 AM UTC 24 |
2304751512 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_nack_txstretch.892467224 |
|
|
Oct 09 08:27:58 AM UTC 24 |
Oct 09 08:28:01 AM UTC 24 |
495890013 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_host_perf.3844356510 |
|
|
Oct 09 08:24:59 AM UTC 24 |
Oct 09 08:28:02 AM UTC 24 |
27588135375 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_alert_test.1030035180 |
|
|
Oct 09 08:28:00 AM UTC 24 |
Oct 09 08:28:02 AM UTC 24 |
30499863 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_nack_acqfull_addr.3255136428 |
|
|
Oct 09 08:27:56 AM UTC 24 |
Oct 09 08:28:02 AM UTC 24 |
2249083223 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_stress_rd.4249050201 |
|
|
Oct 09 08:27:32 AM UTC 24 |
Oct 09 08:28:03 AM UTC 24 |
1591569836 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_host_override.3868997483 |
|
|
Oct 09 08:28:01 AM UTC 24 |
Oct 09 08:28:03 AM UTC 24 |
136235941 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_watermark.1051356347 |
|
|
Oct 09 08:23:13 AM UTC 24 |
Oct 09 08:28:03 AM UTC 24 |
18619499066 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_reset_fmt.50140630 |
|
|
Oct 09 08:28:03 AM UTC 24 |
Oct 09 08:28:06 AM UTC 24 |
343463140 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_host_perf_precise.3906038406 |
|
|
Oct 09 08:28:07 AM UTC 24 |
Oct 09 08:28:10 AM UTC 24 |
341951859 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_reset_rx.506483349 |
|
|
Oct 09 08:28:04 AM UTC 24 |
Oct 09 08:28:11 AM UTC 24 |
574474514 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_tx_stretch_ctrl.2583005998 |
|
|
Oct 09 08:27:53 AM UTC 24 |
Oct 09 08:28:12 AM UTC 24 |
1230851048 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_host_error_intr.570725027 |
|
|
Oct 09 08:28:12 AM UTC 24 |
Oct 09 08:28:15 AM UTC 24 |
239392252 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_fmt_empty.5449346 |
|
|
Oct 09 08:28:03 AM UTC 24 |
Oct 09 08:28:15 AM UTC 24 |
1521761489 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_stretch.912964279 |
|
|
Oct 09 08:27:34 AM UTC 24 |
Oct 09 08:28:20 AM UTC 24 |
1293978138 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_host_may_nack.2053967150 |
|
|
Oct 09 08:27:51 AM UTC 24 |
Oct 09 08:28:23 AM UTC 24 |
1194202138 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/11.i2c_target_intr_stress_wr.2074137465 |
|
|
Oct 09 08:21:44 AM UTC 24 |
Oct 09 08:28:24 AM UTC 24 |
22025548956 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_host_stretch_timeout.4075658397 |
|
|
Oct 09 08:28:11 AM UTC 24 |
Oct 09 08:28:24 AM UTC 24 |
1925155254 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_host_smoke.155231881 |
|
|
Oct 09 08:27:18 AM UTC 24 |
Oct 09 08:28:25 AM UTC 24 |
1281552733 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/13.i2c_target_stress_wr.944491057 |
|
|
Oct 09 08:23:31 AM UTC 24 |
Oct 09 08:28:27 AM UTC 24 |
33921278706 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_reset_acq.3417462783 |
|
|
Oct 09 08:28:29 AM UTC 24 |
Oct 09 08:28:32 AM UTC 24 |
192097969 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_overflow.2393366201 |
|
|
Oct 09 08:27:20 AM UTC 24 |
Oct 09 08:28:32 AM UTC 24 |
2491505448 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_host_smoke.2070382089 |
|
|
Oct 09 08:28:00 AM UTC 24 |
Oct 09 08:28:32 AM UTC 24 |
1816637720 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_stress_wr.2980836182 |
|
|
Oct 09 08:28:16 AM UTC 24 |
Oct 09 08:28:32 AM UTC 24 |
13313226816 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_reset_tx.3283550514 |
|
|
Oct 09 08:28:32 AM UTC 24 |
Oct 09 08:28:35 AM UTC 24 |
592212769 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_full.3989331994 |
|
|
Oct 09 08:26:44 AM UTC 24 |
Oct 09 08:28:36 AM UTC 24 |
13352096878 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_intr_smoke.87241141 |
|
|
Oct 09 08:28:29 AM UTC 24 |
Oct 09 08:28:37 AM UTC 24 |
4368559206 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_timeout.3129521422 |
|
|
Oct 09 08:28:29 AM UTC 24 |
Oct 09 08:28:38 AM UTC 24 |
3197497449 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_smoke.4189679266 |
|
|
Oct 09 08:28:16 AM UTC 24 |
Oct 09 08:28:38 AM UTC 24 |
9314935000 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_hrst.1352573949 |
|
|
Oct 09 08:28:34 AM UTC 24 |
Oct 09 08:28:39 AM UTC 24 |
337588735 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_bad_addr.3879876765 |
|
|
Oct 09 08:28:34 AM UTC 24 |
Oct 09 08:28:40 AM UTC 24 |
2503533562 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_perf.3361670276 |
|
|
Oct 09 08:28:33 AM UTC 24 |
Oct 09 08:28:40 AM UTC 24 |
6047965870 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_reset_fmt.3797745694 |
|
|
Oct 09 08:29:49 AM UTC 24 |
Oct 09 08:29:52 AM UTC 24 |
372504361 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_watermarks_tx.866692325 |
|
|
Oct 09 08:28:38 AM UTC 24 |
Oct 09 08:28:41 AM UTC 24 |
407210399 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_watermarks_acq.1966536313 |
|
|
Oct 09 08:28:37 AM UTC 24 |
Oct 09 08:28:42 AM UTC 24 |
601441905 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_tx_stretch_ctrl.3204905864 |
|
|
Oct 09 08:28:38 AM UTC 24 |
Oct 09 08:28:43 AM UTC 24 |
137071668 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_stress_rd.2684667245 |
|
|
Oct 09 08:28:27 AM UTC 24 |
Oct 09 08:28:43 AM UTC 24 |
677630141 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_full.2993586988 |
|
|
Oct 09 08:25:49 AM UTC 24 |
Oct 09 08:28:46 AM UTC 24 |
3073961048 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_host_override.1788162810 |
|
|
Oct 09 08:29:48 AM UTC 24 |
Oct 09 08:29:50 AM UTC 24 |
28276777 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_alert_test.1835649201 |
|
|
Oct 09 08:28:45 AM UTC 24 |
Oct 09 08:28:47 AM UTC 24 |
38548327 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_host_override.1052112924 |
|
|
Oct 09 08:28:45 AM UTC 24 |
Oct 09 08:28:47 AM UTC 24 |
44863918 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_smbus_maxlen.3697410521 |
|
|
Oct 09 08:28:44 AM UTC 24 |
Oct 09 08:28:48 AM UTC 24 |
1030381065 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_host_may_nack.2978018039 |
|
|
Oct 09 08:28:36 AM UTC 24 |
Oct 09 08:28:48 AM UTC 24 |
1848661620 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_nack_acqfull_addr.923834235 |
|
|
Oct 09 08:28:44 AM UTC 24 |
Oct 09 08:28:48 AM UTC 24 |
1988983762 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_reset_fmt.1563200564 |
|
|
Oct 09 08:28:46 AM UTC 24 |
Oct 09 08:28:48 AM UTC 24 |
148249020 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_nack_txstretch.1125870477 |
|
|
Oct 09 08:28:45 AM UTC 24 |
Oct 09 08:28:48 AM UTC 24 |
474340711 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_nack_acqfull.1596613659 |
|
|
Oct 09 08:28:44 AM UTC 24 |
Oct 09 08:28:49 AM UTC 24 |
393963145 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_host_error_intr.2012320464 |
|
|
Oct 09 08:28:49 AM UTC 24 |
Oct 09 08:28:54 AM UTC 24 |
192085286 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_fmt_empty.2166991349 |
|
|
Oct 09 08:28:46 AM UTC 24 |
Oct 09 08:28:56 AM UTC 24 |
146383862 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_overflow.503922864 |
|
|
Oct 09 08:28:02 AM UTC 24 |
Oct 09 08:28:58 AM UTC 24 |
7477140284 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_reset_rx.3813210961 |
|
|
Oct 09 08:28:47 AM UTC 24 |
Oct 09 08:29:00 AM UTC 24 |
723542011 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_target_stress_all.2932411871 |
|
|
Oct 09 08:27:09 AM UTC 24 |
Oct 09 08:29:01 AM UTC 24 |
67833705875 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_target_stress_rd.1085993488 |
|
|
Oct 09 08:28:55 AM UTC 24 |
Oct 09 08:29:05 AM UTC 24 |
815120700 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_target_stretch.3958781296 |
|
|
Oct 09 08:29:02 AM UTC 24 |
Oct 09 08:29:05 AM UTC 24 |
2250770697 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_host_stretch_timeout.3934492428 |
|
|
Oct 09 08:28:49 AM UTC 24 |
Oct 09 08:29:05 AM UTC 24 |
2786863971 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_host_smoke.1161321585 |
|
|
Oct 09 08:28:45 AM UTC 24 |
Oct 09 08:29:06 AM UTC 24 |
6077994650 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_watermark.4098093213 |
|
|
Oct 09 08:26:41 AM UTC 24 |
Oct 09 08:29:08 AM UTC 24 |
2740913944 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_reset_acq.676202154 |
|
|
Oct 09 08:29:06 AM UTC 24 |
Oct 09 08:29:09 AM UTC 24 |
517593880 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_reset_tx.1168404472 |
|
|
Oct 09 08:29:06 AM UTC 24 |
Oct 09 08:29:09 AM UTC 24 |
290282874 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_full.548512705 |
|
|
Oct 09 08:28:04 AM UTC 24 |
Oct 09 08:29:12 AM UTC 24 |
13180467751 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_host_perf_precise.3761745453 |
|
|
Oct 09 08:29:51 AM UTC 24 |
Oct 09 08:29:55 AM UTC 24 |
138550056 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_target_intr_smoke.1817587705 |
|
|
Oct 09 08:29:03 AM UTC 24 |
Oct 09 08:29:13 AM UTC 24 |
2825674766 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_target_perf.79392902 |
|
|
Oct 09 08:29:06 AM UTC 24 |
Oct 09 08:29:14 AM UTC 24 |
708370560 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_target_timeout.1062291353 |
|
|
Oct 09 08:29:04 AM UTC 24 |
Oct 09 08:29:14 AM UTC 24 |
6198144386 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_stretch.1066395178 |
|
|
Oct 09 08:28:29 AM UTC 24 |
Oct 09 08:29:15 AM UTC 24 |
2989071812 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_host_perf.247265587 |
|
|
Oct 09 08:28:05 AM UTC 24 |
Oct 09 08:29:16 AM UTC 24 |
4268652869 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_watermarks_tx.2400905097 |
|
|
Oct 09 08:29:14 AM UTC 24 |
Oct 09 08:29:17 AM UTC 24 |
482860072 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_watermarks_acq.3117946513 |
|
|
Oct 09 08:29:13 AM UTC 24 |
Oct 09 08:29:18 AM UTC 24 |
870559685 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_target_bad_addr.1895128828 |
|
|
Oct 09 08:29:07 AM UTC 24 |
Oct 09 08:29:18 AM UTC 24 |
1122419415 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_host_error_intr.159698119 |
|
|
Oct 09 08:29:53 AM UTC 24 |
Oct 09 08:29:57 AM UTC 24 |
135235239 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_alert_test.233921966 |
|
|
Oct 09 08:29:17 AM UTC 24 |
Oct 09 08:29:19 AM UTC 24 |
16746565 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_target_nack_acqfull.2736247450 |
|
|
Oct 09 08:29:15 AM UTC 24 |
Oct 09 08:29:19 AM UTC 24 |
436338567 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_target_smoke.1683101459 |
|
|
Oct 09 08:28:49 AM UTC 24 |
Oct 09 08:29:20 AM UTC 24 |
723630428 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_target_tx_stretch_ctrl.452696144 |
|
|
Oct 09 08:29:14 AM UTC 24 |
Oct 09 08:29:20 AM UTC 24 |
114411704 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_target_nack_txstretch.3827146910 |
|
|
Oct 09 08:29:16 AM UTC 24 |
Oct 09 08:29:20 AM UTC 24 |
443746091 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_target_smbus_maxlen.2545012801 |
|
|
Oct 09 08:29:15 AM UTC 24 |
Oct 09 08:29:20 AM UTC 24 |
483108668 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_host_may_nack.578039466 |
|
|
Oct 09 08:29:11 AM UTC 24 |
Oct 09 08:29:20 AM UTC 24 |
2001876705 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_host_override.3398955968 |
|
|
Oct 09 08:29:19 AM UTC 24 |
Oct 09 08:29:20 AM UTC 24 |
45610652 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_target_nack_acqfull_addr.609628909 |
|
|
Oct 09 08:29:16 AM UTC 24 |
Oct 09 08:29:21 AM UTC 24 |
542295095 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_stress_all.941716778 |
|
|
Oct 09 08:27:47 AM UTC 24 |
Oct 09 08:29:22 AM UTC 24 |
41520018539 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_reset_fmt.111373688 |
|
|
Oct 09 08:29:20 AM UTC 24 |
Oct 09 08:29:22 AM UTC 24 |
96321228 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_reset_rx.3786480199 |
|
|
Oct 09 08:29:51 AM UTC 24 |
Oct 09 08:29:57 AM UTC 24 |
204883728 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_watermark.3415847088 |
|
|
Oct 09 08:24:55 AM UTC 24 |
Oct 09 08:29:23 AM UTC 24 |
17728800216 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_host_perf_precise.180628265 |
|
|
Oct 09 08:29:21 AM UTC 24 |
Oct 09 08:29:25 AM UTC 24 |
278192607 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_reset_rx.3114822238 |
|
|
Oct 09 08:29:21 AM UTC 24 |
Oct 09 08:29:26 AM UTC 24 |
112250154 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_host_perf.1068273112 |
|
|
Oct 09 08:28:48 AM UTC 24 |
Oct 09 08:29:27 AM UTC 24 |
2703947086 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_host_error_intr.4023889253 |
|
|
Oct 09 08:29:23 AM UTC 24 |
Oct 09 08:29:32 AM UTC 24 |
335290159 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_target_intr_stress_wr.247077663 |
|
|
Oct 09 08:29:04 AM UTC 24 |
Oct 09 08:29:33 AM UTC 24 |
11891469708 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_fmt_empty.2534296678 |
|
|
Oct 09 08:29:21 AM UTC 24 |
Oct 09 08:29:35 AM UTC 24 |
206688971 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_watermark.866343934 |
|
|
Oct 09 08:28:02 AM UTC 24 |
Oct 09 08:29:36 AM UTC 24 |
4367830942 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_host_stretch_timeout.491536937 |
|
|
Oct 09 08:29:21 AM UTC 24 |
Oct 09 08:29:36 AM UTC 24 |
553071291 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/2.i2c_host_perf.3707724701 |
|
|
Oct 09 08:10:16 AM UTC 24 |
Oct 09 08:29:38 AM UTC 24 |
27647411688 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_target_intr_smoke.3471386203 |
|
|
Oct 09 08:29:30 AM UTC 24 |
Oct 09 08:29:38 AM UTC 24 |
592653534 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_host_smoke.2320733305 |
|
|
Oct 09 08:29:18 AM UTC 24 |
Oct 09 08:29:38 AM UTC 24 |
5203165285 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_reset_acq.1388205912 |
|
|
Oct 09 08:29:35 AM UTC 24 |
Oct 09 08:29:39 AM UTC 24 |
652095706 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_reset_tx.1873020445 |
|
|
Oct 09 08:29:36 AM UTC 24 |
Oct 09 08:29:39 AM UTC 24 |
183407408 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_target_intr_stress_wr.3609664690 |
|
|
Oct 09 08:27:36 AM UTC 24 |
Oct 09 08:29:39 AM UTC 24 |
19261232580 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_target_hrst.3950689646 |
|
|
Oct 09 08:29:39 AM UTC 24 |
Oct 09 08:29:43 AM UTC 24 |
595990293 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_target_timeout.175177322 |
|
|
Oct 09 08:29:33 AM UTC 24 |
Oct 09 08:29:43 AM UTC 24 |
2376344552 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_watermarks_tx.2361197282 |
|
|
Oct 09 08:29:40 AM UTC 24 |
Oct 09 08:29:44 AM UTC 24 |
163338240 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_target_tx_stretch_ctrl.1704974170 |
|
|
Oct 09 08:29:40 AM UTC 24 |
Oct 09 08:29:46 AM UTC 24 |
120170213 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_watermarks_acq.1591608532 |
|
|
Oct 09 08:29:40 AM UTC 24 |
Oct 09 08:29:47 AM UTC 24 |
12874510326 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_target_smbus_maxlen.872456154 |
|
|
Oct 09 08:29:42 AM UTC 24 |
Oct 09 08:29:47 AM UTC 24 |
4946172056 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_target_perf.3299262400 |
|
|
Oct 09 08:29:37 AM UTC 24 |
Oct 09 08:29:50 AM UTC 24 |
3184670908 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_target_nack_acqfull.2598344652 |
|
|
Oct 09 08:29:44 AM UTC 24 |
Oct 09 08:29:49 AM UTC 24 |
3342771420 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_target_bad_addr.3249926541 |
|
|
Oct 09 08:29:39 AM UTC 24 |
Oct 09 08:29:49 AM UTC 24 |
3801635560 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_alert_test.2246729964 |
|
|
Oct 09 08:29:47 AM UTC 24 |
Oct 09 08:29:49 AM UTC 24 |
121116077 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_target_nack_acqfull_addr.3360078269 |
|
|
Oct 09 08:29:45 AM UTC 24 |
Oct 09 08:29:49 AM UTC 24 |
2036428211 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_target_stress_rd.764686494 |
|
|
Oct 09 08:29:29 AM UTC 24 |
Oct 09 08:29:50 AM UTC 24 |
935293963 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_host_may_nack.4065651358 |
|
|
Oct 09 08:29:40 AM UTC 24 |
Oct 09 08:29:50 AM UTC 24 |
471113030 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_watermark.2589083012 |
|
|
Oct 09 08:28:45 AM UTC 24 |
Oct 09 08:29:58 AM UTC 24 |
16082771621 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_target_smoke.2709711095 |
|
|
Oct 09 08:29:24 AM UTC 24 |
Oct 09 08:29:59 AM UTC 24 |
851984322 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_fmt_empty.338498919 |
|
|
Oct 09 08:29:50 AM UTC 24 |
Oct 09 08:30:01 AM UTC 24 |
470405295 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_target_stress_rd.218154905 |
|
|
Oct 09 08:29:59 AM UTC 24 |
Oct 09 08:30:06 AM UTC 24 |
1014974602 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_target_intr_smoke.1846485044 |
|
|
Oct 09 08:30:00 AM UTC 24 |
Oct 09 08:30:12 AM UTC 24 |
5086357165 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_target_stress_all.2218766284 |
|
|
Oct 09 08:29:38 AM UTC 24 |
Oct 09 08:30:16 AM UTC 24 |
20181558939 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/19.i2c_target_stress_all.2784585750 |
|
|
Oct 09 08:28:33 AM UTC 24 |
Oct 09 08:30:17 AM UTC 24 |
17412101068 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_target_stretch.2407487863 |
|
|
Oct 09 08:29:59 AM UTC 24 |
Oct 09 08:30:17 AM UTC 24 |
5139843034 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_host_smoke.706683496 |
|
|
Oct 09 08:29:48 AM UTC 24 |
Oct 09 08:30:18 AM UTC 24 |
15420790723 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_target_smoke.2961153633 |
|
|
Oct 09 08:29:57 AM UTC 24 |
Oct 09 08:30:18 AM UTC 24 |
1238610589 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_reset_acq.1456526614 |
|
|
Oct 09 08:30:16 AM UTC 24 |
Oct 09 08:30:19 AM UTC 24 |
371446781 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_reset_tx.135649076 |
|
|
Oct 09 08:30:18 AM UTC 24 |
Oct 09 08:30:21 AM UTC 24 |
155215706 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_target_timeout.534712584 |
|
|
Oct 09 08:30:07 AM UTC 24 |
Oct 09 08:30:22 AM UTC 24 |
5994287986 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_target_hrst.3732837244 |
|
|
Oct 09 08:30:19 AM UTC 24 |
Oct 09 08:30:25 AM UTC 24 |
329955178 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/24.i2c_target_stress_rd.2662803200 |
|
|
Oct 09 08:31:26 AM UTC 24 |
Oct 09 08:31:47 AM UTC 24 |
884403226 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_watermarks_tx.3357427274 |
|
|
Oct 09 08:30:23 AM UTC 24 |
Oct 09 08:30:26 AM UTC 24 |
81951456 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_watermarks_acq.3391469989 |
|
|
Oct 09 08:30:22 AM UTC 24 |
Oct 09 08:30:26 AM UTC 24 |
1134059928 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_target_perf.2028137892 |
|
|
Oct 09 08:30:18 AM UTC 24 |
Oct 09 08:30:28 AM UTC 24 |
7764570344 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_host_may_nack.762556056 |
|
|
Oct 09 08:30:20 AM UTC 24 |
Oct 09 08:30:30 AM UTC 24 |
2432585359 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_full.203956775 |
|
|
Oct 09 08:27:21 AM UTC 24 |
Oct 09 08:30:31 AM UTC 24 |
6604957575 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_host_stretch_timeout.1280666664 |
|
|
Oct 09 08:29:51 AM UTC 24 |
Oct 09 08:30:31 AM UTC 24 |
7876355708 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_target_smbus_maxlen.345871926 |
|
|
Oct 09 08:30:27 AM UTC 24 |
Oct 09 08:30:32 AM UTC 24 |
541157650 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_acq.2984430958 |
|
|
Oct 09 08:31:43 AM UTC 24 |
Oct 09 08:31:45 AM UTC 24 |
198485191 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_target_nack_acqfull.3911474754 |
|
|
Oct 09 08:30:27 AM UTC 24 |
Oct 09 08:30:33 AM UTC 24 |
2064381693 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_target_intr_stress_wr.3177786534 |
|
|
Oct 09 08:30:02 AM UTC 24 |
Oct 09 08:30:33 AM UTC 24 |
15705350255 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_overflow.1328004456 |
|
|
Oct 09 08:28:45 AM UTC 24 |
Oct 09 08:30:33 AM UTC 24 |
1705217829 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_alert_test.184916224 |
|
|
Oct 09 08:30:31 AM UTC 24 |
Oct 09 08:30:33 AM UTC 24 |
17550643 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_target_nack_acqfull_addr.1093467774 |
|
|
Oct 09 08:30:28 AM UTC 24 |
Oct 09 08:30:33 AM UTC 24 |
2117740049 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_target_bad_addr.1693399334 |
|
|
Oct 09 08:30:19 AM UTC 24 |
Oct 09 08:30:34 AM UTC 24 |
14395734683 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/22.i2c_target_tx_stretch_ctrl.3643339799 |
|
|
Oct 09 08:30:25 AM UTC 24 |
Oct 09 08:30:34 AM UTC 24 |
162102831 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/23.i2c_host_override.580367802 |
|
|
Oct 09 08:30:32 AM UTC 24 |
Oct 09 08:30:35 AM UTC 24 |
62334310 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_reset_fmt.1223134092 |
|
|
Oct 09 08:30:34 AM UTC 24 |
Oct 09 08:30:37 AM UTC 24 |
78170957 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_overflow.226616270 |
|
|
Oct 09 08:29:20 AM UTC 24 |
Oct 09 08:30:37 AM UTC 24 |
3050320416 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_reset_rx.459435483 |
|
|
Oct 09 08:30:34 AM UTC 24 |
Oct 09 08:30:39 AM UTC 24 |
118849227 ps |