| T1084 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_host_stretch_timeout.3104258054 |
|
|
Oct 09 08:34:57 AM UTC 24 |
Oct 09 08:35:34 AM UTC 24 |
1259536774 ps |
| T1085 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_target_bad_addr.3587567774 |
|
|
Oct 09 08:35:25 AM UTC 24 |
Oct 09 08:35:36 AM UTC 24 |
2120530512 ps |
| T1086 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_tx.1498078478 |
|
|
Oct 09 08:35:33 AM UTC 24 |
Oct 09 08:35:37 AM UTC 24 |
141072948 ps |
| T1087 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_target_smbus_maxlen.1223193322 |
|
|
Oct 09 08:35:33 AM UTC 24 |
Oct 09 08:35:37 AM UTC 24 |
1484868900 ps |
| T1088 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_target_stress_rd.793084816 |
|
|
Oct 09 08:35:10 AM UTC 24 |
Oct 09 08:35:38 AM UTC 24 |
2428861639 ps |
| T1089 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_acq.2399966937 |
|
|
Oct 09 08:35:32 AM UTC 24 |
Oct 09 08:35:38 AM UTC 24 |
494344346 ps |
| T1090 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_watermark.3337794301 |
|
|
Oct 09 08:33:04 AM UTC 24 |
Oct 09 08:35:39 AM UTC 24 |
5282100174 ps |
| T1091 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_host_may_nack.627742169 |
|
|
Oct 09 08:35:28 AM UTC 24 |
Oct 09 08:35:40 AM UTC 24 |
899658687 ps |
| T1092 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_alert_test.3023098847 |
|
|
Oct 09 08:35:38 AM UTC 24 |
Oct 09 08:35:41 AM UTC 24 |
55085937 ps |
| T1093 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_target_tx_stretch_ctrl.2862772523 |
|
|
Oct 09 08:35:33 AM UTC 24 |
Oct 09 08:35:41 AM UTC 24 |
309487303 ps |
| T1094 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_target_nack_txstretch.2345854054 |
|
|
Oct 09 08:35:37 AM UTC 24 |
Oct 09 08:35:41 AM UTC 24 |
566468928 ps |
| T1095 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull.2660297632 |
|
|
Oct 09 08:35:35 AM UTC 24 |
Oct 09 08:35:42 AM UTC 24 |
605430450 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_host_override.681427704 |
|
|
Oct 09 08:35:40 AM UTC 24 |
Oct 09 08:35:42 AM UTC 24 |
31030344 ps |
| T1096 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull_addr.3066241789 |
|
|
Oct 09 08:35:37 AM UTC 24 |
Oct 09 08:35:43 AM UTC 24 |
2830455666 ps |
| T1097 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_host_perf.1135851207 |
|
|
Oct 09 08:35:43 AM UTC 24 |
Oct 09 08:36:01 AM UTC 24 |
3381865595 ps |
| T1098 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/29.i2c_host_smoke.2914870688 |
|
|
Oct 09 08:34:11 AM UTC 24 |
Oct 09 08:35:43 AM UTC 24 |
4049830231 ps |
| T1099 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_fmt.2290622636 |
|
|
Oct 09 08:35:41 AM UTC 24 |
Oct 09 08:35:44 AM UTC 24 |
95057378 ps |
| T1100 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_host_perf_precise.3586919541 |
|
|
Oct 09 08:35:43 AM UTC 24 |
Oct 09 08:35:46 AM UTC 24 |
84676755 ps |
| T1101 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_host_error_intr.3120181387 |
|
|
Oct 09 08:35:44 AM UTC 24 |
Oct 09 08:35:47 AM UTC 24 |
66284849 ps |
| T1102 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_full.213865318 |
|
|
Oct 09 08:34:54 AM UTC 24 |
Oct 09 08:35:48 AM UTC 24 |
2038309438 ps |
| T1103 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_rx.1584798340 |
|
|
Oct 09 08:35:42 AM UTC 24 |
Oct 09 08:35:52 AM UTC 24 |
493729622 ps |
| T1104 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/28.i2c_target_stress_all.3864217857 |
|
|
Oct 09 08:34:02 AM UTC 24 |
Oct 09 08:35:54 AM UTC 24 |
25970367366 ps |
| T1105 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_watermark.1726007128 |
|
|
Oct 09 08:33:38 AM UTC 24 |
Oct 09 08:35:56 AM UTC 24 |
6709622656 ps |
| T1106 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_full.3093302232 |
|
|
Oct 09 08:32:30 AM UTC 24 |
Oct 09 08:36:00 AM UTC 24 |
7619848344 ps |
| T1107 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_fmt_empty.3859056543 |
|
|
Oct 09 08:35:41 AM UTC 24 |
Oct 09 08:36:03 AM UTC 24 |
305309742 ps |
| T1108 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_acq.1875354567 |
|
|
Oct 09 08:36:01 AM UTC 24 |
Oct 09 08:36:04 AM UTC 24 |
207596104 ps |
| T1109 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_watermark.3500942866 |
|
|
Oct 09 08:31:59 AM UTC 24 |
Oct 09 08:36:06 AM UTC 24 |
3844034512 ps |
| T1110 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_tx.3391253068 |
|
|
Oct 09 08:36:03 AM UTC 24 |
Oct 09 08:36:06 AM UTC 24 |
149599697 ps |
| T1111 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_intr_smoke.3319911692 |
|
|
Oct 09 08:35:55 AM UTC 24 |
Oct 09 08:36:06 AM UTC 24 |
4901088786 ps |
| T1112 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_host_stretch_timeout.1883503877 |
|
|
Oct 09 08:35:44 AM UTC 24 |
Oct 09 08:36:06 AM UTC 24 |
6838844964 ps |
| T1113 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_stretch.852883489 |
|
|
Oct 09 08:35:53 AM UTC 24 |
Oct 09 08:36:07 AM UTC 24 |
4522545677 ps |
| T1114 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/29.i2c_host_perf.2170238840 |
|
|
Oct 09 08:34:13 AM UTC 24 |
Oct 09 08:36:08 AM UTC 24 |
13197478065 ps |
| T1115 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_host_smoke.2705734514 |
|
|
Oct 09 08:35:40 AM UTC 24 |
Oct 09 08:36:08 AM UTC 24 |
6242884810 ps |
| T1116 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_perf.2359767150 |
|
|
Oct 09 08:36:05 AM UTC 24 |
Oct 09 08:36:11 AM UTC 24 |
1287817055 ps |
| T1117 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_hrst.3756988329 |
|
|
Oct 09 08:36:07 AM UTC 24 |
Oct 09 08:36:12 AM UTC 24 |
637717051 ps |
| T1118 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_stress_wr.434872069 |
|
|
Oct 09 08:35:48 AM UTC 24 |
Oct 09 08:36:12 AM UTC 24 |
24442537129 ps |
| T1119 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_tx.3607536123 |
|
|
Oct 09 08:36:08 AM UTC 24 |
Oct 09 08:36:12 AM UTC 24 |
217701606 ps |
| T1120 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_acq.3042447291 |
|
|
Oct 09 08:36:07 AM UTC 24 |
Oct 09 08:36:12 AM UTC 24 |
1451383429 ps |
| T1121 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_timeout.3197442631 |
|
|
Oct 09 08:36:01 AM UTC 24 |
Oct 09 08:36:13 AM UTC 24 |
3542883597 ps |
| T1122 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_bad_addr.3868703954 |
|
|
Oct 09 08:36:05 AM UTC 24 |
Oct 09 08:36:13 AM UTC 24 |
3909441131 ps |
| T1123 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_tx_stretch_ctrl.12854955 |
|
|
Oct 09 08:36:10 AM UTC 24 |
Oct 09 08:36:13 AM UTC 24 |
134329579 ps |
| T1124 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_host_mode_toggle.3328031544 |
|
|
Oct 09 08:36:07 AM UTC 24 |
Oct 09 08:36:14 AM UTC 24 |
142079827 ps |
| T1125 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_host_perf.1491774729 |
|
|
Oct 09 08:34:54 AM UTC 24 |
Oct 09 08:36:15 AM UTC 24 |
5178771466 ps |
| T1126 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_alert_test.229676032 |
|
|
Oct 09 08:36:13 AM UTC 24 |
Oct 09 08:36:15 AM UTC 24 |
18013369 ps |
| T1127 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_smbus_maxlen.727706514 |
|
|
Oct 09 08:36:10 AM UTC 24 |
Oct 09 08:36:15 AM UTC 24 |
570532063 ps |
| T1128 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_nack_txstretch.298295072 |
|
|
Oct 09 08:36:13 AM UTC 24 |
Oct 09 08:36:16 AM UTC 24 |
280158273 ps |
| T1129 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_host_override.1893105326 |
|
|
Oct 09 08:36:14 AM UTC 24 |
Oct 09 08:36:17 AM UTC 24 |
92411528 ps |
| T1130 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull.4214520743 |
|
|
Oct 09 08:36:12 AM UTC 24 |
Oct 09 08:36:17 AM UTC 24 |
2070441857 ps |
| T1131 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull_addr.1237488828 |
|
|
Oct 09 08:36:13 AM UTC 24 |
Oct 09 08:36:17 AM UTC 24 |
564179792 ps |
| T1132 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_fmt.2248190177 |
|
|
Oct 09 08:36:16 AM UTC 24 |
Oct 09 08:36:19 AM UTC 24 |
92954563 ps |
| T1133 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_stress_rd.933847847 |
|
|
Oct 09 08:35:49 AM UTC 24 |
Oct 09 08:36:22 AM UTC 24 |
673890792 ps |
| T1134 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_fmt_empty.2801233251 |
|
|
Oct 09 08:36:16 AM UTC 24 |
Oct 09 08:36:22 AM UTC 24 |
482289034 ps |
| T1135 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_target_intr_stress_wr.1521143509 |
|
|
Oct 09 08:35:17 AM UTC 24 |
Oct 09 08:36:23 AM UTC 24 |
16150658316 ps |
| T1136 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_intr_stress_wr.3290684910 |
|
|
Oct 09 08:35:57 AM UTC 24 |
Oct 09 08:36:24 AM UTC 24 |
9457267840 ps |
| T40 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_host_perf.3869875971 |
|
|
Oct 09 08:36:17 AM UTC 24 |
Oct 09 08:36:25 AM UTC 24 |
2798823427 ps |
| T1137 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_rx.2872472259 |
|
|
Oct 09 08:36:16 AM UTC 24 |
Oct 09 08:36:26 AM UTC 24 |
193338911 ps |
| T1138 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_host_error_intr.539169302 |
|
|
Oct 09 08:36:19 AM UTC 24 |
Oct 09 08:36:27 AM UTC 24 |
1246305309 ps |
| T1139 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/27.i2c_host_perf.3870114174 |
|
|
Oct 09 08:33:06 AM UTC 24 |
Oct 09 08:36:28 AM UTC 24 |
75593169781 ps |
| T1140 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_target_smoke.1728547091 |
|
|
Oct 09 08:36:54 AM UTC 24 |
Oct 09 08:37:17 AM UTC 24 |
1067969708 ps |
| T1141 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_overflow.4249040055 |
|
|
Oct 09 08:34:51 AM UTC 24 |
Oct 09 08:36:33 AM UTC 24 |
2553154090 ps |
| T1142 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_target_intr_smoke.2327573117 |
|
|
Oct 09 08:36:26 AM UTC 24 |
Oct 09 08:36:35 AM UTC 24 |
5793149586 ps |
| T1143 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_host_may_nack.3477960825 |
|
|
Oct 09 08:36:07 AM UTC 24 |
Oct 09 08:36:36 AM UTC 24 |
2074954518 ps |
| T1144 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_tx.3111285178 |
|
|
Oct 09 08:36:34 AM UTC 24 |
Oct 09 08:36:37 AM UTC 24 |
367483752 ps |
| T1145 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_acq.1799112128 |
|
|
Oct 09 08:36:34 AM UTC 24 |
Oct 09 08:36:37 AM UTC 24 |
423503130 ps |
| T1146 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/26.i2c_target_stress_all.291956217 |
|
|
Oct 09 08:32:48 AM UTC 24 |
Oct 09 08:36:37 AM UTC 24 |
41161156126 ps |
| T1147 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_target_timeout.235816158 |
|
|
Oct 09 08:36:28 AM UTC 24 |
Oct 09 08:36:39 AM UTC 24 |
1227855240 ps |
| T1148 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/25.i2c_target_stress_wr.669287779 |
|
|
Oct 09 08:32:07 AM UTC 24 |
Oct 09 08:36:40 AM UTC 24 |
34277932042 ps |
| T1149 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/25.i2c_target_intr_stress_wr.2003497792 |
|
|
Oct 09 08:32:14 AM UTC 24 |
Oct 09 08:36:40 AM UTC 24 |
15125701646 ps |
| T1150 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_target_hrst.1852446961 |
|
|
Oct 09 08:36:38 AM UTC 24 |
Oct 09 08:36:42 AM UTC 24 |
499298267 ps |
| T1151 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_target_bad_addr.3213316839 |
|
|
Oct 09 08:36:37 AM UTC 24 |
Oct 09 08:36:44 AM UTC 24 |
1877425467 ps |
| T1152 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_tx.2351614403 |
|
|
Oct 09 08:36:41 AM UTC 24 |
Oct 09 08:36:44 AM UTC 24 |
178791183 ps |
| T1153 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_overflow.162958310 |
|
|
Oct 09 08:35:41 AM UTC 24 |
Oct 09 08:36:44 AM UTC 24 |
7754394110 ps |
| T1154 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_target_stress_all.3804835557 |
|
|
Oct 09 08:36:05 AM UTC 24 |
Oct 09 08:36:44 AM UTC 24 |
8327337810 ps |
| T1155 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_target_perf.3397123964 |
|
|
Oct 09 08:36:36 AM UTC 24 |
Oct 09 08:36:45 AM UTC 24 |
1826750230 ps |
| T1156 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_acq.507960128 |
|
|
Oct 09 08:36:41 AM UTC 24 |
Oct 09 08:36:47 AM UTC 24 |
1114183628 ps |
| T1157 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_full.2150248916 |
|
|
Oct 09 08:33:40 AM UTC 24 |
Oct 09 08:36:47 AM UTC 24 |
6941347681 ps |
| T1158 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_alert_test.2001130957 |
|
|
Oct 09 08:36:46 AM UTC 24 |
Oct 09 08:36:48 AM UTC 24 |
17976354 ps |
| T1159 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_host_error_intr.3520787400 |
|
|
Oct 09 08:36:52 AM UTC 24 |
Oct 09 08:37:12 AM UTC 24 |
1110334312 ps |
| T1160 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_target_perf.4210987202 |
|
|
Oct 09 08:37:03 AM UTC 24 |
Oct 09 08:37:16 AM UTC 24 |
1200017592 ps |
| T1161 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_host_smoke.2579738348 |
|
|
Oct 09 08:36:13 AM UTC 24 |
Oct 09 08:36:48 AM UTC 24 |
4431461689 ps |
| T1162 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull_addr.1178857238 |
|
|
Oct 09 08:36:45 AM UTC 24 |
Oct 09 08:36:49 AM UTC 24 |
2174765351 ps |
| T1163 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_host_override.4073999936 |
|
|
Oct 09 08:36:47 AM UTC 24 |
Oct 09 08:36:49 AM UTC 24 |
80341674 ps |
| T1164 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_target_smbus_maxlen.47110050 |
|
|
Oct 09 08:36:43 AM UTC 24 |
Oct 09 08:36:49 AM UTC 24 |
9507311412 ps |
| T1165 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull.10963337 |
|
|
Oct 09 08:36:45 AM UTC 24 |
Oct 09 08:36:49 AM UTC 24 |
529242244 ps |
| T1166 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_host_may_nack.1181020659 |
|
|
Oct 09 08:36:40 AM UTC 24 |
Oct 09 08:36:51 AM UTC 24 |
970150247 ps |
| T1167 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_fmt_empty.1423402153 |
|
|
Oct 09 08:36:50 AM UTC 24 |
Oct 09 08:37:17 AM UTC 24 |
1747187141 ps |
| T1168 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_target_stress_all.3315288586 |
|
|
Oct 09 08:35:25 AM UTC 24 |
Oct 09 08:36:51 AM UTC 24 |
12373007310 ps |
| T1169 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_fmt.1817741663 |
|
|
Oct 09 08:36:50 AM UTC 24 |
Oct 09 08:36:53 AM UTC 24 |
125431429 ps |
| T1170 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_host_stretch_timeout.4134494316 |
|
|
Oct 09 08:36:18 AM UTC 24 |
Oct 09 08:36:53 AM UTC 24 |
1305939063 ps |
| T1171 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_target_stress_rd.2105146337 |
|
|
Oct 09 08:36:24 AM UTC 24 |
Oct 09 08:36:53 AM UTC 24 |
3125706369 ps |
| T1172 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_target_smoke.1438336271 |
|
|
Oct 09 08:36:23 AM UTC 24 |
Oct 09 08:36:53 AM UTC 24 |
1010250383 ps |
| T1173 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_rx.3232319814 |
|
|
Oct 09 08:36:50 AM UTC 24 |
Oct 09 08:36:56 AM UTC 24 |
586705009 ps |
| T1174 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_host_perf_precise.1933153745 |
|
|
Oct 09 08:36:51 AM UTC 24 |
Oct 09 08:36:57 AM UTC 24 |
223110847 ps |
| T1175 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_watermark.3590277651 |
|
|
Oct 09 08:35:41 AM UTC 24 |
Oct 09 08:36:58 AM UTC 24 |
12232498826 ps |
| T1176 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/24.i2c_host_perf.1489184980 |
|
|
Oct 09 08:31:14 AM UTC 24 |
Oct 09 08:36:59 AM UTC 24 |
30555861311 ps |
| T1177 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_target_tx_stretch_ctrl.2565867566 |
|
|
Oct 09 08:36:41 AM UTC 24 |
Oct 09 08:37:00 AM UTC 24 |
1004809712 ps |
| T1178 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_acq.4234542296 |
|
|
Oct 09 08:37:01 AM UTC 24 |
Oct 09 08:37:03 AM UTC 24 |
1266983905 ps |
| T1179 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_target_intr_smoke.187548163 |
|
|
Oct 09 08:36:57 AM UTC 24 |
Oct 09 08:37:05 AM UTC 24 |
3449497180 ps |
| T1180 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_tx.939575599 |
|
|
Oct 09 08:37:02 AM UTC 24 |
Oct 09 08:37:05 AM UTC 24 |
496420248 ps |
| T122 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_watermark.847898222 |
|
|
Oct 09 08:34:51 AM UTC 24 |
Oct 09 08:37:07 AM UTC 24 |
5693212725 ps |
| T1181 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_target_timeout.3432797436 |
|
|
Oct 09 08:36:58 AM UTC 24 |
Oct 09 08:37:11 AM UTC 24 |
1197617557 ps |
| T1182 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_tx.2735662303 |
|
|
Oct 09 08:37:13 AM UTC 24 |
Oct 09 08:37:15 AM UTC 24 |
64096204 ps |
| T1183 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_target_bad_addr.2786868644 |
|
|
Oct 09 08:37:05 AM UTC 24 |
Oct 09 08:37:15 AM UTC 24 |
1798430933 ps |
| T1184 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_acq.1452559029 |
|
|
Oct 09 08:37:13 AM UTC 24 |
Oct 09 08:37:18 AM UTC 24 |
404206929 ps |
| T1185 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_target_tx_stretch_ctrl.3747666292 |
|
|
Oct 09 08:37:16 AM UTC 24 |
Oct 09 08:37:20 AM UTC 24 |
131996258 ps |
| T1186 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_alert_test.1408132200 |
|
|
Oct 09 08:37:19 AM UTC 24 |
Oct 09 08:37:21 AM UTC 24 |
90952067 ps |
| T1187 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_target_nack_txstretch.1864960716 |
|
|
Oct 09 08:37:19 AM UTC 24 |
Oct 09 08:37:21 AM UTC 24 |
567240376 ps |
| T1188 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_target_stress_wr.2000593531 |
|
|
Oct 09 08:36:54 AM UTC 24 |
Oct 09 08:37:22 AM UTC 24 |
7023683279 ps |
| T1189 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_target_smbus_maxlen.455282019 |
|
|
Oct 09 08:37:16 AM UTC 24 |
Oct 09 08:37:22 AM UTC 24 |
576444981 ps |
| T1190 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull.1241635252 |
|
|
Oct 09 08:37:17 AM UTC 24 |
Oct 09 08:37:23 AM UTC 24 |
1910224129 ps |
| T1191 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull_addr.2600676579 |
|
|
Oct 09 08:37:17 AM UTC 24 |
Oct 09 08:37:24 AM UTC 24 |
818969881 ps |
| T1192 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_host_override.688271154 |
|
|
Oct 09 08:37:28 AM UTC 24 |
Oct 09 08:37:30 AM UTC 24 |
90464711 ps |
| T258 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_host_may_nack.3289198179 |
|
|
Oct 09 08:37:12 AM UTC 24 |
Oct 09 08:37:32 AM UTC 24 |
1948292097 ps |
| T1193 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_fmt.827660360 |
|
|
Oct 09 08:37:29 AM UTC 24 |
Oct 09 08:37:32 AM UTC 24 |
90633236 ps |
| T1194 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_full.3087369256 |
|
|
Oct 09 08:34:13 AM UTC 24 |
Oct 09 08:37:38 AM UTC 24 |
3532227172 ps |
| T1195 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_rx.822090314 |
|
|
Oct 09 08:37:29 AM UTC 24 |
Oct 09 08:37:38 AM UTC 24 |
384505133 ps |
| T1196 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_host_stretch_timeout.9453945 |
|
|
Oct 09 08:36:51 AM UTC 24 |
Oct 09 08:37:41 AM UTC 24 |
1882654335 ps |
| T23 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_host_error_intr.2862223773 |
|
|
Oct 09 08:37:33 AM UTC 24 |
Oct 09 08:37:43 AM UTC 24 |
282709064 ps |
| T1197 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_fmt_empty.1362212336 |
|
|
Oct 09 08:37:29 AM UTC 24 |
Oct 09 08:37:46 AM UTC 24 |
212578674 ps |
| T1198 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_smoke.3738048889 |
|
|
Oct 09 08:37:39 AM UTC 24 |
Oct 09 08:37:49 AM UTC 24 |
2058214402 ps |
| T1199 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_target_stress_all.23619578 |
|
|
Oct 09 08:36:37 AM UTC 24 |
Oct 09 08:37:49 AM UTC 24 |
31758766933 ps |
| T1200 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_stretch.262766598 |
|
|
Oct 09 08:37:46 AM UTC 24 |
Oct 09 08:37:50 AM UTC 24 |
561463349 ps |
| T1201 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_full.559907276 |
|
|
Oct 09 08:36:17 AM UTC 24 |
Oct 09 08:37:55 AM UTC 24 |
10337768069 ps |
| T1202 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_target_stress_all.2990444070 |
|
|
Oct 09 08:37:04 AM UTC 24 |
Oct 09 08:38:01 AM UTC 24 |
13835031519 ps |
| T1203 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_acq.1806137369 |
|
|
Oct 09 08:37:59 AM UTC 24 |
Oct 09 08:38:02 AM UTC 24 |
820698876 ps |
| T1204 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_host_perf_precise.1977464067 |
|
|
Oct 09 08:37:32 AM UTC 24 |
Oct 09 08:38:03 AM UTC 24 |
6377868462 ps |
| T1205 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_target_stress_rd.2230788410 |
|
|
Oct 09 08:36:54 AM UTC 24 |
Oct 09 08:38:04 AM UTC 24 |
1529290195 ps |
| T1206 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_intr_smoke.4158755080 |
|
|
Oct 09 08:37:50 AM UTC 24 |
Oct 09 08:38:05 AM UTC 24 |
2965537107 ps |
| T1207 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_timeout.4094167663 |
|
|
Oct 09 08:37:51 AM UTC 24 |
Oct 09 08:38:05 AM UTC 24 |
2382599401 ps |
| T1208 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_host_smoke.3883467357 |
|
|
Oct 09 08:37:19 AM UTC 24 |
Oct 09 08:38:06 AM UTC 24 |
15831268070 ps |
| T1209 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_tx.3962902792 |
|
|
Oct 09 08:38:02 AM UTC 24 |
Oct 09 08:38:07 AM UTC 24 |
261812421 ps |
| T1210 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_host_smoke.3273902641 |
|
|
Oct 09 08:36:46 AM UTC 24 |
Oct 09 08:38:08 AM UTC 24 |
6391614458 ps |
| T1211 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_rx.157108113 |
|
|
Oct 09 08:38:59 AM UTC 24 |
Oct 09 08:39:06 AM UTC 24 |
1807525126 ps |
| T1212 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_tx.2676543784 |
|
|
Oct 09 08:38:07 AM UTC 24 |
Oct 09 08:38:10 AM UTC 24 |
139012291 ps |
| T1213 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_bad_addr.2097333008 |
|
|
Oct 09 08:38:04 AM UTC 24 |
Oct 09 08:38:11 AM UTC 24 |
735850784 ps |
| T1214 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_stress_wr.1215963983 |
|
|
Oct 09 08:37:41 AM UTC 24 |
Oct 09 08:38:11 AM UTC 24 |
9973741185 ps |
| T1215 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_full.3524196 |
|
|
Oct 09 08:35:43 AM UTC 24 |
Oct 09 08:38:12 AM UTC 24 |
2461960687 ps |
| T1216 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_acq.2233292365 |
|
|
Oct 09 08:38:07 AM UTC 24 |
Oct 09 08:38:13 AM UTC 24 |
1695575362 ps |
| T1217 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_perf.210182911 |
|
|
Oct 09 08:38:03 AM UTC 24 |
Oct 09 08:38:14 AM UTC 24 |
811509880 ps |
| T1218 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_alert_test.2012971861 |
|
|
Oct 09 08:38:13 AM UTC 24 |
Oct 09 08:38:15 AM UTC 24 |
56965351 ps |
| T1219 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_nack_txstretch.532116384 |
|
|
Oct 09 08:38:12 AM UTC 24 |
Oct 09 08:38:15 AM UTC 24 |
260504618 ps |
| T1220 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_smbus_maxlen.962329397 |
|
|
Oct 09 08:38:10 AM UTC 24 |
Oct 09 08:38:16 AM UTC 24 |
564530460 ps |
| T1221 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull.2847168358 |
|
|
Oct 09 08:38:12 AM UTC 24 |
Oct 09 08:38:16 AM UTC 24 |
621262931 ps |
| T1222 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_stress_rd.3324094824 |
|
|
Oct 09 08:37:43 AM UTC 24 |
Oct 09 08:38:17 AM UTC 24 |
3311661610 ps |
| T1223 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_target_stretch.1774425747 |
|
|
Oct 09 08:36:25 AM UTC 24 |
Oct 09 08:38:17 AM UTC 24 |
2469087658 ps |
| T1224 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull_addr.294591173 |
|
|
Oct 09 08:38:12 AM UTC 24 |
Oct 09 08:38:17 AM UTC 24 |
549435372 ps |
| T1225 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_host_override.1186341373 |
|
|
Oct 09 08:38:15 AM UTC 24 |
Oct 09 08:38:18 AM UTC 24 |
87223316 ps |
| T1226 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_fmt.43741097 |
|
|
Oct 09 08:38:18 AM UTC 24 |
Oct 09 08:38:21 AM UTC 24 |
89007797 ps |
| T1227 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_watermark.943066215 |
|
|
Oct 09 08:36:14 AM UTC 24 |
Oct 09 08:38:21 AM UTC 24 |
9010191190 ps |
| T1228 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_intr_stress_wr.1667683796 |
|
|
Oct 09 08:37:50 AM UTC 24 |
Oct 09 08:38:24 AM UTC 24 |
23709016278 ps |
| T1229 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_host_perf.3951202009 |
|
|
Oct 09 08:38:18 AM UTC 24 |
Oct 09 08:38:26 AM UTC 24 |
434401674 ps |
| T1230 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_host_stretch_timeout.1857840524 |
|
|
Oct 09 08:37:33 AM UTC 24 |
Oct 09 08:38:27 AM UTC 24 |
952177003 ps |
| T1231 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_overflow.2184156948 |
|
|
Oct 09 08:36:48 AM UTC 24 |
Oct 09 08:38:28 AM UTC 24 |
12218761794 ps |
| T1232 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_rx.1280101665 |
|
|
Oct 09 08:38:18 AM UTC 24 |
Oct 09 08:38:30 AM UTC 24 |
138200171 ps |
| T1233 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_host_may_nack.1715002233 |
|
|
Oct 09 08:38:06 AM UTC 24 |
Oct 09 08:38:31 AM UTC 24 |
923555278 ps |
| T1234 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_host_stretch_timeout.3957002763 |
|
|
Oct 09 08:38:21 AM UTC 24 |
Oct 09 08:38:32 AM UTC 24 |
1814981330 ps |
| T1235 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_target_tx_stretch_ctrl.302515447 |
|
|
Oct 09 08:38:08 AM UTC 24 |
Oct 09 08:38:32 AM UTC 24 |
1208031480 ps |
| T1236 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_host_error_intr.1596881878 |
|
|
Oct 09 08:38:23 AM UTC 24 |
Oct 09 08:38:33 AM UTC 24 |
186364548 ps |
| T1237 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_acq.775292335 |
|
|
Oct 09 08:38:34 AM UTC 24 |
Oct 09 08:38:37 AM UTC 24 |
303878050 ps |
| T1238 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_stretch.3703548550 |
|
|
Oct 09 08:38:29 AM UTC 24 |
Oct 09 08:38:37 AM UTC 24 |
1145731839 ps |
| T1239 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_intr_smoke.2914710032 |
|
|
Oct 09 08:38:30 AM UTC 24 |
Oct 09 08:38:39 AM UTC 24 |
795885473 ps |
| T1240 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_tx.3540097160 |
|
|
Oct 09 08:38:38 AM UTC 24 |
Oct 09 08:38:40 AM UTC 24 |
118856553 ps |
| T1241 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_fmt_empty.3608155136 |
|
|
Oct 09 08:38:18 AM UTC 24 |
Oct 09 08:38:43 AM UTC 24 |
1841171887 ps |
| T1242 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_timeout.718856713 |
|
|
Oct 09 08:38:33 AM UTC 24 |
Oct 09 08:38:44 AM UTC 24 |
1209131608 ps |
| T1243 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_perf.2339025961 |
|
|
Oct 09 08:38:38 AM UTC 24 |
Oct 09 08:38:47 AM UTC 24 |
702436824 ps |
| T1244 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_hrst.1817393513 |
|
|
Oct 09 08:38:41 AM UTC 24 |
Oct 09 08:38:48 AM UTC 24 |
966358418 ps |
| T1245 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_host_mode_toggle.1241195027 |
|
|
Oct 09 08:38:45 AM UTC 24 |
Oct 09 08:38:48 AM UTC 24 |
103739024 ps |
| T1246 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_bad_addr.412888131 |
|
|
Oct 09 08:38:40 AM UTC 24 |
Oct 09 08:38:48 AM UTC 24 |
3257933526 ps |
| T1247 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_tx.2776288544 |
|
|
Oct 09 08:38:48 AM UTC 24 |
Oct 09 08:38:51 AM UTC 24 |
602634494 ps |
| T1248 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_acq.264023312 |
|
|
Oct 09 08:38:47 AM UTC 24 |
Oct 09 08:38:52 AM UTC 24 |
1401260191 ps |
| T1249 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_smbus_maxlen.3269217955 |
|
|
Oct 09 08:38:49 AM UTC 24 |
Oct 09 08:38:53 AM UTC 24 |
9082953216 ps |
| T1250 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_tx_stretch_ctrl.394721296 |
|
|
Oct 09 08:38:49 AM UTC 24 |
Oct 09 08:38:53 AM UTC 24 |
67708621 ps |
| T1251 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull.3802512871 |
|
|
Oct 09 08:38:49 AM UTC 24 |
Oct 09 08:38:56 AM UTC 24 |
535174086 ps |
| T1252 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_host_may_nack.1239076231 |
|
|
Oct 09 08:38:46 AM UTC 24 |
Oct 09 08:38:56 AM UTC 24 |
634401417 ps |
| T1253 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_nack_txstretch.1992489973 |
|
|
Oct 09 08:38:53 AM UTC 24 |
Oct 09 08:38:56 AM UTC 24 |
141621851 ps |
| T1254 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_full.2481762636 |
|
|
Oct 09 08:36:50 AM UTC 24 |
Oct 09 08:38:57 AM UTC 24 |
7223588558 ps |
| T1255 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull_addr.1767276070 |
|
|
Oct 09 08:38:51 AM UTC 24 |
Oct 09 08:38:57 AM UTC 24 |
484470322 ps |
| T1256 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_alert_test.2014104444 |
|
|
Oct 09 08:38:55 AM UTC 24 |
Oct 09 08:38:57 AM UTC 24 |
15805370 ps |
| T1257 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_smoke.4171039688 |
|
|
Oct 09 08:38:26 AM UTC 24 |
Oct 09 08:38:59 AM UTC 24 |
4570193388 ps |
| T1258 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_host_override.960047131 |
|
|
Oct 09 08:38:57 AM UTC 24 |
Oct 09 08:38:59 AM UTC 24 |
28282448 ps |
| T1259 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_fmt.2881046843 |
|
|
Oct 09 08:38:58 AM UTC 24 |
Oct 09 08:39:01 AM UTC 24 |
93649920 ps |
| T1260 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_stress_rd.3453754685 |
|
|
Oct 09 08:38:27 AM UTC 24 |
Oct 09 08:39:04 AM UTC 24 |
3680700453 ps |
| T1261 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_fmt_empty.3094951906 |
|
|
Oct 09 08:38:58 AM UTC 24 |
Oct 09 08:39:09 AM UTC 24 |
1615406560 ps |
| T1262 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_host_error_intr.2655442824 |
|
|
Oct 09 08:39:06 AM UTC 24 |
Oct 09 08:39:10 AM UTC 24 |
337950101 ps |
| T1263 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_host_perf_precise.730984436 |
|
|
Oct 09 08:36:17 AM UTC 24 |
Oct 09 08:39:14 AM UTC 24 |
5997655149 ps |
| T1264 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_overflow.2594430204 |
|
|
Oct 09 08:37:29 AM UTC 24 |
Oct 09 08:39:15 AM UTC 24 |
1717022372 ps |
| T1265 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_overflow.3811230947 |
|
|
Oct 09 08:38:17 AM UTC 24 |
Oct 09 08:39:17 AM UTC 24 |
2116312142 ps |
| T41 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_host_perf.4158650734 |
|
|
Oct 09 08:39:00 AM UTC 24 |
Oct 09 08:39:18 AM UTC 24 |
330434053 ps |
| T1266 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_full.3469541175 |
|
|
Oct 09 08:37:29 AM UTC 24 |
Oct 09 08:39:19 AM UTC 24 |
3092448332 ps |
| T1267 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_stress_rd.954779767 |
|
|
Oct 09 08:39:17 AM UTC 24 |
Oct 09 08:39:22 AM UTC 24 |
3693463309 ps |
| T1268 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_stretch.2618640872 |
|
|
Oct 09 08:39:18 AM UTC 24 |
Oct 09 08:39:23 AM UTC 24 |
569399024 ps |
| T1269 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_overflow.1124887718 |
|
|
Oct 09 08:36:15 AM UTC 24 |
Oct 09 08:39:23 AM UTC 24 |
6446247430 ps |
| T1270 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_host_stretch_timeout.420190109 |
|
|
Oct 09 08:39:04 AM UTC 24 |
Oct 09 08:39:23 AM UTC 24 |
2805691226 ps |
| T1271 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_intr_smoke.2790574879 |
|
|
Oct 09 08:39:19 AM UTC 24 |
Oct 09 08:39:26 AM UTC 24 |
1594458002 ps |
| T1272 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/38.i2c_target_intr_smoke.541729935 |
|
|
Oct 09 08:40:58 AM UTC 24 |
Oct 09 08:41:05 AM UTC 24 |
578896985 ps |
| T1273 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_smoke.3854353624 |
|
|
Oct 09 08:39:11 AM UTC 24 |
Oct 09 08:39:27 AM UTC 24 |
5789863095 ps |
| T1274 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_acq.189635454 |
|
|
Oct 09 08:39:25 AM UTC 24 |
Oct 09 08:39:28 AM UTC 24 |
316005592 ps |
| T1275 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_tx.2539747335 |
|
|
Oct 09 08:39:25 AM UTC 24 |
Oct 09 08:39:28 AM UTC 24 |
181718255 ps |
| T1276 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_intr_stress_wr.2686704891 |
|
|
Oct 09 08:39:20 AM UTC 24 |
Oct 09 08:39:29 AM UTC 24 |
5263126707 ps |
| T1277 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_host_perf_precise.2103438691 |
|
|
Oct 09 08:39:02 AM UTC 24 |
Oct 09 08:39:32 AM UTC 24 |
2667172539 ps |
| T1278 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_timeout.3831949719 |
|
|
Oct 09 08:39:23 AM UTC 24 |
Oct 09 08:39:33 AM UTC 24 |
8011406147 ps |
| T1279 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_host_smoke.1611668171 |
|
|
Oct 09 08:38:55 AM UTC 24 |
Oct 09 08:39:35 AM UTC 24 |
3784035860 ps |
| T1280 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_perf.69654507 |
|
|
Oct 09 08:39:27 AM UTC 24 |
Oct 09 08:39:36 AM UTC 24 |
1445599741 ps |
| T1281 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_tx.325209448 |
|
|
Oct 09 08:39:33 AM UTC 24 |
Oct 09 08:39:36 AM UTC 24 |
101849749 ps |
| T1282 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_acq.4029116780 |
|
|
Oct 09 08:39:30 AM UTC 24 |
Oct 09 08:39:37 AM UTC 24 |
3401797064 ps |
| T1283 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_bad_addr.1850640860 |
|
|
Oct 09 08:39:28 AM UTC 24 |
Oct 09 08:39:37 AM UTC 24 |
1093190588 ps |
| T1284 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_tx_stretch_ctrl.3222628999 |
|
|
Oct 09 08:39:34 AM UTC 24 |
Oct 09 08:39:39 AM UTC 24 |
179962861 ps |
| T1285 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_alert_test.3517184983 |
|
|
Oct 09 08:39:37 AM UTC 24 |
Oct 09 08:39:40 AM UTC 24 |
18700973 ps |
| T1286 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_smbus_maxlen.119288668 |
|
|
Oct 09 08:39:35 AM UTC 24 |
Oct 09 08:39:41 AM UTC 24 |
7268946424 ps |
| T1287 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_nack_txstretch.3889900514 |
|
|
Oct 09 08:39:37 AM UTC 24 |
Oct 09 08:39:41 AM UTC 24 |
506181263 ps |
| T1288 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_host_override.1644170506 |
|
|
Oct 09 08:39:40 AM UTC 24 |
Oct 09 08:39:42 AM UTC 24 |
90798380 ps |
| T1289 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull.4057927646 |
|
|
Oct 09 08:39:36 AM UTC 24 |
Oct 09 08:39:43 AM UTC 24 |
489735177 ps |
| T1290 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull_addr.3450169532 |
|
|
Oct 09 08:39:37 AM UTC 24 |
Oct 09 08:39:43 AM UTC 24 |
1079542120 ps |
| T1291 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_fmt.4143035270 |
|
|
Oct 09 08:39:42 AM UTC 24 |
Oct 09 08:39:45 AM UTC 24 |
177009490 ps |
| T1292 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/28.i2c_target_stress_wr.2016788439 |
|
|
Oct 09 08:33:49 AM UTC 24 |
Oct 09 08:39:48 AM UTC 24 |
37615913945 ps |
| T1293 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_fmt_empty.1943435949 |
|
|
Oct 09 08:39:43 AM UTC 24 |
Oct 09 08:39:51 AM UTC 24 |
572012395 ps |
| T1294 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_host_perf.3093746343 |
|
|
Oct 09 08:39:46 AM UTC 24 |
Oct 09 08:39:53 AM UTC 24 |
787659648 ps |
| T1295 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_rx.3746882413 |
|
|
Oct 09 08:39:44 AM UTC 24 |
Oct 09 08:39:55 AM UTC 24 |
155439230 ps |
| T1296 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_overflow.2175757866 |
|
|
Oct 09 08:38:57 AM UTC 24 |
Oct 09 08:39:57 AM UTC 24 |
1693755624 ps |
| T1297 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_host_error_intr.1866218690 |
|
|
Oct 09 08:39:52 AM UTC 24 |
Oct 09 08:39:57 AM UTC 24 |
550814436 ps |
| T1298 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_host_may_nack.1110371418 |
|
|
Oct 09 08:39:29 AM UTC 24 |
Oct 09 08:39:58 AM UTC 24 |
538274436 ps |
| T1299 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_host_perf_precise.811218026 |
|
|
Oct 09 08:38:19 AM UTC 24 |
Oct 09 08:40:01 AM UTC 24 |
24629606736 ps |
| T1300 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_target_stress_all.1771464092 |
|
|
Oct 09 08:38:39 AM UTC 24 |
Oct 09 08:40:01 AM UTC 24 |
14018427497 ps |
| T1301 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_target_intr_smoke.2012281342 |
|
|
Oct 09 08:40:02 AM UTC 24 |
Oct 09 08:40:11 AM UTC 24 |
807967126 ps |
| T1302 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_target_stress_all.1702066505 |
|
|
Oct 09 08:39:28 AM UTC 24 |
Oct 09 08:40:17 AM UTC 24 |
5401780259 ps |
| T1303 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_target_stress_rd.322756420 |
|
|
Oct 09 08:39:58 AM UTC 24 |
Oct 09 08:40:18 AM UTC 24 |
2877182845 ps |
| T1304 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_target_stretch.536574779 |
|
|
Oct 09 08:40:00 AM UTC 24 |
Oct 09 08:40:19 AM UTC 24 |
4021580551 ps |
| T1305 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_host_smoke.1330750500 |
|
|
Oct 09 08:39:38 AM UTC 24 |
Oct 09 08:40:21 AM UTC 24 |
8816753503 ps |
| T1306 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/35.i2c_host_smoke.2610606648 |
|
|
Oct 09 08:38:13 AM UTC 24 |
Oct 09 08:40:22 AM UTC 24 |
7958068689 ps |
| T1307 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_tx.3883416315 |
|
|
Oct 09 08:40:20 AM UTC 24 |
Oct 09 08:40:23 AM UTC 24 |
193088473 ps |
| T1308 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_acq.3327701584 |
|
|
Oct 09 08:40:19 AM UTC 24 |
Oct 09 08:40:23 AM UTC 24 |
415027124 ps |
| T1309 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_target_smoke.138499589 |
|
|
Oct 09 08:39:56 AM UTC 24 |
Oct 09 08:40:23 AM UTC 24 |
1071366647 ps |
| T1310 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_target_timeout.281824724 |
|
|
Oct 09 08:40:12 AM UTC 24 |
Oct 09 08:40:23 AM UTC 24 |
1209672632 ps |
| T1311 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_full.2112937211 |
|
|
Oct 09 08:39:00 AM UTC 24 |
Oct 09 08:40:23 AM UTC 24 |
5260465988 ps |
| T1312 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_host_stretch_timeout.1644782916 |
|
|
Oct 09 08:39:52 AM UTC 24 |
Oct 09 08:40:26 AM UTC 24 |
2282941908 ps |
| T1313 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_target_perf.3962115462 |
|
|
Oct 09 08:40:21 AM UTC 24 |
Oct 09 08:40:27 AM UTC 24 |
628278648 ps |
| T1314 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_tx.3546889926 |
|
|
Oct 09 08:40:24 AM UTC 24 |
Oct 09 08:40:28 AM UTC 24 |
607802058 ps |
| T1315 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_host_mode_toggle.351562181 |
|
|
Oct 09 08:40:24 AM UTC 24 |
Oct 09 08:40:28 AM UTC 24 |
146341131 ps |
| T1316 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_acq.3572634764 |
|
|
Oct 09 08:40:24 AM UTC 24 |
Oct 09 08:40:29 AM UTC 24 |
3199769986 ps |
| T1317 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_host_may_nack.2625715370 |
|
|
Oct 09 08:40:24 AM UTC 24 |
Oct 09 08:40:31 AM UTC 24 |
329070424 ps |
| T1318 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_target_bad_addr.2114941917 |
|
|
Oct 09 08:40:23 AM UTC 24 |
Oct 09 08:40:32 AM UTC 24 |
3362522291 ps |
| T1319 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_target_smbus_maxlen.2385190626 |
|
|
Oct 09 08:40:29 AM UTC 24 |
Oct 09 08:40:33 AM UTC 24 |
490309163 ps |
| T1320 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_overflow.2829554426 |
|
|
Oct 09 08:39:42 AM UTC 24 |
Oct 09 08:40:33 AM UTC 24 |
6604842345 ps |
| T1321 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_target_nack_txstretch.308726957 |
|
|
Oct 09 08:40:30 AM UTC 24 |
Oct 09 08:40:33 AM UTC 24 |
819389346 ps |
| T1322 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull_addr.295414301 |
|
|
Oct 09 08:40:30 AM UTC 24 |
Oct 09 08:40:34 AM UTC 24 |
770447249 ps |
| T1323 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_alert_test.2803678737 |
|
|
Oct 09 08:40:32 AM UTC 24 |
Oct 09 08:40:34 AM UTC 24 |
25439294 ps |
| T1324 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull.2511871439 |
|
|
Oct 09 08:40:29 AM UTC 24 |
Oct 09 08:40:35 AM UTC 24 |
520471562 ps |
| T1325 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/38.i2c_host_override.870117214 |
|
|
Oct 09 08:40:34 AM UTC 24 |
Oct 09 08:40:36 AM UTC 24 |
321511355 ps |
| T1326 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/37.i2c_target_tx_stretch_ctrl.2238359962 |
|
|
Oct 09 08:40:28 AM UTC 24 |
Oct 09 08:40:37 AM UTC 24 |
318655966 ps |
| T1327 |
/workspaces/repo/scratch/os_regression_2024_10_08/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_fmt.2834584373 |
|
|
Oct 09 08:40:35 AM UTC 24 |
Oct 09 08:40:38 AM UTC 24 |
2070539108 ps |