| T393 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/7.i2c_target_nack_acqfull_addr.3620193338 |
|
|
Oct 12 06:00:06 AM UTC 24 |
Oct 12 06:00:11 AM UTC 24 |
2797106924 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/7.i2c_target_nack_acqfull.2728433742 |
|
|
Oct 12 06:00:06 AM UTC 24 |
Oct 12 06:00:12 AM UTC 24 |
483653462 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_reset_fmt.2406133519 |
|
|
Oct 12 06:00:11 AM UTC 24 |
Oct 12 06:00:14 AM UTC 24 |
462584532 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_host_perf_precise.1769843898 |
|
|
Oct 12 06:00:14 AM UTC 24 |
Oct 12 06:00:17 AM UTC 24 |
70131129 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_host_error_intr.688185033 |
|
|
Oct 12 06:00:18 AM UTC 24 |
Oct 12 06:00:20 AM UTC 24 |
491115170 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_reset_rx.2037533133 |
|
|
Oct 12 06:00:12 AM UTC 24 |
Oct 12 06:00:24 AM UTC 24 |
171372633 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/7.i2c_host_perf.3222040739 |
|
|
Oct 12 05:59:29 AM UTC 24 |
Oct 12 06:00:30 AM UTC 24 |
32951875437 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_host_stretch_timeout.822815544 |
|
|
Oct 12 06:00:15 AM UTC 24 |
Oct 12 06:00:31 AM UTC 24 |
789452871 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_fmt_empty.124467237 |
|
|
Oct 12 06:00:12 AM UTC 24 |
Oct 12 06:00:32 AM UTC 24 |
1444679058 ps |
| T254 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/7.i2c_host_may_nack.1675065823 |
|
|
Oct 12 05:59:57 AM UTC 24 |
Oct 12 06:00:33 AM UTC 24 |
7346180850 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_smoke.4209000452 |
|
|
Oct 12 06:00:21 AM UTC 24 |
Oct 12 06:00:37 AM UTC 24 |
2039841451 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_watermark.318427040 |
|
|
Oct 12 05:58:20 AM UTC 24 |
Oct 12 06:00:38 AM UTC 24 |
18412494677 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_stretch.1250610950 |
|
|
Oct 12 06:00:32 AM UTC 24 |
Oct 12 06:00:40 AM UTC 24 |
1303864801 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_host_smoke.1781937147 |
|
|
Oct 12 06:00:09 AM UTC 24 |
Oct 12 06:00:40 AM UTC 24 |
1661391767 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_host_error_intr.4205219807 |
|
|
Oct 12 06:01:55 AM UTC 24 |
Oct 12 06:01:58 AM UTC 24 |
302664528 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_intr_stress_wr.1316687374 |
|
|
Oct 12 06:00:34 AM UTC 24 |
Oct 12 06:00:40 AM UTC 24 |
4727935406 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/7.i2c_target_stretch.2584479583 |
|
|
Oct 12 05:59:43 AM UTC 24 |
Oct 12 06:00:41 AM UTC 24 |
2726659357 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_host_smoke.2214509585 |
|
|
Oct 12 06:00:57 AM UTC 24 |
Oct 12 06:02:04 AM UTC 24 |
4813149324 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_reset_acq.3822832308 |
|
|
Oct 12 06:00:40 AM UTC 24 |
Oct 12 06:00:42 AM UTC 24 |
173281082 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_intr_smoke.2639122459 |
|
|
Oct 12 06:00:33 AM UTC 24 |
Oct 12 06:00:44 AM UTC 24 |
1824918391 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_reset_tx.1551055867 |
|
|
Oct 12 06:00:41 AM UTC 24 |
Oct 12 06:00:44 AM UTC 24 |
758396576 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/7.i2c_target_tx_stretch_ctrl.4209727993 |
|
|
Oct 12 06:00:01 AM UTC 24 |
Oct 12 06:00:48 AM UTC 24 |
1867815973 ps |
| T23 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_host_mode_toggle.1236717856 |
|
|
Oct 12 06:00:45 AM UTC 24 |
Oct 12 06:00:49 AM UTC 24 |
531217351 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_timeout.2938748552 |
|
|
Oct 12 06:00:38 AM UTC 24 |
Oct 12 06:00:50 AM UTC 24 |
5535700176 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_bad_addr.2867873070 |
|
|
Oct 12 06:00:42 AM UTC 24 |
Oct 12 06:00:51 AM UTC 24 |
1584959128 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_perf.2680369595 |
|
|
Oct 12 06:00:41 AM UTC 24 |
Oct 12 06:00:52 AM UTC 24 |
5524079487 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_tx.3674224890 |
|
|
Oct 12 06:00:50 AM UTC 24 |
Oct 12 06:00:54 AM UTC 24 |
474150221 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_smbus_maxlen.4146555379 |
|
|
Oct 12 06:00:52 AM UTC 24 |
Oct 12 06:00:56 AM UTC 24 |
2043830589 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_acq.806442544 |
|
|
Oct 12 06:00:50 AM UTC 24 |
Oct 12 06:00:56 AM UTC 24 |
3963507639 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_tx_stretch_ctrl.348034750 |
|
|
Oct 12 06:00:52 AM UTC 24 |
Oct 12 06:00:56 AM UTC 24 |
83143900 ps |
| T259 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_host_may_nack.3750771985 |
|
|
Oct 12 06:00:49 AM UTC 24 |
Oct 12 06:00:57 AM UTC 24 |
494275265 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_host_smoke.308573115 |
|
|
Oct 12 06:01:46 AM UTC 24 |
Oct 12 06:02:26 AM UTC 24 |
1775363492 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_alert_test.2510971932 |
|
|
Oct 12 06:00:57 AM UTC 24 |
Oct 12 06:00:59 AM UTC 24 |
22290943 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull.1141615062 |
|
|
Oct 12 06:00:53 AM UTC 24 |
Oct 12 06:00:59 AM UTC 24 |
2303074444 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_full.4213734521 |
|
|
Oct 12 05:58:23 AM UTC 24 |
Oct 12 06:00:59 AM UTC 24 |
33034226673 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull_addr.2910461521 |
|
|
Oct 12 06:00:55 AM UTC 24 |
Oct 12 06:01:00 AM UTC 24 |
4538205417 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_nack_txstretch.2757126512 |
|
|
Oct 12 06:00:57 AM UTC 24 |
Oct 12 06:01:00 AM UTC 24 |
150940928 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_host_override.1113155739 |
|
|
Oct 12 06:00:58 AM UTC 24 |
Oct 12 06:01:00 AM UTC 24 |
122430710 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_fmt.1066149010 |
|
|
Oct 12 06:01:01 AM UTC 24 |
Oct 12 06:01:03 AM UTC 24 |
454687793 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_stress_wr.1620955528 |
|
|
Oct 12 06:00:25 AM UTC 24 |
Oct 12 06:01:03 AM UTC 24 |
9526864413 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_stress_rd.1107208502 |
|
|
Oct 12 06:00:31 AM UTC 24 |
Oct 12 06:01:04 AM UTC 24 |
5151806149 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_rx.2807728083 |
|
|
Oct 12 06:01:01 AM UTC 24 |
Oct 12 06:01:08 AM UTC 24 |
152554821 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_host_perf_precise.2127483434 |
|
|
Oct 12 06:01:04 AM UTC 24 |
Oct 12 06:01:09 AM UTC 24 |
228144844 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/7.i2c_host_smoke.3966588568 |
|
|
Oct 12 05:59:23 AM UTC 24 |
Oct 12 06:01:10 AM UTC 24 |
2292771588 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_fmt_empty.424494829 |
|
|
Oct 12 06:01:01 AM UTC 24 |
Oct 12 06:01:10 AM UTC 24 |
559836760 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_host_error_intr.3147505431 |
|
|
Oct 12 06:01:05 AM UTC 24 |
Oct 12 06:01:14 AM UTC 24 |
281952237 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/6.i2c_target_intr_stress_wr.2951185102 |
|
|
Oct 12 05:58:50 AM UTC 24 |
Oct 12 06:01:20 AM UTC 24 |
13334143861 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_intr_smoke.204465056 |
|
|
Oct 12 06:01:15 AM UTC 24 |
Oct 12 06:01:22 AM UTC 24 |
3556782789 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_intr_stress_wr.1223975352 |
|
|
Oct 12 06:01:21 AM UTC 24 |
Oct 12 06:01:25 AM UTC 24 |
431222200 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_host_stretch_timeout.314666304 |
|
|
Oct 12 06:01:04 AM UTC 24 |
Oct 12 06:01:28 AM UTC 24 |
409382552 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_acq.2189250473 |
|
|
Oct 12 06:01:26 AM UTC 24 |
Oct 12 06:01:29 AM UTC 24 |
203763947 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_tx.99721035 |
|
|
Oct 12 06:01:28 AM UTC 24 |
Oct 12 06:01:31 AM UTC 24 |
1759466063 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_stress_rd.2610480803 |
|
|
Oct 12 06:01:10 AM UTC 24 |
Oct 12 06:01:32 AM UTC 24 |
6243679302 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_full.770648778 |
|
|
Oct 12 06:00:13 AM UTC 24 |
Oct 12 06:01:32 AM UTC 24 |
10302163235 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_timeout.3297246706 |
|
|
Oct 12 06:01:23 AM UTC 24 |
Oct 12 06:01:34 AM UTC 24 |
2406611217 ps |
| T235 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/3.i2c_host_perf.758848873 |
|
|
Oct 12 05:55:47 AM UTC 24 |
Oct 12 06:01:34 AM UTC 24 |
6111376768 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_perf.27686654 |
|
|
Oct 12 06:01:29 AM UTC 24 |
Oct 12 06:01:37 AM UTC 24 |
3041425999 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_hrst.2248450783 |
|
|
Oct 12 06:01:32 AM UTC 24 |
Oct 12 06:01:38 AM UTC 24 |
1387598916 ps |
| T24 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_host_mode_toggle.593270613 |
|
|
Oct 12 06:01:35 AM UTC 24 |
Oct 12 06:01:38 AM UTC 24 |
79702660 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_bad_addr.2206910669 |
|
|
Oct 12 06:01:32 AM UTC 24 |
Oct 12 06:01:39 AM UTC 24 |
4294179765 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_smoke.1365069474 |
|
|
Oct 12 06:01:10 AM UTC 24 |
Oct 12 06:01:40 AM UTC 24 |
893760887 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_tx.670620081 |
|
|
Oct 12 06:01:39 AM UTC 24 |
Oct 12 06:01:42 AM UTC 24 |
441578509 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_acq.1927876819 |
|
|
Oct 12 06:01:38 AM UTC 24 |
Oct 12 06:01:44 AM UTC 24 |
470881313 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_smbus_maxlen.4160110497 |
|
|
Oct 12 06:01:40 AM UTC 24 |
Oct 12 06:01:44 AM UTC 24 |
503099643 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_overflow.4242294469 |
|
|
Oct 12 06:00:59 AM UTC 24 |
Oct 12 06:01:46 AM UTC 24 |
3237865135 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_host_may_nack.4095658350 |
|
|
Oct 12 06:01:37 AM UTC 24 |
Oct 12 06:01:54 AM UTC 24 |
1175697248 ps |
| T54 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull.260604972 |
|
|
Oct 12 06:01:41 AM UTC 24 |
Oct 12 06:01:47 AM UTC 24 |
2904334882 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_nack_txstretch.3336305197 |
|
|
Oct 12 06:01:44 AM UTC 24 |
Oct 12 06:01:47 AM UTC 24 |
172963548 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_fmt_empty.4041217036 |
|
|
Oct 12 06:01:49 AM UTC 24 |
Oct 12 06:01:57 AM UTC 24 |
948145567 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_alert_test.1745630391 |
|
|
Oct 12 06:01:45 AM UTC 24 |
Oct 12 06:01:47 AM UTC 24 |
44154682 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull_addr.3073104306 |
|
|
Oct 12 06:01:42 AM UTC 24 |
Oct 12 06:01:47 AM UTC 24 |
2182137814 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_host_override.1897917783 |
|
|
Oct 12 06:01:48 AM UTC 24 |
Oct 12 06:01:50 AM UTC 24 |
45088195 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_rx.597948316 |
|
|
Oct 12 06:01:49 AM UTC 24 |
Oct 12 06:01:55 AM UTC 24 |
599933185 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_fmt.3027422783 |
|
|
Oct 12 06:01:49 AM UTC 24 |
Oct 12 06:01:52 AM UTC 24 |
123250827 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_full.276372554 |
|
|
Oct 12 05:59:28 AM UTC 24 |
Oct 12 06:02:08 AM UTC 24 |
2439065017 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_stress_rd.2180510681 |
|
|
Oct 12 06:02:05 AM UTC 24 |
Oct 12 06:02:10 AM UTC 24 |
185517754 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/4.i2c_target_stress_all.3759375015 |
|
|
Oct 12 05:57:01 AM UTC 24 |
Oct 12 06:02:20 AM UTC 24 |
33509801321 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_intr_smoke.2596909889 |
|
|
Oct 12 06:02:11 AM UTC 24 |
Oct 12 06:02:22 AM UTC 24 |
1049875791 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_host_perf_precise.3323327705 |
|
|
Oct 12 06:01:52 AM UTC 24 |
Oct 12 06:02:25 AM UTC 24 |
2337729442 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_overflow.3722204964 |
|
|
Oct 12 05:59:26 AM UTC 24 |
Oct 12 06:02:28 AM UTC 24 |
2578085201 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_tx.2028064129 |
|
|
Oct 12 06:02:26 AM UTC 24 |
Oct 12 06:02:29 AM UTC 24 |
462095295 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_acq.2091812591 |
|
|
Oct 12 06:02:25 AM UTC 24 |
Oct 12 06:02:29 AM UTC 24 |
229464140 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_host_stretch_timeout.140168267 |
|
|
Oct 12 06:01:52 AM UTC 24 |
Oct 12 06:02:31 AM UTC 24 |
3522379643 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_smoke.1817686328 |
|
|
Oct 12 06:01:58 AM UTC 24 |
Oct 12 06:02:31 AM UTC 24 |
864425245 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_timeout.4011234948 |
|
|
Oct 12 06:02:22 AM UTC 24 |
Oct 12 06:02:31 AM UTC 24 |
3477941939 ps |
| T33 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/4.i2c_host_perf.699142359 |
|
|
Oct 12 05:56:35 AM UTC 24 |
Oct 12 06:02:33 AM UTC 24 |
12645801613 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_hrst.1565459695 |
|
|
Oct 12 06:02:31 AM UTC 24 |
Oct 12 06:02:35 AM UTC 24 |
688307896 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_perf.1057262315 |
|
|
Oct 12 06:02:28 AM UTC 24 |
Oct 12 06:02:36 AM UTC 24 |
560124368 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_stretch.970915464 |
|
|
Oct 12 06:01:14 AM UTC 24 |
Oct 12 06:02:36 AM UTC 24 |
4163794425 ps |
| T34 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_host_perf.913706602 |
|
|
Oct 12 06:00:13 AM UTC 24 |
Oct 12 06:02:36 AM UTC 24 |
51222727549 ps |
| T287 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_bad_addr.3839567981 |
|
|
Oct 12 06:02:30 AM UTC 24 |
Oct 12 06:02:37 AM UTC 24 |
4697550435 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_acq.2413604283 |
|
|
Oct 12 06:02:32 AM UTC 24 |
Oct 12 06:02:37 AM UTC 24 |
720945592 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_tx.3290108080 |
|
|
Oct 12 06:02:34 AM UTC 24 |
Oct 12 06:02:37 AM UTC 24 |
917302096 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_host_smoke.1049461761 |
|
|
Oct 12 06:03:07 AM UTC 24 |
Oct 12 06:03:41 AM UTC 24 |
8758898148 ps |
| T79 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_host_mode_toggle.3896614919 |
|
|
Oct 12 06:02:32 AM UTC 24 |
Oct 12 06:02:39 AM UTC 24 |
132746224 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_alert_test.2344869697 |
|
|
Oct 12 06:02:37 AM UTC 24 |
Oct 12 06:02:40 AM UTC 24 |
51539768 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_nack_txstretch.3021181816 |
|
|
Oct 12 06:02:37 AM UTC 24 |
Oct 12 06:02:41 AM UTC 24 |
553135511 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_smbus_maxlen.3284493439 |
|
|
Oct 12 06:02:37 AM UTC 24 |
Oct 12 06:02:41 AM UTC 24 |
1170149091 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_host_override.1164298196 |
|
|
Oct 12 06:02:40 AM UTC 24 |
Oct 12 06:02:42 AM UTC 24 |
105928473 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull_addr.2236973285 |
|
|
Oct 12 06:02:37 AM UTC 24 |
Oct 12 06:02:43 AM UTC 24 |
2904864005 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_tx_stretch_ctrl.3496742381 |
|
|
Oct 12 06:02:36 AM UTC 24 |
Oct 12 06:02:43 AM UTC 24 |
261004982 ps |
| T55 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull.3250153518 |
|
|
Oct 12 06:02:37 AM UTC 24 |
Oct 12 06:02:44 AM UTC 24 |
557320137 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_fmt.1413895858 |
|
|
Oct 12 06:02:42 AM UTC 24 |
Oct 12 06:02:44 AM UTC 24 |
65644185 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_stretch.2317179805 |
|
|
Oct 12 06:02:09 AM UTC 24 |
Oct 12 06:02:46 AM UTC 24 |
905279870 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_host_may_nack.2339924131 |
|
|
Oct 12 06:02:32 AM UTC 24 |
Oct 12 06:02:47 AM UTC 24 |
777849029 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_full.3590571423 |
|
|
Oct 12 06:01:01 AM UTC 24 |
Oct 12 06:02:48 AM UTC 24 |
7322183914 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_host_perf_precise.317680262 |
|
|
Oct 12 06:02:44 AM UTC 24 |
Oct 12 06:02:48 AM UTC 24 |
81341892 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_host_error_intr.902251701 |
|
|
Oct 12 06:02:45 AM UTC 24 |
Oct 12 06:02:49 AM UTC 24 |
366415222 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_overflow.2149829841 |
|
|
Oct 12 06:01:48 AM UTC 24 |
Oct 12 06:02:49 AM UTC 24 |
34691782602 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_fmt_empty.2393267313 |
|
|
Oct 12 06:02:42 AM UTC 24 |
Oct 12 06:02:50 AM UTC 24 |
1257487974 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_rx.3707772759 |
|
|
Oct 12 06:02:43 AM UTC 24 |
Oct 12 06:02:50 AM UTC 24 |
155427397 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_stress_rd.2862185424 |
|
|
Oct 12 06:03:19 AM UTC 24 |
Oct 12 06:03:36 AM UTC 24 |
308877609 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_full.3675030216 |
|
|
Oct 12 06:01:51 AM UTC 24 |
Oct 12 06:02:53 AM UTC 24 |
2317682723 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_overflow.1780727671 |
|
|
Oct 12 06:00:11 AM UTC 24 |
Oct 12 06:02:54 AM UTC 24 |
2526923324 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_intr_stress_wr.3150487204 |
|
|
Oct 12 06:02:50 AM UTC 24 |
Oct 12 06:02:55 AM UTC 24 |
306521301 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_acq.3839700817 |
|
|
Oct 12 06:02:54 AM UTC 24 |
Oct 12 06:02:56 AM UTC 24 |
276194282 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_tx.93369718 |
|
|
Oct 12 06:02:54 AM UTC 24 |
Oct 12 06:02:57 AM UTC 24 |
176330480 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_host_stretch_timeout.2698488334 |
|
|
Oct 12 06:02:45 AM UTC 24 |
Oct 12 06:02:57 AM UTC 24 |
568990425 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_intr_smoke.2159976523 |
|
|
Oct 12 06:02:49 AM UTC 24 |
Oct 12 06:02:57 AM UTC 24 |
2661877357 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_watermark.423937685 |
|
|
Oct 12 06:00:59 AM UTC 24 |
Oct 12 06:02:57 AM UTC 24 |
5473803829 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_hrst.56903369 |
|
|
Oct 12 06:02:57 AM UTC 24 |
Oct 12 06:03:02 AM UTC 24 |
5126866241 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_timeout.1812766980 |
|
|
Oct 12 06:02:50 AM UTC 24 |
Oct 12 06:03:02 AM UTC 24 |
2797569496 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_perf.4086373808 |
|
|
Oct 12 06:02:55 AM UTC 24 |
Oct 12 06:03:04 AM UTC 24 |
843305012 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_bad_addr.273119838 |
|
|
Oct 12 06:02:57 AM UTC 24 |
Oct 12 06:03:04 AM UTC 24 |
819797982 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_acq.3651033647 |
|
|
Oct 12 06:02:58 AM UTC 24 |
Oct 12 06:03:04 AM UTC 24 |
2161592133 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_watermark.1224017216 |
|
|
Oct 12 06:00:10 AM UTC 24 |
Oct 12 06:03:04 AM UTC 24 |
2899940576 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_tx.1991869959 |
|
|
Oct 12 06:03:02 AM UTC 24 |
Oct 12 06:03:05 AM UTC 24 |
359564122 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_host_mode_toggle.2010617613 |
|
|
Oct 12 06:02:58 AM UTC 24 |
Oct 12 06:03:05 AM UTC 24 |
131674077 ps |
| T209 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/8.i2c_target_stress_all.780766945 |
|
|
Oct 12 06:00:41 AM UTC 24 |
Oct 12 06:03:33 AM UTC 24 |
32198571221 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_tx_stretch_ctrl.491414604 |
|
|
Oct 12 06:03:02 AM UTC 24 |
Oct 12 06:03:07 AM UTC 24 |
119043202 ps |
| T256 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_host_may_nack.372361638 |
|
|
Oct 12 06:02:58 AM UTC 24 |
Oct 12 06:03:08 AM UTC 24 |
6696694437 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_alert_test.954850407 |
|
|
Oct 12 06:03:06 AM UTC 24 |
Oct 12 06:03:08 AM UTC 24 |
16969168 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_smbus_maxlen.272059545 |
|
|
Oct 12 06:03:05 AM UTC 24 |
Oct 12 06:03:09 AM UTC 24 |
3327135770 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_nack_txstretch.795506828 |
|
|
Oct 12 06:03:06 AM UTC 24 |
Oct 12 06:03:10 AM UTC 24 |
132605485 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_host_override.3379452933 |
|
|
Oct 12 06:03:08 AM UTC 24 |
Oct 12 06:03:10 AM UTC 24 |
29690392 ps |
| T35 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/7.i2c_host_stress_all.3268181653 |
|
|
Oct 12 05:59:35 AM UTC 24 |
Oct 12 06:03:11 AM UTC 24 |
60606836687 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull_addr.1158485157 |
|
|
Oct 12 06:03:05 AM UTC 24 |
Oct 12 06:03:11 AM UTC 24 |
596443151 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull.1040570856 |
|
|
Oct 12 06:03:05 AM UTC 24 |
Oct 12 06:03:11 AM UTC 24 |
1251730489 ps |
| T131 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_host_perf.2960130627 |
|
|
Oct 12 06:02:44 AM UTC 24 |
Oct 12 06:03:36 AM UTC 24 |
12315682094 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_fmt.831012453 |
|
|
Oct 12 06:03:09 AM UTC 24 |
Oct 12 06:03:12 AM UTC 24 |
165489143 ps |
| T133 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_host_perf_precise.1266461968 |
|
|
Oct 12 06:03:13 AM UTC 24 |
Oct 12 06:03:15 AM UTC 24 |
171358503 ps |
| T29 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_host_error_intr.397439031 |
|
|
Oct 12 06:03:13 AM UTC 24 |
Oct 12 06:03:16 AM UTC 24 |
314661755 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_intr_stress_wr.2413126521 |
|
|
Oct 12 06:02:20 AM UTC 24 |
Oct 12 06:03:17 AM UTC 24 |
21774200892 ps |
| T135 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_watermark.332134823 |
|
|
Oct 12 05:59:25 AM UTC 24 |
Oct 12 06:03:18 AM UTC 24 |
15493320226 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_fmt_empty.2660298517 |
|
|
Oct 12 06:03:10 AM UTC 24 |
Oct 12 06:03:18 AM UTC 24 |
296554661 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_stress_wr.2160095463 |
|
|
Oct 12 06:02:48 AM UTC 24 |
Oct 12 06:03:24 AM UTC 24 |
9784297668 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_rx.339244736 |
|
|
Oct 12 06:03:11 AM UTC 24 |
Oct 12 06:03:25 AM UTC 24 |
1856028001 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_stretch.1578689487 |
|
|
Oct 12 06:03:19 AM UTC 24 |
Oct 12 06:03:26 AM UTC 24 |
1753767112 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_intr_stress_wr.2947653508 |
|
|
Oct 12 06:03:26 AM UTC 24 |
Oct 12 06:03:30 AM UTC 24 |
834813298 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_smoke.2122579531 |
|
|
Oct 12 06:03:17 AM UTC 24 |
Oct 12 06:03:30 AM UTC 24 |
833338952 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_stress_wr.1955445034 |
|
|
Oct 12 06:03:18 AM UTC 24 |
Oct 12 06:03:30 AM UTC 24 |
14587553296 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_smoke.3905696237 |
|
|
Oct 12 06:02:48 AM UTC 24 |
Oct 12 06:03:31 AM UTC 24 |
1133347729 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_stress_all.1582061328 |
|
|
Oct 12 06:02:56 AM UTC 24 |
Oct 12 06:03:32 AM UTC 24 |
19779967719 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_host_smoke.158646884 |
|
|
Oct 12 06:02:38 AM UTC 24 |
Oct 12 06:03:32 AM UTC 24 |
1250493269 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_intr_smoke.47536288 |
|
|
Oct 12 06:03:25 AM UTC 24 |
Oct 12 06:03:36 AM UTC 24 |
5077463123 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_acq.2648513045 |
|
|
Oct 12 06:03:31 AM UTC 24 |
Oct 12 06:03:33 AM UTC 24 |
133248208 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_tx.335391558 |
|
|
Oct 12 06:03:31 AM UTC 24 |
Oct 12 06:03:34 AM UTC 24 |
206996917 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_rx.714729707 |
|
|
Oct 12 06:05:14 AM UTC 24 |
Oct 12 06:05:26 AM UTC 24 |
474865239 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_timeout.1447586479 |
|
|
Oct 12 06:03:27 AM UTC 24 |
Oct 12 06:03:38 AM UTC 24 |
4887275554 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_tx.2613172676 |
|
|
Oct 12 06:03:36 AM UTC 24 |
Oct 12 06:03:39 AM UTC 24 |
179064013 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_acq.2285987913 |
|
|
Oct 12 06:03:35 AM UTC 24 |
Oct 12 06:03:41 AM UTC 24 |
2616446846 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_smbus_maxlen.3719028484 |
|
|
Oct 12 06:03:38 AM UTC 24 |
Oct 12 06:03:42 AM UTC 24 |
7172271725 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_perf.573001818 |
|
|
Oct 12 06:03:32 AM UTC 24 |
Oct 12 06:03:42 AM UTC 24 |
953249844 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_alert_test.1346166080 |
|
|
Oct 12 06:03:41 AM UTC 24 |
Oct 12 06:03:43 AM UTC 24 |
40042303 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull_addr.3776065082 |
|
|
Oct 12 06:05:07 AM UTC 24 |
Oct 12 06:05:13 AM UTC 24 |
1188420464 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_bad_addr.2294112235 |
|
|
Oct 12 06:03:33 AM UTC 24 |
Oct 12 06:03:43 AM UTC 24 |
942535554 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_host_may_nack.3346651199 |
|
|
Oct 12 06:03:34 AM UTC 24 |
Oct 12 06:03:44 AM UTC 24 |
547949590 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull_addr.1032113249 |
|
|
Oct 12 06:03:40 AM UTC 24 |
Oct 12 06:03:44 AM UTC 24 |
502719974 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull.2175859124 |
|
|
Oct 12 06:03:39 AM UTC 24 |
Oct 12 06:03:44 AM UTC 24 |
781477865 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_tx_stretch_ctrl.2427924908 |
|
|
Oct 12 06:03:36 AM UTC 24 |
Oct 12 06:03:44 AM UTC 24 |
470040625 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_host_stretch_timeout.3614037249 |
|
|
Oct 12 06:03:13 AM UTC 24 |
Oct 12 06:03:45 AM UTC 24 |
614110841 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_host_override.761443639 |
|
|
Oct 12 06:03:43 AM UTC 24 |
Oct 12 06:03:45 AM UTC 24 |
18012993 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_fmt.2285384269 |
|
|
Oct 12 06:03:44 AM UTC 24 |
Oct 12 06:03:47 AM UTC 24 |
71163219 ps |
| T22 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_host_error_intr.3057920270 |
|
|
Oct 12 06:03:46 AM UTC 24 |
Oct 12 06:03:49 AM UTC 24 |
230681494 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_overflow.2022086302 |
|
|
Oct 12 06:02:41 AM UTC 24 |
Oct 12 06:03:52 AM UTC 24 |
25126100875 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_host_perf_precise.2936087783 |
|
|
Oct 12 06:03:46 AM UTC 24 |
Oct 12 06:03:54 AM UTC 24 |
242628895 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_fmt_empty.2689894639 |
|
|
Oct 12 06:03:44 AM UTC 24 |
Oct 12 06:03:56 AM UTC 24 |
956399325 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_rx.1218071454 |
|
|
Oct 12 06:03:44 AM UTC 24 |
Oct 12 06:03:59 AM UTC 24 |
188117733 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_host_perf.3914431140 |
|
|
Oct 12 06:03:46 AM UTC 24 |
Oct 12 06:04:00 AM UTC 24 |
3376964487 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_stretch.4272988714 |
|
|
Oct 12 06:03:57 AM UTC 24 |
Oct 12 06:04:03 AM UTC 24 |
2576042268 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_target_stress_rd.1015492814 |
|
|
Oct 12 06:02:49 AM UTC 24 |
Oct 12 06:04:04 AM UTC 24 |
6274007288 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_fmt_empty.881552324 |
|
|
Oct 12 06:05:13 AM UTC 24 |
Oct 12 06:05:22 AM UTC 24 |
4652019647 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_host_stretch_timeout.1189897961 |
|
|
Oct 12 06:03:46 AM UTC 24 |
Oct 12 06:04:06 AM UTC 24 |
1007402913 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_smoke.3227243197 |
|
|
Oct 12 06:03:50 AM UTC 24 |
Oct 12 06:04:06 AM UTC 24 |
6482690968 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_host_smoke.3872653968 |
|
|
Oct 12 06:03:42 AM UTC 24 |
Oct 12 06:04:07 AM UTC 24 |
2968468483 ps |
| T271 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_intr_smoke.4183580799 |
|
|
Oct 12 06:04:00 AM UTC 24 |
Oct 12 06:04:07 AM UTC 24 |
482543520 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_acq.3629552947 |
|
|
Oct 12 06:04:07 AM UTC 24 |
Oct 12 06:04:09 AM UTC 24 |
780384331 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_tx.2780439653 |
|
|
Oct 12 06:04:07 AM UTC 24 |
Oct 12 06:04:10 AM UTC 24 |
197306990 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_overflow.1861852892 |
|
|
Oct 12 06:03:09 AM UTC 24 |
Oct 12 06:04:11 AM UTC 24 |
2204915622 ps |
| T267 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_host_mode_toggle.1066375032 |
|
|
Oct 12 06:04:10 AM UTC 24 |
Oct 12 06:04:13 AM UTC 24 |
342523027 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_timeout.1134391025 |
|
|
Oct 12 06:04:04 AM UTC 24 |
Oct 12 06:04:14 AM UTC 24 |
4699524411 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_tx.1903086361 |
|
|
Oct 12 06:04:12 AM UTC 24 |
Oct 12 06:04:15 AM UTC 24 |
81428705 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_watermark.2922045527 |
|
|
Oct 12 06:03:08 AM UTC 24 |
Oct 12 06:04:15 AM UTC 24 |
5456229665 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_acq.926635418 |
|
|
Oct 12 06:04:11 AM UTC 24 |
Oct 12 06:04:17 AM UTC 24 |
3705148329 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_perf.2313523897 |
|
|
Oct 12 06:04:08 AM UTC 24 |
Oct 12 06:04:18 AM UTC 24 |
1541536053 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_host_may_nack.2013401376 |
|
|
Oct 12 06:04:10 AM UTC 24 |
Oct 12 06:04:18 AM UTC 24 |
1309407272 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_tx_stretch_ctrl.3435199962 |
|
|
Oct 12 06:04:14 AM UTC 24 |
Oct 12 06:04:19 AM UTC 24 |
91263821 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_smbus_maxlen.2787664527 |
|
|
Oct 12 06:04:15 AM UTC 24 |
Oct 12 06:04:20 AM UTC 24 |
466302981 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull_addr.2411544889 |
|
|
Oct 12 06:04:16 AM UTC 24 |
Oct 12 06:04:20 AM UTC 24 |
911355408 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_nack_txstretch.2492603221 |
|
|
Oct 12 06:04:18 AM UTC 24 |
Oct 12 06:04:20 AM UTC 24 |
274713135 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull.2908009876 |
|
|
Oct 12 06:04:15 AM UTC 24 |
Oct 12 06:04:21 AM UTC 24 |
2467687661 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_alert_test.609950199 |
|
|
Oct 12 06:04:19 AM UTC 24 |
Oct 12 06:04:21 AM UTC 24 |
20054969 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_bad_addr.968933845 |
|
|
Oct 12 06:04:08 AM UTC 24 |
Oct 12 06:04:21 AM UTC 24 |
5381418413 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_host_override.1042141857 |
|
|
Oct 12 06:04:20 AM UTC 24 |
Oct 12 06:04:22 AM UTC 24 |
49355137 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_full.2966864107 |
|
|
Oct 12 06:02:43 AM UTC 24 |
Oct 12 06:04:23 AM UTC 24 |
1807183975 ps |
| T243 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_fmt.2016240002 |
|
|
Oct 12 06:04:21 AM UTC 24 |
Oct 12 06:04:24 AM UTC 24 |
137446881 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_rx.3040223393 |
|
|
Oct 12 06:04:21 AM UTC 24 |
Oct 12 06:04:27 AM UTC 24 |
221200234 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_host_perf_precise.172353761 |
|
|
Oct 12 06:04:23 AM UTC 24 |
Oct 12 06:04:28 AM UTC 24 |
240627347 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_fmt_empty.3051772833 |
|
|
Oct 12 06:04:21 AM UTC 24 |
Oct 12 06:04:31 AM UTC 24 |
396440611 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_host_error_intr.1347634114 |
|
|
Oct 12 06:04:26 AM UTC 24 |
Oct 12 06:04:32 AM UTC 24 |
375731706 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_stress_rd.793133846 |
|
|
Oct 12 06:03:55 AM UTC 24 |
Oct 12 06:04:32 AM UTC 24 |
1618876859 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_host_stretch_timeout.395286945 |
|
|
Oct 12 06:04:25 AM UTC 24 |
Oct 12 06:04:38 AM UTC 24 |
765442978 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_smoke.3892983146 |
|
|
Oct 12 06:04:29 AM UTC 24 |
Oct 12 06:04:43 AM UTC 24 |
3150995992 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_stress_all.3788072049 |
|
|
Oct 12 06:02:30 AM UTC 24 |
Oct 12 06:04:46 AM UTC 24 |
66104028639 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_intr_smoke.3085023803 |
|
|
Oct 12 06:04:39 AM UTC 24 |
Oct 12 06:04:48 AM UTC 24 |
8908856328 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_stress_rd.4083787204 |
|
|
Oct 12 06:04:33 AM UTC 24 |
Oct 12 06:04:48 AM UTC 24 |
540991858 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_acq.2379628347 |
|
|
Oct 12 06:04:49 AM UTC 24 |
Oct 12 06:04:52 AM UTC 24 |
392186511 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_target_stress_wr.4132726286 |
|
|
Oct 12 06:02:00 AM UTC 24 |
Oct 12 06:04:53 AM UTC 24 |
58057858398 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_tx.1072734092 |
|
|
Oct 12 06:04:52 AM UTC 24 |
Oct 12 06:04:54 AM UTC 24 |
350286033 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_watermark.2971688807 |
|
|
Oct 12 06:02:40 AM UTC 24 |
Oct 12 06:04:54 AM UTC 24 |
40072946860 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_timeout.95208102 |
|
|
Oct 12 06:04:47 AM UTC 24 |
Oct 12 06:05:00 AM UTC 24 |
5034185419 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_bad_addr.3187127285 |
|
|
Oct 12 06:04:55 AM UTC 24 |
Oct 12 06:05:02 AM UTC 24 |
12003974592 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_perf.4035632464 |
|
|
Oct 12 06:04:53 AM UTC 24 |
Oct 12 06:05:03 AM UTC 24 |
3369891020 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_host_mode_toggle.1758805933 |
|
|
Oct 12 06:05:00 AM UTC 24 |
Oct 12 06:05:04 AM UTC 24 |
140124376 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_tx.775727089 |
|
|
Oct 12 06:05:02 AM UTC 24 |
Oct 12 06:05:05 AM UTC 24 |
46258090 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_host_smoke.2987967536 |
|
|
Oct 12 06:05:11 AM UTC 24 |
Oct 12 06:05:34 AM UTC 24 |
1360667503 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_acq.2939290526 |
|
|
Oct 12 06:05:01 AM UTC 24 |
Oct 12 06:05:06 AM UTC 24 |
710430543 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_nack_txstretch.2508132151 |
|
|
Oct 12 06:05:07 AM UTC 24 |
Oct 12 06:05:10 AM UTC 24 |
131935420 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_smbus_maxlen.3416032031 |
|
|
Oct 12 06:05:05 AM UTC 24 |
Oct 12 06:05:10 AM UTC 24 |
788646184 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_tx_stretch_ctrl.105918536 |
|
|
Oct 12 06:05:04 AM UTC 24 |
Oct 12 06:05:11 AM UTC 24 |
230811347 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_alert_test.1961049229 |
|
|
Oct 12 06:05:10 AM UTC 24 |
Oct 12 06:05:12 AM UTC 24 |
26754956 ps |
| T255 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_host_may_nack.2665918513 |
|
|
Oct 12 06:05:01 AM UTC 24 |
Oct 12 06:05:12 AM UTC 24 |
934266667 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull.247673468 |
|
|
Oct 12 06:05:05 AM UTC 24 |
Oct 12 06:05:12 AM UTC 24 |
563039031 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_host_override.1428742731 |
|
|
Oct 12 06:05:11 AM UTC 24 |
Oct 12 06:05:13 AM UTC 24 |
25272855 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_fmt.3333740973 |
|
|
Oct 12 06:05:13 AM UTC 24 |
Oct 12 06:05:16 AM UTC 24 |
255778834 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_watermark.2216873164 |
|
|
Oct 12 06:03:43 AM UTC 24 |
Oct 12 06:05:22 AM UTC 24 |
9396213654 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_host_error_intr.845149730 |
|
|
Oct 12 06:05:23 AM UTC 24 |
Oct 12 06:05:26 AM UTC 24 |
368374171 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_overflow.1912221681 |
|
|
Oct 12 06:03:44 AM UTC 24 |
Oct 12 06:05:32 AM UTC 24 |
7297202268 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_host_perf.1739481865 |
|
|
Oct 12 06:05:17 AM UTC 24 |
Oct 12 06:05:35 AM UTC 24 |
2718452095 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_overflow.1368111189 |
|
|
Oct 12 06:04:21 AM UTC 24 |
Oct 12 06:05:35 AM UTC 24 |
2038370556 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_host_perf.996852962 |
|
|
Oct 12 06:01:52 AM UTC 24 |
Oct 12 06:05:42 AM UTC 24 |
76154882727 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_smoke.2297883626 |
|
|
Oct 12 06:05:27 AM UTC 24 |
Oct 12 06:05:44 AM UTC 24 |
990517949 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_intr_smoke.357009739 |
|
|
Oct 12 06:05:36 AM UTC 24 |
Oct 12 06:05:45 AM UTC 24 |
8450797005 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_intr_stress_wr.2569039672 |
|
|
Oct 12 06:04:43 AM UTC 24 |
Oct 12 06:05:49 AM UTC 24 |
15889644728 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_stretch.1697609865 |
|
|
Oct 12 06:05:36 AM UTC 24 |
Oct 12 06:05:49 AM UTC 24 |
2600907254 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_acq.1226215010 |
|
|
Oct 12 06:05:49 AM UTC 24 |
Oct 12 06:05:51 AM UTC 24 |
216859502 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_smoke.792869025 |
|
|
Oct 12 06:06:54 AM UTC 24 |
Oct 12 06:07:13 AM UTC 24 |
1227678593 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_host_smoke.4083467081 |
|
|
Oct 12 06:04:20 AM UTC 24 |
Oct 12 06:05:51 AM UTC 24 |
1950555568 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_tx.1861758727 |
|
|
Oct 12 06:05:50 AM UTC 24 |
Oct 12 06:05:53 AM UTC 24 |
377271030 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_host_perf.4242177638 |
|
|
Oct 12 06:01:02 AM UTC 24 |
Oct 12 06:07:13 AM UTC 24 |
28008401465 ps |