| T603 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_perf.3124433035 |
|
|
Oct 12 06:05:50 AM UTC 24 |
Oct 12 06:05:56 AM UTC 24 |
1917190147 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_stress_rd.3707167294 |
|
|
Oct 12 06:05:35 AM UTC 24 |
Oct 12 06:05:57 AM UTC 24 |
2044081233 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_hrst.3340123861 |
|
|
Oct 12 06:05:53 AM UTC 24 |
Oct 12 06:05:58 AM UTC 24 |
236613738 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_timeout.1808799093 |
|
|
Oct 12 06:05:46 AM UTC 24 |
Oct 12 06:05:58 AM UTC 24 |
2347053825 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/6.i2c_host_stress_all.3226457003 |
|
|
Oct 12 05:58:39 AM UTC 24 |
Oct 12 06:05:58 AM UTC 24 |
10989168620 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_watermarks_tx.548336163 |
|
|
Oct 12 06:05:58 AM UTC 24 |
Oct 12 06:06:01 AM UTC 24 |
563644787 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_watermarks_acq.2867339751 |
|
|
Oct 12 06:05:56 AM UTC 24 |
Oct 12 06:06:01 AM UTC 24 |
3380142887 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_bad_addr.2340125623 |
|
|
Oct 12 06:05:52 AM UTC 24 |
Oct 12 06:06:02 AM UTC 24 |
1236353226 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_stress_wr.1885042777 |
|
|
Oct 12 06:03:53 AM UTC 24 |
Oct 12 06:06:02 AM UTC 24 |
27633845388 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_smbus_maxlen.4128575789 |
|
|
Oct 12 06:05:59 AM UTC 24 |
Oct 12 06:06:03 AM UTC 24 |
1067902206 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_nack_acqfull.2694315427 |
|
|
Oct 12 06:05:59 AM UTC 24 |
Oct 12 06:06:03 AM UTC 24 |
1965378064 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_tx_stretch_ctrl.2422169119 |
|
|
Oct 12 06:05:59 AM UTC 24 |
Oct 12 06:06:03 AM UTC 24 |
213474676 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_alert_test.687469523 |
|
|
Oct 12 06:06:02 AM UTC 24 |
Oct 12 06:06:04 AM UTC 24 |
16674388 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_host_override.2927527209 |
|
|
Oct 12 06:06:02 AM UTC 24 |
Oct 12 06:06:04 AM UTC 24 |
52316106 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_nack_txstretch.1562804104 |
|
|
Oct 12 06:06:01 AM UTC 24 |
Oct 12 06:06:05 AM UTC 24 |
144687658 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_nack_acqfull_addr.1259213161 |
|
|
Oct 12 06:06:01 AM UTC 24 |
Oct 12 06:06:06 AM UTC 24 |
2879405670 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_full.3537736471 |
|
|
Oct 12 06:04:22 AM UTC 24 |
Oct 12 06:06:06 AM UTC 24 |
5602353982 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_reset_fmt.2200738876 |
|
|
Oct 12 06:06:05 AM UTC 24 |
Oct 12 06:06:08 AM UTC 24 |
675259596 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_host_perf_precise.2512422044 |
|
|
Oct 12 06:06:08 AM UTC 24 |
Oct 12 06:06:11 AM UTC 24 |
64067510 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_host_stretch_timeout.4252448089 |
|
|
Oct 12 06:05:23 AM UTC 24 |
Oct 12 06:06:11 AM UTC 24 |
3680754409 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_reset_rx.4222821820 |
|
|
Oct 12 06:06:06 AM UTC 24 |
Oct 12 06:06:13 AM UTC 24 |
346639591 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_host_error_intr.1318969211 |
|
|
Oct 12 06:06:12 AM UTC 24 |
Oct 12 06:06:16 AM UTC 24 |
735189382 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_full.520384300 |
|
|
Oct 12 06:03:11 AM UTC 24 |
Oct 12 06:06:16 AM UTC 24 |
8119359784 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_host_may_nack.151467738 |
|
|
Oct 12 06:05:56 AM UTC 24 |
Oct 12 06:06:16 AM UTC 24 |
1315753716 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_full.3688259081 |
|
|
Oct 12 06:05:15 AM UTC 24 |
Oct 12 06:06:17 AM UTC 24 |
8220703401 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_intr_stress_wr.2132548944 |
|
|
Oct 12 06:04:00 AM UTC 24 |
Oct 12 06:06:18 AM UTC 24 |
19199554661 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_stress_wr.2630045292 |
|
|
Oct 12 06:04:32 AM UTC 24 |
Oct 12 06:06:23 AM UTC 24 |
46360556183 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_watermark.2580086912 |
|
|
Oct 12 06:05:12 AM UTC 24 |
Oct 12 06:06:24 AM UTC 24 |
17335760607 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_host_stretch_timeout.3636953125 |
|
|
Oct 12 06:06:09 AM UTC 24 |
Oct 12 06:06:25 AM UTC 24 |
700227770 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_smbus_maxlen.983375966 |
|
|
Oct 12 06:08:40 AM UTC 24 |
Oct 12 06:08:44 AM UTC 24 |
1727661284 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_reset_tx.263860957 |
|
|
Oct 12 06:06:25 AM UTC 24 |
Oct 12 06:06:28 AM UTC 24 |
691030047 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_fmt_empty.3521702969 |
|
|
Oct 12 06:06:06 AM UTC 24 |
Oct 12 06:06:29 AM UTC 24 |
703176514 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_reset_acq.1744587207 |
|
|
Oct 12 06:06:25 AM UTC 24 |
Oct 12 06:06:29 AM UTC 24 |
155831241 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_smoke.1074633779 |
|
|
Oct 12 06:06:14 AM UTC 24 |
Oct 12 06:06:32 AM UTC 24 |
1655405972 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_intr_smoke.612197675 |
|
|
Oct 12 06:06:19 AM UTC 24 |
Oct 12 06:06:32 AM UTC 24 |
2801635642 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_hrst.2300302231 |
|
|
Oct 12 06:06:29 AM UTC 24 |
Oct 12 06:06:33 AM UTC 24 |
379649339 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_timeout.874765092 |
|
|
Oct 12 06:06:21 AM UTC 24 |
Oct 12 06:06:33 AM UTC 24 |
1363319130 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_stress_wr.3671060947 |
|
|
Oct 12 06:01:10 AM UTC 24 |
Oct 12 06:06:36 AM UTC 24 |
37019277297 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_watermarks_tx.515404446 |
|
|
Oct 12 06:06:34 AM UTC 24 |
Oct 12 06:06:37 AM UTC 24 |
125672163 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_bad_addr.694112130 |
|
|
Oct 12 06:06:29 AM UTC 24 |
Oct 12 06:06:37 AM UTC 24 |
4709138761 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_watermarks_acq.2317659648 |
|
|
Oct 12 06:06:34 AM UTC 24 |
Oct 12 06:06:39 AM UTC 24 |
1945616466 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_perf.2373508878 |
|
|
Oct 12 06:06:28 AM UTC 24 |
Oct 12 06:06:40 AM UTC 24 |
920835427 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_host_smoke.2619420645 |
|
|
Oct 12 06:06:02 AM UTC 24 |
Oct 12 06:06:40 AM UTC 24 |
3511101229 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_alert_test.1885877144 |
|
|
Oct 12 06:06:40 AM UTC 24 |
Oct 12 06:06:42 AM UTC 24 |
45361987 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_smbus_maxlen.323202021 |
|
|
Oct 12 06:06:37 AM UTC 24 |
Oct 12 06:06:43 AM UTC 24 |
530709580 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_nack_txstretch.3554695537 |
|
|
Oct 12 06:06:40 AM UTC 24 |
Oct 12 06:06:43 AM UTC 24 |
127327194 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_tx_stretch_ctrl.830262886 |
|
|
Oct 12 06:06:36 AM UTC 24 |
Oct 12 06:06:43 AM UTC 24 |
248600550 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_nack_acqfull_addr.2846958088 |
|
|
Oct 12 06:06:38 AM UTC 24 |
Oct 12 06:06:44 AM UTC 24 |
987714020 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_watermark.3434297085 |
|
|
Oct 12 06:01:48 AM UTC 24 |
Oct 12 06:06:44 AM UTC 24 |
97970796899 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_nack_acqfull.2512176992 |
|
|
Oct 12 06:06:38 AM UTC 24 |
Oct 12 06:06:45 AM UTC 24 |
1982520528 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_host_override.2882699679 |
|
|
Oct 12 06:06:43 AM UTC 24 |
Oct 12 06:06:45 AM UTC 24 |
61745392 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_host_may_nack.1872586306 |
|
|
Oct 12 06:06:33 AM UTC 24 |
Oct 12 06:06:47 AM UTC 24 |
585194391 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_reset_fmt.948996087 |
|
|
Oct 12 06:06:45 AM UTC 24 |
Oct 12 06:06:48 AM UTC 24 |
1086890850 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_host_perf_precise.670380097 |
|
|
Oct 12 06:06:48 AM UTC 24 |
Oct 12 06:06:52 AM UTC 24 |
93582834 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_fmt_empty.153457043 |
|
|
Oct 12 06:06:45 AM UTC 24 |
Oct 12 06:06:53 AM UTC 24 |
498156419 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_reset_rx.3407480705 |
|
|
Oct 12 06:06:45 AM UTC 24 |
Oct 12 06:06:53 AM UTC 24 |
538988390 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_overflow.1633492541 |
|
|
Oct 12 06:05:13 AM UTC 24 |
Oct 12 06:06:56 AM UTC 24 |
3483503081 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_target_stress_all.3346264208 |
|
|
Oct 12 06:04:54 AM UTC 24 |
Oct 12 06:06:57 AM UTC 24 |
45948276858 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_host_error_intr.1326868476 |
|
|
Oct 12 06:06:53 AM UTC 24 |
Oct 12 06:06:57 AM UTC 24 |
685912042 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_host_smoke.3437656246 |
|
|
Oct 12 06:06:41 AM UTC 24 |
Oct 12 06:06:59 AM UTC 24 |
4195761715 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_host_perf.2597508015 |
|
|
Oct 12 06:03:12 AM UTC 24 |
Oct 12 06:07:05 AM UTC 24 |
54801701917 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_intr_smoke.2333365294 |
|
|
Oct 12 06:07:00 AM UTC 24 |
Oct 12 06:07:07 AM UTC 24 |
780679320 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_stress_rd.809227757 |
|
|
Oct 12 06:06:16 AM UTC 24 |
Oct 12 06:07:12 AM UTC 24 |
1063938792 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_stretch.102739161 |
|
|
Oct 12 06:06:58 AM UTC 24 |
Oct 12 06:07:12 AM UTC 24 |
2780953916 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_reset_acq.480780255 |
|
|
Oct 12 06:07:13 AM UTC 24 |
Oct 12 06:07:15 AM UTC 24 |
121254829 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_reset_tx.3110312175 |
|
|
Oct 12 06:07:14 AM UTC 24 |
Oct 12 06:07:18 AM UTC 24 |
257027000 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_perf.3189135574 |
|
|
Oct 12 06:07:14 AM UTC 24 |
Oct 12 06:07:21 AM UTC 24 |
510577636 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_timeout.3528598251 |
|
|
Oct 12 06:07:08 AM UTC 24 |
Oct 12 06:07:21 AM UTC 24 |
5792229135 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_host_perf.29098816 |
|
|
Oct 12 06:06:46 AM UTC 24 |
Oct 12 06:07:22 AM UTC 24 |
7898378553 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_bad_addr.2168523150 |
|
|
Oct 12 06:07:16 AM UTC 24 |
Oct 12 06:07:24 AM UTC 24 |
3115403469 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_watermarks_tx.3234362411 |
|
|
Oct 12 06:07:25 AM UTC 24 |
Oct 12 06:07:27 AM UTC 24 |
358470483 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_watermarks_acq.535135258 |
|
|
Oct 12 06:07:23 AM UTC 24 |
Oct 12 06:07:27 AM UTC 24 |
1231147263 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_stress_rd.1818516781 |
|
|
Oct 12 06:06:57 AM UTC 24 |
Oct 12 06:07:28 AM UTC 24 |
3255176932 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_host_stretch_timeout.836085592 |
|
|
Oct 12 06:06:49 AM UTC 24 |
Oct 12 06:07:29 AM UTC 24 |
4005866390 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_tx_stretch_ctrl.3132845707 |
|
|
Oct 12 06:07:26 AM UTC 24 |
Oct 12 06:07:30 AM UTC 24 |
75949874 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_host_may_nack.1890736874 |
|
|
Oct 12 06:07:23 AM UTC 24 |
Oct 12 06:07:32 AM UTC 24 |
346575526 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_stress_wr.405633874 |
|
|
Oct 12 06:06:16 AM UTC 24 |
Oct 12 06:07:33 AM UTC 24 |
27890472168 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_smbus_maxlen.1818058214 |
|
|
Oct 12 06:07:28 AM UTC 24 |
Oct 12 06:07:33 AM UTC 24 |
471900557 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_stretch.2501934244 |
|
|
Oct 12 06:06:17 AM UTC 24 |
Oct 12 06:07:33 AM UTC 24 |
5455542041 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_nack_acqfull.2488135034 |
|
|
Oct 12 06:07:28 AM UTC 24 |
Oct 12 06:07:33 AM UTC 24 |
903554600 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_full.1646340925 |
|
|
Oct 12 06:06:06 AM UTC 24 |
Oct 12 06:07:34 AM UTC 24 |
2610157765 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_alert_test.3134204892 |
|
|
Oct 12 06:07:31 AM UTC 24 |
Oct 12 06:07:34 AM UTC 24 |
35133223 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_bad_addr.745592346 |
|
|
Oct 12 06:08:33 AM UTC 24 |
Oct 12 06:08:44 AM UTC 24 |
5797117777 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_nack_acqfull_addr.4217416286 |
|
|
Oct 12 06:07:29 AM UTC 24 |
Oct 12 06:07:34 AM UTC 24 |
1982332580 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_host_override.3417779197 |
|
|
Oct 12 06:07:34 AM UTC 24 |
Oct 12 06:07:36 AM UTC 24 |
47275690 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_reset_fmt.697878706 |
|
|
Oct 12 06:07:35 AM UTC 24 |
Oct 12 06:07:37 AM UTC 24 |
226561704 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_fmt_empty.3070481670 |
|
|
Oct 12 06:07:35 AM UTC 24 |
Oct 12 06:07:41 AM UTC 24 |
247774017 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_overflow.506226266 |
|
|
Oct 12 06:06:45 AM UTC 24 |
Oct 12 06:07:42 AM UTC 24 |
4957207927 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_reset_rx.608403036 |
|
|
Oct 12 06:07:35 AM UTC 24 |
Oct 12 06:07:43 AM UTC 24 |
756985412 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_full.2584775026 |
|
|
Oct 12 06:03:45 AM UTC 24 |
Oct 12 06:07:43 AM UTC 24 |
45935510576 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_host_error_intr.1534447866 |
|
|
Oct 12 06:07:38 AM UTC 24 |
Oct 12 06:07:44 AM UTC 24 |
663732453 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_host_stretch_timeout.1974167395 |
|
|
Oct 12 06:07:36 AM UTC 24 |
Oct 12 06:07:46 AM UTC 24 |
3477222702 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_stretch.199608287 |
|
|
Oct 12 06:07:45 AM UTC 24 |
Oct 12 06:07:53 AM UTC 24 |
2434432033 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_timeout.3727884 |
|
|
Oct 12 06:08:30 AM UTC 24 |
Oct 12 06:08:44 AM UTC 24 |
1407556995 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_host_perf.225828509 |
|
|
Oct 12 06:06:07 AM UTC 24 |
Oct 12 06:07:55 AM UTC 24 |
2588392331 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_intr_stress_wr.164037144 |
|
|
Oct 12 06:06:19 AM UTC 24 |
Oct 12 06:07:55 AM UTC 24 |
19406357207 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_smoke.2179900006 |
|
|
Oct 12 06:07:44 AM UTC 24 |
Oct 12 06:07:56 AM UTC 24 |
721965677 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_intr_smoke.3693001065 |
|
|
Oct 12 06:07:47 AM UTC 24 |
Oct 12 06:07:56 AM UTC 24 |
3064188593 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_host_perf_precise.387503114 |
|
|
Oct 12 06:07:35 AM UTC 24 |
Oct 12 06:07:57 AM UTC 24 |
1659275866 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_intr_stress_wr.3391500351 |
|
|
Oct 12 06:07:54 AM UTC 24 |
Oct 12 06:07:57 AM UTC 24 |
1061767886 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_overflow.1450899588 |
|
|
Oct 12 06:06:04 AM UTC 24 |
Oct 12 06:07:58 AM UTC 24 |
5975055923 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_watermarks_tx.783861570 |
|
|
Oct 12 06:08:39 AM UTC 24 |
Oct 12 06:08:41 AM UTC 24 |
436459302 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_reset_tx.891933164 |
|
|
Oct 12 06:07:56 AM UTC 24 |
Oct 12 06:07:59 AM UTC 24 |
206906619 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_reset_acq.77140023 |
|
|
Oct 12 06:07:56 AM UTC 24 |
Oct 12 06:07:59 AM UTC 24 |
270393377 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_target_stress_all.495337099 |
|
|
Oct 12 06:06:28 AM UTC 24 |
Oct 12 06:08:02 AM UTC 24 |
43750807864 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_host_mode_toggle.2392773736 |
|
|
Oct 12 06:08:00 AM UTC 24 |
Oct 12 06:08:02 AM UTC 24 |
299625391 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_watermarks_tx.3850855130 |
|
|
Oct 12 06:08:00 AM UTC 24 |
Oct 12 06:08:03 AM UTC 24 |
2036274338 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_watermarks_acq.58009029 |
|
|
Oct 12 06:08:00 AM UTC 24 |
Oct 12 06:08:05 AM UTC 24 |
1875041801 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_host_smoke.2999247793 |
|
|
Oct 12 06:07:33 AM UTC 24 |
Oct 12 06:08:06 AM UTC 24 |
1285349445 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_tx_stretch_ctrl.3070871118 |
|
|
Oct 12 06:08:03 AM UTC 24 |
Oct 12 06:08:07 AM UTC 24 |
83505187 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_bad_addr.2671668553 |
|
|
Oct 12 06:07:59 AM UTC 24 |
Oct 12 06:08:07 AM UTC 24 |
3458079372 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_perf.2507595584 |
|
|
Oct 12 06:07:56 AM UTC 24 |
Oct 12 06:08:07 AM UTC 24 |
2242886627 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_smbus_maxlen.769089842 |
|
|
Oct 12 06:08:03 AM UTC 24 |
Oct 12 06:08:07 AM UTC 24 |
826631314 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_timeout.3381477126 |
|
|
Oct 12 06:07:55 AM UTC 24 |
Oct 12 06:08:08 AM UTC 24 |
1654366115 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_stress_wr.595775904 |
|
|
Oct 12 06:07:44 AM UTC 24 |
Oct 12 06:08:09 AM UTC 24 |
24660161830 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_alert_test.2814687885 |
|
|
Oct 12 06:08:08 AM UTC 24 |
Oct 12 06:08:09 AM UTC 24 |
82046390 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_intr_stress_wr.2586088517 |
|
|
Oct 12 06:07:06 AM UTC 24 |
Oct 12 06:08:10 AM UTC 24 |
13276245231 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_nack_acqfull.1295617800 |
|
|
Oct 12 06:08:04 AM UTC 24 |
Oct 12 06:08:10 AM UTC 24 |
2164537052 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_watermark.105021783 |
|
|
Oct 12 06:07:34 AM UTC 24 |
Oct 12 06:08:44 AM UTC 24 |
5157730883 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_host_override.4026058319 |
|
|
Oct 12 06:08:09 AM UTC 24 |
Oct 12 06:08:11 AM UTC 24 |
38679557 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_nack_txstretch.1798194798 |
|
|
Oct 12 06:08:07 AM UTC 24 |
Oct 12 06:08:11 AM UTC 24 |
1430248506 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_nack_acqfull_addr.3574152129 |
|
|
Oct 12 06:08:05 AM UTC 24 |
Oct 12 06:08:12 AM UTC 24 |
2799555304 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_reset_fmt.413432338 |
|
|
Oct 12 06:08:10 AM UTC 24 |
Oct 12 06:08:13 AM UTC 24 |
360498882 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_stress_rd.4243654405 |
|
|
Oct 12 06:07:45 AM UTC 24 |
Oct 12 06:08:15 AM UTC 24 |
3188407427 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_host_perf_precise.2474724150 |
|
|
Oct 12 06:08:12 AM UTC 24 |
Oct 12 06:08:15 AM UTC 24 |
153858495 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_host_may_nack.3617877986 |
|
|
Oct 12 06:08:00 AM UTC 24 |
Oct 12 06:08:17 AM UTC 24 |
6379896280 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_fmt_empty.2329018210 |
|
|
Oct 12 06:08:10 AM UTC 24 |
Oct 12 06:08:20 AM UTC 24 |
295857794 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_reset_rx.4067074276 |
|
|
Oct 12 06:08:11 AM UTC 24 |
Oct 12 06:08:22 AM UTC 24 |
144783102 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_stress_rd.589303434 |
|
|
Oct 12 06:08:21 AM UTC 24 |
Oct 12 06:08:27 AM UTC 24 |
241851436 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_host_stretch_timeout.3813239053 |
|
|
Oct 12 06:08:13 AM UTC 24 |
Oct 12 06:08:29 AM UTC 24 |
718937120 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_full.3090161628 |
|
|
Oct 12 06:06:46 AM UTC 24 |
Oct 12 06:08:29 AM UTC 24 |
2905127994 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_stretch.1636350535 |
|
|
Oct 12 06:08:22 AM UTC 24 |
Oct 12 06:08:31 AM UTC 24 |
3469246474 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_smoke.2796175810 |
|
|
Oct 12 06:08:16 AM UTC 24 |
Oct 12 06:08:31 AM UTC 24 |
4214718263 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_full.1254683108 |
|
|
Oct 12 06:07:35 AM UTC 24 |
Oct 12 06:08:31 AM UTC 24 |
2248665783 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_host_error_intr.1879137434 |
|
|
Oct 12 06:08:14 AM UTC 24 |
Oct 12 06:08:32 AM UTC 24 |
368947189 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_intr_smoke.3260826847 |
|
|
Oct 12 06:08:25 AM UTC 24 |
Oct 12 06:08:33 AM UTC 24 |
1673873258 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_reset_tx.741391857 |
|
|
Oct 12 06:08:32 AM UTC 24 |
Oct 12 06:08:35 AM UTC 24 |
287988508 ps |
| T291 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_reset_acq.3427260537 |
|
|
Oct 12 06:08:32 AM UTC 24 |
Oct 12 06:08:35 AM UTC 24 |
305302980 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_watermark.3179172508 |
|
|
Oct 12 06:04:20 AM UTC 24 |
Oct 12 06:08:37 AM UTC 24 |
4227260876 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_hrst.2516794839 |
|
|
Oct 12 06:08:34 AM UTC 24 |
Oct 12 06:08:38 AM UTC 24 |
1084447415 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_perf.466310959 |
|
|
Oct 12 06:08:32 AM UTC 24 |
Oct 12 06:08:39 AM UTC 24 |
2453477850 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_stress_all.2217192491 |
|
|
Oct 12 06:05:52 AM UTC 24 |
Oct 12 06:08:40 AM UTC 24 |
36732311556 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_watermarks_acq.2129281634 |
|
|
Oct 12 06:08:38 AM UTC 24 |
Oct 12 06:08:42 AM UTC 24 |
1324103747 ps |
| T249 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_host_may_nack.2537403181 |
|
|
Oct 12 06:08:37 AM UTC 24 |
Oct 12 06:08:45 AM UTC 24 |
1710065346 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_tx_stretch_ctrl.1797405522 |
|
|
Oct 12 06:08:40 AM UTC 24 |
Oct 12 06:08:45 AM UTC 24 |
163665720 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_alert_test.2554505677 |
|
|
Oct 12 06:08:44 AM UTC 24 |
Oct 12 06:08:46 AM UTC 24 |
40346136 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_nack_acqfull.1484417027 |
|
|
Oct 12 06:08:41 AM UTC 24 |
Oct 12 06:08:46 AM UTC 24 |
468664540 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_host_smoke.4226703203 |
|
|
Oct 12 06:08:08 AM UTC 24 |
Oct 12 06:08:47 AM UTC 24 |
9231742627 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_nack_acqfull_addr.1624728363 |
|
|
Oct 12 06:08:42 AM UTC 24 |
Oct 12 06:08:47 AM UTC 24 |
869199935 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_nack_txstretch.2211123944 |
|
|
Oct 12 06:08:43 AM UTC 24 |
Oct 12 06:08:47 AM UTC 24 |
174139395 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_host_override.4093035479 |
|
|
Oct 12 06:08:45 AM UTC 24 |
Oct 12 06:08:47 AM UTC 24 |
29054940 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_reset_fmt.188697382 |
|
|
Oct 12 06:08:47 AM UTC 24 |
Oct 12 06:08:49 AM UTC 24 |
476012696 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_host_perf_precise.2149409799 |
|
|
Oct 12 06:08:48 AM UTC 24 |
Oct 12 06:08:51 AM UTC 24 |
93482308 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_reset_rx.1741762192 |
|
|
Oct 12 06:08:47 AM UTC 24 |
Oct 12 06:08:53 AM UTC 24 |
925332437 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_host_error_intr.1501742944 |
|
|
Oct 12 06:08:50 AM UTC 24 |
Oct 12 06:08:53 AM UTC 24 |
83107131 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_fmt_empty.53748101 |
|
|
Oct 12 06:08:47 AM UTC 24 |
Oct 12 06:08:59 AM UTC 24 |
1541673344 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_host_stretch_timeout.758882082 |
|
|
Oct 12 06:08:48 AM UTC 24 |
Oct 12 06:09:03 AM UTC 24 |
495882005 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_intr_stress_wr.381109097 |
|
|
Oct 12 06:05:42 AM UTC 24 |
Oct 12 06:09:08 AM UTC 24 |
18136122956 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_host_perf.2772475810 |
|
|
Oct 12 06:08:48 AM UTC 24 |
Oct 12 06:09:09 AM UTC 24 |
712350798 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_host_perf.3652144852 |
|
|
Oct 12 06:08:11 AM UTC 24 |
Oct 12 06:09:10 AM UTC 24 |
5338374911 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_intr_smoke.2573696565 |
|
|
Oct 12 06:09:04 AM UTC 24 |
Oct 12 06:09:12 AM UTC 24 |
625193287 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_host_perf_precise.1020400787 |
|
|
Oct 12 06:10:10 AM UTC 24 |
Oct 12 06:10:13 AM UTC 24 |
307703805 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_host_smoke.60599029 |
|
|
Oct 12 06:08:45 AM UTC 24 |
Oct 12 06:09:13 AM UTC 24 |
22536309522 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_reset_rx.2475211842 |
|
|
Oct 12 06:10:10 AM UTC 24 |
Oct 12 06:10:16 AM UTC 24 |
304725287 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_reset_acq.2125313764 |
|
|
Oct 12 06:09:12 AM UTC 24 |
Oct 12 06:09:15 AM UTC 24 |
201652723 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_reset_tx.2250438633 |
|
|
Oct 12 06:09:14 AM UTC 24 |
Oct 12 06:09:17 AM UTC 24 |
201053486 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_stretch.2589734493 |
|
|
Oct 12 06:09:00 AM UTC 24 |
Oct 12 06:09:20 AM UTC 24 |
3474247633 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_smoke.590481089 |
|
|
Oct 12 06:08:55 AM UTC 24 |
Oct 12 06:09:21 AM UTC 24 |
1589759304 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_hrst.735878630 |
|
|
Oct 12 06:09:18 AM UTC 24 |
Oct 12 06:09:22 AM UTC 24 |
3786502456 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_timeout.3732824109 |
|
|
Oct 12 06:09:10 AM UTC 24 |
Oct 12 06:09:24 AM UTC 24 |
5942500141 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_host_mode_toggle.2312765919 |
|
|
Oct 12 06:09:21 AM UTC 24 |
Oct 12 06:09:26 AM UTC 24 |
156705813 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_target_stress_wr.3811112017 |
|
|
Oct 12 06:05:33 AM UTC 24 |
Oct 12 06:09:26 AM UTC 24 |
47447353299 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_perf.2906372396 |
|
|
Oct 12 06:09:14 AM UTC 24 |
Oct 12 06:09:26 AM UTC 24 |
957167592 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_watermarks_tx.1691280247 |
|
|
Oct 12 06:09:24 AM UTC 24 |
Oct 12 06:09:27 AM UTC 24 |
224631529 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_watermarks_acq.3477598157 |
|
|
Oct 12 06:09:23 AM UTC 24 |
Oct 12 06:09:28 AM UTC 24 |
1412469854 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_bad_addr.3514230455 |
|
|
Oct 12 06:09:16 AM UTC 24 |
Oct 12 06:09:28 AM UTC 24 |
4587243761 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_alert_test.3845784187 |
|
|
Oct 12 06:09:29 AM UTC 24 |
Oct 12 06:09:31 AM UTC 24 |
87932253 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_smbus_maxlen.1650976715 |
|
|
Oct 12 06:09:26 AM UTC 24 |
Oct 12 06:09:32 AM UTC 24 |
2323571101 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_stress_wr.3503143801 |
|
|
Oct 12 06:08:18 AM UTC 24 |
Oct 12 06:09:32 AM UTC 24 |
23427656456 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_nack_acqfull.2341587052 |
|
|
Oct 12 06:09:28 AM UTC 24 |
Oct 12 06:09:32 AM UTC 24 |
1616921716 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_nack_acqfull_addr.429776892 |
|
|
Oct 12 06:10:05 AM UTC 24 |
Oct 12 06:10:11 AM UTC 24 |
499994917 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_nack_acqfull_addr.2772684793 |
|
|
Oct 12 06:09:28 AM UTC 24 |
Oct 12 06:09:32 AM UTC 24 |
1555070862 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_tx_stretch_ctrl.3364666066 |
|
|
Oct 12 06:09:26 AM UTC 24 |
Oct 12 06:09:34 AM UTC 24 |
297938955 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_host_override.999170687 |
|
|
Oct 12 06:09:33 AM UTC 24 |
Oct 12 06:09:36 AM UTC 24 |
41759216 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_reset_fmt.3786992343 |
|
|
Oct 12 06:09:33 AM UTC 24 |
Oct 12 06:09:36 AM UTC 24 |
517164188 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_intr_stress_wr.1201670369 |
|
|
Oct 12 06:09:09 AM UTC 24 |
Oct 12 06:09:37 AM UTC 24 |
10537063417 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_overflow.2713222106 |
|
|
Oct 12 06:08:09 AM UTC 24 |
Oct 12 06:09:37 AM UTC 24 |
13218163674 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_stress_rd.3691277521 |
|
|
Oct 12 06:08:56 AM UTC 24 |
Oct 12 06:09:43 AM UTC 24 |
919159075 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_full.2748520568 |
|
|
Oct 12 06:08:11 AM UTC 24 |
Oct 12 06:09:43 AM UTC 24 |
6325075319 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_overflow.1577350201 |
|
|
Oct 12 06:08:47 AM UTC 24 |
Oct 12 06:09:47 AM UTC 24 |
1687763525 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/9.i2c_target_stress_all.3083217521 |
|
|
Oct 12 06:01:29 AM UTC 24 |
Oct 12 06:09:47 AM UTC 24 |
34689155286 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_host_may_nack.2908715765 |
|
|
Oct 12 06:09:22 AM UTC 24 |
Oct 12 06:09:48 AM UTC 24 |
1918250010 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_host_error_intr.2777529454 |
|
|
Oct 12 06:09:44 AM UTC 24 |
Oct 12 06:09:49 AM UTC 24 |
196886727 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_reset_rx.978094480 |
|
|
Oct 12 06:09:35 AM UTC 24 |
Oct 12 06:09:51 AM UTC 24 |
416933312 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_stress_all.4232179565 |
|
|
Oct 12 06:09:16 AM UTC 24 |
Oct 12 06:09:52 AM UTC 24 |
10199868463 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_host_perf.2258274152 |
|
|
Oct 12 06:07:35 AM UTC 24 |
Oct 12 06:09:52 AM UTC 24 |
2658993545 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_watermark.217698231 |
|
|
Oct 12 06:08:46 AM UTC 24 |
Oct 12 06:09:55 AM UTC 24 |
5516034574 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_full.3776204489 |
|
|
Oct 12 06:08:48 AM UTC 24 |
Oct 12 06:09:55 AM UTC 24 |
1946233204 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_fmt_empty.1329456879 |
|
|
Oct 12 06:09:33 AM UTC 24 |
Oct 12 06:09:56 AM UTC 24 |
336845130 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_stress_rd.2634967633 |
|
|
Oct 12 06:09:49 AM UTC 24 |
Oct 12 06:09:57 AM UTC 24 |
348014673 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_stress_wr.3585927719 |
|
|
Oct 12 06:09:48 AM UTC 24 |
Oct 12 06:09:57 AM UTC 24 |
15110683784 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_watermark.2411778504 |
|
|
Oct 12 06:08:09 AM UTC 24 |
Oct 12 06:09:58 AM UTC 24 |
6719375256 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_host_stretch_timeout.1870609012 |
|
|
Oct 12 06:09:39 AM UTC 24 |
Oct 12 06:09:58 AM UTC 24 |
1747245606 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_host_perf_precise.3172071923 |
|
|
Oct 12 06:09:39 AM UTC 24 |
Oct 12 06:10:18 AM UTC 24 |
856707674 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_reset_tx.2618741024 |
|
|
Oct 12 06:09:56 AM UTC 24 |
Oct 12 06:09:59 AM UTC 24 |
1164263151 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_reset_acq.293256660 |
|
|
Oct 12 06:09:56 AM UTC 24 |
Oct 12 06:09:59 AM UTC 24 |
185703157 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_intr_smoke.2237277923 |
|
|
Oct 12 06:09:51 AM UTC 24 |
Oct 12 06:10:02 AM UTC 24 |
1812233222 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_watermarks_tx.1089268529 |
|
|
Oct 12 06:10:00 AM UTC 24 |
Oct 12 06:10:03 AM UTC 24 |
554828553 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_timeout.1244744777 |
|
|
Oct 12 06:09:53 AM UTC 24 |
Oct 12 06:10:03 AM UTC 24 |
1441202869 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_watermarks_acq.964836068 |
|
|
Oct 12 06:10:00 AM UTC 24 |
Oct 12 06:10:04 AM UTC 24 |
675343021 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_nack_acqfull.2433928532 |
|
|
Oct 12 06:10:04 AM UTC 24 |
Oct 12 06:10:10 AM UTC 24 |
2589225129 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_host_error_intr.279197969 |
|
|
Oct 12 06:10:11 AM UTC 24 |
Oct 12 06:10:19 AM UTC 24 |
163456668 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_host_smoke.1029876917 |
|
|
Oct 12 06:09:32 AM UTC 24 |
Oct 12 06:10:05 AM UTC 24 |
3122652909 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_perf.1937197610 |
|
|
Oct 12 06:09:56 AM UTC 24 |
Oct 12 06:10:06 AM UTC 24 |
3203276839 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_bad_addr.140584290 |
|
|
Oct 12 06:09:58 AM UTC 24 |
Oct 12 06:10:06 AM UTC 24 |
1330535748 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_tx_stretch_ctrl.2501487897 |
|
|
Oct 12 06:10:03 AM UTC 24 |
Oct 12 06:10:06 AM UTC 24 |
51756421 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_alert_test.3599716899 |
|
|
Oct 12 06:10:05 AM UTC 24 |
Oct 12 06:10:07 AM UTC 24 |
18367359 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_smbus_maxlen.2647620789 |
|
|
Oct 12 06:10:04 AM UTC 24 |
Oct 12 06:10:08 AM UTC 24 |
1671921165 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_host_may_nack.3451536377 |
|
|
Oct 12 06:10:00 AM UTC 24 |
Oct 12 06:10:09 AM UTC 24 |
1642134802 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_nack_txstretch.2892526096 |
|
|
Oct 12 06:10:05 AM UTC 24 |
Oct 12 06:10:09 AM UTC 24 |
736895264 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_host_override.3093500076 |
|
|
Oct 12 06:10:07 AM UTC 24 |
Oct 12 06:10:09 AM UTC 24 |
27888524 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_reset_fmt.1147624203 |
|
|
Oct 12 06:10:08 AM UTC 24 |
Oct 12 06:10:10 AM UTC 24 |
222207866 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_fmt_empty.3481268555 |
|
|
Oct 12 06:10:09 AM UTC 24 |
Oct 12 06:10:21 AM UTC 24 |
899684498 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_overflow.2508066508 |
|
|
Oct 12 06:07:34 AM UTC 24 |
Oct 12 06:10:25 AM UTC 24 |
5195595418 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_overflow.2469250519 |
|
|
Oct 12 06:09:33 AM UTC 24 |
Oct 12 06:10:25 AM UTC 24 |
1518273973 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_smoke.1780759368 |
|
|
Oct 12 06:09:48 AM UTC 24 |
Oct 12 06:10:27 AM UTC 24 |
5016095952 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_stretch.3369045009 |
|
|
Oct 12 06:09:50 AM UTC 24 |
Oct 12 06:10:30 AM UTC 24 |
1796115440 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_stretch.1877348015 |
|
|
Oct 12 06:10:22 AM UTC 24 |
Oct 12 06:10:31 AM UTC 24 |
3397467427 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_reset_acq.3381022678 |
|
|
Oct 12 06:10:31 AM UTC 24 |
Oct 12 06:10:36 AM UTC 24 |
306210166 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_intr_smoke.502176622 |
|
|
Oct 12 06:10:26 AM UTC 24 |
Oct 12 06:10:36 AM UTC 24 |
2247573192 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_reset_tx.1417572209 |
|
|
Oct 12 06:10:34 AM UTC 24 |
Oct 12 06:10:38 AM UTC 24 |
1386538858 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_timeout.3371264935 |
|
|
Oct 12 06:10:28 AM UTC 24 |
Oct 12 06:10:38 AM UTC 24 |
3131941621 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_host_smoke.2569228135 |
|
|
Oct 12 06:10:07 AM UTC 24 |
Oct 12 06:10:41 AM UTC 24 |
5957462368 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_watermark.3809771117 |
|
|
Oct 12 06:06:04 AM UTC 24 |
Oct 12 06:10:43 AM UTC 24 |
22131216903 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_hrst.2265930508 |
|
|
Oct 12 06:10:39 AM UTC 24 |
Oct 12 06:10:43 AM UTC 24 |
690049790 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_perf.934908267 |
|
|
Oct 12 06:10:37 AM UTC 24 |
Oct 12 06:10:45 AM UTC 24 |
3377287227 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_host_mode_toggle.629809960 |
|
|
Oct 12 06:10:42 AM UTC 24 |
Oct 12 06:10:46 AM UTC 24 |
107525237 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_intr_stress_wr.3565383168 |
|
|
Oct 12 06:10:26 AM UTC 24 |
Oct 12 06:10:46 AM UTC 24 |
6679666536 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_intr_stress_wr.1705230192 |
|
|
Oct 12 06:09:53 AM UTC 24 |
Oct 12 06:10:47 AM UTC 24 |
21532305037 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_smoke.3038770274 |
|
|
Oct 12 06:10:18 AM UTC 24 |
Oct 12 06:10:48 AM UTC 24 |
1352081038 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_full.1326359415 |
|
|
Oct 12 06:09:37 AM UTC 24 |
Oct 12 06:10:48 AM UTC 24 |
3028263810 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_watermarks_acq.201934912 |
|
|
Oct 12 06:10:43 AM UTC 24 |
Oct 12 06:10:48 AM UTC 24 |
1756137956 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_bad_addr.954815951 |
|
|
Oct 12 06:10:39 AM UTC 24 |
Oct 12 06:10:48 AM UTC 24 |
1121617871 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_watermarks_tx.311805 |
|
|
Oct 12 06:10:45 AM UTC 24 |
Oct 12 06:10:48 AM UTC 24 |
109054357 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_host_may_nack.1890341395 |
|
|
Oct 12 06:10:43 AM UTC 24 |
Oct 12 06:10:50 AM UTC 24 |
1717078162 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_alert_test.3365738032 |
|
|
Oct 12 06:10:49 AM UTC 24 |
Oct 12 06:10:51 AM UTC 24 |
18246470 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_host_override.1334134315 |
|
|
Oct 12 06:10:49 AM UTC 24 |
Oct 12 06:10:51 AM UTC 24 |
26094814 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_nack_txstretch.3871050602 |
|
|
Oct 12 06:10:49 AM UTC 24 |
Oct 12 06:10:52 AM UTC 24 |
143700275 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_smbus_maxlen.661723525 |
|
|
Oct 12 06:10:47 AM UTC 24 |
Oct 12 06:10:53 AM UTC 24 |
3415530289 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_nack_acqfull.1412137692 |
|
|
Oct 12 06:10:49 AM UTC 24 |
Oct 12 06:10:53 AM UTC 24 |
2247792178 ps |