| T1322 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_host_perf_precise.4227827194 |
|
|
Oct 12 06:20:40 AM UTC 24 |
Oct 12 06:20:43 AM UTC 24 |
74037774 ps |
| T1323 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_rx.1259868146 |
|
|
Oct 12 06:20:40 AM UTC 24 |
Oct 12 06:20:45 AM UTC 24 |
144659951 ps |
| T1324 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_host_may_nack.1526527936 |
|
|
Oct 12 06:20:31 AM UTC 24 |
Oct 12 06:20:46 AM UTC 24 |
578517548 ps |
| T1325 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_stress_rd.2806673155 |
|
|
Oct 12 06:19:26 AM UTC 24 |
Oct 12 06:20:47 AM UTC 24 |
1579279044 ps |
| T1326 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_host_error_intr.2945798649 |
|
|
Oct 12 06:20:41 AM UTC 24 |
Oct 12 06:20:49 AM UTC 24 |
451186403 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_watermark.3135792685 |
|
|
Oct 12 06:19:13 AM UTC 24 |
Oct 12 06:20:51 AM UTC 24 |
9906918245 ps |
| T1327 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_stress_rd.2450703925 |
|
|
Oct 12 06:20:46 AM UTC 24 |
Oct 12 06:20:52 AM UTC 24 |
363731136 ps |
| T1328 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_fmt_empty.3405620466 |
|
|
Oct 12 06:20:39 AM UTC 24 |
Oct 12 06:20:53 AM UTC 24 |
506982584 ps |
| T1329 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_host_smoke.3736231824 |
|
|
Oct 12 06:20:12 AM UTC 24 |
Oct 12 06:20:53 AM UTC 24 |
1821793386 ps |
| T1330 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_host_stretch_timeout.3516884263 |
|
|
Oct 12 06:20:41 AM UTC 24 |
Oct 12 06:20:55 AM UTC 24 |
2172301709 ps |
| T1331 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_intr_smoke.969849539 |
|
|
Oct 12 06:20:48 AM UTC 24 |
Oct 12 06:20:57 AM UTC 24 |
834170778 ps |
| T1332 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_tx.1392237630 |
|
|
Oct 12 06:20:55 AM UTC 24 |
Oct 12 06:20:58 AM UTC 24 |
644150316 ps |
| T1333 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_acq.2255806492 |
|
|
Oct 12 06:20:54 AM UTC 24 |
Oct 12 06:20:59 AM UTC 24 |
279418913 ps |
| T1334 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_perf.3603173260 |
|
|
Oct 12 06:20:56 AM UTC 24 |
Oct 12 06:21:01 AM UTC 24 |
2728453198 ps |
| T1335 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_overflow.1907479129 |
|
|
Oct 12 06:19:53 AM UTC 24 |
Oct 12 06:21:02 AM UTC 24 |
2188788218 ps |
| T1336 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_hrst.2663848057 |
|
|
Oct 12 06:20:59 AM UTC 24 |
Oct 12 06:21:04 AM UTC 24 |
382749310 ps |
| T1337 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_timeout.1538241236 |
|
|
Oct 12 06:20:52 AM UTC 24 |
Oct 12 06:21:05 AM UTC 24 |
4876766038 ps |
| T1338 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_bad_addr.4287388374 |
|
|
Oct 12 06:20:59 AM UTC 24 |
Oct 12 06:21:06 AM UTC 24 |
4729017052 ps |
| T1339 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_acq.1820716947 |
|
|
Oct 12 06:21:03 AM UTC 24 |
Oct 12 06:21:09 AM UTC 24 |
3023883561 ps |
| T1340 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_stress_wr.833761059 |
|
|
Oct 12 06:20:44 AM UTC 24 |
Oct 12 06:21:09 AM UTC 24 |
32817616524 ps |
| T1341 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_intr_stress_wr.327480233 |
|
|
Oct 12 06:20:49 AM UTC 24 |
Oct 12 06:21:10 AM UTC 24 |
13951176870 ps |
| T1342 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_smbus_maxlen.4235506657 |
|
|
Oct 12 06:21:05 AM UTC 24 |
Oct 12 06:21:10 AM UTC 24 |
2389920709 ps |
| T1343 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_overflow.3161538793 |
|
|
Oct 12 06:20:12 AM UTC 24 |
Oct 12 06:21:10 AM UTC 24 |
4269454940 ps |
| T1344 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull.175064714 |
|
|
Oct 12 06:22:32 AM UTC 24 |
Oct 12 06:22:36 AM UTC 24 |
647396402 ps |
| T1345 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_full.1040358942 |
|
|
Oct 12 06:19:55 AM UTC 24 |
Oct 12 06:21:11 AM UTC 24 |
11316319171 ps |
| T1346 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull.1145072709 |
|
|
Oct 12 06:21:07 AM UTC 24 |
Oct 12 06:21:12 AM UTC 24 |
563280926 ps |
| T1347 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_tx_stretch_ctrl.484730602 |
|
|
Oct 12 06:21:05 AM UTC 24 |
Oct 12 06:21:12 AM UTC 24 |
227458466 ps |
| T1348 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_smoke.3754536831 |
|
|
Oct 12 06:20:43 AM UTC 24 |
Oct 12 06:21:12 AM UTC 24 |
3732454120 ps |
| T1349 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_alert_test.3324102296 |
|
|
Oct 12 06:21:10 AM UTC 24 |
Oct 12 06:21:12 AM UTC 24 |
18389156 ps |
| T1350 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_nack_txstretch.2063193176 |
|
|
Oct 12 06:21:10 AM UTC 24 |
Oct 12 06:21:13 AM UTC 24 |
1806786477 ps |
| T1351 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_full.2916207816 |
|
|
Oct 12 06:18:00 AM UTC 24 |
Oct 12 06:21:13 AM UTC 24 |
3333077558 ps |
| T1352 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_host_override.2573606507 |
|
|
Oct 12 06:21:11 AM UTC 24 |
Oct 12 06:21:13 AM UTC 24 |
16816287 ps |
| T1353 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull_addr.494857579 |
|
|
Oct 12 06:21:08 AM UTC 24 |
Oct 12 06:21:14 AM UTC 24 |
1068403572 ps |
| T1354 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_fmt.3359328013 |
|
|
Oct 12 06:21:12 AM UTC 24 |
Oct 12 06:21:15 AM UTC 24 |
150139445 ps |
| T1355 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_host_smoke.1692217342 |
|
|
Oct 12 06:21:58 AM UTC 24 |
Oct 12 06:22:37 AM UTC 24 |
3251309981 ps |
| T1356 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_host_may_nack.2164350099 |
|
|
Oct 12 06:21:02 AM UTC 24 |
Oct 12 06:21:16 AM UTC 24 |
4035608749 ps |
| T1357 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_host_perf_precise.797881637 |
|
|
Oct 12 06:21:14 AM UTC 24 |
Oct 12 06:21:18 AM UTC 24 |
399725123 ps |
| T1358 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_host_error_intr.3469982871 |
|
|
Oct 12 06:21:15 AM UTC 24 |
Oct 12 06:21:20 AM UTC 24 |
944723707 ps |
| T1359 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_rx.2346998079 |
|
|
Oct 12 06:21:14 AM UTC 24 |
Oct 12 06:21:20 AM UTC 24 |
130125287 ps |
| T1360 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_smoke.2225507630 |
|
|
Oct 12 06:21:16 AM UTC 24 |
Oct 12 06:21:26 AM UTC 24 |
718093628 ps |
| T1361 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_fmt_empty.636835969 |
|
|
Oct 12 06:21:14 AM UTC 24 |
Oct 12 06:21:27 AM UTC 24 |
460224084 ps |
| T1362 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_intr_smoke.2748750995 |
|
|
Oct 12 06:21:22 AM UTC 24 |
Oct 12 06:21:32 AM UTC 24 |
3822730540 ps |
| T1363 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_stretch.2737326097 |
|
|
Oct 12 06:21:20 AM UTC 24 |
Oct 12 06:21:38 AM UTC 24 |
1797202974 ps |
| T1364 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_timeout.510421173 |
|
|
Oct 12 06:21:28 AM UTC 24 |
Oct 12 06:21:39 AM UTC 24 |
2512286079 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_acq.952634566 |
|
|
Oct 12 06:21:38 AM UTC 24 |
Oct 12 06:21:41 AM UTC 24 |
522468058 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_smoke.203162055 |
|
|
Oct 12 06:22:05 AM UTC 24 |
Oct 12 06:22:37 AM UTC 24 |
3026868036 ps |
| T1365 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_tx.2112568685 |
|
|
Oct 12 06:21:39 AM UTC 24 |
Oct 12 06:21:43 AM UTC 24 |
736123483 ps |
| T1366 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_overflow.1772559017 |
|
|
Oct 12 06:20:38 AM UTC 24 |
Oct 12 06:21:44 AM UTC 24 |
10423615430 ps |
| T122 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_host_stress_all.3089739929 |
|
|
Oct 12 06:16:04 AM UTC 24 |
Oct 12 06:21:46 AM UTC 24 |
53376887925 ps |
| T1367 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_perf.38123740 |
|
|
Oct 12 06:21:40 AM UTC 24 |
Oct 12 06:21:48 AM UTC 24 |
706451149 ps |
| T1368 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_alert_test.1093233140 |
|
|
Oct 12 06:22:36 AM UTC 24 |
Oct 12 06:22:37 AM UTC 24 |
132377196 ps |
| T1369 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_host_smoke.87997696 |
|
|
Oct 12 06:21:11 AM UTC 24 |
Oct 12 06:21:48 AM UTC 24 |
3379153894 ps |
| T1370 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_host_smoke.2454046004 |
|
|
Oct 12 06:20:35 AM UTC 24 |
Oct 12 06:21:50 AM UTC 24 |
6412296500 ps |
| T1371 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_tx.929211711 |
|
|
Oct 12 06:21:49 AM UTC 24 |
Oct 12 06:21:52 AM UTC 24 |
113901299 ps |
| T1372 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_bad_addr.56832968 |
|
|
Oct 12 06:21:44 AM UTC 24 |
Oct 12 06:21:52 AM UTC 24 |
926559059 ps |
| T1373 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_acq.2664110154 |
|
|
Oct 12 06:21:49 AM UTC 24 |
Oct 12 06:21:54 AM UTC 24 |
826460571 ps |
| T1374 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_smbus_maxlen.631664012 |
|
|
Oct 12 06:21:51 AM UTC 24 |
Oct 12 06:21:56 AM UTC 24 |
1870738114 ps |
| T1375 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_full.4074491574 |
|
|
Oct 12 06:20:40 AM UTC 24 |
Oct 12 06:21:57 AM UTC 24 |
10375442356 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_host_override.3611029641 |
|
|
Oct 12 06:22:36 AM UTC 24 |
Oct 12 06:22:38 AM UTC 24 |
29357846 ps |
| T1376 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_nack_txstretch.2110240738 |
|
|
Oct 12 06:21:55 AM UTC 24 |
Oct 12 06:21:58 AM UTC 24 |
180089305 ps |
| T1377 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull_addr.289151427 |
|
|
Oct 12 06:21:52 AM UTC 24 |
Oct 12 06:21:58 AM UTC 24 |
1688087410 ps |
| T1378 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_host_may_nack.24235266 |
|
|
Oct 12 06:21:47 AM UTC 24 |
Oct 12 06:21:58 AM UTC 24 |
464479746 ps |
| T1379 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull.1655728254 |
|
|
Oct 12 06:21:52 AM UTC 24 |
Oct 12 06:21:58 AM UTC 24 |
570661289 ps |
| T1380 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_alert_test.2277972442 |
|
|
Oct 12 06:21:57 AM UTC 24 |
Oct 12 06:21:59 AM UTC 24 |
35816344 ps |
| T1381 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_host_stretch_timeout.1647721159 |
|
|
Oct 12 06:21:15 AM UTC 24 |
Oct 12 06:22:01 AM UTC 24 |
4091935877 ps |
| T1382 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_nack_txstretch.1417113118 |
|
|
Oct 12 06:22:33 AM UTC 24 |
Oct 12 06:22:36 AM UTC 24 |
512805679 ps |
| T1383 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_tx_stretch_ctrl.2365035621 |
|
|
Oct 12 06:21:49 AM UTC 24 |
Oct 12 06:22:01 AM UTC 24 |
515976036 ps |
| T1384 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_host_override.1257869490 |
|
|
Oct 12 06:21:59 AM UTC 24 |
Oct 12 06:22:01 AM UTC 24 |
40371759 ps |
| T1385 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_stress_rd.1732915604 |
|
|
Oct 12 06:21:18 AM UTC 24 |
Oct 12 06:22:01 AM UTC 24 |
4587620828 ps |
| T1386 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_stress_wr.15725017 |
|
|
Oct 12 06:18:06 AM UTC 24 |
Oct 12 06:22:02 AM UTC 24 |
65490223901 ps |
| T1387 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_fmt.1270076585 |
|
|
Oct 12 06:21:59 AM UTC 24 |
Oct 12 06:22:02 AM UTC 24 |
288139116 ps |
| T1388 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_host_perf_precise.3226146027 |
|
|
Oct 12 06:22:02 AM UTC 24 |
Oct 12 06:22:04 AM UTC 24 |
107621088 ps |
| T1389 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_host_error_intr.3421640844 |
|
|
Oct 12 06:22:03 AM UTC 24 |
Oct 12 06:22:06 AM UTC 24 |
62017496 ps |
| T1390 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_fmt_empty.4130299048 |
|
|
Oct 12 06:21:59 AM UTC 24 |
Oct 12 06:22:07 AM UTC 24 |
246208848 ps |
| T1391 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_full.3983949787 |
|
|
Oct 12 06:18:31 AM UTC 24 |
Oct 12 06:22:08 AM UTC 24 |
15649366979 ps |
| T1392 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_stress_all.2340674379 |
|
|
Oct 12 06:20:58 AM UTC 24 |
Oct 12 06:22:08 AM UTC 24 |
34139242242 ps |
| T1393 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_stress_wr.3778610580 |
|
|
Oct 12 06:21:16 AM UTC 24 |
Oct 12 06:22:08 AM UTC 24 |
21383948614 ps |
| T1394 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_overflow.1020724044 |
|
|
Oct 12 06:21:12 AM UTC 24 |
Oct 12 06:22:09 AM UTC 24 |
1628397375 ps |
| T1395 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_rx.3179848967 |
|
|
Oct 12 06:22:00 AM UTC 24 |
Oct 12 06:22:11 AM UTC 24 |
493891344 ps |
| T1396 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_stress_rd.2326198466 |
|
|
Oct 12 06:22:08 AM UTC 24 |
Oct 12 06:22:17 AM UTC 24 |
288821103 ps |
| T1397 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_acq.1179270391 |
|
|
Oct 12 06:22:16 AM UTC 24 |
Oct 12 06:22:18 AM UTC 24 |
175244992 ps |
| T1398 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_intr_smoke.2242985489 |
|
|
Oct 12 06:22:10 AM UTC 24 |
Oct 12 06:22:19 AM UTC 24 |
1616400703 ps |
| T1399 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_timeout.475589161 |
|
|
Oct 12 06:22:11 AM UTC 24 |
Oct 12 06:22:19 AM UTC 24 |
5975624364 ps |
| T1400 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_tx.4110625944 |
|
|
Oct 12 06:22:18 AM UTC 24 |
Oct 12 06:22:21 AM UTC 24 |
328089963 ps |
| T1401 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_host_perf.1447847177 |
|
|
Oct 12 06:21:14 AM UTC 24 |
Oct 12 06:22:21 AM UTC 24 |
26120777273 ps |
| T1402 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_full.2911795899 |
|
|
Oct 12 06:21:14 AM UTC 24 |
Oct 12 06:22:24 AM UTC 24 |
10426673616 ps |
| T1403 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_host_mode_toggle.537746161 |
|
|
Oct 12 06:22:23 AM UTC 24 |
Oct 12 06:22:26 AM UTC 24 |
185413741 ps |
| T1404 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_host_stretch_timeout.3848763923 |
|
|
Oct 12 06:22:03 AM UTC 24 |
Oct 12 06:22:27 AM UTC 24 |
2115373389 ps |
| T1405 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_perf.684047350 |
|
|
Oct 12 06:22:19 AM UTC 24 |
Oct 12 06:22:29 AM UTC 24 |
618359546 ps |
| T1406 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_tx.1382018006 |
|
|
Oct 12 06:22:28 AM UTC 24 |
Oct 12 06:22:30 AM UTC 24 |
116603266 ps |
| T1407 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_bad_addr.1542108420 |
|
|
Oct 12 06:22:20 AM UTC 24 |
Oct 12 06:22:31 AM UTC 24 |
1211965384 ps |
| T1408 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_acq.107787013 |
|
|
Oct 12 06:22:27 AM UTC 24 |
Oct 12 06:22:32 AM UTC 24 |
496601524 ps |
| T1409 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_host_perf.1947616305 |
|
|
Oct 12 06:15:57 AM UTC 24 |
Oct 12 06:22:32 AM UTC 24 |
28878501587 ps |
| T1410 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_host_stress_all.1736599662 |
|
|
Oct 12 06:08:51 AM UTC 24 |
Oct 12 06:22:38 AM UTC 24 |
51451963038 ps |
| T1411 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_tx_stretch_ctrl.3189403122 |
|
|
Oct 12 06:22:30 AM UTC 24 |
Oct 12 06:22:35 AM UTC 24 |
154594006 ps |
| T1412 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_watermark.3432750825 |
|
|
Oct 12 06:20:12 AM UTC 24 |
Oct 12 06:22:35 AM UTC 24 |
4613534994 ps |
| T1413 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_smbus_maxlen.21061417 |
|
|
Oct 12 06:22:31 AM UTC 24 |
Oct 12 06:22:36 AM UTC 24 |
1728427813 ps |
| T1414 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_host_perf.808234291 |
|
|
Oct 12 06:20:40 AM UTC 24 |
Oct 12 06:22:36 AM UTC 24 |
8099367802 ps |
| T1415 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull_addr.4205639839 |
|
|
Oct 12 06:22:33 AM UTC 24 |
Oct 12 06:22:38 AM UTC 24 |
1090537909 ps |
| T1416 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_host_may_nack.2888875718 |
|
|
Oct 12 06:22:25 AM UTC 24 |
Oct 12 06:22:39 AM UTC 24 |
301786524 ps |
| T1417 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_fmt.2698458246 |
|
|
Oct 12 06:22:37 AM UTC 24 |
Oct 12 06:22:39 AM UTC 24 |
165394346 ps |
| T1418 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_host_error_intr.2261006142 |
|
|
Oct 12 06:22:40 AM UTC 24 |
Oct 12 06:22:45 AM UTC 24 |
416876410 ps |
| T1419 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_watermark.3185848921 |
|
|
Oct 12 06:21:11 AM UTC 24 |
Oct 12 06:22:45 AM UTC 24 |
82300835066 ps |
| T1420 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_rx.2874647451 |
|
|
Oct 12 06:22:38 AM UTC 24 |
Oct 12 06:22:48 AM UTC 24 |
228090923 ps |
| T1421 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_intr_stress_wr.3240791388 |
|
|
Oct 12 06:22:10 AM UTC 24 |
Oct 12 06:22:50 AM UTC 24 |
17191085416 ps |
| T1422 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_host_perf_precise.1175766000 |
|
|
Oct 12 06:22:39 AM UTC 24 |
Oct 12 06:22:50 AM UTC 24 |
3084027382 ps |
| T1423 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_stress_all.4203154019 |
|
|
Oct 12 06:18:17 AM UTC 24 |
Oct 12 06:22:51 AM UTC 24 |
74929339599 ps |
| T1424 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_overflow.1524971664 |
|
|
Oct 12 06:21:59 AM UTC 24 |
Oct 12 06:22:51 AM UTC 24 |
1621027529 ps |
| T1425 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_fmt_empty.2905755658 |
|
|
Oct 12 06:22:37 AM UTC 24 |
Oct 12 06:22:53 AM UTC 24 |
607724453 ps |
| T1426 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_watermark.765474578 |
|
|
Oct 12 06:20:37 AM UTC 24 |
Oct 12 06:23:54 AM UTC 24 |
3480633941 ps |
| T1427 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_stretch.1626185135 |
|
|
Oct 12 06:22:49 AM UTC 24 |
Oct 12 06:22:53 AM UTC 24 |
1830135019 ps |
| T1428 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/39.i2c_target_intr_stress_wr.1788513184 |
|
|
Oct 12 06:21:28 AM UTC 24 |
Oct 12 06:22:56 AM UTC 24 |
27554156806 ps |
| T1429 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_acq.405648362 |
|
|
Oct 12 06:22:54 AM UTC 24 |
Oct 12 06:22:57 AM UTC 24 |
389918400 ps |
| T1430 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_stress_wr.1970474233 |
|
|
Oct 12 06:22:07 AM UTC 24 |
Oct 12 06:22:58 AM UTC 24 |
19714024879 ps |
| T1431 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_stress_all.706213613 |
|
|
Oct 12 06:20:28 AM UTC 24 |
Oct 12 06:22:58 AM UTC 24 |
34778986100 ps |
| T1432 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_tx.1387883521 |
|
|
Oct 12 06:22:55 AM UTC 24 |
Oct 12 06:22:58 AM UTC 24 |
537898878 ps |
| T1433 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_host_stretch_timeout.26303021 |
|
|
Oct 12 06:22:40 AM UTC 24 |
Oct 12 06:23:00 AM UTC 24 |
4768758020 ps |
| T1434 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_intr_smoke.356648203 |
|
|
Oct 12 06:22:51 AM UTC 24 |
Oct 12 06:23:01 AM UTC 24 |
4938861912 ps |
| T1435 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_hrst.1850107265 |
|
|
Oct 12 06:22:59 AM UTC 24 |
Oct 12 06:23:03 AM UTC 24 |
407655458 ps |
| T1436 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_acq.350278730 |
|
|
Oct 12 06:23:00 AM UTC 24 |
Oct 12 06:23:03 AM UTC 24 |
222728430 ps |
| T1437 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_fmt.2784024610 |
|
|
Oct 12 06:23:45 AM UTC 24 |
Oct 12 06:23:49 AM UTC 24 |
616527813 ps |
| T1438 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_perf.3717066430 |
|
|
Oct 12 06:22:58 AM UTC 24 |
Oct 12 06:23:04 AM UTC 24 |
3800284936 ps |
| T1439 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_timeout.2178858084 |
|
|
Oct 12 06:22:53 AM UTC 24 |
Oct 12 06:23:05 AM UTC 24 |
5926154672 ps |
| T1440 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_bad_addr.3603198507 |
|
|
Oct 12 06:22:58 AM UTC 24 |
Oct 12 06:23:05 AM UTC 24 |
2022378553 ps |
| T1441 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_host_smoke.1672966700 |
|
|
Oct 12 06:22:36 AM UTC 24 |
Oct 12 06:23:06 AM UTC 24 |
6992286094 ps |
| T1442 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_smbus_maxlen.3519530541 |
|
|
Oct 12 06:23:04 AM UTC 24 |
Oct 12 06:23:08 AM UTC 24 |
433678269 ps |
| T1443 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_tx_stretch_ctrl.3856281212 |
|
|
Oct 12 06:23:04 AM UTC 24 |
Oct 12 06:23:08 AM UTC 24 |
74946299 ps |
| T1444 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_alert_test.3556095279 |
|
|
Oct 12 06:23:06 AM UTC 24 |
Oct 12 06:23:08 AM UTC 24 |
15485160 ps |
| T1445 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_nack_txstretch.1922050903 |
|
|
Oct 12 06:23:05 AM UTC 24 |
Oct 12 06:23:09 AM UTC 24 |
351736633 ps |
| T1446 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_host_may_nack.767412227 |
|
|
Oct 12 06:22:59 AM UTC 24 |
Oct 12 06:23:09 AM UTC 24 |
1096529566 ps |
| T1447 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_stress_wr.879237492 |
|
|
Oct 12 06:20:17 AM UTC 24 |
Oct 12 06:23:09 AM UTC 24 |
45839460200 ps |
| T1448 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_host_override.830833915 |
|
|
Oct 12 06:23:07 AM UTC 24 |
Oct 12 06:23:09 AM UTC 24 |
52560365 ps |
| T1449 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull_addr.829435186 |
|
|
Oct 12 06:23:05 AM UTC 24 |
Oct 12 06:23:10 AM UTC 24 |
2321865168 ps |
| T1450 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull.3067100593 |
|
|
Oct 12 06:23:05 AM UTC 24 |
Oct 12 06:23:11 AM UTC 24 |
491243376 ps |
| T1451 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_stress_rd.2573294805 |
|
|
Oct 12 06:22:46 AM UTC 24 |
Oct 12 06:23:11 AM UTC 24 |
2215902423 ps |
| T1452 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_fmt.3109689178 |
|
|
Oct 12 06:23:10 AM UTC 24 |
Oct 12 06:23:13 AM UTC 24 |
439147824 ps |
| T1453 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_host_perf_precise.4185394654 |
|
|
Oct 12 06:23:11 AM UTC 24 |
Oct 12 06:23:14 AM UTC 24 |
53849522 ps |
| T1454 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_rx.1972903911 |
|
|
Oct 12 06:23:10 AM UTC 24 |
Oct 12 06:23:17 AM UTC 24 |
236857780 ps |
| T1455 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_host_error_intr.1035551110 |
|
|
Oct 12 06:23:12 AM UTC 24 |
Oct 12 06:23:20 AM UTC 24 |
1045570811 ps |
| T1456 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_fmt_empty.1281293439 |
|
|
Oct 12 06:23:10 AM UTC 24 |
Oct 12 06:23:22 AM UTC 24 |
1038891036 ps |
| T1457 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_intr_stress_wr.770891797 |
|
|
Oct 12 06:22:51 AM UTC 24 |
Oct 12 06:23:23 AM UTC 24 |
12698088020 ps |
| T1458 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_smoke.1079548750 |
|
|
Oct 12 06:22:40 AM UTC 24 |
Oct 12 06:23:23 AM UTC 24 |
1260641567 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_host_stress_all.1340543111 |
|
|
Oct 12 06:15:26 AM UTC 24 |
Oct 12 06:23:23 AM UTC 24 |
13345307905 ps |
| T1459 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_target_stress_all.3614013242 |
|
|
Oct 12 06:22:20 AM UTC 24 |
Oct 12 06:23:27 AM UTC 24 |
9371216205 ps |
| T1460 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_acq.1261031396 |
|
|
Oct 12 06:23:24 AM UTC 24 |
Oct 12 06:23:27 AM UTC 24 |
556889200 ps |
| T1461 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_smoke.1968063235 |
|
|
Oct 12 06:23:16 AM UTC 24 |
Oct 12 06:23:30 AM UTC 24 |
743322235 ps |
| T1462 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_tx.3819597579 |
|
|
Oct 12 06:23:28 AM UTC 24 |
Oct 12 06:23:30 AM UTC 24 |
686563675 ps |
| T1463 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_perf.1919053565 |
|
|
Oct 12 06:23:28 AM UTC 24 |
Oct 12 06:23:33 AM UTC 24 |
3720431775 ps |
| T1464 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_host_smoke.3066269029 |
|
|
Oct 12 06:23:06 AM UTC 24 |
Oct 12 06:23:34 AM UTC 24 |
7382576721 ps |
| T1465 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_intr_smoke.4047236100 |
|
|
Oct 12 06:23:24 AM UTC 24 |
Oct 12 06:23:35 AM UTC 24 |
5458422723 ps |
| T1466 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_timeout.1758861053 |
|
|
Oct 12 06:23:24 AM UTC 24 |
Oct 12 06:23:35 AM UTC 24 |
1100442065 ps |
| T1467 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_hrst.2279359427 |
|
|
Oct 12 06:23:31 AM UTC 24 |
Oct 12 06:23:35 AM UTC 24 |
280704257 ps |
| T1468 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_host_mode_toggle.3132325427 |
|
|
Oct 12 06:23:34 AM UTC 24 |
Oct 12 06:23:38 AM UTC 24 |
107316700 ps |
| T1469 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_bad_addr.620234710 |
|
|
Oct 12 06:23:31 AM UTC 24 |
Oct 12 06:23:39 AM UTC 24 |
1966484577 ps |
| T1470 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_tx.4001413501 |
|
|
Oct 12 06:23:36 AM UTC 24 |
Oct 12 06:23:39 AM UTC 24 |
227476283 ps |
| T1471 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_tx_stretch_ctrl.2235457285 |
|
|
Oct 12 06:23:36 AM UTC 24 |
Oct 12 06:23:40 AM UTC 24 |
68171252 ps |
| T1472 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_acq.507558226 |
|
|
Oct 12 06:23:36 AM UTC 24 |
Oct 12 06:23:40 AM UTC 24 |
763374974 ps |
| T1473 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_host_stretch_timeout.2698803314 |
|
|
Oct 12 06:23:12 AM UTC 24 |
Oct 12 06:23:42 AM UTC 24 |
576391707 ps |
| T1474 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_alert_test.4205160473 |
|
|
Oct 12 06:23:41 AM UTC 24 |
Oct 12 06:23:43 AM UTC 24 |
16357815 ps |
| T1475 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_watermark.4097836511 |
|
|
Oct 12 06:19:53 AM UTC 24 |
Oct 12 06:23:43 AM UTC 24 |
21841078244 ps |
| T1476 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_host_may_nack.2262611716 |
|
|
Oct 12 06:23:35 AM UTC 24 |
Oct 12 06:23:44 AM UTC 24 |
419616639 ps |
| T1477 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_nack_txstretch.1719019962 |
|
|
Oct 12 06:23:41 AM UTC 24 |
Oct 12 06:23:45 AM UTC 24 |
309766735 ps |
| T1478 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_smbus_maxlen.2207576337 |
|
|
Oct 12 06:23:39 AM UTC 24 |
Oct 12 06:23:45 AM UTC 24 |
2227773980 ps |
| T1479 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_stress_rd.731812872 |
|
|
Oct 12 06:23:21 AM UTC 24 |
Oct 12 06:23:45 AM UTC 24 |
6296820235 ps |
| T1480 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_full.831256595 |
|
|
Oct 12 06:20:15 AM UTC 24 |
Oct 12 06:23:45 AM UTC 24 |
8011065485 ps |
| T1481 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull.1143936762 |
|
|
Oct 12 06:23:40 AM UTC 24 |
Oct 12 06:23:46 AM UTC 24 |
1433632709 ps |
| T1482 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_host_override.3431278004 |
|
|
Oct 12 06:23:44 AM UTC 24 |
Oct 12 06:23:46 AM UTC 24 |
89215688 ps |
| T50 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull_addr.4101614261 |
|
|
Oct 12 06:23:40 AM UTC 24 |
Oct 12 06:23:46 AM UTC 24 |
536632524 ps |
| T1483 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_host_perf_precise.1726165105 |
|
|
Oct 12 06:18:32 AM UTC 24 |
Oct 12 06:23:46 AM UTC 24 |
5849553487 ps |
| T1484 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_intr_stress_wr.932591825 |
|
|
Oct 12 06:23:24 AM UTC 24 |
Oct 12 06:23:47 AM UTC 24 |
14899043139 ps |
| T1485 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_rx.3884458703 |
|
|
Oct 12 06:23:45 AM UTC 24 |
Oct 12 06:23:50 AM UTC 24 |
444310501 ps |
| T1486 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_watermark.4166783240 |
|
|
Oct 12 06:21:59 AM UTC 24 |
Oct 12 06:23:56 AM UTC 24 |
4629128835 ps |
| T1487 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_host_error_intr.1261875888 |
|
|
Oct 12 06:23:47 AM UTC 24 |
Oct 12 06:23:56 AM UTC 24 |
327885614 ps |
| T1488 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_host_stretch_timeout.2429884227 |
|
|
Oct 12 06:23:47 AM UTC 24 |
Oct 12 06:24:00 AM UTC 24 |
619461034 ps |
| T1489 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_fmt_empty.4278161534 |
|
|
Oct 12 06:23:45 AM UTC 24 |
Oct 12 06:24:01 AM UTC 24 |
598127076 ps |
| T1490 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_full.3098928005 |
|
|
Oct 12 06:22:38 AM UTC 24 |
Oct 12 06:24:02 AM UTC 24 |
5531660104 ps |
| T1491 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_target_stretch.2897483193 |
|
|
Oct 12 06:23:55 AM UTC 24 |
Oct 12 06:24:04 AM UTC 24 |
3642621601 ps |
| T1492 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_target_stress_rd.308358611 |
|
|
Oct 12 06:24:32 AM UTC 24 |
Oct 12 06:25:23 AM UTC 24 |
4672996229 ps |
| T1493 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_target_intr_smoke.3892269066 |
|
|
Oct 12 06:23:57 AM UTC 24 |
Oct 12 06:24:05 AM UTC 24 |
10680069086 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_acq.4276735914 |
|
|
Oct 12 06:24:03 AM UTC 24 |
Oct 12 06:24:06 AM UTC 24 |
222698636 ps |
| T1494 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_tx.3252456621 |
|
|
Oct 12 06:24:04 AM UTC 24 |
Oct 12 06:24:08 AM UTC 24 |
217588112 ps |
| T1495 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_target_smoke.719918828 |
|
|
Oct 12 06:23:48 AM UTC 24 |
Oct 12 06:24:08 AM UTC 24 |
7741240814 ps |
| T1496 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_target_perf.39438152 |
|
|
Oct 12 06:24:05 AM UTC 24 |
Oct 12 06:24:12 AM UTC 24 |
1917065981 ps |
| T1497 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/45.i2c_target_hrst.2811310357 |
|
|
Oct 12 06:25:20 AM UTC 24 |
Oct 12 06:25:25 AM UTC 24 |
260617507 ps |
| T1498 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_target_hrst.1011643442 |
|
|
Oct 12 06:24:09 AM UTC 24 |
Oct 12 06:24:12 AM UTC 24 |
4096799484 ps |
| T1499 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_target_timeout.1807317638 |
|
|
Oct 12 06:24:01 AM UTC 24 |
Oct 12 06:24:14 AM UTC 24 |
7395096121 ps |
| T1500 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_stretch.3944337546 |
|
|
Oct 12 06:23:23 AM UTC 24 |
Oct 12 06:24:15 AM UTC 24 |
3626847822 ps |
| T1501 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_target_bad_addr.3134042892 |
|
|
Oct 12 06:24:07 AM UTC 24 |
Oct 12 06:24:16 AM UTC 24 |
2299350741 ps |
| T1502 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_tx.3515481229 |
|
|
Oct 12 06:24:14 AM UTC 24 |
Oct 12 06:24:17 AM UTC 24 |
115437186 ps |
| T1503 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_host_mode_toggle.2179473455 |
|
|
Oct 12 06:24:09 AM UTC 24 |
Oct 12 06:24:17 AM UTC 24 |
600392658 ps |
| T1504 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_host_perf_precise.3783248718 |
|
|
Oct 12 06:23:47 AM UTC 24 |
Oct 12 06:24:17 AM UTC 24 |
6076257713 ps |
| T1505 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_acq.573080555 |
|
|
Oct 12 06:24:13 AM UTC 24 |
Oct 12 06:24:18 AM UTC 24 |
557783584 ps |
| T1506 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_host_perf.4269146696 |
|
|
Oct 12 06:19:55 AM UTC 24 |
Oct 12 06:24:18 AM UTC 24 |
4905845463 ps |
| T1507 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_target_tx_stretch_ctrl.2689566951 |
|
|
Oct 12 06:24:15 AM UTC 24 |
Oct 12 06:24:19 AM UTC 24 |
70371021 ps |
| T1508 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_alert_test.3695836666 |
|
|
Oct 12 06:24:19 AM UTC 24 |
Oct 12 06:24:20 AM UTC 24 |
17214012 ps |
| T1509 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_host_override.4127648439 |
|
|
Oct 12 06:24:20 AM UTC 24 |
Oct 12 06:24:22 AM UTC 24 |
28771755 ps |
| T1510 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_target_smbus_maxlen.3238974331 |
|
|
Oct 12 06:24:16 AM UTC 24 |
Oct 12 06:24:22 AM UTC 24 |
591347778 ps |
| T1511 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull.964085400 |
|
|
Oct 12 06:24:16 AM UTC 24 |
Oct 12 06:24:23 AM UTC 24 |
2640468218 ps |
| T1512 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull_addr.957853858 |
|
|
Oct 12 06:24:17 AM UTC 24 |
Oct 12 06:24:23 AM UTC 24 |
1025221195 ps |
| T1513 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_full.718071414 |
|
|
Oct 12 06:23:10 AM UTC 24 |
Oct 12 06:24:24 AM UTC 24 |
10208109072 ps |
| T1514 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_fmt.1992869839 |
|
|
Oct 12 06:24:22 AM UTC 24 |
Oct 12 06:24:24 AM UTC 24 |
1139666064 ps |
| T1515 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_watermark.3002748494 |
|
|
Oct 12 06:23:09 AM UTC 24 |
Oct 12 06:24:27 AM UTC 24 |
3308801457 ps |
| T1516 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_overflow.3252417912 |
|
|
Oct 12 06:22:37 AM UTC 24 |
Oct 12 06:24:27 AM UTC 24 |
3796289848 ps |
| T1517 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_host_perf_precise.3738849189 |
|
|
Oct 12 06:24:25 AM UTC 24 |
Oct 12 06:24:30 AM UTC 24 |
229089399 ps |
| T1518 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_rx.3695987354 |
|
|
Oct 12 06:24:23 AM UTC 24 |
Oct 12 06:24:32 AM UTC 24 |
185311895 ps |
| T1519 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_host_error_intr.1726499386 |
|
|
Oct 12 06:24:27 AM UTC 24 |
Oct 12 06:24:32 AM UTC 24 |
217256105 ps |
| T1520 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_fmt_empty.3452546338 |
|
|
Oct 12 06:24:23 AM UTC 24 |
Oct 12 06:24:37 AM UTC 24 |
2091974692 ps |
| T1521 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_host_stretch_timeout.3088294631 |
|
|
Oct 12 06:24:26 AM UTC 24 |
Oct 12 06:24:37 AM UTC 24 |
467941326 ps |
| T1522 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_target_stretch.1734460061 |
|
|
Oct 12 06:24:33 AM UTC 24 |
Oct 12 06:24:40 AM UTC 24 |
1482696389 ps |
| T1523 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_overflow.4114449983 |
|
|
Oct 12 06:23:44 AM UTC 24 |
Oct 12 06:24:43 AM UTC 24 |
4114474479 ps |
| T1524 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_target_intr_smoke.2138869520 |
|
|
Oct 12 06:24:33 AM UTC 24 |
Oct 12 06:24:44 AM UTC 24 |
3946529682 ps |
| T1525 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_target_smoke.3894964417 |
|
|
Oct 12 06:24:28 AM UTC 24 |
Oct 12 06:24:44 AM UTC 24 |
1560960373 ps |
| T1526 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_acq.3473215012 |
|
|
Oct 12 06:24:40 AM UTC 24 |
Oct 12 06:24:45 AM UTC 24 |
1539414115 ps |
| T1527 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_host_may_nack.419909532 |
|
|
Oct 12 06:24:13 AM UTC 24 |
Oct 12 06:24:45 AM UTC 24 |
2723830182 ps |
| T1528 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_tx.219229237 |
|
|
Oct 12 06:24:42 AM UTC 24 |
Oct 12 06:24:46 AM UTC 24 |
326166581 ps |
| T1529 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_target_intr_stress_wr.769067772 |
|
|
Oct 12 06:24:36 AM UTC 24 |
Oct 12 06:24:46 AM UTC 24 |
3586361246 ps |
| T1530 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_target_timeout.1623169998 |
|
|
Oct 12 06:24:39 AM UTC 24 |
Oct 12 06:24:49 AM UTC 24 |
4840721017 ps |
| T1531 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_intr_stress_wr.1480004065 |
|
|
Oct 12 06:18:12 AM UTC 24 |
Oct 12 06:24:50 AM UTC 24 |
26086543430 ps |
| T1532 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_target_perf.897185068 |
|
|
Oct 12 06:24:44 AM UTC 24 |
Oct 12 06:24:51 AM UTC 24 |
518576436 ps |
| T1533 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_tx.2651519123 |
|
|
Oct 12 06:24:50 AM UTC 24 |
Oct 12 06:24:52 AM UTC 24 |
220125108 ps |
| T1534 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_acq.85180253 |
|
|
Oct 12 06:24:47 AM UTC 24 |
Oct 12 06:24:52 AM UTC 24 |
364767217 ps |
| T1535 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_target_bad_addr.3639593934 |
|
|
Oct 12 06:24:46 AM UTC 24 |
Oct 12 06:24:54 AM UTC 24 |
4316103755 ps |
| T1536 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_target_tx_stretch_ctrl.3168968814 |
|
|
Oct 12 06:24:51 AM UTC 24 |
Oct 12 06:24:55 AM UTC 24 |
81967490 ps |
| T1537 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_target_smbus_maxlen.797181182 |
|
|
Oct 12 06:24:51 AM UTC 24 |
Oct 12 06:24:55 AM UTC 24 |
986379557 ps |
| T1538 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_target_nack_txstretch.2845852310 |
|
|
Oct 12 06:24:54 AM UTC 24 |
Oct 12 06:24:57 AM UTC 24 |
138857433 ps |
| T1539 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_alert_test.3576244930 |
|
|
Oct 12 06:24:55 AM UTC 24 |
Oct 12 06:24:57 AM UTC 24 |
17384360 ps |
| T1540 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull_addr.3555980661 |
|
|
Oct 12 06:24:54 AM UTC 24 |
Oct 12 06:24:58 AM UTC 24 |
2585562464 ps |
| T1541 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_host_perf.1692632833 |
|
|
Oct 12 06:18:31 AM UTC 24 |
Oct 12 06:24:58 AM UTC 24 |
27520836504 ps |
| T1542 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/42.i2c_target_stress_all.672482182 |
|
|
Oct 12 06:23:28 AM UTC 24 |
Oct 12 06:24:58 AM UTC 24 |
208122332486 ps |
| T1543 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull.3491544338 |
|
|
Oct 12 06:24:52 AM UTC 24 |
Oct 12 06:24:58 AM UTC 24 |
543753857 ps |
| T1544 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/45.i2c_host_override.1741374384 |
|
|
Oct 12 06:24:56 AM UTC 24 |
Oct 12 06:24:58 AM UTC 24 |
234165722 ps |
| T1545 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_stress_all.149622848 |
|
|
Oct 12 06:14:38 AM UTC 24 |
Oct 12 06:25:00 AM UTC 24 |
41684265030 ps |
| T1546 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_fmt.159529520 |
|
|
Oct 12 06:24:58 AM UTC 24 |
Oct 12 06:25:01 AM UTC 24 |
442164080 ps |
| T1547 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_target_stress_wr.3949170968 |
|
|
Oct 12 06:23:49 AM UTC 24 |
Oct 12 06:25:05 AM UTC 24 |
22223904615 ps |
| T1548 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_rx.3022363535 |
|
|
Oct 12 06:24:59 AM UTC 24 |
Oct 12 06:25:06 AM UTC 24 |
124427511 ps |
| T1549 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_stress_all.1736464479 |
|
|
Oct 12 06:16:55 AM UTC 24 |
Oct 12 06:25:08 AM UTC 24 |
61531577132 ps |
| T1550 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/45.i2c_host_error_intr.1401436542 |
|
|
Oct 12 06:25:06 AM UTC 24 |
Oct 12 06:25:10 AM UTC 24 |
834476152 ps |
| T1551 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_fmt_empty.2860799819 |
|
|
Oct 12 06:24:58 AM UTC 24 |
Oct 12 06:25:10 AM UTC 24 |
746068530 ps |
| T1552 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_host_smoke.3738417323 |
|
|
Oct 12 06:24:19 AM UTC 24 |
Oct 12 06:25:10 AM UTC 24 |
998226299 ps |
| T1553 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_host_perf.2508035205 |
|
|
Oct 12 06:23:47 AM UTC 24 |
Oct 12 06:25:11 AM UTC 24 |
7773381414 ps |
| T1554 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/45.i2c_host_perf_precise.1623716329 |
|
|
Oct 12 06:25:01 AM UTC 24 |
Oct 12 06:25:14 AM UTC 24 |
7249302847 ps |
| T1555 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/44.i2c_host_may_nack.2045897194 |
|
|
Oct 12 06:24:47 AM UTC 24 |
Oct 12 06:25:15 AM UTC 24 |
2756013712 ps |
| T1556 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_full.2807865345 |
|
|
Oct 12 06:22:01 AM UTC 24 |
Oct 12 06:25:17 AM UTC 24 |
13942866662 ps |
| T1557 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/41.i2c_target_stress_all.1107859956 |
|
|
Oct 12 06:22:58 AM UTC 24 |
Oct 12 06:25:19 AM UTC 24 |
13327143702 ps |
| T1558 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/45.i2c_target_stretch.3744755840 |
|
|
Oct 12 06:25:10 AM UTC 24 |
Oct 12 06:25:19 AM UTC 24 |
4679505758 ps |
| T1559 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/45.i2c_target_intr_stress_wr.2556734142 |
|
|
Oct 12 06:25:15 AM UTC 24 |
Oct 12 06:25:19 AM UTC 24 |
739977590 ps |
| T1560 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/45.i2c_target_intr_smoke.2659641631 |
|
|
Oct 12 06:25:13 AM UTC 24 |
Oct 12 06:25:20 AM UTC 24 |
903233227 ps |
| T1561 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_reset_acq.2046067944 |
|
|
Oct 12 06:25:18 AM UTC 24 |
Oct 12 06:25:21 AM UTC 24 |
237729842 ps |
| T1562 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_reset_tx.2433808243 |
|
|
Oct 12 06:25:19 AM UTC 24 |
Oct 12 06:25:21 AM UTC 24 |
511251279 ps |
| T1563 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/43.i2c_target_stress_rd.2602363861 |
|
|
Oct 12 06:23:51 AM UTC 24 |
Oct 12 06:25:23 AM UTC 24 |
9918178959 ps |