| T1085 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_tx.3193136903 |
|
|
Oct 12 06:16:16 AM UTC 24 |
Oct 12 06:16:19 AM UTC 24 |
257011487 ps |
| T1086 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_hrst.4164708233 |
|
|
Oct 12 06:16:18 AM UTC 24 |
Oct 12 06:16:21 AM UTC 24 |
172321856 ps |
| T1087 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_timeout.244342236 |
|
|
Oct 12 06:16:11 AM UTC 24 |
Oct 12 06:16:23 AM UTC 24 |
7305280337 ps |
| T1088 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_stress_rd.2854881849 |
|
|
Oct 12 06:16:42 AM UTC 24 |
Oct 12 06:17:00 AM UTC 24 |
860904955 ps |
| T1089 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_target_stress_all.2994681269 |
|
|
Oct 12 06:09:58 AM UTC 24 |
Oct 12 06:16:24 AM UTC 24 |
68065257950 ps |
| T1090 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_perf.2027327445 |
|
|
Oct 12 06:16:17 AM UTC 24 |
Oct 12 06:16:27 AM UTC 24 |
3713556218 ps |
| T1091 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/20.i2c_target_stress_wr.981353365 |
|
|
Oct 12 06:08:55 AM UTC 24 |
Oct 12 06:16:28 AM UTC 24 |
42147325820 ps |
| T1092 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_bad_addr.1041244371 |
|
|
Oct 12 06:16:18 AM UTC 24 |
Oct 12 06:16:28 AM UTC 24 |
1001435420 ps |
| T1093 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_tx.3097166660 |
|
|
Oct 12 06:16:24 AM UTC 24 |
Oct 12 06:16:28 AM UTC 24 |
1825270798 ps |
| T1094 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_acq.646983180 |
|
|
Oct 12 06:16:22 AM UTC 24 |
Oct 12 06:16:29 AM UTC 24 |
652673698 ps |
| T1095 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_host_stretch_timeout.1330686549 |
|
|
Oct 12 06:15:58 AM UTC 24 |
Oct 12 06:16:31 AM UTC 24 |
2855584443 ps |
| T1096 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_alert_test.601181634 |
|
|
Oct 12 06:16:29 AM UTC 24 |
Oct 12 06:16:31 AM UTC 24 |
21794485 ps |
| T1097 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_smbus_maxlen.1679675727 |
|
|
Oct 12 06:16:25 AM UTC 24 |
Oct 12 06:16:32 AM UTC 24 |
2127585373 ps |
| T1098 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull_addr.1826713141 |
|
|
Oct 12 06:16:29 AM UTC 24 |
Oct 12 06:16:33 AM UTC 24 |
1670394203 ps |
| T1099 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_tx_stretch_ctrl.3253474171 |
|
|
Oct 12 06:16:25 AM UTC 24 |
Oct 12 06:16:33 AM UTC 24 |
188305912 ps |
| T1100 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_stress_rd.1354081421 |
|
|
Oct 12 06:16:07 AM UTC 24 |
Oct 12 06:16:57 AM UTC 24 |
3025166940 ps |
| T1101 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull.2011615322 |
|
|
Oct 12 06:16:28 AM UTC 24 |
Oct 12 06:16:34 AM UTC 24 |
2049784446 ps |
| T1102 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_full.2764469565 |
|
|
Oct 12 06:15:23 AM UTC 24 |
Oct 12 06:16:34 AM UTC 24 |
9831396502 ps |
| T1103 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_host_override.2407040637 |
|
|
Oct 12 06:16:32 AM UTC 24 |
Oct 12 06:16:34 AM UTC 24 |
27351334 ps |
| T1104 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_host_smoke.667371119 |
|
|
Oct 12 06:15:53 AM UTC 24 |
Oct 12 06:16:34 AM UTC 24 |
1618566180 ps |
| T233 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_host_stress_all.519682185 |
|
|
Oct 12 06:14:18 AM UTC 24 |
Oct 12 06:16:35 AM UTC 24 |
4656263094 ps |
| T1105 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_watermark.1599363124 |
|
|
Oct 12 06:13:13 AM UTC 24 |
Oct 12 06:16:35 AM UTC 24 |
50271404196 ps |
| T1106 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_fmt.2055534885 |
|
|
Oct 12 06:16:34 AM UTC 24 |
Oct 12 06:16:37 AM UTC 24 |
309801267 ps |
| T1107 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_host_error_intr.3423544904 |
|
|
Oct 12 06:16:36 AM UTC 24 |
Oct 12 06:16:40 AM UTC 24 |
244863818 ps |
| T1108 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_host_may_nack.3975062332 |
|
|
Oct 12 06:16:20 AM UTC 24 |
Oct 12 06:16:41 AM UTC 24 |
558252836 ps |
| T1109 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_host_perf_precise.1104800579 |
|
|
Oct 12 06:16:36 AM UTC 24 |
Oct 12 06:16:44 AM UTC 24 |
1317218409 ps |
| T1110 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_fmt_empty.3536174870 |
|
|
Oct 12 06:16:34 AM UTC 24 |
Oct 12 06:16:45 AM UTC 24 |
347812678 ps |
| T1111 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_intr_stress_wr.482164994 |
|
|
Oct 12 06:15:33 AM UTC 24 |
Oct 12 06:16:46 AM UTC 24 |
23712206255 ps |
| T1112 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_host_stretch_timeout.1675675471 |
|
|
Oct 12 06:16:36 AM UTC 24 |
Oct 12 06:16:46 AM UTC 24 |
2208939601 ps |
| T1113 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_host_perf_precise.771349350 |
|
|
Oct 12 06:15:57 AM UTC 24 |
Oct 12 06:16:48 AM UTC 24 |
5766323141 ps |
| T1114 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_rx.4271888191 |
|
|
Oct 12 06:16:34 AM UTC 24 |
Oct 12 06:16:48 AM UTC 24 |
2364017190 ps |
| T1115 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_acq.585847057 |
|
|
Oct 12 06:16:50 AM UTC 24 |
Oct 12 06:16:53 AM UTC 24 |
849702307 ps |
| T1116 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_intr_smoke.4202523687 |
|
|
Oct 12 06:16:45 AM UTC 24 |
Oct 12 06:16:54 AM UTC 24 |
1812287436 ps |
| T1117 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_tx.3489962460 |
|
|
Oct 12 06:16:52 AM UTC 24 |
Oct 12 06:16:54 AM UTC 24 |
175261068 ps |
| T1118 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_stretch.172922277 |
|
|
Oct 12 06:16:44 AM UTC 24 |
Oct 12 06:16:57 AM UTC 24 |
2263489176 ps |
| T1119 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_perf.1047673703 |
|
|
Oct 12 06:16:54 AM UTC 24 |
Oct 12 06:16:59 AM UTC 24 |
6634970845 ps |
| T1120 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_stress_all.2105600191 |
|
|
Oct 12 06:16:17 AM UTC 24 |
Oct 12 06:17:01 AM UTC 24 |
26440579011 ps |
| T1121 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_tx.3102896760 |
|
|
Oct 12 06:17:01 AM UTC 24 |
Oct 12 06:17:04 AM UTC 24 |
783770416 ps |
| T1122 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_acq.3552292433 |
|
|
Oct 12 06:17:01 AM UTC 24 |
Oct 12 06:17:05 AM UTC 24 |
3310371934 ps |
| T1123 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_smbus_maxlen.3152953144 |
|
|
Oct 12 06:17:01 AM UTC 24 |
Oct 12 06:17:05 AM UTC 24 |
432808992 ps |
| T1124 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_alert_test.1733479247 |
|
|
Oct 12 06:17:04 AM UTC 24 |
Oct 12 06:17:06 AM UTC 24 |
27927679 ps |
| T1125 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_nack_txstretch.4020836213 |
|
|
Oct 12 06:17:03 AM UTC 24 |
Oct 12 06:17:06 AM UTC 24 |
572506489 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_host_override.3119536860 |
|
|
Oct 12 06:17:04 AM UTC 24 |
Oct 12 06:17:06 AM UTC 24 |
55105404 ps |
| T1126 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_tx_stretch_ctrl.670529115 |
|
|
Oct 12 06:17:01 AM UTC 24 |
Oct 12 06:17:07 AM UTC 24 |
204236029 ps |
| T1127 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull_addr.2802701660 |
|
|
Oct 12 06:17:02 AM UTC 24 |
Oct 12 06:17:07 AM UTC 24 |
1625384169 ps |
| T1128 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_overflow.1375413225 |
|
|
Oct 12 06:15:54 AM UTC 24 |
Oct 12 06:17:07 AM UTC 24 |
22537088562 ps |
| T1129 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull.1661336554 |
|
|
Oct 12 06:17:02 AM UTC 24 |
Oct 12 06:17:07 AM UTC 24 |
486133861 ps |
| T244 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_fmt.4097150723 |
|
|
Oct 12 06:17:08 AM UTC 24 |
Oct 12 06:17:10 AM UTC 24 |
69433139 ps |
| T1130 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_rx.202447510 |
|
|
Oct 12 06:17:08 AM UTC 24 |
Oct 12 06:17:15 AM UTC 24 |
415551515 ps |
| T1131 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_host_error_intr.2070584836 |
|
|
Oct 12 06:17:11 AM UTC 24 |
Oct 12 06:17:16 AM UTC 24 |
132981724 ps |
| T1132 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_watermark.3519950828 |
|
|
Oct 12 06:14:06 AM UTC 24 |
Oct 12 06:17:21 AM UTC 24 |
13858116177 ps |
| T1133 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_host_may_nack.3127895714 |
|
|
Oct 12 06:16:58 AM UTC 24 |
Oct 12 06:17:21 AM UTC 24 |
559375018 ps |
| T1134 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_target_stress_all.3898059151 |
|
|
Oct 12 06:15:10 AM UTC 24 |
Oct 12 06:17:26 AM UTC 24 |
108059927828 ps |
| T1135 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_host_perf.486875623 |
|
|
Oct 12 06:16:36 AM UTC 24 |
Oct 12 06:17:27 AM UTC 24 |
13244756364 ps |
| T1136 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_fmt_empty.3830447470 |
|
|
Oct 12 06:17:08 AM UTC 24 |
Oct 12 06:17:29 AM UTC 24 |
404521534 ps |
| T1137 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_host_stretch_timeout.2483006372 |
|
|
Oct 12 06:17:08 AM UTC 24 |
Oct 12 06:17:30 AM UTC 24 |
1203545582 ps |
| T1138 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_intr_smoke.4128799717 |
|
|
Oct 12 06:17:28 AM UTC 24 |
Oct 12 06:17:35 AM UTC 24 |
525999353 ps |
| T1139 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_stress_wr.3202098390 |
|
|
Oct 12 06:17:22 AM UTC 24 |
Oct 12 06:17:36 AM UTC 24 |
16367773739 ps |
| T1140 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_host_smoke.2494038449 |
|
|
Oct 12 06:17:04 AM UTC 24 |
Oct 12 06:17:37 AM UTC 24 |
1762278993 ps |
| T1141 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_full.2443351103 |
|
|
Oct 12 06:14:54 AM UTC 24 |
Oct 12 06:17:38 AM UTC 24 |
2827299066 ps |
| T1142 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_acq.3835771421 |
|
|
Oct 12 06:17:37 AM UTC 24 |
Oct 12 06:17:40 AM UTC 24 |
265655798 ps |
| T1143 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_timeout.1142920965 |
|
|
Oct 12 06:17:31 AM UTC 24 |
Oct 12 06:17:42 AM UTC 24 |
5836926429 ps |
| T1144 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_tx.3717141987 |
|
|
Oct 12 06:17:38 AM UTC 24 |
Oct 12 06:17:42 AM UTC 24 |
258946950 ps |
| T1145 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_smoke.3954796715 |
|
|
Oct 12 06:17:16 AM UTC 24 |
Oct 12 06:17:46 AM UTC 24 |
973605032 ps |
| T1146 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_perf.1587359304 |
|
|
Oct 12 06:17:39 AM UTC 24 |
Oct 12 06:17:46 AM UTC 24 |
4455620232 ps |
| T1147 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_stress_rd.3728057561 |
|
|
Oct 12 06:18:08 AM UTC 24 |
Oct 12 06:18:32 AM UTC 24 |
4747847017 ps |
| T1148 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_hrst.973365613 |
|
|
Oct 12 06:17:43 AM UTC 24 |
Oct 12 06:17:48 AM UTC 24 |
1221597935 ps |
| T1149 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_stress_wr.2844220382 |
|
|
Oct 12 06:16:06 AM UTC 24 |
Oct 12 06:17:48 AM UTC 24 |
47438341620 ps |
| T1150 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_tx.4200804461 |
|
|
Oct 12 06:17:48 AM UTC 24 |
Oct 12 06:17:52 AM UTC 24 |
626496746 ps |
| T1151 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_acq.3624393795 |
|
|
Oct 12 06:17:47 AM UTC 24 |
Oct 12 06:17:52 AM UTC 24 |
1467459299 ps |
| T1152 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_bad_addr.220527727 |
|
|
Oct 12 06:17:41 AM UTC 24 |
Oct 12 06:17:53 AM UTC 24 |
2304759396 ps |
| T1153 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/12.i2c_target_stress_all.2827016058 |
|
|
Oct 12 06:03:33 AM UTC 24 |
Oct 12 06:17:53 AM UTC 24 |
48424719178 ps |
| T1154 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_full.2053777995 |
|
|
Oct 12 06:14:09 AM UTC 24 |
Oct 12 06:17:54 AM UTC 24 |
7036285564 ps |
| T1155 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_smbus_maxlen.2748077941 |
|
|
Oct 12 06:17:49 AM UTC 24 |
Oct 12 06:17:54 AM UTC 24 |
461459874 ps |
| T1156 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_tx_stretch_ctrl.3394523192 |
|
|
Oct 12 06:17:48 AM UTC 24 |
Oct 12 06:17:57 AM UTC 24 |
227640559 ps |
| T1157 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_alert_test.2697984933 |
|
|
Oct 12 06:17:55 AM UTC 24 |
Oct 12 06:17:57 AM UTC 24 |
22474409 ps |
| T1158 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_nack_txstretch.409372696 |
|
|
Oct 12 06:17:54 AM UTC 24 |
Oct 12 06:17:58 AM UTC 24 |
136029610 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_host_override.4105346446 |
|
|
Oct 12 06:17:56 AM UTC 24 |
Oct 12 06:17:58 AM UTC 24 |
37303712 ps |
| T49 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull_addr.3435097332 |
|
|
Oct 12 06:17:54 AM UTC 24 |
Oct 12 06:17:58 AM UTC 24 |
4025473852 ps |
| T1159 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull.515751584 |
|
|
Oct 12 06:17:53 AM UTC 24 |
Oct 12 06:17:59 AM UTC 24 |
496443150 ps |
| T1160 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_fmt.2677271483 |
|
|
Oct 12 06:17:58 AM UTC 24 |
Oct 12 06:18:01 AM UTC 24 |
286834340 ps |
| T1161 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_watermark.131283949 |
|
|
Oct 12 06:15:22 AM UTC 24 |
Oct 12 06:18:01 AM UTC 24 |
2845477998 ps |
| T1162 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_overflow.2552578429 |
|
|
Oct 12 06:15:22 AM UTC 24 |
Oct 12 06:18:01 AM UTC 24 |
2304944565 ps |
| T1163 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_stress_rd.3708947452 |
|
|
Oct 12 06:17:22 AM UTC 24 |
Oct 12 06:18:04 AM UTC 24 |
1627788217 ps |
| T1164 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_host_perf_precise.3588261881 |
|
|
Oct 12 06:18:02 AM UTC 24 |
Oct 12 06:18:06 AM UTC 24 |
41318953 ps |
| T1165 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_host_error_intr.680789144 |
|
|
Oct 12 06:18:02 AM UTC 24 |
Oct 12 06:18:06 AM UTC 24 |
465088486 ps |
| T1166 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_fmt_empty.2535483861 |
|
|
Oct 12 06:17:58 AM UTC 24 |
Oct 12 06:18:07 AM UTC 24 |
331787489 ps |
| T1167 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_rx.632829836 |
|
|
Oct 12 06:18:00 AM UTC 24 |
Oct 12 06:18:08 AM UTC 24 |
332251095 ps |
| T1168 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_host_may_nack.1425997525 |
|
|
Oct 12 06:17:46 AM UTC 24 |
Oct 12 06:18:08 AM UTC 24 |
579969770 ps |
| T1169 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_overflow.1138367702 |
|
|
Oct 12 06:16:32 AM UTC 24 |
Oct 12 06:18:10 AM UTC 24 |
1540625920 ps |
| T1170 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_full.4134144040 |
|
|
Oct 12 06:15:56 AM UTC 24 |
Oct 12 06:18:11 AM UTC 24 |
2331171087 ps |
| T1171 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_stress_all.1580039963 |
|
|
Oct 12 06:17:41 AM UTC 24 |
Oct 12 06:18:12 AM UTC 24 |
95908575828 ps |
| T1172 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_host_stretch_timeout.3282179889 |
|
|
Oct 12 06:18:02 AM UTC 24 |
Oct 12 06:18:13 AM UTC 24 |
461591412 ps |
| T1173 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_watermark.2246773609 |
|
|
Oct 12 06:15:54 AM UTC 24 |
Oct 12 06:18:14 AM UTC 24 |
19463891416 ps |
| T1174 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_acq.2452065031 |
|
|
Oct 12 06:18:13 AM UTC 24 |
Oct 12 06:18:17 AM UTC 24 |
278486160 ps |
| T1175 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_intr_smoke.1361013100 |
|
|
Oct 12 06:18:10 AM UTC 24 |
Oct 12 06:18:17 AM UTC 24 |
1978954700 ps |
| T1176 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_tx.944135537 |
|
|
Oct 12 06:18:15 AM UTC 24 |
Oct 12 06:18:18 AM UTC 24 |
619569917 ps |
| T1177 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_smoke.2005862971 |
|
|
Oct 12 06:18:06 AM UTC 24 |
Oct 12 06:18:21 AM UTC 24 |
696962684 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_host_override.3100505479 |
|
|
Oct 12 06:18:29 AM UTC 24 |
Oct 12 06:18:31 AM UTC 24 |
31889939 ps |
| T1178 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_overflow.1050788161 |
|
|
Oct 12 06:17:07 AM UTC 24 |
Oct 12 06:18:23 AM UTC 24 |
9862722872 ps |
| T1179 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_perf.4263659261 |
|
|
Oct 12 06:18:16 AM UTC 24 |
Oct 12 06:18:24 AM UTC 24 |
1533707453 ps |
| T1180 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_hrst.2631175399 |
|
|
Oct 12 06:18:19 AM UTC 24 |
Oct 12 06:18:24 AM UTC 24 |
1311461425 ps |
| T1181 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_timeout.1438640150 |
|
|
Oct 12 06:18:12 AM UTC 24 |
Oct 12 06:18:24 AM UTC 24 |
2871588654 ps |
| T1182 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_bad_addr.814966884 |
|
|
Oct 12 06:18:19 AM UTC 24 |
Oct 12 06:18:24 AM UTC 24 |
456838040 ps |
| T1183 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_tx.3609983111 |
|
|
Oct 12 06:18:23 AM UTC 24 |
Oct 12 06:18:26 AM UTC 24 |
181897920 ps |
| T119 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_watermark.4237364238 |
|
|
Oct 12 06:17:06 AM UTC 24 |
Oct 12 06:18:27 AM UTC 24 |
3637898537 ps |
| T1184 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_tx_stretch_ctrl.2486012188 |
|
|
Oct 12 06:18:24 AM UTC 24 |
Oct 12 06:18:28 AM UTC 24 |
61538594 ps |
| T1185 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_intr_stress_wr.3762526526 |
|
|
Oct 12 06:16:46 AM UTC 24 |
Oct 12 06:18:28 AM UTC 24 |
9671345326 ps |
| T1186 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_host_may_nack.169100484 |
|
|
Oct 12 06:18:22 AM UTC 24 |
Oct 12 06:18:28 AM UTC 24 |
288352872 ps |
| T1187 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_acq.2892090765 |
|
|
Oct 12 06:18:23 AM UTC 24 |
Oct 12 06:18:28 AM UTC 24 |
2039967030 ps |
| T1188 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_smbus_maxlen.3335674121 |
|
|
Oct 12 06:18:25 AM UTC 24 |
Oct 12 06:18:29 AM UTC 24 |
474028788 ps |
| T1189 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull_addr.2775806596 |
|
|
Oct 12 06:18:25 AM UTC 24 |
Oct 12 06:18:29 AM UTC 24 |
1431812525 ps |
| T1190 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_host_perf.562304047 |
|
|
Oct 12 06:17:08 AM UTC 24 |
Oct 12 06:18:30 AM UTC 24 |
10662118277 ps |
| T1191 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_alert_test.422309459 |
|
|
Oct 12 06:18:28 AM UTC 24 |
Oct 12 06:18:30 AM UTC 24 |
23081502 ps |
| T1192 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_nack_txstretch.3374607331 |
|
|
Oct 12 06:18:27 AM UTC 24 |
Oct 12 06:18:30 AM UTC 24 |
128178003 ps |
| T1193 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull.469870286 |
|
|
Oct 12 06:18:25 AM UTC 24 |
Oct 12 06:18:30 AM UTC 24 |
2873795247 ps |
| T1194 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_fmt.1788893509 |
|
|
Oct 12 06:18:30 AM UTC 24 |
Oct 12 06:18:33 AM UTC 24 |
593797051 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_stress_all.796810982 |
|
|
Oct 12 06:13:49 AM UTC 24 |
Oct 12 06:18:35 AM UTC 24 |
27883658593 ps |
| T1195 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_host_smoke.2169764369 |
|
|
Oct 12 06:17:55 AM UTC 24 |
Oct 12 06:18:40 AM UTC 24 |
2365974942 ps |
| T1196 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_fmt_empty.1036303252 |
|
|
Oct 12 06:18:30 AM UTC 24 |
Oct 12 06:18:40 AM UTC 24 |
307817211 ps |
| T1197 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_rx.1302782460 |
|
|
Oct 12 06:18:31 AM UTC 24 |
Oct 12 06:18:43 AM UTC 24 |
637499534 ps |
| T1198 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_host_perf.3927569939 |
|
|
Oct 12 06:18:00 AM UTC 24 |
Oct 12 06:18:47 AM UTC 24 |
2783352694 ps |
| T1199 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_host_perf_precise.3970594567 |
|
|
Oct 12 06:17:08 AM UTC 24 |
Oct 12 06:18:50 AM UTC 24 |
5848248316 ps |
| T1200 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_stretch.4119581556 |
|
|
Oct 12 06:16:07 AM UTC 24 |
Oct 12 06:18:54 AM UTC 24 |
3811228127 ps |
| T1201 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_target_intr_smoke.4123532114 |
|
|
Oct 12 06:18:48 AM UTC 24 |
Oct 12 06:18:56 AM UTC 24 |
6546418921 ps |
| T1202 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_host_stretch_timeout.3869893971 |
|
|
Oct 12 06:18:32 AM UTC 24 |
Oct 12 06:18:56 AM UTC 24 |
1707045925 ps |
| T1203 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_target_smoke.476366525 |
|
|
Oct 12 06:18:36 AM UTC 24 |
Oct 12 06:18:57 AM UTC 24 |
2355426597 ps |
| T1204 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_stretch.405040700 |
|
|
Oct 12 06:20:01 AM UTC 24 |
Oct 12 06:20:04 AM UTC 24 |
293384616 ps |
| T1205 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_host_error_intr.2398607982 |
|
|
Oct 12 06:18:33 AM UTC 24 |
Oct 12 06:18:57 AM UTC 24 |
443968234 ps |
| T1206 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_watermark.4038789722 |
|
|
Oct 12 06:16:32 AM UTC 24 |
Oct 12 06:18:59 AM UTC 24 |
11046773558 ps |
| T1207 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_tx.3880435104 |
|
|
Oct 12 06:18:57 AM UTC 24 |
Oct 12 06:19:00 AM UTC 24 |
250680611 ps |
| T1208 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_acq.975848651 |
|
|
Oct 12 06:18:57 AM UTC 24 |
Oct 12 06:19:01 AM UTC 24 |
249670317 ps |
| T1209 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_watermark.2434897186 |
|
|
Oct 12 06:17:57 AM UTC 24 |
Oct 12 06:19:02 AM UTC 24 |
6143142814 ps |
| T1210 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_host_smoke.64779662 |
|
|
Oct 12 06:18:29 AM UTC 24 |
Oct 12 06:19:03 AM UTC 24 |
3160129199 ps |
| T1211 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_target_timeout.2838413294 |
|
|
Oct 12 06:18:52 AM UTC 24 |
Oct 12 06:19:04 AM UTC 24 |
4333440252 ps |
| T1212 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_tx.2755681552 |
|
|
Oct 12 06:19:04 AM UTC 24 |
Oct 12 06:19:06 AM UTC 24 |
140209044 ps |
| T1213 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_target_perf.2073382972 |
|
|
Oct 12 06:18:57 AM UTC 24 |
Oct 12 06:19:07 AM UTC 24 |
2857147072 ps |
| T1214 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_acq.3000620004 |
|
|
Oct 12 06:19:03 AM UTC 24 |
Oct 12 06:19:09 AM UTC 24 |
1025196236 ps |
| T1215 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_target_bad_addr.287738356 |
|
|
Oct 12 06:18:58 AM UTC 24 |
Oct 12 06:19:09 AM UTC 24 |
2777149765 ps |
| T1216 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_target_tx_stretch_ctrl.3770687593 |
|
|
Oct 12 06:19:05 AM UTC 24 |
Oct 12 06:19:11 AM UTC 24 |
176655684 ps |
| T1217 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_target_stress_rd.3487493270 |
|
|
Oct 12 06:18:41 AM UTC 24 |
Oct 12 06:19:11 AM UTC 24 |
1068505838 ps |
| T1218 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull.1426369736 |
|
|
Oct 12 06:19:07 AM UTC 24 |
Oct 12 06:19:12 AM UTC 24 |
1621359437 ps |
| T1219 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_target_nack_txstretch.3784475170 |
|
|
Oct 12 06:19:09 AM UTC 24 |
Oct 12 06:19:13 AM UTC 24 |
139125754 ps |
| T1220 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull_addr.728343361 |
|
|
Oct 12 06:19:08 AM UTC 24 |
Oct 12 06:19:13 AM UTC 24 |
1789239166 ps |
| T1221 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_alert_test.1652944691 |
|
|
Oct 12 06:19:11 AM UTC 24 |
Oct 12 06:19:13 AM UTC 24 |
27190807 ps |
| T1222 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_target_smbus_maxlen.3661008047 |
|
|
Oct 12 06:19:07 AM UTC 24 |
Oct 12 06:19:13 AM UTC 24 |
589068553 ps |
| T1223 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_host_override.2183542623 |
|
|
Oct 12 06:19:12 AM UTC 24 |
Oct 12 06:19:14 AM UTC 24 |
90944768 ps |
| T1224 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_target_stretch.93425213 |
|
|
Oct 12 06:18:08 AM UTC 24 |
Oct 12 06:19:14 AM UTC 24 |
3336994477 ps |
| T1225 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_fmt.3836584716 |
|
|
Oct 12 06:19:14 AM UTC 24 |
Oct 12 06:19:17 AM UTC 24 |
256955279 ps |
| T1226 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_stretch.3603574617 |
|
|
Oct 12 06:17:27 AM UTC 24 |
Oct 12 06:19:17 AM UTC 24 |
2646053928 ps |
| T1227 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_host_perf_precise.2927829434 |
|
|
Oct 12 06:19:15 AM UTC 24 |
Oct 12 06:19:18 AM UTC 24 |
98738698 ps |
| T1228 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_watermark.2661626759 |
|
|
Oct 12 06:14:52 AM UTC 24 |
Oct 12 06:19:22 AM UTC 24 |
4868360621 ps |
| T1229 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_rx.1775953909 |
|
|
Oct 12 06:19:14 AM UTC 24 |
Oct 12 06:19:22 AM UTC 24 |
823772891 ps |
| T1230 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_fmt_empty.1340938787 |
|
|
Oct 12 06:19:14 AM UTC 24 |
Oct 12 06:19:24 AM UTC 24 |
711010735 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_host_may_nack.2348976107 |
|
|
Oct 12 06:19:02 AM UTC 24 |
Oct 12 06:19:29 AM UTC 24 |
2126195842 ps |
| T1231 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_overflow.2131877434 |
|
|
Oct 12 06:18:29 AM UTC 24 |
Oct 12 06:19:32 AM UTC 24 |
9692175528 ps |
| T1232 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_host_stretch_timeout.1354987249 |
|
|
Oct 12 06:19:18 AM UTC 24 |
Oct 12 06:19:33 AM UTC 24 |
1148821662 ps |
| T1233 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_stress_wr.4090835452 |
|
|
Oct 12 06:19:25 AM UTC 24 |
Oct 12 06:19:35 AM UTC 24 |
9246733393 ps |
| T1234 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_host_perf.4092151676 |
|
|
Oct 12 06:19:15 AM UTC 24 |
Oct 12 06:19:38 AM UTC 24 |
31834080084 ps |
| T1235 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_intr_smoke.4057977325 |
|
|
Oct 12 06:19:30 AM UTC 24 |
Oct 12 06:19:38 AM UTC 24 |
1105675538 ps |
| T1236 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_host_error_intr.335085122 |
|
|
Oct 12 06:19:19 AM UTC 24 |
Oct 12 06:19:39 AM UTC 24 |
504409556 ps |
| T1237 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_host_perf.3142990382 |
|
|
Oct 12 06:14:55 AM UTC 24 |
Oct 12 06:19:40 AM UTC 24 |
6638714542 ps |
| T1238 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_acq.3195719155 |
|
|
Oct 12 06:19:38 AM UTC 24 |
Oct 12 06:19:41 AM UTC 24 |
158425218 ps |
| T1239 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_stress_wr.2815757960 |
|
|
Oct 12 06:16:41 AM UTC 24 |
Oct 12 06:19:42 AM UTC 24 |
48603978963 ps |
| T1240 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_tx.1840757895 |
|
|
Oct 12 06:19:40 AM UTC 24 |
Oct 12 06:19:43 AM UTC 24 |
251785462 ps |
| T1241 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_timeout.1857803112 |
|
|
Oct 12 06:19:34 AM UTC 24 |
Oct 12 06:19:45 AM UTC 24 |
18491646836 ps |
| T1242 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_host_smoke.2042459221 |
|
|
Oct 12 06:19:12 AM UTC 24 |
Oct 12 06:19:45 AM UTC 24 |
1806908492 ps |
| T1243 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_intr_stress_wr.1594022035 |
|
|
Oct 12 06:19:34 AM UTC 24 |
Oct 12 06:19:47 AM UTC 24 |
13255405481 ps |
| T1244 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_full.3619844647 |
|
|
Oct 12 06:16:35 AM UTC 24 |
Oct 12 06:19:49 AM UTC 24 |
6132388472 ps |
| T1245 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_stress_all.2250673992 |
|
|
Oct 12 06:15:41 AM UTC 24 |
Oct 12 06:19:49 AM UTC 24 |
47476355496 ps |
| T1246 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_tx.2837160623 |
|
|
Oct 12 06:19:46 AM UTC 24 |
Oct 12 06:19:49 AM UTC 24 |
161747541 ps |
| T1247 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_target_intr_stress_wr.3678006802 |
|
|
Oct 12 06:18:51 AM UTC 24 |
Oct 12 06:19:50 AM UTC 24 |
18516858803 ps |
| T1248 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_watermark.432251827 |
|
|
Oct 12 06:18:29 AM UTC 24 |
Oct 12 06:19:51 AM UTC 24 |
2983509846 ps |
| T1249 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_perf.2943881530 |
|
|
Oct 12 06:19:40 AM UTC 24 |
Oct 12 06:19:52 AM UTC 24 |
849000822 ps |
| T1250 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_bad_addr.949780897 |
|
|
Oct 12 06:19:43 AM UTC 24 |
Oct 12 06:19:52 AM UTC 24 |
2025879454 ps |
| T1251 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_alert_test.1400686628 |
|
|
Oct 12 06:19:51 AM UTC 24 |
Oct 12 06:19:52 AM UTC 24 |
17324954 ps |
| T1252 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_tx_stretch_ctrl.1918496983 |
|
|
Oct 12 06:19:48 AM UTC 24 |
Oct 12 06:19:53 AM UTC 24 |
78765523 ps |
| T1253 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_acq.222547889 |
|
|
Oct 12 06:19:46 AM UTC 24 |
Oct 12 06:19:53 AM UTC 24 |
544518525 ps |
| T1254 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_smbus_maxlen.861148004 |
|
|
Oct 12 06:19:49 AM UTC 24 |
Oct 12 06:19:53 AM UTC 24 |
481219711 ps |
| T120 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_host_stress_all.4007464833 |
|
|
Oct 12 06:16:36 AM UTC 24 |
Oct 12 06:20:01 AM UTC 24 |
30528763646 ps |
| T1255 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_fmt_empty.2168343407 |
|
|
Oct 12 06:19:54 AM UTC 24 |
Oct 12 06:20:06 AM UTC 24 |
1310114305 ps |
| T1256 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_host_override.490817783 |
|
|
Oct 12 06:19:52 AM UTC 24 |
Oct 12 06:19:54 AM UTC 24 |
26904156 ps |
| T1257 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_host_may_nack.1499128996 |
|
|
Oct 12 06:19:44 AM UTC 24 |
Oct 12 06:19:56 AM UTC 24 |
2074964042 ps |
| T1258 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_fmt.844434880 |
|
|
Oct 12 06:19:53 AM UTC 24 |
Oct 12 06:19:56 AM UTC 24 |
992879790 ps |
| T1259 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull_addr.2154304970 |
|
|
Oct 12 06:19:51 AM UTC 24 |
Oct 12 06:19:56 AM UTC 24 |
2135256008 ps |
| T1260 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull.2366259574 |
|
|
Oct 12 06:19:51 AM UTC 24 |
Oct 12 06:19:57 AM UTC 24 |
1114172489 ps |
| T1261 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_target_intr_stress_wr.549961028 |
|
|
Oct 12 06:17:30 AM UTC 24 |
Oct 12 06:19:57 AM UTC 24 |
13681363554 ps |
| T1262 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_host_perf_precise.1838967545 |
|
|
Oct 12 06:19:55 AM UTC 24 |
Oct 12 06:19:58 AM UTC 24 |
229666523 ps |
| T1263 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_overflow.2725302681 |
|
|
Oct 12 06:17:58 AM UTC 24 |
Oct 12 06:19:59 AM UTC 24 |
2718940033 ps |
| T1264 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_rx.3411349806 |
|
|
Oct 12 06:19:54 AM UTC 24 |
Oct 12 06:20:00 AM UTC 24 |
519706475 ps |
| T1265 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_host_error_intr.3641076144 |
|
|
Oct 12 06:19:57 AM UTC 24 |
Oct 12 06:20:00 AM UTC 24 |
421016053 ps |
| T1266 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_overflow.2817785784 |
|
|
Oct 12 06:19:14 AM UTC 24 |
Oct 12 06:20:03 AM UTC 24 |
3066773140 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_acq.4155031406 |
|
|
Oct 12 06:20:02 AM UTC 24 |
Oct 12 06:20:06 AM UTC 24 |
1752630196 ps |
| T1267 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_stress_wr.1771719424 |
|
|
Oct 12 06:19:58 AM UTC 24 |
Oct 12 06:20:06 AM UTC 24 |
15522462554 ps |
| T1268 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_tx.437325380 |
|
|
Oct 12 06:20:03 AM UTC 24 |
Oct 12 06:20:06 AM UTC 24 |
377840225 ps |
| T1269 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_intr_smoke.1219891929 |
|
|
Oct 12 06:20:01 AM UTC 24 |
Oct 12 06:20:08 AM UTC 24 |
1039017342 ps |
| T1270 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_smoke.2621503005 |
|
|
Oct 12 06:19:24 AM UTC 24 |
Oct 12 06:20:09 AM UTC 24 |
6508185059 ps |
| T1271 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_host_stretch_timeout.537513230 |
|
|
Oct 12 06:19:57 AM UTC 24 |
Oct 12 06:20:09 AM UTC 24 |
3675337468 ps |
| T1272 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_host_mode_toggle.524169039 |
|
|
Oct 12 06:20:07 AM UTC 24 |
Oct 12 06:20:10 AM UTC 24 |
128464511 ps |
| T1273 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_timeout.1918168040 |
|
|
Oct 12 06:20:01 AM UTC 24 |
Oct 12 06:20:10 AM UTC 24 |
2236035651 ps |
| T1274 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_acq.3485632663 |
|
|
Oct 12 06:20:07 AM UTC 24 |
Oct 12 06:20:11 AM UTC 24 |
957877795 ps |
| T1275 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_tx_stretch_ctrl.1383539238 |
|
|
Oct 12 06:20:08 AM UTC 24 |
Oct 12 06:20:11 AM UTC 24 |
64962614 ps |
| T1276 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_perf.2401064814 |
|
|
Oct 12 06:20:04 AM UTC 24 |
Oct 12 06:20:11 AM UTC 24 |
2868759413 ps |
| T1277 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_tx.1190863046 |
|
|
Oct 12 06:20:08 AM UTC 24 |
Oct 12 06:20:11 AM UTC 24 |
334303831 ps |
| T1278 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_host_may_nack.2198874018 |
|
|
Oct 12 06:20:07 AM UTC 24 |
Oct 12 06:20:12 AM UTC 24 |
351112638 ps |
| T1279 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_alert_test.3656990577 |
|
|
Oct 12 06:20:11 AM UTC 24 |
Oct 12 06:20:13 AM UTC 24 |
95816960 ps |
| T1280 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_smoke.2511764038 |
|
|
Oct 12 06:19:58 AM UTC 24 |
Oct 12 06:20:13 AM UTC 24 |
908112322 ps |
| T1281 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_smbus_maxlen.2559388032 |
|
|
Oct 12 06:20:09 AM UTC 24 |
Oct 12 06:20:13 AM UTC 24 |
438502000 ps |
| T1282 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull.198785887 |
|
|
Oct 12 06:20:09 AM UTC 24 |
Oct 12 06:20:14 AM UTC 24 |
555354342 ps |
| T263 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_host_override.2940450745 |
|
|
Oct 12 06:20:12 AM UTC 24 |
Oct 12 06:20:14 AM UTC 24 |
49340921 ps |
| T1283 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_nack_txstretch.2649379118 |
|
|
Oct 12 06:20:11 AM UTC 24 |
Oct 12 06:20:14 AM UTC 24 |
534475305 ps |
| T1284 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_bad_addr.1301164524 |
|
|
Oct 12 06:20:06 AM UTC 24 |
Oct 12 06:20:15 AM UTC 24 |
1949552122 ps |
| T1285 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_fmt.1181541693 |
|
|
Oct 12 06:20:13 AM UTC 24 |
Oct 12 06:20:15 AM UTC 24 |
93441214 ps |
| T1286 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull_addr.4235856232 |
|
|
Oct 12 06:20:11 AM UTC 24 |
Oct 12 06:20:16 AM UTC 24 |
2303598222 ps |
| T1287 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_stress_all.4267104003 |
|
|
Oct 12 06:19:41 AM UTC 24 |
Oct 12 06:20:18 AM UTC 24 |
25363455699 ps |
| T1288 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_host_error_intr.2424969632 |
|
|
Oct 12 06:20:15 AM UTC 24 |
Oct 12 06:20:18 AM UTC 24 |
143363382 ps |
| T1289 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_host_smoke.4020075458 |
|
|
Oct 12 06:19:52 AM UTC 24 |
Oct 12 06:20:18 AM UTC 24 |
1483476293 ps |
| T1290 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/34.i2c_target_stress_all.555798176 |
|
|
Oct 12 06:18:58 AM UTC 24 |
Oct 12 06:20:20 AM UTC 24 |
44171854091 ps |
| T1291 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_intr_stress_wr.399172384 |
|
|
Oct 12 06:20:01 AM UTC 24 |
Oct 12 06:20:22 AM UTC 24 |
13042030140 ps |
| T1292 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_tx.3576108041 |
|
|
Oct 12 06:21:03 AM UTC 24 |
Oct 12 06:21:07 AM UTC 24 |
160764074 ps |
| T1293 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_rx.4137983263 |
|
|
Oct 12 06:20:13 AM UTC 24 |
Oct 12 06:20:22 AM UTC 24 |
144208020 ps |
| T1294 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_fmt_empty.2565833169 |
|
|
Oct 12 06:20:13 AM UTC 24 |
Oct 12 06:20:22 AM UTC 24 |
1379605326 ps |
| T1295 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_target_stretch.974201374 |
|
|
Oct 12 06:19:26 AM UTC 24 |
Oct 12 06:20:27 AM UTC 24 |
3540026692 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_acq.3049020342 |
|
|
Oct 12 06:20:24 AM UTC 24 |
Oct 12 06:20:27 AM UTC 24 |
174334149 ps |
| T1296 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_stress_rd.3166612873 |
|
|
Oct 12 06:20:19 AM UTC 24 |
Oct 12 06:20:28 AM UTC 24 |
338574659 ps |
| T1297 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_smoke.2575854704 |
|
|
Oct 12 06:20:16 AM UTC 24 |
Oct 12 06:20:29 AM UTC 24 |
1601895213 ps |
| T1298 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_full.2061546087 |
|
|
Oct 12 06:19:14 AM UTC 24 |
Oct 12 06:20:29 AM UTC 24 |
2331638055 ps |
| T1299 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_tx.236033970 |
|
|
Oct 12 06:20:26 AM UTC 24 |
Oct 12 06:20:29 AM UTC 24 |
612666487 ps |
| T1300 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_full.1380650069 |
|
|
Oct 12 06:17:08 AM UTC 24 |
Oct 12 06:20:30 AM UTC 24 |
6314832701 ps |
| T1301 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_intr_smoke.1900406148 |
|
|
Oct 12 06:20:19 AM UTC 24 |
Oct 12 06:20:30 AM UTC 24 |
2952983054 ps |
| T1302 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_stretch.3610095844 |
|
|
Oct 12 06:20:19 AM UTC 24 |
Oct 12 06:20:31 AM UTC 24 |
2750223069 ps |
| T1303 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_intr_stress_wr.110583257 |
|
|
Oct 12 06:20:21 AM UTC 24 |
Oct 12 06:20:32 AM UTC 24 |
10019797955 ps |
| T1304 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_hrst.2791675360 |
|
|
Oct 12 06:20:29 AM UTC 24 |
Oct 12 06:20:33 AM UTC 24 |
350699881 ps |
| T1305 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_timeout.574147386 |
|
|
Oct 12 06:20:23 AM UTC 24 |
Oct 12 06:20:33 AM UTC 24 |
4482290077 ps |
| T1306 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_host_mode_toggle.3262802275 |
|
|
Oct 12 06:20:30 AM UTC 24 |
Oct 12 06:20:34 AM UTC 24 |
147104673 ps |
| T1307 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_tx.2413448119 |
|
|
Oct 12 06:20:32 AM UTC 24 |
Oct 12 06:20:34 AM UTC 24 |
301359477 ps |
| T1308 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_perf.3959901819 |
|
|
Oct 12 06:20:27 AM UTC 24 |
Oct 12 06:20:35 AM UTC 24 |
3133137343 ps |
| T1309 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_acq.2708774450 |
|
|
Oct 12 06:20:31 AM UTC 24 |
Oct 12 06:20:35 AM UTC 24 |
293366995 ps |
| T1310 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_host_stretch_timeout.1591293667 |
|
|
Oct 12 06:20:15 AM UTC 24 |
Oct 12 06:20:36 AM UTC 24 |
950234887 ps |
| T1311 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_alert_test.389383801 |
|
|
Oct 12 06:20:35 AM UTC 24 |
Oct 12 06:20:37 AM UTC 24 |
78902445 ps |
| T1312 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_smbus_maxlen.3853371117 |
|
|
Oct 12 06:20:33 AM UTC 24 |
Oct 12 06:20:38 AM UTC 24 |
958072134 ps |
| T1313 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_nack_txstretch.4091937463 |
|
|
Oct 12 06:20:35 AM UTC 24 |
Oct 12 06:20:38 AM UTC 24 |
253091954 ps |
| T1314 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_host_override.60949931 |
|
|
Oct 12 06:20:36 AM UTC 24 |
Oct 12 06:20:38 AM UTC 24 |
102407914 ps |
| T1315 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_bad_addr.1722265844 |
|
|
Oct 12 06:20:29 AM UTC 24 |
Oct 12 06:20:39 AM UTC 24 |
971605929 ps |
| T1316 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_tx_stretch_ctrl.707237127 |
|
|
Oct 12 06:20:32 AM UTC 24 |
Oct 12 06:20:39 AM UTC 24 |
245277254 ps |
| T1317 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull.3349664412 |
|
|
Oct 12 06:20:34 AM UTC 24 |
Oct 12 06:20:39 AM UTC 24 |
511742710 ps |
| T1318 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull_addr.2381896392 |
|
|
Oct 12 06:20:34 AM UTC 24 |
Oct 12 06:20:40 AM UTC 24 |
675913793 ps |
| T1319 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/37.i2c_host_perf_precise.3603736155 |
|
|
Oct 12 06:20:15 AM UTC 24 |
Oct 12 06:20:40 AM UTC 24 |
427245264 ps |
| T1320 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/36.i2c_target_stress_rd.2867902360 |
|
|
Oct 12 06:19:59 AM UTC 24 |
Oct 12 06:20:40 AM UTC 24 |
3682326816 ps |
| T1321 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_fmt.626956739 |
|
|
Oct 12 06:20:39 AM UTC 24 |
Oct 12 06:20:41 AM UTC 24 |
127339815 ps |