| T842 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_watermark.2766191120 |
|
|
Oct 12 06:06:43 AM UTC 24 |
Oct 12 06:10:54 AM UTC 24 |
3866454682 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_nack_acqfull_addr.1316617728 |
|
|
Oct 12 06:10:49 AM UTC 24 |
Oct 12 06:10:55 AM UTC 24 |
2268798647 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_reset_fmt.4164484337 |
|
|
Oct 12 06:10:52 AM UTC 24 |
Oct 12 06:10:55 AM UTC 24 |
536689542 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_host_stretch_timeout.395268297 |
|
|
Oct 12 06:10:11 AM UTC 24 |
Oct 12 06:10:55 AM UTC 24 |
2979287951 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_host_error_intr.3621645837 |
|
|
Oct 12 06:10:56 AM UTC 24 |
Oct 12 06:10:59 AM UTC 24 |
739105126 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_reset_rx.3501294676 |
|
|
Oct 12 06:10:53 AM UTC 24 |
Oct 12 06:11:00 AM UTC 24 |
512122087 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_host_perf_precise.4072220055 |
|
|
Oct 12 06:10:56 AM UTC 24 |
Oct 12 06:11:02 AM UTC 24 |
664641170 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_tx_stretch_ctrl.1942009506 |
|
|
Oct 12 06:10:46 AM UTC 24 |
Oct 12 06:11:04 AM UTC 24 |
747634095 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_stress_rd.724470486 |
|
|
Oct 12 06:10:20 AM UTC 24 |
Oct 12 06:11:06 AM UTC 24 |
2368155290 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_host_perf.4246380422 |
|
|
Oct 12 06:09:38 AM UTC 24 |
Oct 12 06:11:06 AM UTC 24 |
6682214881 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_overflow.4234997299 |
|
|
Oct 12 06:10:08 AM UTC 24 |
Oct 12 06:11:09 AM UTC 24 |
4375077310 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_fmt_empty.1975543328 |
|
|
Oct 12 06:10:53 AM UTC 24 |
Oct 12 06:11:11 AM UTC 24 |
1245253968 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_stretch.157941519 |
|
|
Oct 12 06:11:06 AM UTC 24 |
Oct 12 06:11:11 AM UTC 24 |
2251365469 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_stress_wr.243478088 |
|
|
Oct 12 06:11:02 AM UTC 24 |
Oct 12 06:11:16 AM UTC 24 |
13007101206 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_intr_stress_wr.1630655110 |
|
|
Oct 12 06:11:09 AM UTC 24 |
Oct 12 06:11:16 AM UTC 24 |
3688034588 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_intr_smoke.3773921446 |
|
|
Oct 12 06:11:06 AM UTC 24 |
Oct 12 06:11:19 AM UTC 24 |
1351154803 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_host_smoke.2494231157 |
|
|
Oct 12 06:10:49 AM UTC 24 |
Oct 12 06:11:19 AM UTC 24 |
1131091981 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_acq.2449749208 |
|
|
Oct 12 06:11:17 AM UTC 24 |
Oct 12 06:11:20 AM UTC 24 |
348220377 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_tx.371518293 |
|
|
Oct 12 06:11:18 AM UTC 24 |
Oct 12 06:11:21 AM UTC 24 |
236940588 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_smoke.1432190965 |
|
|
Oct 12 06:11:01 AM UTC 24 |
Oct 12 06:11:23 AM UTC 24 |
5949964433 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_timeout.3237060560 |
|
|
Oct 12 06:11:12 AM UTC 24 |
Oct 12 06:11:24 AM UTC 24 |
1257287777 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_stress_rd.3528402576 |
|
|
Oct 12 06:11:05 AM UTC 24 |
Oct 12 06:11:26 AM UTC 24 |
1876097041 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_perf.988378855 |
|
|
Oct 12 06:11:18 AM UTC 24 |
Oct 12 06:11:26 AM UTC 24 |
8342595398 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_tx.2013209808 |
|
|
Oct 12 06:11:27 AM UTC 24 |
Oct 12 06:11:30 AM UTC 24 |
316807516 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/7.i2c_target_stress_all.2099079485 |
|
|
Oct 12 05:59:53 AM UTC 24 |
Oct 12 06:11:31 AM UTC 24 |
42894238740 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_bad_addr.2032722551 |
|
|
Oct 12 06:11:20 AM UTC 24 |
Oct 12 06:11:31 AM UTC 24 |
2334046388 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_acq.1952745801 |
|
|
Oct 12 06:11:25 AM UTC 24 |
Oct 12 06:11:31 AM UTC 24 |
665203354 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_smbus_maxlen.2022889620 |
|
|
Oct 12 06:11:28 AM UTC 24 |
Oct 12 06:11:33 AM UTC 24 |
2275788179 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_host_may_nack.573976292 |
|
|
Oct 12 06:11:23 AM UTC 24 |
Oct 12 06:11:33 AM UTC 24 |
522187906 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_alert_test.1947528557 |
|
|
Oct 12 06:11:32 AM UTC 24 |
Oct 12 06:11:34 AM UTC 24 |
18751977 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_nack_txstretch.387292965 |
|
|
Oct 12 06:11:32 AM UTC 24 |
Oct 12 06:11:36 AM UTC 24 |
586276764 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_tx_stretch_ctrl.3543480016 |
|
|
Oct 12 06:11:27 AM UTC 24 |
Oct 12 06:11:36 AM UTC 24 |
385664640 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_host_override.1731663649 |
|
|
Oct 12 06:11:34 AM UTC 24 |
Oct 12 06:11:36 AM UTC 24 |
26884519 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull.1484171830 |
|
|
Oct 12 06:11:31 AM UTC 24 |
Oct 12 06:11:37 AM UTC 24 |
2390345346 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull_addr.1340403419 |
|
|
Oct 12 06:11:32 AM UTC 24 |
Oct 12 06:11:38 AM UTC 24 |
4486015269 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_fmt.1321500542 |
|
|
Oct 12 06:11:37 AM UTC 24 |
Oct 12 06:11:40 AM UTC 24 |
421078049 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_watermark.3461969285 |
|
|
Oct 12 06:10:07 AM UTC 24 |
Oct 12 06:11:43 AM UTC 24 |
4325044886 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_stress_all.2104032333 |
|
|
Oct 12 06:08:33 AM UTC 24 |
Oct 12 06:11:44 AM UTC 24 |
30802332848 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_host_stretch_timeout.2946055379 |
|
|
Oct 12 06:10:56 AM UTC 24 |
Oct 12 06:11:45 AM UTC 24 |
3858737260 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_host_perf_precise.752197430 |
|
|
Oct 12 06:11:44 AM UTC 24 |
Oct 12 06:11:47 AM UTC 24 |
743932078 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_rx.4225863225 |
|
|
Oct 12 06:11:38 AM UTC 24 |
Oct 12 06:11:49 AM UTC 24 |
144267456 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_fmt_empty.3381205531 |
|
|
Oct 12 06:11:38 AM UTC 24 |
Oct 12 06:11:54 AM UTC 24 |
283796840 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_host_error_intr.3610248760 |
|
|
Oct 12 06:11:46 AM UTC 24 |
Oct 12 06:11:59 AM UTC 24 |
727671903 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_stress_all.3709992752 |
|
|
Oct 12 06:07:16 AM UTC 24 |
Oct 12 06:12:12 AM UTC 24 |
20803270132 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_stress_all.638728117 |
|
|
Oct 12 06:10:37 AM UTC 24 |
Oct 12 06:12:01 AM UTC 24 |
35582947939 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_full.4007769405 |
|
|
Oct 12 06:10:53 AM UTC 24 |
Oct 12 06:12:04 AM UTC 24 |
9258710098 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_smoke.3061108459 |
|
|
Oct 12 06:11:49 AM UTC 24 |
Oct 12 06:12:06 AM UTC 24 |
2539256726 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_stretch.795123114 |
|
|
Oct 12 06:12:00 AM UTC 24 |
Oct 12 06:12:08 AM UTC 24 |
1933687188 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_intr_smoke.2687321519 |
|
|
Oct 12 06:12:02 AM UTC 24 |
Oct 12 06:12:09 AM UTC 24 |
598972735 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_acq.3207281298 |
|
|
Oct 12 06:12:08 AM UTC 24 |
Oct 12 06:12:10 AM UTC 24 |
429432279 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_tx.1432772097 |
|
|
Oct 12 06:12:09 AM UTC 24 |
Oct 12 06:12:12 AM UTC 24 |
166046089 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_host_smoke.1344320668 |
|
|
Oct 12 06:11:33 AM UTC 24 |
Oct 12 06:12:13 AM UTC 24 |
3125183925 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_host_stress_all.1081704064 |
|
|
Oct 12 06:06:54 AM UTC 24 |
Oct 12 06:12:14 AM UTC 24 |
67130594070 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_full.3505767091 |
|
|
Oct 12 06:10:10 AM UTC 24 |
Oct 12 06:12:15 AM UTC 24 |
3187995142 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_timeout.3136135888 |
|
|
Oct 12 06:12:05 AM UTC 24 |
Oct 12 06:12:17 AM UTC 24 |
13890723170 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_host_stretch_timeout.1112209545 |
|
|
Oct 12 06:11:45 AM UTC 24 |
Oct 12 06:12:17 AM UTC 24 |
581232204 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_perf.4017896198 |
|
|
Oct 12 06:12:11 AM UTC 24 |
Oct 12 06:12:18 AM UTC 24 |
1769194583 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_tx.2418416116 |
|
|
Oct 12 06:12:17 AM UTC 24 |
Oct 12 06:12:19 AM UTC 24 |
72847117 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_acq.1728036675 |
|
|
Oct 12 06:12:16 AM UTC 24 |
Oct 12 06:12:20 AM UTC 24 |
1969369853 ps |
| T261 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_host_may_nack.1058698098 |
|
|
Oct 12 06:13:56 AM UTC 24 |
Oct 12 06:14:05 AM UTC 24 |
486881928 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_host_may_nack.3545407571 |
|
|
Oct 12 06:12:15 AM UTC 24 |
Oct 12 06:12:21 AM UTC 24 |
1248686386 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_stress_wr.2393919640 |
|
|
Oct 12 06:11:56 AM UTC 24 |
Oct 12 06:12:23 AM UTC 24 |
24863642217 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_bad_addr.1348010121 |
|
|
Oct 12 06:12:13 AM UTC 24 |
Oct 12 06:12:23 AM UTC 24 |
4329313134 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_tx_stretch_ctrl.4146158822 |
|
|
Oct 12 06:12:17 AM UTC 24 |
Oct 12 06:12:23 AM UTC 24 |
153961798 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_smbus_maxlen.2521135976 |
|
|
Oct 12 06:12:18 AM UTC 24 |
Oct 12 06:12:23 AM UTC 24 |
455605957 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_alert_test.2279285669 |
|
|
Oct 12 06:12:22 AM UTC 24 |
Oct 12 06:12:24 AM UTC 24 |
18490271 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_smbus_maxlen.4054329469 |
|
|
Oct 12 06:13:59 AM UTC 24 |
Oct 12 06:14:04 AM UTC 24 |
1639076168 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull.2318818010 |
|
|
Oct 12 06:12:19 AM UTC 24 |
Oct 12 06:12:24 AM UTC 24 |
445822480 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull_addr.3918718774 |
|
|
Oct 12 06:12:20 AM UTC 24 |
Oct 12 06:12:25 AM UTC 24 |
530027882 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_host_perf.3400402664 |
|
|
Oct 12 06:10:55 AM UTC 24 |
Oct 12 06:12:25 AM UTC 24 |
18532934587 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_host_override.3832493327 |
|
|
Oct 12 06:12:24 AM UTC 24 |
Oct 12 06:12:26 AM UTC 24 |
211782722 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_fmt.1103337763 |
|
|
Oct 12 06:12:24 AM UTC 24 |
Oct 12 06:12:26 AM UTC 24 |
83464973 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/18.i2c_target_stress_all.930475268 |
|
|
Oct 12 06:07:57 AM UTC 24 |
Oct 12 06:12:28 AM UTC 24 |
90524512523 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_host_perf_precise.307303926 |
|
|
Oct 12 06:12:25 AM UTC 24 |
Oct 12 06:12:29 AM UTC 24 |
223719062 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_host_error_intr.4087600672 |
|
|
Oct 12 06:12:27 AM UTC 24 |
Oct 12 06:12:31 AM UTC 24 |
90932853 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_rx.2138267029 |
|
|
Oct 12 06:12:25 AM UTC 24 |
Oct 12 06:12:31 AM UTC 24 |
1086427063 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_stretch.1440562505 |
|
|
Oct 12 06:12:32 AM UTC 24 |
Oct 12 06:12:36 AM UTC 24 |
211297139 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_stress_rd.3744688718 |
|
|
Oct 12 06:12:32 AM UTC 24 |
Oct 12 06:12:39 AM UTC 24 |
273464929 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_fmt_empty.907102006 |
|
|
Oct 12 06:12:24 AM UTC 24 |
Oct 12 06:12:43 AM UTC 24 |
399160151 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_target_stress_wr.99776055 |
|
|
Oct 12 06:10:19 AM UTC 24 |
Oct 12 06:12:51 AM UTC 24 |
71476201782 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_intr_smoke.2129101336 |
|
|
Oct 12 06:12:37 AM UTC 24 |
Oct 12 06:12:51 AM UTC 24 |
4840229073 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_acq.3404970402 |
|
|
Oct 12 06:12:52 AM UTC 24 |
Oct 12 06:12:54 AM UTC 24 |
176104266 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_timeout.1719925359 |
|
|
Oct 12 06:12:44 AM UTC 24 |
Oct 12 06:12:56 AM UTC 24 |
18339237021 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_tx.3029023369 |
|
|
Oct 12 06:12:53 AM UTC 24 |
Oct 12 06:12:57 AM UTC 24 |
437939111 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_host_stretch_timeout.3424966624 |
|
|
Oct 12 06:12:27 AM UTC 24 |
Oct 12 06:12:57 AM UTC 24 |
604379588 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_hrst.2073750135 |
|
|
Oct 12 06:12:57 AM UTC 24 |
Oct 12 06:13:02 AM UTC 24 |
638558997 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_perf.4031535083 |
|
|
Oct 12 06:12:55 AM UTC 24 |
Oct 12 06:13:02 AM UTC 24 |
509065109 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_alert_test.2536260774 |
|
|
Oct 12 06:14:04 AM UTC 24 |
Oct 12 06:14:06 AM UTC 24 |
28682460 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_bad_addr.2299305784 |
|
|
Oct 12 06:12:57 AM UTC 24 |
Oct 12 06:13:05 AM UTC 24 |
1498375014 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_watermark.1559563185 |
|
|
Oct 12 06:10:51 AM UTC 24 |
Oct 12 06:13:06 AM UTC 24 |
26350091670 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_overflow.1494765153 |
|
|
Oct 12 06:10:52 AM UTC 24 |
Oct 12 06:13:07 AM UTC 24 |
4160047776 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_acq.3369092360 |
|
|
Oct 12 06:13:03 AM UTC 24 |
Oct 12 06:13:07 AM UTC 24 |
1686724978 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_tx.2632676143 |
|
|
Oct 12 06:13:06 AM UTC 24 |
Oct 12 06:13:08 AM UTC 24 |
170288627 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_smoke.146279067 |
|
|
Oct 12 06:12:29 AM UTC 24 |
Oct 12 06:13:11 AM UTC 24 |
8468677469 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_host_may_nack.3009343954 |
|
|
Oct 12 06:13:03 AM UTC 24 |
Oct 12 06:13:11 AM UTC 24 |
1890020073 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_smbus_maxlen.1849459192 |
|
|
Oct 12 06:13:07 AM UTC 24 |
Oct 12 06:13:11 AM UTC 24 |
838394338 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_nack_txstretch.3289714996 |
|
|
Oct 12 06:13:09 AM UTC 24 |
Oct 12 06:13:13 AM UTC 24 |
154205256 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull_addr.2181471658 |
|
|
Oct 12 06:13:08 AM UTC 24 |
Oct 12 06:13:13 AM UTC 24 |
478339551 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull.993036634 |
|
|
Oct 12 06:13:08 AM UTC 24 |
Oct 12 06:13:13 AM UTC 24 |
901860118 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_host_smoke.656253114 |
|
|
Oct 12 06:12:23 AM UTC 24 |
Oct 12 06:13:13 AM UTC 24 |
4993137727 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_tx_stretch_ctrl.2710430028 |
|
|
Oct 12 06:13:07 AM UTC 24 |
Oct 12 06:13:13 AM UTC 24 |
218792616 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_alert_test.3192386916 |
|
|
Oct 12 06:13:12 AM UTC 24 |
Oct 12 06:13:14 AM UTC 24 |
47325608 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_host_override.4194524142 |
|
|
Oct 12 06:13:12 AM UTC 24 |
Oct 12 06:13:14 AM UTC 24 |
27098930 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_host_perf.1547975775 |
|
|
Oct 12 06:11:40 AM UTC 24 |
Oct 12 06:13:15 AM UTC 24 |
7236465255 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_stress_rd.252547501 |
|
|
Oct 12 06:11:56 AM UTC 24 |
Oct 12 06:13:15 AM UTC 24 |
3369329808 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_fmt.2210056623 |
|
|
Oct 12 06:13:14 AM UTC 24 |
Oct 12 06:13:16 AM UTC 24 |
349810166 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_intr_stress_wr.2287693971 |
|
|
Oct 12 06:12:39 AM UTC 24 |
Oct 12 06:13:17 AM UTC 24 |
15493748095 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_host_perf_precise.3213634454 |
|
|
Oct 12 06:13:16 AM UTC 24 |
Oct 12 06:13:19 AM UTC 24 |
148926122 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_host_error_intr.3432840415 |
|
|
Oct 12 06:13:17 AM UTC 24 |
Oct 12 06:13:20 AM UTC 24 |
122593570 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_rx.2572507954 |
|
|
Oct 12 06:13:15 AM UTC 24 |
Oct 12 06:13:21 AM UTC 24 |
504267919 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_stress_all.947405981 |
|
|
Oct 12 06:12:12 AM UTC 24 |
Oct 12 06:13:32 AM UTC 24 |
64985367627 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_overflow.1373864637 |
|
|
Oct 12 06:11:37 AM UTC 24 |
Oct 12 06:13:35 AM UTC 24 |
1821659006 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_fmt_empty.3587775582 |
|
|
Oct 12 06:13:15 AM UTC 24 |
Oct 12 06:13:42 AM UTC 24 |
2945421967 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_intr_smoke.558770145 |
|
|
Oct 12 06:13:33 AM UTC 24 |
Oct 12 06:13:43 AM UTC 24 |
1810861650 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_host_smoke.2543441301 |
|
|
Oct 12 06:13:12 AM UTC 24 |
Oct 12 06:13:44 AM UTC 24 |
1540639837 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_target_intr_stress_wr.1050163615 |
|
|
Oct 12 06:12:02 AM UTC 24 |
Oct 12 06:13:45 AM UTC 24 |
17602772854 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_acq.2445296918 |
|
|
Oct 12 06:13:45 AM UTC 24 |
Oct 12 06:13:48 AM UTC 24 |
189928077 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_tx.3961470442 |
|
|
Oct 12 06:13:46 AM UTC 24 |
Oct 12 06:13:49 AM UTC 24 |
461011319 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_host_stretch_timeout.1464319720 |
|
|
Oct 12 06:13:16 AM UTC 24 |
Oct 12 06:13:52 AM UTC 24 |
924315776 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_timeout.3527855636 |
|
|
Oct 12 06:13:43 AM UTC 24 |
Oct 12 06:13:55 AM UTC 24 |
15184036644 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_perf.3972430347 |
|
|
Oct 12 06:13:47 AM UTC 24 |
Oct 12 06:13:55 AM UTC 24 |
6272636666 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_smoke.1022957582 |
|
|
Oct 12 06:13:20 AM UTC 24 |
Oct 12 06:13:56 AM UTC 24 |
882842929 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_intr_stress_wr.3116085425 |
|
|
Oct 12 06:13:36 AM UTC 24 |
Oct 12 06:13:57 AM UTC 24 |
5119189806 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_stress_wr.2724398669 |
|
|
Oct 12 06:13:21 AM UTC 24 |
Oct 12 06:13:57 AM UTC 24 |
22939771204 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_bad_addr.2237109599 |
|
|
Oct 12 06:13:50 AM UTC 24 |
Oct 12 06:13:58 AM UTC 24 |
844816772 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_tx.3912100478 |
|
|
Oct 12 06:13:58 AM UTC 24 |
Oct 12 06:14:01 AM UTC 24 |
433785510 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_acq.3751991593 |
|
|
Oct 12 06:13:57 AM UTC 24 |
Oct 12 06:14:02 AM UTC 24 |
455901052 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_tx_stretch_ctrl.3129780627 |
|
|
Oct 12 06:13:58 AM UTC 24 |
Oct 12 06:14:04 AM UTC 24 |
153700678 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull.3765653669 |
|
|
Oct 12 06:14:00 AM UTC 24 |
Oct 12 06:14:06 AM UTC 24 |
541380709 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_nack_txstretch.1813077247 |
|
|
Oct 12 06:14:03 AM UTC 24 |
Oct 12 06:14:06 AM UTC 24 |
1939147246 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_host_override.1435501108 |
|
|
Oct 12 06:14:05 AM UTC 24 |
Oct 12 06:14:07 AM UTC 24 |
45393706 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull_addr.2281477249 |
|
|
Oct 12 06:14:02 AM UTC 24 |
Oct 12 06:14:08 AM UTC 24 |
1165680995 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_fmt.3144418772 |
|
|
Oct 12 06:14:07 AM UTC 24 |
Oct 12 06:14:10 AM UTC 24 |
92228666 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_fmt_empty.1189612512 |
|
|
Oct 12 06:14:07 AM UTC 24 |
Oct 12 06:14:13 AM UTC 24 |
174455105 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_rx.3544315043 |
|
|
Oct 12 06:14:08 AM UTC 24 |
Oct 12 06:14:14 AM UTC 24 |
375988876 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_host_perf.1939942030 |
|
|
Oct 12 06:12:25 AM UTC 24 |
Oct 12 06:14:15 AM UTC 24 |
5069753517 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_overflow.1425818794 |
|
|
Oct 12 06:13:14 AM UTC 24 |
Oct 12 06:14:17 AM UTC 24 |
4810943257 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_host_error_intr.4003195753 |
|
|
Oct 12 06:14:16 AM UTC 24 |
Oct 12 06:14:20 AM UTC 24 |
89331571 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_host_perf_precise.252241458 |
|
|
Oct 12 06:14:15 AM UTC 24 |
Oct 12 06:14:20 AM UTC 24 |
589452845 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_stress_rd.2621187490 |
|
|
Oct 12 06:13:22 AM UTC 24 |
Oct 12 06:14:22 AM UTC 24 |
5880087359 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_full.917831918 |
|
|
Oct 12 06:12:25 AM UTC 24 |
Oct 12 06:14:24 AM UTC 24 |
10226569785 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_host_perf.2046586934 |
|
|
Oct 12 06:14:10 AM UTC 24 |
Oct 12 06:14:26 AM UTC 24 |
3335512254 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_stretch.2516238012 |
|
|
Oct 12 06:14:25 AM UTC 24 |
Oct 12 06:14:29 AM UTC 24 |
249169491 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_host_perf.2360024371 |
|
|
Oct 12 06:13:16 AM UTC 24 |
Oct 12 06:14:32 AM UTC 24 |
18802137045 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_intr_smoke.286981908 |
|
|
Oct 12 06:14:27 AM UTC 24 |
Oct 12 06:14:34 AM UTC 24 |
737454340 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_smoke.1995748766 |
|
|
Oct 12 06:14:21 AM UTC 24 |
Oct 12 06:14:37 AM UTC 24 |
1882819647 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_acq.2742538452 |
|
|
Oct 12 06:14:35 AM UTC 24 |
Oct 12 06:14:38 AM UTC 24 |
531351123 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_tx.1092969372 |
|
|
Oct 12 06:14:35 AM UTC 24 |
Oct 12 06:14:39 AM UTC 24 |
432558942 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_timeout.1497985291 |
|
|
Oct 12 06:14:30 AM UTC 24 |
Oct 12 06:14:39 AM UTC 24 |
1136796799 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_rx.3913294206 |
|
|
Oct 12 06:15:23 AM UTC 24 |
Oct 12 06:15:29 AM UTC 24 |
185076880 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_watermark.2836313449 |
|
|
Oct 12 06:09:33 AM UTC 24 |
Oct 12 06:14:43 AM UTC 24 |
21518642183 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_hrst.2285761053 |
|
|
Oct 12 06:14:40 AM UTC 24 |
Oct 12 06:14:44 AM UTC 24 |
3095946873 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_overflow.2773253254 |
|
|
Oct 12 06:14:07 AM UTC 24 |
Oct 12 06:14:45 AM UTC 24 |
13525356763 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_host_smoke.3558055773 |
|
|
Oct 12 06:14:05 AM UTC 24 |
Oct 12 06:14:46 AM UTC 24 |
27845056011 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_bad_addr.1637061245 |
|
|
Oct 12 06:14:39 AM UTC 24 |
Oct 12 06:14:47 AM UTC 24 |
4530597193 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_tx.3587013378 |
|
|
Oct 12 06:14:45 AM UTC 24 |
Oct 12 06:14:48 AM UTC 24 |
179727871 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_perf.1032502030 |
|
|
Oct 12 06:14:36 AM UTC 24 |
Oct 12 06:14:48 AM UTC 24 |
3611177738 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_target_stress_wr.822681239 |
|
|
Oct 12 06:12:30 AM UTC 24 |
Oct 12 06:14:49 AM UTC 24 |
48095021053 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_host_may_nack.4209099807 |
|
|
Oct 12 06:14:44 AM UTC 24 |
Oct 12 06:14:49 AM UTC 24 |
941911958 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_acq.693122740 |
|
|
Oct 12 06:14:44 AM UTC 24 |
Oct 12 06:14:50 AM UTC 24 |
2353101164 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_smbus_maxlen.1033161376 |
|
|
Oct 12 06:14:47 AM UTC 24 |
Oct 12 06:14:51 AM UTC 24 |
536144073 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_alert_test.4007108286 |
|
|
Oct 12 06:14:50 AM UTC 24 |
Oct 12 06:14:52 AM UTC 24 |
22781371 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_nack_txstretch.816252259 |
|
|
Oct 12 06:14:49 AM UTC 24 |
Oct 12 06:14:52 AM UTC 24 |
499546440 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull.1462857317 |
|
|
Oct 12 06:14:48 AM UTC 24 |
Oct 12 06:14:53 AM UTC 24 |
2817947639 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_host_override.4257638440 |
|
|
Oct 12 06:14:51 AM UTC 24 |
Oct 12 06:14:53 AM UTC 24 |
27979443 ps |
| T1001 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull_addr.1584622675 |
|
|
Oct 12 06:14:48 AM UTC 24 |
Oct 12 06:14:53 AM UTC 24 |
10529777974 ps |
| T1002 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_stress_wr.437740678 |
|
|
Oct 12 06:14:21 AM UTC 24 |
Oct 12 06:14:54 AM UTC 24 |
11997371258 ps |
| T1003 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_watermark.3705001677 |
|
|
Oct 12 06:11:35 AM UTC 24 |
Oct 12 06:14:54 AM UTC 24 |
15682172188 ps |
| T1004 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_full.512093241 |
|
|
Oct 12 06:11:39 AM UTC 24 |
Oct 12 06:14:55 AM UTC 24 |
28404469170 ps |
| T1005 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_host_perf.396968761 |
|
|
Oct 12 06:15:23 AM UTC 24 |
Oct 12 06:15:30 AM UTC 24 |
430308279 ps |
| T1006 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_fmt.3300956171 |
|
|
Oct 12 06:14:53 AM UTC 24 |
Oct 12 06:14:57 AM UTC 24 |
138534745 ps |
| T1007 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_host_perf_precise.3663200511 |
|
|
Oct 12 06:14:55 AM UTC 24 |
Oct 12 06:14:57 AM UTC 24 |
142584509 ps |
| T1008 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_host_stretch_timeout.3499574181 |
|
|
Oct 12 06:14:15 AM UTC 24 |
Oct 12 06:14:58 AM UTC 24 |
3283956026 ps |
| T1009 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_rx.2441970864 |
|
|
Oct 12 06:14:54 AM UTC 24 |
Oct 12 06:14:59 AM UTC 24 |
580784426 ps |
| T1010 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_tx_stretch_ctrl.3549081019 |
|
|
Oct 12 06:14:45 AM UTC 24 |
Oct 12 06:15:00 AM UTC 24 |
722464344 ps |
| T1011 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/19.i2c_target_intr_stress_wr.1363429085 |
|
|
Oct 12 06:08:28 AM UTC 24 |
Oct 12 06:15:00 AM UTC 24 |
19900078193 ps |
| T1012 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_stress_rd.3371554656 |
|
|
Oct 12 06:14:23 AM UTC 24 |
Oct 12 06:15:01 AM UTC 24 |
8372464133 ps |
| T1013 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/22.i2c_host_perf.2587362171 |
|
|
Oct 12 06:10:10 AM UTC 24 |
Oct 12 06:15:01 AM UTC 24 |
13276869772 ps |
| T1014 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_fmt_empty.745769052 |
|
|
Oct 12 06:14:53 AM UTC 24 |
Oct 12 06:15:05 AM UTC 24 |
745756891 ps |
| T1015 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_target_stress_rd.2570985290 |
|
|
Oct 12 06:14:59 AM UTC 24 |
Oct 12 06:15:06 AM UTC 24 |
1983776027 ps |
| T1016 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_fmt_empty.523937273 |
|
|
Oct 12 06:15:23 AM UTC 24 |
Oct 12 06:15:32 AM UTC 24 |
519143503 ps |
| T1017 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/27.i2c_target_intr_stress_wr.3345292135 |
|
|
Oct 12 06:14:30 AM UTC 24 |
Oct 12 06:15:09 AM UTC 24 |
16558907290 ps |
| T1018 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/15.i2c_host_perf_precise.2925202716 |
|
|
Oct 12 06:05:21 AM UTC 24 |
Oct 12 06:15:09 AM UTC 24 |
23153011488 ps |
| T1019 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_acq.3300686318 |
|
|
Oct 12 06:15:07 AM UTC 24 |
Oct 12 06:15:10 AM UTC 24 |
196633221 ps |
| T1020 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/2.i2c_target_stress_wr.3677065908 |
|
|
Oct 12 05:55:12 AM UTC 24 |
Oct 12 06:15:10 AM UTC 24 |
59792145382 ps |
| T1021 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_target_smoke.2352429502 |
|
|
Oct 12 06:14:58 AM UTC 24 |
Oct 12 06:15:11 AM UTC 24 |
719478606 ps |
| T1022 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_tx.1971560383 |
|
|
Oct 12 06:15:09 AM UTC 24 |
Oct 12 06:15:12 AM UTC 24 |
221847126 ps |
| T1023 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_target_timeout.2967277247 |
|
|
Oct 12 06:15:03 AM UTC 24 |
Oct 12 06:15:13 AM UTC 24 |
2763562058 ps |
| T1024 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/13.i2c_target_stress_all.246938414 |
|
|
Oct 12 06:04:08 AM UTC 24 |
Oct 12 06:15:14 AM UTC 24 |
34659412288 ps |
| T1025 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_target_intr_smoke.4079489238 |
|
|
Oct 12 06:15:02 AM UTC 24 |
Oct 12 06:15:15 AM UTC 24 |
2880218724 ps |
| T1026 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_host_mode_toggle.4253977382 |
|
|
Oct 12 06:15:12 AM UTC 24 |
Oct 12 06:15:16 AM UTC 24 |
276455836 ps |
| T1027 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_target_perf.3892764346 |
|
|
Oct 12 06:15:10 AM UTC 24 |
Oct 12 06:15:17 AM UTC 24 |
2926545553 ps |
| T1028 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_acq.3055293005 |
|
|
Oct 12 06:15:14 AM UTC 24 |
Oct 12 06:15:17 AM UTC 24 |
479017343 ps |
| T1029 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_host_stretch_timeout.2713639991 |
|
|
Oct 12 06:14:55 AM UTC 24 |
Oct 12 06:15:18 AM UTC 24 |
4396946720 ps |
| T1030 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_tx.3048015916 |
|
|
Oct 12 06:15:15 AM UTC 24 |
Oct 12 06:15:18 AM UTC 24 |
177498635 ps |
| T1031 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_host_may_nack.299343824 |
|
|
Oct 12 06:15:13 AM UTC 24 |
Oct 12 06:15:19 AM UTC 24 |
299784161 ps |
| T1032 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_target_tx_stretch_ctrl.2173531315 |
|
|
Oct 12 06:15:16 AM UTC 24 |
Oct 12 06:15:21 AM UTC 24 |
116425032 ps |
| T1033 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_alert_test.3625575756 |
|
|
Oct 12 06:15:19 AM UTC 24 |
Oct 12 06:15:21 AM UTC 24 |
37983837 ps |
| T1034 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_target_stress_wr.2354557051 |
|
|
Oct 12 06:14:59 AM UTC 24 |
Oct 12 06:15:21 AM UTC 24 |
24804537863 ps |
| T1035 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_target_smbus_maxlen.4149569395 |
|
|
Oct 12 06:15:17 AM UTC 24 |
Oct 12 06:15:22 AM UTC 24 |
996703751 ps |
| T1036 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull.1764963173 |
|
|
Oct 12 06:15:18 AM UTC 24 |
Oct 12 06:15:22 AM UTC 24 |
2004864384 ps |
| T1037 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_target_stretch.725967014 |
|
|
Oct 12 06:13:32 AM UTC 24 |
Oct 12 06:15:24 AM UTC 24 |
5412631941 ps |
| T1038 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull_addr.3944535321 |
|
|
Oct 12 06:15:18 AM UTC 24 |
Oct 12 06:15:22 AM UTC 24 |
1104264314 ps |
| T1039 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_host_override.1526576485 |
|
|
Oct 12 06:15:21 AM UTC 24 |
Oct 12 06:15:22 AM UTC 24 |
35561012 ps |
| T1040 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_bad_addr.480808867 |
|
|
Oct 12 06:16:55 AM UTC 24 |
Oct 12 06:17:03 AM UTC 24 |
883371939 ps |
| T1041 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_host_error_intr.2837395346 |
|
|
Oct 12 06:14:56 AM UTC 24 |
Oct 12 06:15:23 AM UTC 24 |
3075778333 ps |
| T1042 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_fmt.2993525900 |
|
|
Oct 12 06:15:22 AM UTC 24 |
Oct 12 06:15:24 AM UTC 24 |
373857235 ps |
| T1043 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_host_stretch_timeout.1713930511 |
|
|
Oct 12 06:15:24 AM UTC 24 |
Oct 12 06:15:32 AM UTC 24 |
1190464227 ps |
| T1044 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_overflow.3793599553 |
|
|
Oct 12 06:12:24 AM UTC 24 |
Oct 12 06:15:37 AM UTC 24 |
9509263369 ps |
| T1045 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_host_error_intr.4025909175 |
|
|
Oct 12 06:15:24 AM UTC 24 |
Oct 12 06:15:37 AM UTC 24 |
269267251 ps |
| T1046 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_full.1899837110 |
|
|
Oct 12 06:13:15 AM UTC 24 |
Oct 12 06:15:38 AM UTC 24 |
4912498377 ps |
| T1047 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_smoke.4159462683 |
|
|
Oct 12 06:15:26 AM UTC 24 |
Oct 12 06:15:39 AM UTC 24 |
2588396081 ps |
| T1048 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_watermark.1658353762 |
|
|
Oct 12 06:12:24 AM UTC 24 |
Oct 12 06:15:40 AM UTC 24 |
3296237999 ps |
| T1049 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_target_intr_stress_wr.3544198636 |
|
|
Oct 12 06:15:02 AM UTC 24 |
Oct 12 06:15:40 AM UTC 24 |
4194888112 ps |
| T1050 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_intr_smoke.3924712873 |
|
|
Oct 12 06:15:32 AM UTC 24 |
Oct 12 06:15:41 AM UTC 24 |
2378241713 ps |
| T1051 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_tx.3992407032 |
|
|
Oct 12 06:15:39 AM UTC 24 |
Oct 12 06:15:42 AM UTC 24 |
465493875 ps |
| T1052 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_acq.3775188902 |
|
|
Oct 12 06:15:39 AM UTC 24 |
Oct 12 06:15:43 AM UTC 24 |
263382086 ps |
| T1053 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_stretch.3359449901 |
|
|
Oct 12 06:15:31 AM UTC 24 |
Oct 12 06:15:44 AM UTC 24 |
614389515 ps |
| T1054 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_bad_addr.3999263618 |
|
|
Oct 12 06:15:42 AM UTC 24 |
Oct 12 06:15:48 AM UTC 24 |
1012095479 ps |
| T1055 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_timeout.976103881 |
|
|
Oct 12 06:15:38 AM UTC 24 |
Oct 12 06:15:49 AM UTC 24 |
2430429621 ps |
| T1056 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_perf.734786589 |
|
|
Oct 12 06:15:41 AM UTC 24 |
Oct 12 06:15:49 AM UTC 24 |
5259709564 ps |
| T1057 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_host_perf_precise.3884647971 |
|
|
Oct 12 06:15:23 AM UTC 24 |
Oct 12 06:15:50 AM UTC 24 |
6222412861 ps |
| T1058 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_tx.4168310390 |
|
|
Oct 12 06:15:47 AM UTC 24 |
Oct 12 06:15:50 AM UTC 24 |
84071824 ps |
| T1059 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_acq.1119380402 |
|
|
Oct 12 06:15:45 AM UTC 24 |
Oct 12 06:15:50 AM UTC 24 |
1428763755 ps |
| T1060 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_tx_stretch_ctrl.3198064498 |
|
|
Oct 12 06:15:49 AM UTC 24 |
Oct 12 06:15:52 AM UTC 24 |
43557913 ps |
| T1061 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_alert_test.1081263689 |
|
|
Oct 12 06:15:51 AM UTC 24 |
Oct 12 06:15:53 AM UTC 24 |
50226315 ps |
| T1062 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_stress_wr.4224292749 |
|
|
Oct 12 06:15:27 AM UTC 24 |
Oct 12 06:15:53 AM UTC 24 |
41019100718 ps |
| T1063 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_stress_rd.1917854473 |
|
|
Oct 12 06:15:30 AM UTC 24 |
Oct 12 06:15:53 AM UTC 24 |
3452689731 ps |
| T1064 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_smbus_maxlen.3544282552 |
|
|
Oct 12 06:15:49 AM UTC 24 |
Oct 12 06:15:53 AM UTC 24 |
938105914 ps |
| T1065 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_host_smoke.424968726 |
|
|
Oct 12 06:16:30 AM UTC 24 |
Oct 12 06:17:00 AM UTC 24 |
4974404339 ps |
| T1066 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull_addr.7215575 |
|
|
Oct 12 06:15:50 AM UTC 24 |
Oct 12 06:15:56 AM UTC 24 |
897363453 ps |
| T1067 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_host_override.4196302068 |
|
|
Oct 12 06:15:54 AM UTC 24 |
Oct 12 06:15:56 AM UTC 24 |
154844985 ps |
| T1068 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull.2928942559 |
|
|
Oct 12 06:15:50 AM UTC 24 |
Oct 12 06:15:56 AM UTC 24 |
2171726299 ps |
| T1069 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_fmt.1148487863 |
|
|
Oct 12 06:15:54 AM UTC 24 |
Oct 12 06:15:57 AM UTC 24 |
474932095 ps |
| T1070 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/17.i2c_target_stress_wr.2955292663 |
|
|
Oct 12 06:06:56 AM UTC 24 |
Oct 12 06:16:01 AM UTC 24 |
43181032057 ps |
| T1071 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_smoke.3682980492 |
|
|
Oct 12 06:16:37 AM UTC 24 |
Oct 12 06:17:02 AM UTC 24 |
773758664 ps |
| T1072 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_host_smoke.3256290212 |
|
|
Oct 12 06:14:50 AM UTC 24 |
Oct 12 06:16:03 AM UTC 24 |
6248587891 ps |
| T1073 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_rx.2227846449 |
|
|
Oct 12 06:15:56 AM UTC 24 |
Oct 12 06:16:05 AM UTC 24 |
224541742 ps |
| T1074 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_host_error_intr.3480366519 |
|
|
Oct 12 06:16:03 AM UTC 24 |
Oct 12 06:16:06 AM UTC 24 |
552804923 ps |
| T1075 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_overflow.3324323073 |
|
|
Oct 12 06:14:52 AM UTC 24 |
Oct 12 06:16:06 AM UTC 24 |
3281812039 ps |
| T1076 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_host_smoke.1308212043 |
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Oct 12 06:15:21 AM UTC 24 |
Oct 12 06:16:07 AM UTC 24 |
914748047 ps |
| T1077 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_fmt_empty.1648039696 |
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Oct 12 06:15:55 AM UTC 24 |
Oct 12 06:16:08 AM UTC 24 |
406999649 ps |
| T1078 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_intr_stress_wr.1186737333 |
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Oct 12 06:16:09 AM UTC 24 |
Oct 12 06:16:14 AM UTC 24 |
272197432 ps |
| T1079 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/14.i2c_host_perf.1365482428 |
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Oct 12 06:04:22 AM UTC 24 |
Oct 12 06:16:15 AM UTC 24 |
75176864999 ps |
| T1080 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/29.i2c_host_may_nack.1299707639 |
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Oct 12 06:15:44 AM UTC 24 |
Oct 12 06:16:15 AM UTC 24 |
4303477305 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_smoke.2193169860 |
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Oct 12 06:16:04 AM UTC 24 |
Oct 12 06:16:15 AM UTC 24 |
1017074805 ps |
| T1081 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_intr_smoke.1141836468 |
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Oct 12 06:16:08 AM UTC 24 |
Oct 12 06:16:16 AM UTC 24 |
1314625854 ps |
| T1082 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/31.i2c_target_timeout.2109040931 |
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Oct 12 06:16:47 AM UTC 24 |
Oct 12 06:17:00 AM UTC 24 |
4989411917 ps |
| T1083 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/7.i2c_target_stress_wr.2315298688 |
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Oct 12 05:59:39 AM UTC 24 |
Oct 12 06:16:17 AM UTC 24 |
54493259860 ps |
| T1084 |
/workspaces/repo/scratch/os_regression_2024_10_11/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_acq.2207734228 |
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Oct 12 06:16:16 AM UTC 24 |
Oct 12 06:16:19 AM UTC 24 |
3329890137 ps |