PWM Simulation Results

Thursday March 07 2024 20:02:34 UTC

GitHub Revision: `36c168c253`

Branch: os_regression

Simulator: XCELIUM

Build randomization enabled with --build-seed 132539995404104259171688804297348475616986265371189902218943342622053800053

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	pwm_smoke	8.000s	3.176ms	50	50	100.00
V1	csr_hw_reset	pwm_csr_hw_reset	7.000s	16.918us	5	5	100.00
V1	csr_rw	pwm_csr_rw	9.000s	37.284us	20	20	100.00
V1	csr_bit_bash	pwm_csr_bit_bash	8.000s	341.983us	5	5	100.00
V1	csr_aliasing	pwm_csr_aliasing	5.000s	357.493us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	pwm_csr_mem_rw_with_rand_reset	5.000s	52.602us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	pwm_csr_rw	9.000s	37.284us	20	20	100.00
		pwm_csr_aliasing	5.000s	357.493us	5	5	100.00
V1		TOTAL			105	105	100.00
V2	dutycycle	pwm_rand_output	1.250m	5.390ms	49	50	98.00
V2	pulse	pwm_rand_output	1.250m	5.390ms	49	50	98.00
V2	blink	pwm_rand_output	1.250m	5.390ms	49	50	98.00
V2	heartbeat	pwm_rand_output	1.250m	5.390ms	49	50	98.00
V2	resolution	pwm_rand_output	1.250m	5.390ms	49	50	98.00
V2	multi_channel	pwm_rand_output	1.250m	5.390ms	49	50	98.00
V2	polarity	pwm_rand_output	1.250m	5.390ms	49	50	98.00
V2	phase	pwm_rand_output	1.250m	5.390ms	49	50	98.00
V2	lowpower	pwm_rand_output	1.250m	5.390ms	49	50	98.00
V2	perf	pwm_perf	51.000s	20.589ms	50	50	100.00
V2	stress_all	pwm_stress_all	4.333m	111.481ms	47	50	94.00
V2	alert_test	pwm_alert_test	5.000s	14.865us	50	50	100.00
V2	intr_test	pwm_intr_test	4.000s	20.061us	50	50	100.00
V2	tl_d_oob_addr_access	pwm_tl_errors	7.000s	44.455us	20	20	100.00
V2	tl_d_illegal_access	pwm_tl_errors	7.000s	44.455us	20	20	100.00
V2	tl_d_outstanding_access	pwm_csr_hw_reset	7.000s	16.918us	5	5	100.00
		pwm_csr_rw	9.000s	37.284us	20	20	100.00
		pwm_csr_aliasing	5.000s	357.493us	5	5	100.00
		pwm_same_csr_outstanding	5.000s	64.802us	20	20	100.00
V2	tl_d_partial_access	pwm_csr_hw_reset	7.000s	16.918us	5	5	100.00
		pwm_csr_rw	9.000s	37.284us	20	20	100.00
		pwm_csr_aliasing	5.000s	357.493us	5	5	100.00
		pwm_same_csr_outstanding	5.000s	64.802us	20	20	100.00
V2		TOTAL			286	290	98.62
V2S	tl_intg_err	pwm_tl_intg_err	7.000s	317.211us	20	20	100.00
		pwm_sec_cm	4.000s	286.564us	5	5	100.00
V2S	sec_cm_bus_integrity	pwm_tl_intg_err	7.000s	317.211us	20	20	100.00
V2S		TOTAL			25	25	100.00
V3		TOTAL			0	0	--
		TOTAL			416	420	99.05

Testplan Progress

Items	Total	Written	Passing	Progress
V1	6	6	6	100.00
V2	7	7	5	71.43
V2S	2	2	2	100.00

Coverage Results

Coverage Dashboard

Score	Block	Branch	Statement	Expression	Toggle	Fsm	Assertion	CoverGroup
98.30	99.24	98.65	99.80	94.76	94.92	--	100.00	99.01

Failure Buckets

UVM_ERROR (pwm_scoreboard.sv:251) scoreboard [scoreboard] has 4 failures:

Test pwm_stress_all has 3 failures.

20.pwm_stress_all.68856256123276532743975870249036472038068623223662347443316147735712814902250
Line 3157, in log /container/opentitan-public/scratch/os_regression/pwm-sim-xcelium/20.pwm_stress_all/latest/run.log

  UVM_ERROR @ 50724282363 ps: (pwm_scoreboard.sv:251) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard]
   PWM :: Channel = [1] did not MATCH
  UVM_INFO @ 50724282363 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

44.pwm_stress_all.85458151438139466192056472943565868535514851186509236074868782254155593472468
Line 485, in log /container/opentitan-public/scratch/os_regression/pwm-sim-xcelium/44.pwm_stress_all/latest/run.log

  UVM_ERROR @ 195774084620 ps: (pwm_scoreboard.sv:251) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard]
   PWM :: Channel = [1] did not MATCH
  UVM_INFO @ 195774084620 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 1 more failures.

Test pwm_rand_output has 1 failures.

25.pwm_rand_output.85547829885693551417150221324016417012091668389790622750925247519872491414980
Line 5688340, in log /container/opentitan-public/scratch/os_regression/pwm-sim-xcelium/25.pwm_rand_output/latest/run.log

  UVM_ERROR @ 5390443936 ps: (pwm_scoreboard.sv:251) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard]
   PWM :: Channel = [5] did not MATCH
  UVM_INFO @ 5390443936 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---