df66f8a42e
Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
---|---|---|---|---|---|---|---|
V1 | smoke | pwm_smoke | 5.000s | 523.908us | 50 | 50 | 100.00 |
V1 | csr_hw_reset | pwm_csr_hw_reset | 6.000s | 19.172us | 5 | 5 | 100.00 |
V1 | csr_rw | pwm_csr_rw | 3.000s | 14.678us | 20 | 20 | 100.00 |
V1 | csr_bit_bash | pwm_csr_bit_bash | 16.000s | 403.686us | 5 | 5 | 100.00 |
V1 | csr_aliasing | pwm_csr_aliasing | 10.000s | 94.179us | 5 | 5 | 100.00 |
V1 | csr_mem_rw_with_rand_reset | pwm_csr_mem_rw_with_rand_reset | 5.000s | 104.301us | 20 | 20 | 100.00 |
V1 | regwen_csr_and_corresponding_lockable_csr | pwm_csr_rw | 3.000s | 14.678us | 20 | 20 | 100.00 |
pwm_csr_aliasing | 10.000s | 94.179us | 5 | 5 | 100.00 | ||
V1 | TOTAL | 105 | 105 | 100.00 | |||
V2 | dutycycle | pwm_rand_output | 1.483m | 41.999ms | 50 | 50 | 100.00 |
V2 | pulse | pwm_rand_output | 1.483m | 41.999ms | 50 | 50 | 100.00 |
V2 | blink | pwm_rand_output | 1.483m | 41.999ms | 50 | 50 | 100.00 |
V2 | heartbeat | pwm_rand_output | 1.483m | 41.999ms | 50 | 50 | 100.00 |
V2 | resolution | pwm_rand_output | 1.483m | 41.999ms | 50 | 50 | 100.00 |
V2 | multi_channel | pwm_rand_output | 1.483m | 41.999ms | 50 | 50 | 100.00 |
V2 | polarity | pwm_rand_output | 1.483m | 41.999ms | 50 | 50 | 100.00 |
V2 | phase | pwm_rand_output | 1.483m | 41.999ms | 50 | 50 | 100.00 |
V2 | lowpower | pwm_rand_output | 1.483m | 41.999ms | 50 | 50 | 100.00 |
V2 | perf | pwm_perf | 52.000s | 10.830ms | 50 | 50 | 100.00 |
V2 | stress_all | pwm_stress_all | 4.817m | 295.965ms | 47 | 50 | 94.00 |
V2 | alert_test | pwm_alert_test | 3.000s | 18.262us | 50 | 50 | 100.00 |
V2 | intr_test | pwm_intr_test | 8.000s | 14.938us | 50 | 50 | 100.00 |
V2 | tl_d_oob_addr_access | pwm_tl_errors | 9.000s | 38.865us | 20 | 20 | 100.00 |
V2 | tl_d_illegal_access | pwm_tl_errors | 9.000s | 38.865us | 20 | 20 | 100.00 |
V2 | tl_d_outstanding_access | pwm_csr_hw_reset | 6.000s | 19.172us | 5 | 5 | 100.00 |
pwm_csr_rw | 3.000s | 14.678us | 20 | 20 | 100.00 | ||
pwm_csr_aliasing | 10.000s | 94.179us | 5 | 5 | 100.00 | ||
pwm_same_csr_outstanding | 9.000s | 37.812us | 20 | 20 | 100.00 | ||
V2 | tl_d_partial_access | pwm_csr_hw_reset | 6.000s | 19.172us | 5 | 5 | 100.00 |
pwm_csr_rw | 3.000s | 14.678us | 20 | 20 | 100.00 | ||
pwm_csr_aliasing | 10.000s | 94.179us | 5 | 5 | 100.00 | ||
pwm_same_csr_outstanding | 9.000s | 37.812us | 20 | 20 | 100.00 | ||
V2 | TOTAL | 287 | 290 | 98.97 | |||
V2S | tl_intg_err | pwm_tl_intg_err | 11.000s | 672.823us | 20 | 20 | 100.00 |
pwm_sec_cm | 3.000s | 87.720us | 5 | 5 | 100.00 | ||
V2S | sec_cm_bus_integrity | pwm_tl_intg_err | 11.000s | 672.823us | 20 | 20 | 100.00 |
V2S | TOTAL | 25 | 25 | 100.00 | |||
V3 | TOTAL | 0 | 0 | -- | |||
TOTAL | 417 | 420 | 99.29 |
Items | Total | Written | Passing | Progress |
---|---|---|---|---|
V1 | 6 | 6 | 6 | 100.00 |
V2 | 7 | 7 | 6 | 85.71 |
V2S | 2 | 2 | 2 | 100.00 |
Score | Block | Branch | Statement | Expression | Toggle | Fsm | Assertion | CoverGroup |
---|---|---|---|---|---|---|---|---|
98.50 | 99.55 | 99.20 | 99.92 | 94.86 | 94.92 | -- | 100.00 | 99.01 |
UVM_ERROR (pwm_scoreboard.sv:251) scoreboard [scoreboard]
has 3 failures:
8.pwm_stress_all.53678549138119106434360761014120264198554379138083744732974554846147261240348
Line 164322, in log /container/opentitan-public/scratch/os_regression/pwm-sim-xcelium/8.pwm_stress_all/latest/run.log
UVM_ERROR @ 22542436063 ps: (pwm_scoreboard.sv:251) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard]
PWM :: Channel = [0] did not MATCH
UVM_INFO @ 22542436063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
37.pwm_stress_all.108546675166792780323490410685985727785017802408071162154710294710405587437434
Line 1099, in log /container/opentitan-public/scratch/os_regression/pwm-sim-xcelium/37.pwm_stress_all/latest/run.log
UVM_ERROR @ 45172440638 ps: (pwm_scoreboard.sv:251) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard]
PWM :: Channel = [1] did not MATCH
UVM_INFO @ 45172440638 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.