PWM Simulation Results

Thursday June 27 2024 23:02:31 UTC

GitHub Revision: 8db2a18db1

Branch: os_regression

Testplan

Simulator: XCELIUM

Build randomization enabled with --build-seed 100513533386727882033709335126269317053614297947080434367729937568368619502352

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke pwm_smoke 14.000s 511.895us 50 50 100.00
V1 csr_hw_reset pwm_csr_hw_reset 3.000s 15.963us 5 5 100.00
V1 csr_rw pwm_csr_rw 3.000s 148.618us 20 20 100.00
V1 csr_bit_bash pwm_csr_bit_bash 11.000s 937.518us 5 5 100.00
V1 csr_aliasing pwm_csr_aliasing 4.000s 34.787us 5 5 100.00
V1 csr_mem_rw_with_rand_reset pwm_csr_mem_rw_with_rand_reset 3.000s 174.213us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr pwm_csr_rw 3.000s 148.618us 20 20 100.00
pwm_csr_aliasing 4.000s 34.787us 5 5 100.00
V1 TOTAL 105 105 100.00
V2 dutycycle pwm_rand_output 1.400m 11.670ms 50 50 100.00
V2 pulse pwm_rand_output 1.400m 11.670ms 50 50 100.00
V2 blink pwm_rand_output 1.400m 11.670ms 50 50 100.00
V2 heartbeat pwm_rand_output 1.400m 11.670ms 50 50 100.00
V2 resolution pwm_rand_output 1.400m 11.670ms 50 50 100.00
V2 multi_channel pwm_rand_output 1.400m 11.670ms 50 50 100.00
V2 polarity pwm_rand_output 1.400m 11.670ms 50 50 100.00
V2 phase pwm_rand_output 1.400m 11.670ms 50 50 100.00
V2 lowpower pwm_rand_output 1.400m 11.670ms 50 50 100.00
V2 perf pwm_perf 50.000s 43.748ms 49 50 98.00
V2 stress_all pwm_stress_all 4.700m 66.855ms 49 50 98.00
V2 alert_test pwm_alert_test 7.000s 24.168us 50 50 100.00
V2 intr_test pwm_intr_test 3.000s 12.381us 50 50 100.00
V2 tl_d_oob_addr_access pwm_tl_errors 6.000s 47.461us 20 20 100.00
V2 tl_d_illegal_access pwm_tl_errors 6.000s 47.461us 20 20 100.00
V2 tl_d_outstanding_access pwm_csr_hw_reset 3.000s 15.963us 5 5 100.00
pwm_csr_rw 3.000s 148.618us 20 20 100.00
pwm_csr_aliasing 4.000s 34.787us 5 5 100.00
pwm_same_csr_outstanding 3.000s 274.948us 20 20 100.00
V2 tl_d_partial_access pwm_csr_hw_reset 3.000s 15.963us 5 5 100.00
pwm_csr_rw 3.000s 148.618us 20 20 100.00
pwm_csr_aliasing 4.000s 34.787us 5 5 100.00
pwm_same_csr_outstanding 3.000s 274.948us 20 20 100.00
V2 TOTAL 288 290 99.31
V2S tl_intg_err pwm_tl_intg_err 5.000s 504.045us 20 20 100.00
pwm_sec_cm 3.000s 43.315us 5 5 100.00
V2S sec_cm_bus_integrity pwm_tl_intg_err 5.000s 504.045us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 TOTAL 0 0 --
TOTAL 418 420 99.52

Testplan Progress

Items Total Written Passing Progress
V1 6 6 6 100.00
V2 7 7 5 71.43
V2S 2 2 2 100.00

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
98.51 99.48 99.08 99.92 95.03 94.92 -- 100.00 99.01

Failure Buckets

Past Results