de38ce313c
Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
---|---|---|---|---|---|---|---|
V1 | smoke | pwm_smoke | 5.000s | 1.045ms | 50 | 50 | 100.00 |
V1 | csr_hw_reset | pwm_csr_hw_reset | 3.000s | 29.094us | 5 | 5 | 100.00 |
V1 | csr_rw | pwm_csr_rw | 3.000s | 67.016us | 20 | 20 | 100.00 |
V1 | csr_bit_bash | pwm_csr_bit_bash | 12.000s | 12.692ms | 5 | 5 | 100.00 |
V1 | csr_aliasing | pwm_csr_aliasing | 4.000s | 72.483us | 5 | 5 | 100.00 |
V1 | csr_mem_rw_with_rand_reset | pwm_csr_mem_rw_with_rand_reset | 3.000s | 43.690us | 20 | 20 | 100.00 |
V1 | regwen_csr_and_corresponding_lockable_csr | pwm_csr_rw | 3.000s | 67.016us | 20 | 20 | 100.00 |
pwm_csr_aliasing | 4.000s | 72.483us | 5 | 5 | 100.00 | ||
V1 | TOTAL | 105 | 105 | 100.00 | |||
V2 | dutycycle | pwm_rand_output | 1.067m | 21.878ms | 50 | 50 | 100.00 |
V2 | pulse | pwm_rand_output | 1.067m | 21.878ms | 50 | 50 | 100.00 |
V2 | blink | pwm_rand_output | 1.067m | 21.878ms | 50 | 50 | 100.00 |
V2 | heartbeat | pwm_rand_output | 1.067m | 21.878ms | 50 | 50 | 100.00 |
V2 | resolution | pwm_rand_output | 1.067m | 21.878ms | 50 | 50 | 100.00 |
V2 | multi_channel | pwm_rand_output | 1.067m | 21.878ms | 50 | 50 | 100.00 |
V2 | polarity | pwm_rand_output | 1.067m | 21.878ms | 50 | 50 | 100.00 |
V2 | phase | pwm_rand_output | 1.067m | 21.878ms | 50 | 50 | 100.00 |
V2 | lowpower | pwm_rand_output | 1.067m | 21.878ms | 50 | 50 | 100.00 |
V2 | perf | pwm_perf | 50.000s | 10.502ms | 50 | 50 | 100.00 |
V2 | stress_all | pwm_stress_all | 4.400m | 53.518ms | 46 | 50 | 92.00 |
V2 | alert_test | pwm_alert_test | 3.000s | 15.791us | 50 | 50 | 100.00 |
V2 | intr_test | pwm_intr_test | 3.000s | 20.886us | 50 | 50 | 100.00 |
V2 | tl_d_oob_addr_access | pwm_tl_errors | 6.000s | 521.470us | 20 | 20 | 100.00 |
V2 | tl_d_illegal_access | pwm_tl_errors | 6.000s | 521.470us | 20 | 20 | 100.00 |
V2 | tl_d_outstanding_access | pwm_csr_hw_reset | 3.000s | 29.094us | 5 | 5 | 100.00 |
pwm_csr_rw | 3.000s | 67.016us | 20 | 20 | 100.00 | ||
pwm_csr_aliasing | 4.000s | 72.483us | 5 | 5 | 100.00 | ||
pwm_same_csr_outstanding | 3.000s | 72.329us | 20 | 20 | 100.00 | ||
V2 | tl_d_partial_access | pwm_csr_hw_reset | 3.000s | 29.094us | 5 | 5 | 100.00 |
pwm_csr_rw | 3.000s | 67.016us | 20 | 20 | 100.00 | ||
pwm_csr_aliasing | 4.000s | 72.483us | 5 | 5 | 100.00 | ||
pwm_same_csr_outstanding | 3.000s | 72.329us | 20 | 20 | 100.00 | ||
V2 | TOTAL | 286 | 290 | 98.62 | |||
V2S | tl_intg_err | pwm_tl_intg_err | 5.000s | 128.760us | 20 | 20 | 100.00 |
pwm_sec_cm | 3.000s | 38.385us | 5 | 5 | 100.00 | ||
V2S | sec_cm_bus_integrity | pwm_tl_intg_err | 5.000s | 128.760us | 20 | 20 | 100.00 |
V2S | TOTAL | 25 | 25 | 100.00 | |||
V3 | TOTAL | 0 | 0 | -- | |||
TOTAL | 416 | 420 | 99.05 |
Items | Total | Written | Passing | Progress |
---|---|---|---|---|
V1 | 6 | 6 | 6 | 100.00 |
V2 | 7 | 7 | 6 | 85.71 |
V2S | 2 | 2 | 2 | 100.00 |
Score | Block | Branch | Statement | Expression | Toggle | Fsm | Assertion | CoverGroup |
---|---|---|---|---|---|---|---|---|
98.62 | 99.59 | 99.26 | 99.88 | 95.44 | 94.92 | -- | 100.00 | 99.01 |
UVM_ERROR (pwm_scoreboard.sv:251) scoreboard [scoreboard]
has 4 failures:
13.pwm_stress_all.41673996376872971093924020106433973002387926433294884053446421847536390354862
Line 72231, in log /container/opentitan-public/scratch/os_regression/pwm-sim-xcelium/13.pwm_stress_all/latest/run.log
UVM_ERROR @ 127980364137 ps: (pwm_scoreboard.sv:251) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard]
PWM :: Channel = [2] did not MATCH
UVM_INFO @ 127980364137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
17.pwm_stress_all.97323099967361075797116142839255682032324260505058604638731455786393835662842
Line 263521, in log /container/opentitan-public/scratch/os_regression/pwm-sim-xcelium/17.pwm_stress_all/latest/run.log
UVM_ERROR @ 11891993767 ps: (pwm_scoreboard.sv:251) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard]
PWM :: Channel = [2] did not MATCH
UVM_INFO @ 11891993767 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.