PWM Simulation Results

Saturday July 27 2024 23:02:25 UTC

GitHub Revision: eca25c0ff8

Branch: os_regression

Testplan

Simulator: XCELIUM

Build randomization enabled with --build-seed 6528518538521148567139195500524222710943459299328477504124649113671643189924

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke pwm_smoke 5.000s 8.488ms 50 50 100.00
V1 csr_hw_reset pwm_csr_hw_reset 3.000s 41.549us 5 5 100.00
V1 csr_rw pwm_csr_rw 3.000s 33.930us 20 20 100.00
V1 csr_bit_bash pwm_csr_bit_bash 11.000s 3.732ms 5 5 100.00
V1 csr_aliasing pwm_csr_aliasing 3.000s 249.852us 5 5 100.00
V1 csr_mem_rw_with_rand_reset pwm_csr_mem_rw_with_rand_reset 5.000s 32.446us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr pwm_csr_rw 3.000s 33.930us 20 20 100.00
pwm_csr_aliasing 3.000s 249.852us 5 5 100.00
V1 TOTAL 105 105 100.00
V2 dutycycle pwm_rand_output 3.550m 33.865ms 50 50 100.00
V2 pulse pwm_rand_output 3.550m 33.865ms 50 50 100.00
V2 blink pwm_rand_output 3.550m 33.865ms 50 50 100.00
V2 heartbeat pwm_rand_output 3.550m 33.865ms 50 50 100.00
V2 resolution pwm_rand_output 3.550m 33.865ms 50 50 100.00
V2 multi_channel pwm_rand_output 3.550m 33.865ms 50 50 100.00
V2 polarity pwm_rand_output 3.550m 33.865ms 50 50 100.00
V2 phase pwm_rand_output 3.550m 33.865ms 50 50 100.00
V2 lowpower pwm_rand_output 3.550m 33.865ms 50 50 100.00
V2 perf pwm_perf 51.000s 149.981ms 50 50 100.00
V2 stress_all pwm_stress_all 4.500m 66.150ms 45 50 90.00
V2 alert_test pwm_alert_test 3.000s 14.633us 50 50 100.00
V2 intr_test pwm_intr_test 3.000s 17.950us 50 50 100.00
V2 tl_d_oob_addr_access pwm_tl_errors 6.000s 50.482us 20 20 100.00
V2 tl_d_illegal_access pwm_tl_errors 6.000s 50.482us 20 20 100.00
V2 tl_d_outstanding_access pwm_csr_hw_reset 3.000s 41.549us 5 5 100.00
pwm_csr_rw 3.000s 33.930us 20 20 100.00
pwm_csr_aliasing 3.000s 249.852us 5 5 100.00
pwm_same_csr_outstanding 4.000s 131.437us 20 20 100.00
V2 tl_d_partial_access pwm_csr_hw_reset 3.000s 41.549us 5 5 100.00
pwm_csr_rw 3.000s 33.930us 20 20 100.00
pwm_csr_aliasing 3.000s 249.852us 5 5 100.00
pwm_same_csr_outstanding 4.000s 131.437us 20 20 100.00
V2 TOTAL 285 290 98.28
V2S tl_intg_err pwm_tl_intg_err 5.000s 268.562us 20 20 100.00
pwm_sec_cm 3.000s 320.224us 5 5 100.00
V2S sec_cm_bus_integrity pwm_tl_intg_err 5.000s 268.562us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 TOTAL 0 0 --
TOTAL 415 420 98.81

Testplan Progress

Items Total Written Passing Progress
V1 6 6 6 100.00
V2 7 7 6 85.71
V2S 2 2 2 100.00

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
98.49 99.52 99.14 99.92 94.89 94.92 -- 100.00 99.01

Failure Buckets

Past Results