PWM Simulation Results

Sunday July 28 2024 23:02:28 UTC

GitHub Revision: eca25c0ff8

Branch: os_regression

Testplan

Simulator: XCELIUM

Build randomization enabled with --build-seed 35694793988142953409419697382868702825984401131209466119932029294128690866559

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke pwm_smoke 14.000s 2.552ms 50 50 100.00
V1 csr_hw_reset pwm_csr_hw_reset 3.000s 16.699us 5 5 100.00
V1 csr_rw pwm_csr_rw 4.000s 30.595us 20 20 100.00
V1 csr_bit_bash pwm_csr_bit_bash 11.000s 679.188us 5 5 100.00
V1 csr_aliasing pwm_csr_aliasing 8.000s 1.465ms 5 5 100.00
V1 csr_mem_rw_with_rand_reset pwm_csr_mem_rw_with_rand_reset 8.000s 58.843us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr pwm_csr_rw 4.000s 30.595us 20 20 100.00
pwm_csr_aliasing 8.000s 1.465ms 5 5 100.00
V1 TOTAL 105 105 100.00
V2 dutycycle pwm_rand_output 1.067m 10.503ms 50 50 100.00
V2 pulse pwm_rand_output 1.067m 10.503ms 50 50 100.00
V2 blink pwm_rand_output 1.067m 10.503ms 50 50 100.00
V2 heartbeat pwm_rand_output 1.067m 10.503ms 50 50 100.00
V2 resolution pwm_rand_output 1.067m 10.503ms 50 50 100.00
V2 multi_channel pwm_rand_output 1.067m 10.503ms 50 50 100.00
V2 polarity pwm_rand_output 1.067m 10.503ms 50 50 100.00
V2 phase pwm_rand_output 1.067m 10.503ms 50 50 100.00
V2 lowpower pwm_rand_output 1.067m 10.503ms 50 50 100.00
V2 perf pwm_perf 52.000s 10.943ms 50 50 100.00
V2 stress_all pwm_stress_all 4.183m 883.465ms 49 50 98.00
V2 alert_test pwm_alert_test 7.000s 21.561us 50 50 100.00
V2 intr_test pwm_intr_test 3.000s 12.750us 50 50 100.00
V2 tl_d_oob_addr_access pwm_tl_errors 11.000s 141.882us 20 20 100.00
V2 tl_d_illegal_access pwm_tl_errors 11.000s 141.882us 20 20 100.00
V2 tl_d_outstanding_access pwm_csr_hw_reset 3.000s 16.699us 5 5 100.00
pwm_csr_rw 4.000s 30.595us 20 20 100.00
pwm_csr_aliasing 8.000s 1.465ms 5 5 100.00
pwm_same_csr_outstanding 3.000s 32.995us 20 20 100.00
V2 tl_d_partial_access pwm_csr_hw_reset 3.000s 16.699us 5 5 100.00
pwm_csr_rw 4.000s 30.595us 20 20 100.00
pwm_csr_aliasing 8.000s 1.465ms 5 5 100.00
pwm_same_csr_outstanding 3.000s 32.995us 20 20 100.00
V2 TOTAL 289 290 99.66
V2S tl_intg_err pwm_tl_intg_err 4.000s 69.903us 20 20 100.00
pwm_sec_cm 4.000s 72.351us 5 5 100.00
V2S sec_cm_bus_integrity pwm_tl_intg_err 4.000s 69.903us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 TOTAL 0 0 --
TOTAL 419 420 99.76

Testplan Progress

Items Total Written Passing Progress
V1 6 6 6 100.00
V2 7 7 6 85.71
V2S 2 2 2 100.00

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
98.40 99.45 99.01 99.84 94.76 94.92 -- 100.00 99.01

Failure Buckets

Past Results