Module : prim_clock_mux2
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_14/rv_dm-sim-vcs/default/sim-vcs/../src/lowrisc_prim_abstract_clock_mux2_0/prim_clock_mux2.sv
Module self-instances :
| NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
| tb.dut.u_prim_clock_mux2 | |||||||
| tb.dut.u_prim_rst_n_mux2 | |||||||
| tb.dut.dap.i_dmi_jtag_tap.i_tck_inv.gen_generic.u_impl_generic.gen_scan.i_dft_tck_mux | |||||||
| tb.dut.dap.i_dmi_cdc.u_rst_mux |
Module Instance : tb.dut.u_prim_clock_mux2
Instance :
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
Instance's subtree :
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
| 100.00 | 100.00 | 100.00 | 100.00 |
Parent :
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
| 99.04 | 100.00 | 97.62 | 97.60 | 100.00 | 100.00 | dut |
Subtrees :
| NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
| gen_generic.u_impl_generic | 100.00 | 100.00 | 100.00 | 100.00 |
Module Instance : tb.dut.u_prim_rst_n_mux2
Instance :
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
Instance's subtree :
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
| 100.00 | 100.00 | 100.00 | 100.00 |
Parent :
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
| 99.04 | 100.00 | 97.62 | 97.60 | 100.00 | 100.00 | dut |
Subtrees :
| NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
| gen_generic.u_impl_generic | 100.00 | 100.00 | 100.00 | 100.00 |
Module Instance : tb.dut.dap.i_dmi_jtag_tap.i_tck_inv.gen_generic.u_impl_generic.gen_scan.i_dft_tck_mux
Instance :
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
Instance's subtree :
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
| 100.00 | 100.00 | 100.00 | 100.00 |
Parent :
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
| gen_generic.u_impl_generic |
Subtrees :
| NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
| gen_generic.u_impl_generic | 100.00 | 100.00 | 100.00 | 100.00 |
Module Instance : tb.dut.dap.i_dmi_cdc.u_rst_mux
Instance :
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
Instance's subtree :
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
| 100.00 | 100.00 | 100.00 | 100.00 |
Parent :
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
| 100.00 | 100.00 | 100.00 | i_dmi_cdc |
Subtrees :
| NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
| gen_generic.u_impl_generic | 100.00 | 100.00 | 100.00 | 100.00 |