SPI_DEVICE/1R1W Simulation Results

Thursday July 18 2024 23:02:12 UTC

GitHub Revision: `974aaab627`

Branch: os_regression

Simulator: VCS

Build randomization enabled with --build-seed 46057207235241274571178436692064798722168129065126426307050395083305588858879

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	spi_device_flash_and_tpm	13.184m	104.270ms	50	50	100.00
V1	csr_hw_reset	spi_device_csr_hw_reset	1.480s	80.041us	5	5	100.00
V1	csr_rw	spi_device_csr_rw	2.760s	119.074us	20	20	100.00
V1	csr_bit_bash	spi_device_csr_bit_bash	27.050s	1.847ms	5	5	100.00
V1	csr_aliasing	spi_device_csr_aliasing	27.040s	2.256ms	5	5	100.00
V1	csr_mem_rw_with_rand_reset	spi_device_csr_mem_rw_with_rand_reset	4.130s	57.068us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	spi_device_csr_rw	2.760s	119.074us	20	20	100.00
		spi_device_csr_aliasing	27.040s	2.256ms	5	5	100.00
V1	mem_walk	spi_device_mem_walk	0.720s	37.436us	5	5	100.00
V1	mem_partial_access	spi_device_mem_partial_access	2.360s	241.336us	5	5	100.00
V1		TOTAL			115	115	100.00
V2	csb_read	spi_device_csb_read	0.890s	16.148us	50	50	100.00
V2	mem_parity	spi_device_mem_parity	0.750s	7.990us	0	20	0.00
V2	mem_cfg	spi_device_ram_cfg	0.810s	35.824us	1	1	100.00
V2	tpm_read	spi_device_tpm_rw	8.730s	1.113ms	50	50	100.00
V2	tpm_write	spi_device_tpm_rw	8.730s	1.113ms	50	50	100.00
V2	tpm_hw_reg	spi_device_tpm_read_hw_reg	26.920s	16.380ms	50	50	100.00
		spi_device_tpm_sts_read	1.080s	131.029us	50	50	100.00
V2	tpm_fully_random_case	spi_device_tpm_all	48.960s	9.800ms	50	50	100.00
V2	pass_cmd_filtering	spi_device_pass_cmd_filtering	43.810s	63.000ms	50	50	100.00
		spi_device_flash_all	8.076m	85.214ms	50	50	100.00
V2	pass_addr_translation	spi_device_pass_addr_payload_swap	34.830s	10.006ms	50	50	100.00
		spi_device_flash_all	8.076m	85.214ms	50	50	100.00
V2	pass_payload_translation	spi_device_pass_addr_payload_swap	34.830s	10.006ms	50	50	100.00
		spi_device_flash_all	8.076m	85.214ms	50	50	100.00
V2	cmd_info_slots	spi_device_flash_all	8.076m	85.214ms	50	50	100.00
V2	cmd_read_status	spi_device_intercept	41.340s	20.801ms	50	50	100.00
		spi_device_flash_all	8.076m	85.214ms	50	50	100.00
V2	cmd_read_jedec	spi_device_intercept	41.340s	20.801ms	50	50	100.00
		spi_device_flash_all	8.076m	85.214ms	50	50	100.00
V2	cmd_read_sfdp	spi_device_intercept	41.340s	20.801ms	50	50	100.00
		spi_device_flash_all	8.076m	85.214ms	50	50	100.00
V2	cmd_fast_read	spi_device_intercept	41.340s	20.801ms	50	50	100.00
		spi_device_flash_all	8.076m	85.214ms	50	50	100.00
V2	cmd_read_pipeline	spi_device_intercept	41.340s	20.801ms	50	50	100.00
		spi_device_flash_all	8.076m	85.214ms	50	50	100.00
V2	flash_cmd_upload	spi_device_upload	43.920s	56.520ms	50	50	100.00
V2	mailbox_command	spi_device_mailbox	2.721m	29.220ms	50	50	100.00
V2	mailbox_cross_outside_command	spi_device_mailbox	2.721m	29.220ms	50	50	100.00
V2	mailbox_cross_inside_command	spi_device_mailbox	2.721m	29.220ms	50	50	100.00
V2	cmd_read_buffer	spi_device_flash_mode	1.555m	12.263ms	50	50	100.00
		spi_device_read_buffer_direct	24.920s	5.624ms	50	50	100.00
V2	cmd_dummy_cycle	spi_device_mailbox	2.721m	29.220ms	50	50	100.00
		spi_device_flash_all	8.076m	85.214ms	50	50	100.00
V2	quad_spi	spi_device_flash_all	8.076m	85.214ms	50	50	100.00
V2	dual_spi	spi_device_flash_all	8.076m	85.214ms	50	50	100.00
V2	4b_3b_feature	spi_device_cfg_cmd	13.280s	1.237ms	50	50	100.00
V2	write_enable_disable	spi_device_cfg_cmd	13.280s	1.237ms	50	50	100.00
V2	TPM_with_flash_or_passthrough_mode	spi_device_flash_and_tpm	13.184m	104.270ms	50	50	100.00
V2	tpm_and_flash_trans_with_min_inactive_time	spi_device_flash_and_tpm_min_idle	11.300m	334.002ms	50	50	100.00
V2	stress_all	spi_device_stress_all	21.586m	797.133ms	50	50	100.00
V2	alert_test	spi_device_alert_test	0.810s	15.378us	50	50	100.00
V2	intr_test	spi_device_intr_test	0.790s	46.503us	50	50	100.00
V2	tl_d_oob_addr_access	spi_device_tl_errors	4.960s	352.992us	20	20	100.00
V2	tl_d_illegal_access	spi_device_tl_errors	4.960s	352.992us	20	20	100.00
V2	tl_d_outstanding_access	spi_device_csr_hw_reset	1.480s	80.041us	5	5	100.00
		spi_device_csr_rw	2.760s	119.074us	20	20	100.00
		spi_device_csr_aliasing	27.040s	2.256ms	5	5	100.00
		spi_device_same_csr_outstanding	4.200s	959.891us	20	20	100.00
V2	tl_d_partial_access	spi_device_csr_hw_reset	1.480s	80.041us	5	5	100.00
		spi_device_csr_rw	2.760s	119.074us	20	20	100.00
		spi_device_csr_aliasing	27.040s	2.256ms	5	5	100.00
		spi_device_same_csr_outstanding	4.200s	959.891us	20	20	100.00
V2		TOTAL			941	961	97.92
V2S	tl_intg_err	spi_device_sec_cm	1.210s	87.430us	5	5	100.00
		spi_device_tl_intg_err	24.340s	899.165us	20	20	100.00
V2S	sec_cm_bus_integrity	spi_device_tl_intg_err	24.340s	899.165us	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	stress_all_with_rand_reset	spi_device_stress_all_with_rand_reset			0	0	--
V3		TOTAL			0	0	--
	Unmapped tests	spi_device_flash_mode_ignore_cmds	8.839m	206.820ms	49	50	98.00
		TOTAL			1130	1151	98.18

Testplan Progress

Items	Total	Written	Passing	Progress
N.A.	1	1	0	0.00
V1	8	8	8	100.00
V2	22	22	21	95.45
V2S	2	2	2	100.00
V3	1	0	0	0.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
96.04	98.38	93.99	98.62	89.36	97.19	95.45	99.26

Failure Buckets

UVM_ERROR (uvm_hdl_vcs.c:992) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.gen_generic.u_impl_generic.mem[*])

has 20 failures:

Test spi_device_mem_parity has 20 failures.

0.spi_device_mem_parity.15499085875173313640620489264207640264754820171725026508939808428065801509466
Line 250, in log /container/opentitan-public/scratch/os_regression/spi_device_1r1w-sim-vcs/0.spi_device_mem_parity/latest/run.log

  UVM_ERROR @   1039995 ps: (uvm_hdl_vcs.c:992) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.gen_generic.u_impl_generic.mem[48])
   Either the name is incorrect, or you may not have PLI/ACC visibility to that name
  UVM_ERROR @   1039995 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))
  UVM_ERROR @   1039995 ps: (uvm_hdl_vcs.c:1142) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.gen_generic.u_impl_generic.mem[944])
   Either the name is incorrect, or you may not have PLI/ACC visibility to that name

1.spi_device_mem_parity.110402054053778633961932824465508095371780336697263789883403345995935101287249
Line 250, in log /container/opentitan-public/scratch/os_regression/spi_device_1r1w-sim-vcs/1.spi_device_mem_parity/latest/run.log

  UVM_ERROR @   1085975 ps: (uvm_hdl_vcs.c:992) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.gen_generic.u_impl_generic.mem[36])
   Either the name is incorrect, or you may not have PLI/ACC visibility to that name
  UVM_ERROR @   1085975 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))
  UVM_ERROR @   1085975 ps: (uvm_hdl_vcs.c:1142) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.gen_generic.u_impl_generic.mem[932])
   Either the name is incorrect, or you may not have PLI/ACC visibility to that name

... and 18 more failures.

UVM_ERROR (spi_device_pass_base_vseq.sv:704) [spi_device_flash_mode_ignore_cmds_vseq] Check failed busy == * (* [*] vs * [*]) flash_status.busy == * expected to be *

has 1 failures:

Test spi_device_flash_mode_ignore_cmds has 1 failures.

48.spi_device_flash_mode_ignore_cmds.23530032078655280089200290509172812841209592469488971219350145940111947373360
Line 269, in log /container/opentitan-public/scratch/os_regression/spi_device_1r1w-sim-vcs/48.spi_device_flash_mode_ignore_cmds/latest/run.log

  UVM_ERROR @ 45718087820 ps: (spi_device_pass_base_vseq.sv:704) [uvm_test_top.env.virtual_sequencer.spi_device_flash_mode_ignore_cmds_vseq] Check failed busy == 0 (1 [0x1] vs 0 [0x0]) flash_status.busy == 1 expected to be 0
  tl_ul_fuzzy_flash_status_q[i] = 0x16cfbc
  tl_ul_fuzzy_flash_status_q[i] = 0xd49a6c
  UVM_INFO @ 51875567820 ps: (spi_device_flash_all_vseq.sv:72) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_mode_ignore_cmds_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - END:running iteration 4/10
  UVM_INFO @ 51875567820 ps: (spi_device_flash_all_vseq.sv:51) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_mode_ignore_cmds_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - running iteration 5/10