Unified Coverage Report :: Module :: spid_dpram

Module : spid_dpram

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00			0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spid_dpram.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_spid_dpram	0.00	0.00	0.00			0.00

---

Module Instance : tb.dut.u_spid_dpram

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00			0.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00			0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
18.78	0.00	0.00	75.11		0.00		dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
gen_ram1r1w.u_spi2sys_mem	0.00	0.00				0.00
gen_ram1r1w.u_sys2spi_mem	0.00	0.00				0.00

---

Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : spid_dpram

	Line No.	Total	Covered	Percent
TOTAL		18	0	0.00
CONT_ASSIGN	64	1	0	0.00
CONT_ASSIGN	65	1	0	0.00
CONT_ASSIGN	70	1	0	0.00
CONT_ASSIGN	71	1	0	0.00
CONT_ASSIGN	83	1	0	0.00
CONT_ASSIGN	84	1	0	0.00
CONT_ASSIGN	91	1	0	0.00
CONT_ASSIGN	92	1	0	0.00
ALWAYS	103	7	0	0.00
ALWAYS	118	3	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spid_dpram.sv' or '../src/lowrisc_ip_spi_device_0.1/rtl/spid_dpram.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
64	0	1
65	0	1
70	0	1
71	0	1
83	0	1
84	0	1
91	0	1
92	0	1
103	0	1
105	0	1
106	0	1
108	0	1
110	0	1
111	0	1
113	0	1
			==> MISSING_ELSE
118	0	1
119	0	1
121	0	1

---

Cond Coverage for Module : spid_dpram

	Total	Covered	Percent
Conditions	16	0	0.00
Logical	16	0	0.00
Non-Logical	0	0
Event	0	0

 LINE       64
 EXPRESSION ((sys_addr_i < Sys2SpiEnd) & sys_req_i & sys_write_i)
             ------------1------------   ----2----   -----3-----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       70
 EXPRESSION (spi_req_i & ((!spi_write_i)))
             ----1----   --------2-------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       83
 EXPRESSION (spi_req_i & spi_write_i)
             ----1----   -----2-----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       91
 EXPRESSION (sys_req_i & ((!sys_write_i)))
             ----1----   --------2-------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       108
 EXPRESSION (spi2sys_wr_req && ((!initialized_words_q[7'(spi2sys_wr_addr)])))
             -------1------    ----------------------2----------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

---

Branch Coverage for Module : spid_dpram

	Line No.	Total	Covered	Percent
Branches		4	0	0.00
IF	108	2	0	0.00
IF	118	2	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spid_dpram.sv' or '../src/lowrisc_ip_spi_device_0.1/rtl/spid_dpram.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	108	if ((spi2sys_wr_req && (!initialized_words_q[7'(spi2sys_wr_addr)])))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	118	if ((!rst_spi_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered