| | | | | | | |
gen_alert_tx[0].u_prim_alert_sender |
100.00 |
|
|
100.00 |
|
|
|
spi_device_csr_assert |
100.00 |
|
|
|
|
|
100.00 |
tlul_assert_device |
100.00 |
100.00 |
|
|
|
100.00 |
100.00 |
u_clk_csb_buf |
100.00 |
100.00 |
|
|
|
|
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
|
|
u_clk_csb_mux |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
gen_generic.u_impl_generic |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
u_clk_spi |
85.19 |
100.00 |
55.56 |
|
|
|
100.00 |
gen_generic.u_impl_generic |
85.19 |
100.00 |
55.56 |
|
|
|
100.00 |
gen_scan.i_dft_tck_mux |
85.19 |
100.00 |
55.56 |
|
|
|
100.00 |
gen_generic.u_impl_generic |
85.19 |
100.00 |
55.56 |
|
|
|
100.00 |
u_clk_spi_in_buf |
100.00 |
100.00 |
|
|
|
|
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
|
|
u_clk_spi_in_mux |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
gen_generic.u_impl_generic |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
u_clk_spi_out_buf |
100.00 |
100.00 |
|
|
|
|
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
|
|
u_clk_spi_out_mux |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
gen_generic.u_impl_generic |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
u_cmdparse |
97.84 |
100.00 |
93.26 |
|
100.00 |
95.92 |
100.00 |
u_csb_buf |
100.00 |
100.00 |
|
|
|
|
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
|
|
u_csb_rst_out_scan_mux |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
gen_generic.u_impl_generic |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
u_csb_rst_scan_mux |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
gen_generic.u_impl_generic |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
u_flash_readbuf_flip_pulse_sync |
100.00 |
100.00 |
100.00 |
|
|
100.00 |
100.00 |
prim_flop_2sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_flash_readbuf_watermark_pulse_sync |
100.00 |
100.00 |
100.00 |
|
|
100.00 |
100.00 |
prim_flop_2sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_intr_cmdfifo_not_empty |
100.00 |
100.00 |
100.00 |
|
|
100.00 |
100.00 |
u_intr_payload_not_empty |
100.00 |
100.00 |
100.00 |
|
|
100.00 |
100.00 |
u_intr_payload_overflow |
100.00 |
100.00 |
100.00 |
|
|
100.00 |
100.00 |
u_intr_readbuf_flip |
100.00 |
100.00 |
100.00 |
|
|
100.00 |
100.00 |
u_intr_readbuf_watermark |
100.00 |
100.00 |
100.00 |
|
|
100.00 |
100.00 |
u_intr_tpm_cmdaddr_notempty |
100.00 |
100.00 |
100.00 |
|
|
100.00 |
100.00 |
u_intr_tpm_rdfifo_cmd_end |
100.00 |
100.00 |
100.00 |
|
|
100.00 |
100.00 |
u_intr_tpm_rdfifo_drop |
97.92 |
100.00 |
91.67 |
|
|
100.00 |
100.00 |
u_intr_upload_edge |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_jedec |
99.38 |
100.00 |
100.00 |
|
100.00 |
96.88 |
100.00 |
u_p2s |
85.98 |
100.00 |
71.43 |
|
|
72.50 |
100.00 |
u_passthrough |
90.54 |
94.95 |
89.22 |
|
75.00 |
93.52 |
100.00 |
u_pt_sck_cg |
100.00 |
100.00 |
100.00 |
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
100.00 |
|
|
100.00 |
|
u_read_half_cycle |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_read_pipe_oe_stg1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_read_pipe_oe_stg2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_read_pipe_stg1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_read_pipe_stg2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_read_en_pipe_stg1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_read_en_pipe_stg2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_read_intercept_pipe_stg1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_read_intercept_pipe_stg2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_read_pipe_stg1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_read_pipe_stg2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_readcmd |
89.30 |
93.62 |
90.32 |
|
87.50 |
84.15 |
90.91 |
u_addr_latch_pulse |
100.00 |
100.00 |
100.00 |
|
|
100.00 |
|
u_readbuffer |
68.17 |
83.51 |
82.93 |
|
|
72.92 |
33.33 |
u_sys2spi_clr |
37.29 |
79.17 |
0.00 |
|
|
70.00 |
0.00 |
gen_nrz_hs_protocol.ack_sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_nrz_hs_protocol.req_sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_readsram |
95.10 |
97.79 |
86.54 |
|
100.00 |
91.18 |
100.00 |
u_fifo |
97.62 |
100.00 |
90.48 |
|
|
100.00 |
100.00 |
gen_normal_fifo.u_fifo_cnt |
100.00 |
100.00 |
100.00 |
|
|
100.00 |
|
u_sram_fifo |
88.63 |
95.00 |
76.19 |
|
|
83.33 |
100.00 |
gen_normal_fifo.u_fifo_cnt |
81.58 |
92.00 |
80.00 |
|
|
72.73 |
|
u_reg |
99.64 |
99.53 |
99.33 |
100.00 |
|
99.35 |
100.00 |
subtree... |
|
|
|
|
|
|
|
u_rst_spi_out_sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_s2p |
89.38 |
100.00 |
78.57 |
|
|
78.95 |
100.00 |
u_scanmode_sync |
100.00 |
|
|
|
|
|
100.00 |
u_spi_tpm |
92.81 |
99.28 |
85.25 |
|
91.67 |
95.68 |
92.16 |
u_arbiter |
87.57 |
100.00 |
76.47 |
|
|
92.86 |
80.95 |
gen_arb_ppc.u_reqarb |
85.69 |
100.00 |
77.78 |
|
|
90.00 |
75.00 |
u_req_fifo |
92.36 |
100.00 |
75.00 |
|
|
94.44 |
100.00 |
gen_normal_fifo.u_fifo_cnt |
93.64 |
100.00 |
90.00 |
|
|
90.91 |
|
u_cmdaddr_buffer |
92.67 |
100.00 |
76.92 |
|
|
93.75 |
100.00 |
sync_rptr |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
sync_wptr |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_csb_sync_rst |
100.00 |
100.00 |
100.00 |
|
|
100.00 |
|
g_sync.u_sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_hw_reg_slice |
100.00 |
100.00 |
|
|
|
|
100.00 |
u_rdfifo_ready |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sram_fifo |
89.23 |
95.00 |
78.57 |
|
|
83.33 |
100.00 |
gen_normal_fifo.u_fifo_cnt |
81.58 |
92.00 |
80.00 |
|
|
72.73 |
|
u_tpm_rd_buffer |
89.74 |
100.00 |
69.23 |
|
|
100.00 |
|
u_tpm_wr_buffer |
96.15 |
100.00 |
84.62 |
|
|
100.00 |
100.00 |
u_wrfifo_busy_sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_wrfifo_release_reqack |
87.50 |
100.00 |
50.00 |
|
|
100.00 |
100.00 |
gen_nrz_hs_protocol.ack_sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_nrz_hs_protocol.req_sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_spid_addr_4b |
86.34 |
97.59 |
77.78 |
|
|
95.00 |
75.00 |
u_spi2sys_sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sys2spi_sync |
81.90 |
95.92 |
66.67 |
|
|
90.00 |
75.00 |
u_prim_sync_reqack |
88.12 |
95.83 |
66.67 |
|
|
90.00 |
100.00 |
gen_nrz_hs_protocol.ack_sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_nrz_hs_protocol.req_sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_spid_csb_sync |
96.97 |
100.00 |
100.00 |
|
|
90.91 |
|
u_count_sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_spid_dpram |
93.23 |
97.92 |
75.00 |
|
|
100.00 |
100.00 |
gen_ram1r1w.u_spi2sys_mem |
99.15 |
97.44 |
|
|
|
100.00 |
100.00 |
u_mem |
96.97 |
90.91 |
|
|
|
100.00 |
100.00 |
gen_generic.u_impl_generic |
96.97 |
90.91 |
|
|
|
100.00 |
100.00 |
gen_ram1r1w.u_sys2spi_mem |
99.15 |
97.44 |
|
|
|
100.00 |
100.00 |
u_mem |
96.97 |
90.91 |
|
|
|
100.00 |
100.00 |
gen_generic.u_impl_generic |
96.97 |
90.91 |
|
|
|
100.00 |
100.00 |
u_spid_status |
92.61 |
100.00 |
88.46 |
|
|
98.63 |
83.33 |
u_csb_rst_scan_mux |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
gen_generic.u_impl_generic |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
u_sck2csb_status |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_stage_to_commit |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sw_status_update_sync |
99.00 |
100.00 |
96.00 |
|
|
100.00 |
100.00 |
sync_rptr |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
sync_wptr |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sys_csb_syncd |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sys_sram_arbiter |
89.65 |
100.00 |
76.47 |
|
|
96.43 |
85.71 |
gen_arb_ppc.u_reqarb |
92.53 |
100.00 |
88.89 |
|
|
100.00 |
81.25 |
u_req_fifo |
92.36 |
100.00 |
75.00 |
|
|
94.44 |
100.00 |
gen_normal_fifo.u_fifo_cnt |
93.64 |
100.00 |
90.00 |
|
|
90.91 |
|
u_sys_tpm_csb_sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_tlul2sram_egress |
71.47 |
82.11 |
59.19 |
|
|
63.33 |
81.25 |
u_err |
67.62 |
76.92 |
68.57 |
|
|
25.00 |
100.00 |
u_reqfifo |
88.33 |
95.00 |
75.00 |
|
|
83.33 |
100.00 |
gen_normal_fifo.u_fifo_cnt |
81.58 |
92.00 |
80.00 |
|
|
72.73 |
|
u_rsp_gen |
91.67 |
83.33 |
|
|
|
|
100.00 |
u_rspfifo |
61.36 |
85.00 |
45.45 |
|
|
55.00 |
60.00 |
gen_normal_fifo.u_fifo_cnt |
63.15 |
84.00 |
60.00 |
|
|
45.45 |
|
u_sram_byte |
100.00 |
100.00 |
|
|
|
|
100.00 |
u_sramreqfifo |
61.32 |
82.50 |
47.22 |
|
|
55.56 |
60.00 |
gen_normal_fifo.u_fifo_cnt |
63.15 |
84.00 |
60.00 |
|
|
45.45 |
|
u_tlul_data_integ_enc_data |
0.00 |
0.00 |
|
|
|
|
|
u_data_gen |
0.00 |
0.00 |
|
|
|
|
|
u_tlul_data_integ_enc_instr |
0.00 |
0.00 |
|
|
|
|
|
u_data_gen |
0.00 |
0.00 |
|
|
|
|
|
u_tlul2sram_ingress |
84.00 |
85.77 |
71.32 |
|
|
78.89 |
100.00 |
u_err |
66.91 |
76.92 |
65.71 |
|
|
25.00 |
100.00 |
u_reqfifo |
88.33 |
95.00 |
75.00 |
|
|
83.33 |
100.00 |
gen_normal_fifo.u_fifo_cnt |
81.58 |
92.00 |
80.00 |
|
|
72.73 |
|
u_rsp_gen |
91.67 |
83.33 |
|
|
|
|
100.00 |
u_rspfifo |
89.32 |
95.00 |
77.27 |
|
|
85.00 |
100.00 |
gen_normal_fifo.u_fifo_cnt |
81.58 |
92.00 |
80.00 |
|
|
72.73 |
|
u_sram_byte |
100.00 |
100.00 |
|
|
|
|
100.00 |
u_sramreqfifo |
87.64 |
95.00 |
72.22 |
|
|
83.33 |
100.00 |
gen_normal_fifo.u_fifo_cnt |
81.58 |
92.00 |
80.00 |
|
|
72.73 |
|
u_tlul_data_integ_enc_data |
0.00 |
0.00 |
|
|
|
|
|
u_data_gen |
0.00 |
0.00 |
|
|
|
|
|
u_tlul_data_integ_enc_instr |
0.00 |
0.00 |
|
|
|
|
|
u_data_gen |
0.00 |
0.00 |
|
|
|
|
|
u_tpm_csb_buf |
100.00 |
100.00 |
|
|
|
|
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
|
|
u_tpm_csb_rst_scan_mux |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
gen_generic.u_impl_generic |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
u_tpm_csb_rst_sync |
70.83 |
88.89 |
44.44 |
|
|
100.00 |
50.00 |
g_scan_mux.u_scan_mux |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
gen_generic.u_impl_generic |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
u_sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_tpm_rst_out_scan_mux |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
gen_generic.u_impl_generic |
64.81 |
100.00 |
44.44 |
|
|
|
50.00 |
u_tpm_rst_out_sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_upload |
90.79 |
98.60 |
71.95 |
|
100.00 |
94.12 |
89.29 |
u_addrfifo |
93.75 |
100.00 |
75.00 |
|
|
100.00 |
100.00 |
u_sync_rptr_gray |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_wptr_gray |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_arbiter |
70.02 |
92.11 |
45.10 |
|
|
71.43 |
71.43 |
gen_arb_ppc.u_reqarb |
90.97 |
100.00 |
88.89 |
|
|
100.00 |
75.00 |
u_req_fifo |
59.07 |
84.62 |
36.11 |
|
|
55.56 |
60.00 |
gen_normal_fifo.u_fifo_cnt |
56.48 |
84.00 |
40.00 |
|
|
45.45 |
|
u_cmdfifo |
93.75 |
100.00 |
75.00 |
|
|
100.00 |
100.00 |
u_sync_rptr_gray |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_wptr_gray |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_payload_buffer |
96.15 |
100.00 |
84.62 |
|
|
100.00 |
100.00 |
u_payloadptr_clr_psync |
100.00 |
100.00 |
100.00 |
|
|
100.00 |
100.00 |
prim_flop_2sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sys_cmdfifo_set |
100.00 |
100.00 |
100.00 |
|
|
100.00 |
|
u_count_sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|