SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
0.00 | 0.00 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
sysrst_ctrl_key_intr_status_cg | 0.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
0.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 28 | 28 | 0 | 0.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_ac_present_h2l | 2 | 2 | 0 | 0.00 | 100 | 1 | 1 | 2 | |
cp_ac_present_l2h | 2 | 2 | 0 | 0.00 | 100 | 1 | 1 | 2 | |
cp_ec_rst_l_h2l | 2 | 2 | 0 | 0.00 | 100 | 1 | 1 | 2 | |
cp_ec_rst_l_l2h | 2 | 2 | 0 | 0.00 | 100 | 1 | 1 | 2 | |
cp_flash_wp_l_h2l | 2 | 2 | 0 | 0.00 | 100 | 1 | 1 | 2 | |
cp_flash_wp_l_l2h | 2 | 2 | 0 | 0.00 | 100 | 1 | 1 | 2 | |
cp_key0_in_h2l | 2 | 2 | 0 | 0.00 | 100 | 1 | 1 | 2 | |
cp_key0_in_l2h | 2 | 2 | 0 | 0.00 | 100 | 1 | 1 | 2 | |
cp_key1_in_h2l | 2 | 2 | 0 | 0.00 | 100 | 1 | 1 | 2 | |
cp_key1_in_l2h | 2 | 2 | 0 | 0.00 | 100 | 1 | 1 | 2 | |
cp_key2_in_h2l | 2 | 2 | 0 | 0.00 | 100 | 1 | 1 | 2 | |
cp_key2_in_l2h | 2 | 2 | 0 | 0.00 | 100 | 1 | 1 | 2 | |
cp_pwrb_h2l | 2 | 2 | 0 | 0.00 | 100 | 1 | 1 | 2 | |
cp_pwrb_l2h | 2 | 2 | 0 | 0.00 | 100 | 1 | 1 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 2 | 0 | 0.00 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[0] - auto[1]] | -- | -- | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 2 | 0 | 0.00 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[0] - auto[1]] | -- | -- | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 2 | 0 | 0.00 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[0] - auto[1]] | -- | -- | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 2 | 0 | 0.00 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[0] - auto[1]] | -- | -- | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 2 | 0 | 0.00 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[0] - auto[1]] | -- | -- | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 2 | 0 | 0.00 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[0] - auto[1]] | -- | -- | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 2 | 0 | 0.00 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[0] - auto[1]] | -- | -- | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 2 | 0 | 0.00 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[0] - auto[1]] | -- | -- | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 2 | 0 | 0.00 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[0] - auto[1]] | -- | -- | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 2 | 0 | 0.00 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[0] - auto[1]] | -- | -- | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 2 | 0 | 0.00 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[0] - auto[1]] | -- | -- | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 2 | 0 | 0.00 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[0] - auto[1]] | -- | -- | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 2 | 0 | 0.00 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[0] - auto[1]] | -- | -- | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 2 | 0 | 0.00 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[0] - auto[1]] | -- | -- | 2 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |