| | | | | | | |
tb |
67.80 |
72.20 |
71.99 |
87.44 |
0.00 |
75.49 |
99.67 |
| dut |
67.80 |
72.20 |
71.99 |
87.44 |
0.00 |
75.49 |
99.67 |
| gen_alert_tx[0].u_prim_alert_sender |
100.00 |
|
|
100.00 |
|
|
|
| sysrst_ctrl_csr_assert |
100.00 |
|
|
|
|
|
100.00 |
| tlul_assert_device |
33.33 |
0.00 |
|
|
|
0.00 |
100.00 |
| u_prim_flop_2sync_input |
0.00 |
0.00 |
|
|
|
0.00 |
|
| gen_generic.u_impl_generic |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_sync_1 |
0.00 |
0.00 |
|
|
|
0.00 |
|
| gen_generic.u_impl_generic |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_sync_2 |
0.00 |
0.00 |
|
|
|
0.00 |
|
| gen_generic.u_impl_generic |
0.00 |
0.00 |
|
|
|
0.00 |
|
u_reg |
94.53 |
99.18 |
94.00 |
81.33 |
|
98.84 |
99.30 |
| subtree... |
|
|
|
|
|
|
|
| u_sysrst_ctrl_autoblock |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| u_sysrst_ctrl_detect |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| u_sysrst_ctrl_combo |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_combo_trigger[0].u_combo_act |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| gen_combo_trigger[0].u_sysrst_ctrl_detect |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_combo_trigger[0].u_sysrst_ctrl_detect_pre |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_combo_trigger[1].u_combo_act |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| gen_combo_trigger[1].u_sysrst_ctrl_detect |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_combo_trigger[1].u_sysrst_ctrl_detect_pre |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_combo_trigger[2].u_combo_act |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| gen_combo_trigger[2].u_sysrst_ctrl_detect |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_combo_trigger[2].u_sysrst_ctrl_detect_pre |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_combo_trigger[3].u_combo_act |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| gen_combo_trigger[3].u_sysrst_ctrl_detect |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_combo_trigger[3].u_sysrst_ctrl_detect_pre |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| u_sysrst_ctrl_intr |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| u_match_sync |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| gen_nrz_hs_protocol.ack_sync |
0.00 |
0.00 |
|
|
|
0.00 |
|
| gen_generic.u_impl_generic |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_sync_1 |
0.00 |
0.00 |
|
|
|
0.00 |
|
| gen_generic.u_impl_generic |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_sync_2 |
0.00 |
0.00 |
|
|
|
0.00 |
|
| gen_generic.u_impl_generic |
0.00 |
0.00 |
|
|
|
0.00 |
|
| gen_nrz_hs_protocol.req_sync |
0.00 |
0.00 |
|
|
|
0.00 |
|
| gen_generic.u_impl_generic |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_sync_1 |
0.00 |
0.00 |
|
|
|
0.00 |
|
| gen_generic.u_impl_generic |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_sync_2 |
0.00 |
0.00 |
|
|
|
0.00 |
|
| gen_generic.u_impl_generic |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_sysrst_ctrl_intr_o |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| u_sysrst_ctrl_keyintr |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_keyfsm[0].u_sysrst_ctrl_detect_h2l |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_keyfsm[0].u_sysrst_ctrl_detect_l2h |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_keyfsm[1].u_sysrst_ctrl_detect_h2l |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_keyfsm[1].u_sysrst_ctrl_detect_l2h |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_keyfsm[2].u_sysrst_ctrl_detect_h2l |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_keyfsm[2].u_sysrst_ctrl_detect_l2h |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_keyfsm[3].u_sysrst_ctrl_detect_h2l |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_keyfsm[3].u_sysrst_ctrl_detect_l2h |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_keyfsm[4].u_sysrst_ctrl_detect_h2l |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_keyfsm[4].u_sysrst_ctrl_detect_l2h |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_keyfsm[5].u_sysrst_ctrl_detect_h2l |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_keyfsm[5].u_sysrst_ctrl_detect_l2h |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_keyfsm[6].u_sysrst_ctrl_detect_h2l |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| gen_keyfsm[6].u_sysrst_ctrl_detect_l2h |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| u_sysrst_ctrl_pin |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| u_cfg_ac_present_i_pin |
0.00 |
0.00 |
|
|
|
0.00 |
|
| gen_generic.u_impl_generic |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_sync_1 |
0.00 |
0.00 |
|
|
|
0.00 |
|
| gen_generic.u_impl_generic |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_sync_2 |
0.00 |
0.00 |
|
|
|
0.00 |
|
| gen_generic.u_impl_generic |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_sysrst_ctrl_ulp |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| u_sysrst_ctrl_detect_ac_present |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| u_sysrst_ctrl_detect_lid_open |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| u_sysrst_ctrl_detect_pwrb |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|