| | | | | | |
tb.dut.u_reg.u_key_intr_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M
| 0 | 0 | 10013830 | 930 | 0 | 0 |
|
tb.dut.u_reg.u_key_intr_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A
| 0 | 0 | 10013830 | 846 | 0 | 0 |
|
tb.dut.u_reg.u_key_intr_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M
| 0 | 0 | 1401201797 | 939 | 0 | 0 |
|
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.BusySrcReqChk_A
| 0 | 0 | 1401201797 | 1662906 | 0 | 0 |
|
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.DstReqKnown_A
| 0 | 0 | 10013830 | 9391161 | 0 | 0 |
|
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.SrcAckBusyChk_A
| 0 | 0 | 1401201797 | 1823 | 0 | 0 |
|
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.SrcBusyKnown_A
| 0 | 0 | 1401201797 | 1400779358 | 0 | 0 |
|
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A
| 0 | 0 | 1401201797 | 1823 | 0 | 0 |
|
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M
| 0 | 0 | 10013830 | 1823 | 0 | 0 |
|
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A
| 0 | 0 | 10013830 | 1738 | 0 | 0 |
|
tb.dut.u_reg.u_key_intr_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M
| 0 | 0 | 1401201797 | 1832 | 0 | 0 |
|
tb.dut.u_reg.u_key_invert_ctl_cdc.BusySrcReqChk_A
| 0 | 0 | 1401201797 | 1804731 | 0 | 0 |
|
tb.dut.u_reg.u_key_invert_ctl_cdc.DstReqKnown_A
| 0 | 0 | 10013830 | 9391161 | 0 | 0 |
|
tb.dut.u_reg.u_key_invert_ctl_cdc.SrcAckBusyChk_A
| 0 | 0 | 1401201797 | 1949 | 0 | 0 |
|
tb.dut.u_reg.u_key_invert_ctl_cdc.SrcBusyKnown_A
| 0 | 0 | 1401201797 | 1400779358 | 0 | 0 |
|
tb.dut.u_reg.u_key_invert_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A
| 0 | 0 | 1401201797 | 1949 | 0 | 0 |
|
tb.dut.u_reg.u_key_invert_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M
| 0 | 0 | 10013830 | 1949 | 0 | 0 |
|
tb.dut.u_reg.u_key_invert_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A
| 0 | 0 | 10013830 | 1862 | 0 | 0 |
|
tb.dut.u_reg.u_key_invert_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M
| 0 | 0 | 1401201797 | 1955 | 0 | 0 |
|
tb.dut.u_reg.u_pin_allowed_ctl_cdc.BusySrcReqChk_A
| 0 | 0 | 1401201797 | 3582144 | 0 | 0 |
|
tb.dut.u_reg.u_pin_allowed_ctl_cdc.DstReqKnown_A
| 0 | 0 | 10013830 | 9391161 | 0 | 0 |
|
tb.dut.u_reg.u_pin_allowed_ctl_cdc.SrcAckBusyChk_A
| 0 | 0 | 1401201797 | 3945 | 0 | 0 |
|
tb.dut.u_reg.u_pin_allowed_ctl_cdc.SrcBusyKnown_A
| 0 | 0 | 1401201797 | 1400779358 | 0 | 0 |
|
tb.dut.u_reg.u_pin_allowed_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A
| 0 | 0 | 1401201797 | 3945 | 0 | 0 |
|
tb.dut.u_reg.u_pin_allowed_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M
| 0 | 0 | 10013830 | 3945 | 0 | 0 |
|
tb.dut.u_reg.u_pin_allowed_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A
| 0 | 0 | 10013830 | 3860 | 0 | 0 |
|
tb.dut.u_reg.u_pin_allowed_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M
| 0 | 0 | 1401201797 | 3956 | 0 | 0 |
|
tb.dut.u_reg.u_pin_out_ctl_cdc.BusySrcReqChk_A
| 0 | 0 | 1401201797 | 4460185 | 0 | 0 |
|
tb.dut.u_reg.u_pin_out_ctl_cdc.DstReqKnown_A
| 0 | 0 | 10013830 | 9391161 | 0 | 0 |
|
tb.dut.u_reg.u_pin_out_ctl_cdc.SrcAckBusyChk_A
| 0 | 0 | 1401201797 | 4898 | 0 | 0 |
|
tb.dut.u_reg.u_pin_out_ctl_cdc.SrcBusyKnown_A
| 0 | 0 | 1401201797 | 1400779358 | 0 | 0 |
|
tb.dut.u_reg.u_pin_out_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A
| 0 | 0 | 1401201797 | 4898 | 0 | 0 |
|
tb.dut.u_reg.u_pin_out_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M
| 0 | 0 | 10013830 | 4898 | 0 | 0 |
|
tb.dut.u_reg.u_pin_out_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A
| 0 | 0 | 10013830 | 4811 | 0 | 0 |
|
tb.dut.u_reg.u_pin_out_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M
| 0 | 0 | 1401201797 | 4909 | 0 | 0 |
|
tb.dut.u_reg.u_pin_out_value_cdc.BusySrcReqChk_A
| 0 | 0 | 1401201797 | 3572866 | 0 | 0 |
|
tb.dut.u_reg.u_pin_out_value_cdc.DstReqKnown_A
| 0 | 0 | 10013830 | 9391161 | 0 | 0 |
|
tb.dut.u_reg.u_pin_out_value_cdc.SrcAckBusyChk_A
| 0 | 0 | 1401201797 | 3886 | 0 | 0 |
|
tb.dut.u_reg.u_pin_out_value_cdc.SrcBusyKnown_A
| 0 | 0 | 1401201797 | 1400779358 | 0 | 0 |
|
tb.dut.u_reg.u_pin_out_value_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A
| 0 | 0 | 1401201797 | 3886 | 0 | 0 |
|
tb.dut.u_reg.u_pin_out_value_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M
| 0 | 0 | 10013830 | 3886 | 0 | 0 |
|
tb.dut.u_reg.u_pin_out_value_cdc.u_src_to_dst_req.DstPulseCheck_A
| 0 | 0 | 10013830 | 3807 | 0 | 0 |
|
tb.dut.u_reg.u_pin_out_value_cdc.u_src_to_dst_req.SrcPulseCheck_M
| 0 | 0 | 1401201797 | 3899 | 0 | 0 |
|
tb.dut.u_reg.u_reg_if.AllowedLatency_A
| 0 | 0 | 910 | 910 | 0 | 0 |
|
tb.dut.u_reg.u_reg_if.MatchedWidthAssert
| 0 | 0 | 910 | 910 | 0 | 0 |
|
tb.dut.u_reg.u_reg_if.u_err.dataWidthOnly32_A
| 0 | 0 | 910 | 910 | 0 | 0 |
|
tb.dut.u_reg.u_reg_if.u_rsp_intg_gen.DataWidthCheck_A
| 0 | 0 | 910 | 910 | 0 | 0 |
|
tb.dut.u_reg.u_reg_if.u_rsp_intg_gen.PayLoadWidthCheck
| 0 | 0 | 910 | 910 | 0 | 0 |
|
tb.dut.u_reg.u_rsp_intg_gen.DataWidthCheck_A
| 0 | 0 | 910 | 910 | 0 | 0 |
|
tb.dut.u_reg.u_rsp_intg_gen.PayLoadWidthCheck
| 0 | 0 | 910 | 910 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.BusySrcReqChk_A
| 0 | 0 | 1401201797 | 942768 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.DstReqKnown_A
| 0 | 0 | 10013830 | 9391161 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.SrcAckBusyChk_A
| 0 | 0 | 1401201797 | 945 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.SrcBusyKnown_A
| 0 | 0 | 1401201797 | 1400779358 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A
| 0 | 0 | 1401201797 | 945 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M
| 0 | 0 | 10013830 | 945 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A
| 0 | 0 | 10013830 | 867 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_ac_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M
| 0 | 0 | 1401201797 | 955 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_ctl_cdc.BusySrcReqChk_A
| 0 | 0 | 1401201797 | 934152 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_ctl_cdc.DstReqKnown_A
| 0 | 0 | 10013830 | 9391161 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_ctl_cdc.SrcAckBusyChk_A
| 0 | 0 | 1401201797 | 960 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_ctl_cdc.SrcBusyKnown_A
| 0 | 0 | 1401201797 | 1400779358 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A
| 0 | 0 | 1401201797 | 960 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M
| 0 | 0 | 10013830 | 960 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A
| 0 | 0 | 10013830 | 875 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M
| 0 | 0 | 1401201797 | 968 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.BusySrcReqChk_A
| 0 | 0 | 1401201797 | 930712 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.DstReqKnown_A
| 0 | 0 | 10013830 | 9391161 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.SrcAckBusyChk_A
| 0 | 0 | 1401201797 | 932 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.SrcBusyKnown_A
| 0 | 0 | 1401201797 | 1400779358 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A
| 0 | 0 | 1401201797 | 932 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M
| 0 | 0 | 10013830 | 932 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A
| 0 | 0 | 10013830 | 846 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_lid_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M
| 0 | 0 | 1401201797 | 940 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.BusySrcReqChk_A
| 0 | 0 | 1401201797 | 900147 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.DstReqKnown_A
| 0 | 0 | 10013830 | 9391161 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.SrcAckBusyChk_A
| 0 | 0 | 1401201797 | 931 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.SrcBusyKnown_A
| 0 | 0 | 1401201797 | 1400779358 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.DstPulseCheck_A
| 0 | 0 | 1401201797 | 931 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.u_arb.gen_passthru.u_dst_to_src_ack.SrcPulseCheck_M
| 0 | 0 | 10013830 | 931 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.u_src_to_dst_req.DstPulseCheck_A
| 0 | 0 | 10013830 | 852 | 0 | 0 |
|
tb.dut.u_reg.u_ulp_pwrb_debounce_ctl_cdc.u_src_to_dst_req.SrcPulseCheck_M
| 0 | 0 | 1401201797 | 939 | 0 | 0 |
|
tb.dut.u_reg.u_wkup_status_cdc.BusySrcReqChk_A
| 0 | 0 | 1401201797 | 1096958 | 0 | 0 |
|
tb.dut.u_reg.u_wkup_status_cdc.DstReqKnown_A
| 0 | 0 | 10013830 | 9391161 | 0 | 0 |
|
tb.dut.u_reg.u_wkup_status_cdc.SrcAckBusyChk_A
| 0 | 0 | 1401201797 | 1126 | 0 | 0 |
|
tb.dut.u_reg.u_wkup_status_cdc.SrcBusyKnown_A
| 0 | 0 | 1401201797 | 1400779358 | 0 | 0 |
|
tb.dut.u_reg.u_wkup_status_cdc.u_arb.gen_wr_req.DstUpdateReqCheck_A
| 0 | 0 | 10013830 | 693 | 0 | 909 |
|
tb.dut.u_reg.u_wkup_status_cdc.u_arb.gen_wr_req.HwIdSelCheck_A
| 0 | 0 | 10013830 | 693 | 0 | 0 |
|
tb.dut.u_reg.u_wkup_status_cdc.u_arb.gen_wr_req.u_dst_update_sync.SyncReqAckAckNeedsReq
| 0 | 0 | 1401201797 | 1819 | 0 | 0 |
|
tb.dut.u_reg.u_wkup_status_cdc.u_arb.gen_wr_req.u_dst_update_sync.SyncReqAckHoldReq
| 0 | 0 | 10013830 | 946 | 0 | 0 |
|
tb.dut.u_reg.u_wkup_status_cdc.u_src_to_dst_req.DstPulseCheck_A
| 0 | 0 | 10013830 | 1045 | 0 | 0 |
|
tb.dut.u_reg.u_wkup_status_cdc.u_src_to_dst_req.SrcPulseCheck_M
| 0 | 0 | 1401201797 | 1135 | 0 | 0 |
|
tb.dut.u_reg.wePulse
| 0 | 0 | 1401201797 | 112274 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.CntClr_A
| 0 | 0 | 9770838 | 195 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.CntIncr_A
| 0 | 0 | 9770838 | 259003 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.CntNoWrap_A
| 0 | 0 | 9770838 | 9328950 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.DetectStDropOut_A
| 0 | 0 | 9770838 | 5 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.DetectedOut_A
| 0 | 0 | 9770838 | 512 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.DetectedPulseOut_A
| 0 | 0 | 9770838 | 84 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.DisabledIdleSt_A
| 0 | 0 | 9770838 | 9065698 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.DisabledNoDetection_A
| 0 | 0 | 9770838 | 9067515 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.EnterDebounceSt_A
| 0 | 0 | 9770838 | 108 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.EnterDetectSt_A
| 0 | 0 | 9770838 | 89 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.EnterStableSt_A
| 0 | 0 | 9770838 | 84 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.PulseIsPulse_A
| 0 | 0 | 9770838 | 84 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.StayInStableSt
| 0 | 0 | 9770838 | 428 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.gen_edge_to_low_event_sva.EdgeToLowEvent_A
| 0 | 0 | 9770838 | 5354 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.gen_low_level_sva.LowLevelEvent_A
| 0 | 0 | 9770838 | 9330998 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_autoblock.u_sysrst_ctrl_detect.gen_not_sticky_sva.StableStDropOut_A
| 0 | 0 | 9770838 | 84 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect.CntClr_A
| 0 | 0 | 9770838 | 830 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect.CntIncr_A
| 0 | 0 | 9770838 | 46983 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect.CntNoWrap_A
| 0 | 0 | 9770838 | 9328315 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect.DetectStDropOut_A
| 0 | 0 | 9770838 | 58 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect.DetectedOut_A
| 0 | 0 | 9770838 | 14296 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect.DetectedPulseOut_A
| 0 | 0 | 9770838 | 325 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect.DisabledIdleSt_A
| 0 | 0 | 9770838 | 8984393 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect.DisabledNoDetection_A
| 0 | 0 | 9770838 | 8985587 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect.EnterDebounceSt_A
| 0 | 0 | 9770838 | 444 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect.EnterDetectSt_A
| 0 | 0 | 9770838 | 387 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect.EnterStableSt_A
| 0 | 0 | 9770838 | 325 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect.PulseIsPulse_A
| 0 | 0 | 9770838 | 325 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect.StayInStableSt
| 0 | 0 | 9770838 | 13946 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect.gen_high_level_sva.HighLevelEvent_A
| 0 | 0 | 9770838 | 9330998 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect.gen_not_sticky_sva.StableStDropOut_A
| 0 | 0 | 9770838 | 297 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect_pre.CntClr_A
| 0 | 0 | 9770838 | 2774 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect_pre.CntIncr_A
| 0 | 0 | 9770838 | 96064 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect_pre.CntNoWrap_A
| 0 | 0 | 9770838 | 9326371 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect_pre.DetectStDropOut_A
| 0 | 0 | 9770838 | 315 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect_pre.DetectedOut_A
| 0 | 0 | 9770838 | 73594 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect_pre.DetectedPulseOut_A
| 0 | 0 | 9770838 | 900 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect_pre.DisabledIdleSt_A
| 0 | 0 | 9770838 | 8877744 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect_pre.DisabledNoDetection_A
| 0 | 0 | 9770838 | 8879400 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect_pre.EnterDebounceSt_A
| 0 | 0 | 9770838 | 1389 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect_pre.EnterDetectSt_A
| 0 | 0 | 9770838 | 1385 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect_pre.EnterStableSt_A
| 0 | 0 | 9770838 | 900 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect_pre.PulseIsPulse_A
| 0 | 0 | 9770838 | 900 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect_pre.StayInStableSt
| 0 | 0 | 9770838 | 72586 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect_pre.gen_high_event_sva.HighLevelEvent_A
| 0 | 0 | 9770838 | 9330998 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect_pre.gen_high_level_sva.HighLevelEvent_A
| 0 | 0 | 9770838 | 9330998 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[0].u_sysrst_ctrl_detect_pre.gen_not_sticky_sva.StableStDropOut_A
| 0 | 0 | 9770838 | 786 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect.CntClr_A
| 0 | 0 | 9770838 | 732 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect.CntIncr_A
| 0 | 0 | 9770838 | 40324 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect.CntNoWrap_A
| 0 | 0 | 9770838 | 9328413 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect.DetectStDropOut_A
| 0 | 0 | 9770838 | 27 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect.DetectedOut_A
| 0 | 0 | 9770838 | 13326 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect.DetectedPulseOut_A
| 0 | 0 | 9770838 | 317 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect.DisabledIdleSt_A
| 0 | 0 | 9770838 | 9010105 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect.DisabledNoDetection_A
| 0 | 0 | 9770838 | 9011345 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect.EnterDebounceSt_A
| 0 | 0 | 9770838 | 384 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect.EnterDetectSt_A
| 0 | 0 | 9770838 | 348 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect.EnterStableSt_A
| 0 | 0 | 9770838 | 317 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect.PulseIsPulse_A
| 0 | 0 | 9770838 | 317 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect.StayInStableSt
| 0 | 0 | 9770838 | 12979 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect.gen_high_level_sva.HighLevelEvent_A
| 0 | 0 | 9770838 | 9330998 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect.gen_not_sticky_sva.StableStDropOut_A
| 0 | 0 | 9770838 | 279 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect_pre.CntClr_A
| 0 | 0 | 9770838 | 2914 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect_pre.CntIncr_A
| 0 | 0 | 9770838 | 107242 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect_pre.CntNoWrap_A
| 0 | 0 | 9770838 | 9326231 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect_pre.DetectStDropOut_A
| 0 | 0 | 9770838 | 369 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect_pre.DetectedOut_A
| 0 | 0 | 9770838 | 69002 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect_pre.DetectedPulseOut_A
| 0 | 0 | 9770838 | 871 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect_pre.DisabledIdleSt_A
| 0 | 0 | 9770838 | 8881968 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect_pre.DisabledNoDetection_A
| 0 | 0 | 9770838 | 8883636 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect_pre.EnterDebounceSt_A
| 0 | 0 | 9770838 | 1459 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect_pre.EnterDetectSt_A
| 0 | 0 | 9770838 | 1455 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect_pre.EnterStableSt_A
| 0 | 0 | 9770838 | 871 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect_pre.PulseIsPulse_A
| 0 | 0 | 9770838 | 871 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect_pre.StayInStableSt
| 0 | 0 | 9770838 | 68035 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect_pre.gen_high_event_sva.HighLevelEvent_A
| 0 | 0 | 9770838 | 9330998 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect_pre.gen_high_level_sva.HighLevelEvent_A
| 0 | 0 | 9770838 | 9330998 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[1].u_sysrst_ctrl_detect_pre.gen_not_sticky_sva.StableStDropOut_A
| 0 | 0 | 9770838 | 758 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect.CntClr_A
| 0 | 0 | 9770838 | 760 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect.CntIncr_A
| 0 | 0 | 9770838 | 44605 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect.CntNoWrap_A
| 0 | 0 | 9770838 | 9328385 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect.DetectStDropOut_A
| 0 | 0 | 9770838 | 59 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect.DetectedOut_A
| 0 | 0 | 9770838 | 13305 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect.DetectedPulseOut_A
| 0 | 0 | 9770838 | 296 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect.DisabledIdleSt_A
| 0 | 0 | 9770838 | 8987687 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect.DisabledNoDetection_A
| 0 | 0 | 9770838 | 8988897 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect.EnterDebounceSt_A
| 0 | 0 | 9770838 | 401 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect.EnterDetectSt_A
| 0 | 0 | 9770838 | 359 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect.EnterStableSt_A
| 0 | 0 | 9770838 | 296 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect.PulseIsPulse_A
| 0 | 0 | 9770838 | 296 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect.StayInStableSt
| 0 | 0 | 9770838 | 12987 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect.gen_high_level_sva.HighLevelEvent_A
| 0 | 0 | 9770838 | 9330998 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect.gen_not_sticky_sva.StableStDropOut_A
| 0 | 0 | 9770838 | 272 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect_pre.CntClr_A
| 0 | 0 | 9770838 | 3122 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect_pre.CntIncr_A
| 0 | 0 | 9770838 | 107842 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect_pre.CntNoWrap_A
| 0 | 0 | 9770838 | 9326023 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect_pre.DetectStDropOut_A
| 0 | 0 | 9770838 | 400 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect_pre.DetectedOut_A
| 0 | 0 | 9770838 | 74613 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect_pre.DetectedPulseOut_A
| 0 | 0 | 9770838 | 941 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect_pre.DisabledIdleSt_A
| 0 | 0 | 9770838 | 8879166 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect_pre.DisabledNoDetection_A
| 0 | 0 | 9770838 | 8880824 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect_pre.EnterDebounceSt_A
| 0 | 0 | 9770838 | 1563 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect_pre.EnterDetectSt_A
| 0 | 0 | 9770838 | 1559 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect_pre.EnterStableSt_A
| 0 | 0 | 9770838 | 941 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect_pre.PulseIsPulse_A
| 0 | 0 | 9770838 | 941 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect_pre.StayInStableSt
| 0 | 0 | 9770838 | 73567 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect_pre.gen_high_event_sva.HighLevelEvent_A
| 0 | 0 | 9770838 | 9330998 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect_pre.gen_high_level_sva.HighLevelEvent_A
| 0 | 0 | 9770838 | 9330998 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[2].u_sysrst_ctrl_detect_pre.gen_not_sticky_sva.StableStDropOut_A
| 0 | 0 | 9770838 | 829 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect.CntClr_A
| 0 | 0 | 9770838 | 814 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect.CntIncr_A
| 0 | 0 | 9770838 | 47912 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect.CntNoWrap_A
| 0 | 0 | 9770838 | 9328331 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect.DetectStDropOut_A
| 0 | 0 | 9770838 | 35 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect.DetectedOut_A
| 0 | 0 | 9770838 | 14612 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect.DetectedPulseOut_A
| 0 | 0 | 9770838 | 350 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect.DisabledIdleSt_A
| 0 | 0 | 9770838 | 8994298 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect.DisabledNoDetection_A
| 0 | 0 | 9770838 | 8995527 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect.EnterDebounceSt_A
| 0 | 0 | 9770838 | 426 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect.EnterDetectSt_A
| 0 | 0 | 9770838 | 389 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect.EnterStableSt_A
| 0 | 0 | 9770838 | 350 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect.PulseIsPulse_A
| 0 | 0 | 9770838 | 350 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect.StayInStableSt
| 0 | 0 | 9770838 | 14226 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect.gen_high_level_sva.HighLevelEvent_A
| 0 | 0 | 9770838 | 9330998 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect.gen_not_sticky_sva.StableStDropOut_A
| 0 | 0 | 9770838 | 309 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect_pre.CntClr_A
| 0 | 0 | 9770838 | 3030 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect_pre.CntIncr_A
| 0 | 0 | 9770838 | 103483 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect_pre.CntNoWrap_A
| 0 | 0 | 9770838 | 9326115 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect_pre.DetectStDropOut_A
| 0 | 0 | 9770838 | 400 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect_pre.DetectedOut_A
| 0 | 0 | 9770838 | 70855 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect_pre.DetectedPulseOut_A
| 0 | 0 | 9770838 | 913 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect_pre.DisabledIdleSt_A
| 0 | 0 | 9770838 | 8884779 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect_pre.DisabledNoDetection_A
| 0 | 0 | 9770838 | 8886451 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect_pre.EnterDebounceSt_A
| 0 | 0 | 9770838 | 1517 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect_pre.EnterDetectSt_A
| 0 | 0 | 9770838 | 1513 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect_pre.EnterStableSt_A
| 0 | 0 | 9770838 | 913 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect_pre.PulseIsPulse_A
| 0 | 0 | 9770838 | 913 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect_pre.StayInStableSt
| 0 | 0 | 9770838 | 69851 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect_pre.gen_high_event_sva.HighLevelEvent_A
| 0 | 0 | 9770838 | 9330998 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect_pre.gen_high_level_sva.HighLevelEvent_A
| 0 | 0 | 9770838 | 9330998 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_combo.gen_combo_trigger[3].u_sysrst_ctrl_detect_pre.gen_not_sticky_sva.StableStDropOut_A
| 0 | 0 | 9770838 | 822 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_intr.u_match_sync.SyncReqAckAckNeedsReq
| 0 | 0 | 1327980999 | 1026 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_intr.u_match_sync.SyncReqAckHoldReq
| 0 | 0 | 9770838 | 1025 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_intr.u_sysrst_ctrl_intr_o.IntrTKind_A
| 0 | 0 | 745 | 745 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_h2l.CntClr_A
| 0 | 0 | 9770838 | 83 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_h2l.CntIncr_A
| 0 | 0 | 9770838 | 32669 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_h2l.CntNoWrap_A
| 0 | 0 | 9770838 | 9329062 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_h2l.DetectedOut_A
| 0 | 0 | 9770838 | 2741 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_h2l.DetectedPulseOut_A
| 0 | 0 | 9770838 | 40 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_h2l.DisabledIdleSt_A
| 0 | 0 | 9770838 | 9088859 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_h2l.DisabledNoDetection_A
| 0 | 0 | 9770838 | 9090679 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_h2l.EnterDebounceSt_A
| 0 | 0 | 9770838 | 43 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_h2l.EnterDetectSt_A
| 0 | 0 | 9770838 | 40 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_h2l.EnterStableSt_A
| 0 | 0 | 9770838 | 40 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_h2l.PulseIsPulse_A
| 0 | 0 | 9770838 | 40 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_h2l.StayInStableSt
| 0 | 0 | 9770838 | 2685 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_h2l.gen_edge_to_low_event_sva.EdgeToLowEvent_A
| 0 | 0 | 9770838 | 1489 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_h2l.gen_low_level_sva.LowLevelEvent_A
| 0 | 0 | 9770838 | 9330998 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_h2l.gen_not_sticky_sva.StableStDropOut_A
| 0 | 0 | 9770838 | 23 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_l2h.CntClr_A
| 0 | 0 | 9770838 | 47 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_l2h.CntIncr_A
| 0 | 0 | 9770838 | 1039 | 0 | 0 |
|
tb.dut.u_sysrst_ctrl_keyintr.gen_keyfsm[0].u_sysrst_ctrl_detect_l2h.CntNoWrap_A
| 0 | 0 | 9770838 | 9329098 | 0 | 0 |
|