Group : alert_esc_agent_pkg::alert_handshake_complete_cg
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Group : alert_esc_agent_pkg::alert_handshake_complete_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_alert_esc_agent_0/alert_esc_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
alert_esc_agent_pkg.m_alert_handshake_complete_cg 100.00 1 100 1 64 64




Group Instance : alert_esc_agent_pkg.m_alert_handshake_complete_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00
Crosses 1 0 1 100.00


Variables for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_handshake_complete 1 0 1 100.00 100 1 1 0
cp_trans_type 1 0 1 100.00 100 1 1 0


Crosses for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
alert_handshake_complete 1 0 1 100.00 100 1 1 0


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 14467 1 T264 1 T202 7 T198 2



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 14771 1 T264 1 T202 7 T198 2



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 14467 1 T264 1 T202 7 T198 2

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