| T867 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/44.uart_noise_filter.2845087064 |
|
|
Oct 09 05:49:06 AM UTC 24 |
Oct 09 05:50:55 AM UTC 24 |
59582957113 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/46.uart_stress_all_with_rand_reset.2393704013 |
|
|
Oct 09 05:50:31 AM UTC 24 |
Oct 09 05:50:58 AM UTC 24 |
2968694565 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/46.uart_noise_filter.3336938900 |
|
|
Oct 09 05:50:22 AM UTC 24 |
Oct 09 05:50:59 AM UTC 24 |
50513358995 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/41.uart_perf.540381505 |
|
|
Oct 09 05:47:38 AM UTC 24 |
Oct 09 05:51:00 AM UTC 24 |
15574147353 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/47.uart_alert_test.2782836708 |
|
|
Oct 09 05:50:59 AM UTC 24 |
Oct 09 05:51:01 AM UTC 24 |
23024648 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/47.uart_loopback.3746159914 |
|
|
Oct 09 05:50:50 AM UTC 24 |
Oct 09 05:51:02 AM UTC 24 |
6921928181 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/47.uart_intr.3851529647 |
|
|
Oct 09 05:50:42 AM UTC 24 |
Oct 09 05:51:03 AM UTC 24 |
36260268657 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/47.uart_tx_rx.2505760718 |
|
|
Oct 09 05:50:33 AM UTC 24 |
Oct 09 05:51:04 AM UTC 24 |
14985137138 ps |
| T278 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/46.uart_fifo_reset.3742333256 |
|
|
Oct 09 05:50:08 AM UTC 24 |
Oct 09 05:51:05 AM UTC 24 |
106212078653 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/30.uart_long_xfer_wo_dly.3636908677 |
|
|
Oct 09 05:41:03 AM UTC 24 |
Oct 09 05:51:06 AM UTC 24 |
81007421977 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/38.uart_long_xfer_wo_dly.2406973337 |
|
|
Oct 09 05:46:04 AM UTC 24 |
Oct 09 05:51:07 AM UTC 24 |
43832714770 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/45.uart_fifo_reset.731239258 |
|
|
Oct 09 05:49:29 AM UTC 24 |
Oct 09 05:51:08 AM UTC 24 |
44274276380 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/47.uart_fifo_reset.747712284 |
|
|
Oct 09 05:50:38 AM UTC 24 |
Oct 09 05:51:09 AM UTC 24 |
16499821391 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/48.uart_rx_oversample.463817015 |
|
|
Oct 09 05:51:05 AM UTC 24 |
Oct 09 05:51:10 AM UTC 24 |
6083634279 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/47.uart_tx_ovrd.1662628418 |
|
|
Oct 09 05:50:49 AM UTC 24 |
Oct 09 05:51:10 AM UTC 24 |
6561696856 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/43.uart_fifo_overflow.3995272155 |
|
|
Oct 09 05:48:18 AM UTC 24 |
Oct 09 05:51:12 AM UTC 24 |
128618093624 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/48.uart_smoke.1213673901 |
|
|
Oct 09 05:51:00 AM UTC 24 |
Oct 09 05:51:14 AM UTC 24 |
6245163288 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/48.uart_tx_ovrd.4180387754 |
|
|
Oct 09 05:51:10 AM UTC 24 |
Oct 09 05:51:14 AM UTC 24 |
809667694 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/48.uart_rx_start_bit_filter.3411012372 |
|
|
Oct 09 05:51:08 AM UTC 24 |
Oct 09 05:51:16 AM UTC 24 |
6728597065 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/48.uart_alert_test.2405875284 |
|
|
Oct 09 05:51:17 AM UTC 24 |
Oct 09 05:51:19 AM UTC 24 |
21771854 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/48.uart_loopback.1242424795 |
|
|
Oct 09 05:51:11 AM UTC 24 |
Oct 09 05:51:19 AM UTC 24 |
6961406332 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/38.uart_stress_all.2184966206 |
|
|
Oct 09 05:46:12 AM UTC 24 |
Oct 09 05:51:23 AM UTC 24 |
173915202848 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/35.uart_perf.2124793607 |
|
|
Oct 09 05:44:11 AM UTC 24 |
Oct 09 05:51:23 AM UTC 24 |
14468258130 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/47.uart_stress_all_with_rand_reset.2804304732 |
|
|
Oct 09 05:50:52 AM UTC 24 |
Oct 09 05:51:25 AM UTC 24 |
21300903027 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/47.uart_noise_filter.1381649366 |
|
|
Oct 09 05:50:43 AM UTC 24 |
Oct 09 05:51:27 AM UTC 24 |
41984146317 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/49.uart_tx_rx.160624239 |
|
|
Oct 09 05:51:20 AM UTC 24 |
Oct 09 05:51:28 AM UTC 24 |
2405079195 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/49.uart_rx_oversample.873529851 |
|
|
Oct 09 05:51:28 AM UTC 24 |
Oct 09 05:51:33 AM UTC 24 |
2255116781 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/48.uart_tx_rx.3745142251 |
|
|
Oct 09 05:51:01 AM UTC 24 |
Oct 09 05:51:36 AM UTC 24 |
33682905462 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/45.uart_rx_parity_err.652380679 |
|
|
Oct 09 05:49:39 AM UTC 24 |
Oct 09 05:51:37 AM UTC 24 |
34131188900 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/49.uart_rx_start_bit_filter.3280947556 |
|
|
Oct 09 05:51:36 AM UTC 24 |
Oct 09 05:51:40 AM UTC 24 |
1377093449 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/49.uart_smoke.2218303129 |
|
|
Oct 09 05:51:20 AM UTC 24 |
Oct 09 05:51:41 AM UTC 24 |
5769481532 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/18.uart_perf.223129202 |
|
|
Oct 09 05:34:05 AM UTC 24 |
Oct 09 05:51:43 AM UTC 24 |
21911963376 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/48.uart_rx_parity_err.1252844950 |
|
|
Oct 09 05:51:09 AM UTC 24 |
Oct 09 05:51:44 AM UTC 24 |
19947424099 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/22.uart_long_xfer_wo_dly.3302655114 |
|
|
Oct 09 05:36:22 AM UTC 24 |
Oct 09 05:51:45 AM UTC 24 |
113105475794 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/49.uart_tx_ovrd.836918406 |
|
|
Oct 09 05:51:41 AM UTC 24 |
Oct 09 05:51:45 AM UTC 24 |
867752545 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/49.uart_loopback.4123895868 |
|
|
Oct 09 05:51:42 AM UTC 24 |
Oct 09 05:51:46 AM UTC 24 |
3257793472 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/48.uart_fifo_reset.987191005 |
|
|
Oct 09 05:51:04 AM UTC 24 |
Oct 09 05:51:47 AM UTC 24 |
65591363291 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/49.uart_alert_test.3854011780 |
|
|
Oct 09 05:51:47 AM UTC 24 |
Oct 09 05:51:49 AM UTC 24 |
11444205 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/41.uart_long_xfer_wo_dly.4165255001 |
|
|
Oct 09 05:47:38 AM UTC 24 |
Oct 09 05:51:53 AM UTC 24 |
63793469470 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/48.uart_stress_all_with_rand_reset.3514008895 |
|
|
Oct 09 05:51:15 AM UTC 24 |
Oct 09 05:51:55 AM UTC 24 |
1893595779 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/47.uart_fifo_overflow.92057270 |
|
|
Oct 09 05:50:35 AM UTC 24 |
Oct 09 05:51:56 AM UTC 24 |
174608795933 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/49.uart_fifo_overflow.2925177068 |
|
|
Oct 09 05:51:25 AM UTC 24 |
Oct 09 05:51:57 AM UTC 24 |
40179012060 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/50.uart_stress_all_with_rand_reset.1324634537 |
|
|
Oct 09 05:51:49 AM UTC 24 |
Oct 09 05:52:05 AM UTC 24 |
1824217867 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/52.uart_fifo_reset.1883559689 |
|
|
Oct 09 05:51:57 AM UTC 24 |
Oct 09 05:52:12 AM UTC 24 |
10537470865 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/53.uart_fifo_reset.2182471667 |
|
|
Oct 09 05:52:06 AM UTC 24 |
Oct 09 05:52:15 AM UTC 24 |
27050779770 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/49.uart_fifo_reset.1801876873 |
|
|
Oct 09 05:51:26 AM UTC 24 |
Oct 09 05:52:15 AM UTC 24 |
24505240872 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/46.uart_fifo_full.4138574630 |
|
|
Oct 09 05:50:03 AM UTC 24 |
Oct 09 05:52:16 AM UTC 24 |
177215331970 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/50.uart_fifo_reset.827609067 |
|
|
Oct 09 05:51:48 AM UTC 24 |
Oct 09 05:52:17 AM UTC 24 |
9143011651 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/45.uart_perf.311371955 |
|
|
Oct 09 05:49:47 AM UTC 24 |
Oct 09 05:52:20 AM UTC 24 |
11868481198 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/52.uart_stress_all_with_rand_reset.912701690 |
|
|
Oct 09 05:51:57 AM UTC 24 |
Oct 09 05:52:21 AM UTC 24 |
11427488463 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/49.uart_intr.1693272094 |
|
|
Oct 09 05:51:29 AM UTC 24 |
Oct 09 05:52:25 AM UTC 24 |
21396211617 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/54.uart_stress_all_with_rand_reset.1293198040 |
|
|
Oct 09 05:52:17 AM UTC 24 |
Oct 09 05:52:30 AM UTC 24 |
2892220699 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/51.uart_fifo_reset.2481046542 |
|
|
Oct 09 05:51:54 AM UTC 24 |
Oct 09 05:52:34 AM UTC 24 |
37871738976 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/47.uart_fifo_full.768432478 |
|
|
Oct 09 05:50:33 AM UTC 24 |
Oct 09 05:52:36 AM UTC 24 |
78511219600 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/56.uart_stress_all_with_rand_reset.2968441919 |
|
|
Oct 09 05:52:22 AM UTC 24 |
Oct 09 05:52:42 AM UTC 24 |
874526164 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/48.uart_fifo_overflow.1553007508 |
|
|
Oct 09 05:51:03 AM UTC 24 |
Oct 09 05:52:45 AM UTC 24 |
87468375120 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/51.uart_stress_all_with_rand_reset.3516276334 |
|
|
Oct 09 05:51:56 AM UTC 24 |
Oct 09 05:52:51 AM UTC 24 |
12932431147 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/54.uart_fifo_reset.1095998638 |
|
|
Oct 09 05:52:17 AM UTC 24 |
Oct 09 05:52:53 AM UTC 24 |
62992300368 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/49.uart_stress_all_with_rand_reset.3842607399 |
|
|
Oct 09 05:51:46 AM UTC 24 |
Oct 09 05:52:57 AM UTC 24 |
15127693566 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/58.uart_fifo_reset.1224663196 |
|
|
Oct 09 05:52:34 AM UTC 24 |
Oct 09 05:52:59 AM UTC 24 |
15239458748 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/46.uart_intr.2471405566 |
|
|
Oct 09 05:50:16 AM UTC 24 |
Oct 09 05:53:01 AM UTC 24 |
123216102892 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/33.uart_long_xfer_wo_dly.908982473 |
|
|
Oct 09 05:43:07 AM UTC 24 |
Oct 09 05:53:02 AM UTC 24 |
85153822884 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/57.uart_stress_all_with_rand_reset.1095645074 |
|
|
Oct 09 05:52:31 AM UTC 24 |
Oct 09 05:53:03 AM UTC 24 |
2518074087 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/45.uart_stress_all.135707957 |
|
|
Oct 09 05:49:55 AM UTC 24 |
Oct 09 05:53:04 AM UTC 24 |
178240720173 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/61.uart_stress_all_with_rand_reset.1162964132 |
|
|
Oct 09 05:52:59 AM UTC 24 |
Oct 09 05:53:04 AM UTC 24 |
619293724 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/48.uart_intr.2280183741 |
|
|
Oct 09 05:51:06 AM UTC 24 |
Oct 09 05:53:05 AM UTC 24 |
71331148951 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/40.uart_stress_all.1116311134 |
|
|
Oct 09 05:47:21 AM UTC 24 |
Oct 09 05:53:05 AM UTC 24 |
152188768463 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/60.uart_stress_all_with_rand_reset.3082814855 |
|
|
Oct 09 05:52:54 AM UTC 24 |
Oct 09 05:53:07 AM UTC 24 |
1691453736 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/46.uart_long_xfer_wo_dly.1952539951 |
|
|
Oct 09 05:50:30 AM UTC 24 |
Oct 09 05:53:17 AM UTC 24 |
108353120530 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/61.uart_fifo_reset.3135718779 |
|
|
Oct 09 05:52:58 AM UTC 24 |
Oct 09 05:53:17 AM UTC 24 |
57226176161 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/65.uart_fifo_reset.479906849 |
|
|
Oct 09 05:53:07 AM UTC 24 |
Oct 09 05:53:30 AM UTC 24 |
72633169078 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/44.uart_stress_all.3103424745 |
|
|
Oct 09 05:49:18 AM UTC 24 |
Oct 09 05:53:33 AM UTC 24 |
38691262029 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/64.uart_stress_all_with_rand_reset.2522111301 |
|
|
Oct 09 05:53:06 AM UTC 24 |
Oct 09 05:53:33 AM UTC 24 |
1377709686 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/66.uart_stress_all_with_rand_reset.1449371525 |
|
|
Oct 09 05:53:18 AM UTC 24 |
Oct 09 05:53:34 AM UTC 24 |
994954395 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/59.uart_fifo_reset.1850615601 |
|
|
Oct 09 05:52:43 AM UTC 24 |
Oct 09 05:53:40 AM UTC 24 |
25225052014 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/59.uart_stress_all_with_rand_reset.3636850649 |
|
|
Oct 09 05:52:46 AM UTC 24 |
Oct 09 05:53:43 AM UTC 24 |
3080249675 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/39.uart_intr.2977637517 |
|
|
Oct 09 05:46:21 AM UTC 24 |
Oct 09 05:53:45 AM UTC 24 |
209481140706 ps |
| T213 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/67.uart_fifo_reset.1638680406 |
|
|
Oct 09 05:53:31 AM UTC 24 |
Oct 09 05:53:46 AM UTC 24 |
35302267233 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/67.uart_stress_all_with_rand_reset.122388132 |
|
|
Oct 09 05:53:34 AM UTC 24 |
Oct 09 05:53:48 AM UTC 24 |
619848174 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/57.uart_fifo_reset.4099940202 |
|
|
Oct 09 05:52:25 AM UTC 24 |
Oct 09 05:53:49 AM UTC 24 |
80612375635 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/49.uart_rx_parity_err.3942789341 |
|
|
Oct 09 05:51:37 AM UTC 24 |
Oct 09 05:53:49 AM UTC 24 |
212937098771 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/55.uart_stress_all_with_rand_reset.1272938142 |
|
|
Oct 09 05:52:18 AM UTC 24 |
Oct 09 05:53:51 AM UTC 24 |
11369378077 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/65.uart_stress_all_with_rand_reset.2709700366 |
|
|
Oct 09 05:53:08 AM UTC 24 |
Oct 09 05:53:53 AM UTC 24 |
12420868739 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/49.uart_fifo_full.3625172379 |
|
|
Oct 09 05:51:24 AM UTC 24 |
Oct 09 05:53:54 AM UTC 24 |
76979924104 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/53.uart_stress_all_with_rand_reset.2144144839 |
|
|
Oct 09 05:52:13 AM UTC 24 |
Oct 09 05:53:54 AM UTC 24 |
11327183862 ps |
| T221 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/66.uart_fifo_reset.2717790281 |
|
|
Oct 09 05:53:17 AM UTC 24 |
Oct 09 05:53:55 AM UTC 24 |
31637714678 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/69.uart_stress_all_with_rand_reset.2099996985 |
|
|
Oct 09 05:53:44 AM UTC 24 |
Oct 09 05:54:05 AM UTC 24 |
1902401450 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/63.uart_fifo_reset.2800478773 |
|
|
Oct 09 05:53:03 AM UTC 24 |
Oct 09 05:54:05 AM UTC 24 |
19804486792 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/63.uart_stress_all_with_rand_reset.3422081793 |
|
|
Oct 09 05:53:05 AM UTC 24 |
Oct 09 05:54:10 AM UTC 24 |
26189596124 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/56.uart_fifo_reset.546236619 |
|
|
Oct 09 05:52:21 AM UTC 24 |
Oct 09 05:54:15 AM UTC 24 |
75395752670 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/73.uart_stress_all_with_rand_reset.2782627137 |
|
|
Oct 09 05:53:54 AM UTC 24 |
Oct 09 05:54:19 AM UTC 24 |
1306878286 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/68.uart_fifo_reset.1208515172 |
|
|
Oct 09 05:53:34 AM UTC 24 |
Oct 09 05:54:20 AM UTC 24 |
109410015730 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/70.uart_stress_all_with_rand_reset.1438358770 |
|
|
Oct 09 05:53:47 AM UTC 24 |
Oct 09 05:54:20 AM UTC 24 |
27518099678 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/58.uart_stress_all_with_rand_reset.2835266839 |
|
|
Oct 09 05:52:37 AM UTC 24 |
Oct 09 05:54:22 AM UTC 24 |
17485306450 ps |
| T222 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/62.uart_fifo_reset.1477818218 |
|
|
Oct 09 05:53:02 AM UTC 24 |
Oct 09 05:54:27 AM UTC 24 |
42411159601 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/31.uart_long_xfer_wo_dly.3426693613 |
|
|
Oct 09 05:41:34 AM UTC 24 |
Oct 09 05:54:28 AM UTC 24 |
69852478196 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/68.uart_stress_all_with_rand_reset.1688311517 |
|
|
Oct 09 05:53:35 AM UTC 24 |
Oct 09 05:54:28 AM UTC 24 |
15248084432 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/76.uart_stress_all_with_rand_reset.1920934392 |
|
|
Oct 09 05:54:16 AM UTC 24 |
Oct 09 05:54:38 AM UTC 24 |
4635489814 ps |
| T224 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/78.uart_fifo_reset.3589418795 |
|
|
Oct 09 05:54:21 AM UTC 24 |
Oct 09 05:54:38 AM UTC 24 |
15377179732 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/62.uart_stress_all_with_rand_reset.2835715645 |
|
|
Oct 09 05:53:03 AM UTC 24 |
Oct 09 05:54:41 AM UTC 24 |
4255578537 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/76.uart_fifo_reset.775032859 |
|
|
Oct 09 05:54:11 AM UTC 24 |
Oct 09 05:54:48 AM UTC 24 |
16321260383 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/28.uart_long_xfer_wo_dly.3166500722 |
|
|
Oct 09 05:39:26 AM UTC 24 |
Oct 09 05:55:25 AM UTC 24 |
149971331109 ps |
| T217 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/69.uart_fifo_reset.1337314047 |
|
|
Oct 09 05:53:40 AM UTC 24 |
Oct 09 05:54:50 AM UTC 24 |
23360475829 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/71.uart_fifo_reset.2658365425 |
|
|
Oct 09 05:53:49 AM UTC 24 |
Oct 09 05:54:52 AM UTC 24 |
62472088607 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/47.uart_rx_parity_err.1450884157 |
|
|
Oct 09 05:50:48 AM UTC 24 |
Oct 09 05:54:57 AM UTC 24 |
84415209845 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/41.uart_stress_all.566876141 |
|
|
Oct 09 05:47:40 AM UTC 24 |
Oct 09 05:54:58 AM UTC 24 |
416503780623 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/79.uart_stress_all_with_rand_reset.4151615737 |
|
|
Oct 09 05:54:28 AM UTC 24 |
Oct 09 05:54:58 AM UTC 24 |
6817183946 ps |
| T263 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/55.uart_fifo_reset.435618411 |
|
|
Oct 09 05:52:17 AM UTC 24 |
Oct 09 05:55:04 AM UTC 24 |
82174704560 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/77.uart_stress_all_with_rand_reset.1338022697 |
|
|
Oct 09 05:54:21 AM UTC 24 |
Oct 09 05:55:05 AM UTC 24 |
2064974823 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/74.uart_stress_all_with_rand_reset.1938510090 |
|
|
Oct 09 05:53:56 AM UTC 24 |
Oct 09 05:55:08 AM UTC 24 |
10957259188 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/84.uart_fifo_reset.2281880742 |
|
|
Oct 09 05:54:53 AM UTC 24 |
Oct 09 05:55:09 AM UTC 24 |
8040217117 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/48.uart_noise_filter.2306554699 |
|
|
Oct 09 05:51:06 AM UTC 24 |
Oct 09 05:55:11 AM UTC 24 |
118765454875 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/37.uart_perf.3878201397 |
|
|
Oct 09 05:45:26 AM UTC 24 |
Oct 09 05:55:12 AM UTC 24 |
9975390215 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/45.uart_long_xfer_wo_dly.4291618146 |
|
|
Oct 09 05:49:47 AM UTC 24 |
Oct 09 05:55:13 AM UTC 24 |
101376674152 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/23.uart_long_xfer_wo_dly.2177417607 |
|
|
Oct 09 05:36:51 AM UTC 24 |
Oct 09 05:55:15 AM UTC 24 |
131438114208 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/83.uart_stress_all_with_rand_reset.193059 |
|
|
Oct 09 05:54:51 AM UTC 24 |
Oct 09 05:55:17 AM UTC 24 |
1437211026 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/80.uart_stress_all_with_rand_reset.1943891405 |
|
|
Oct 09 05:54:39 AM UTC 24 |
Oct 09 05:55:17 AM UTC 24 |
2119977001 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/82.uart_stress_all_with_rand_reset.3943247064 |
|
|
Oct 09 05:54:49 AM UTC 24 |
Oct 09 05:55:21 AM UTC 24 |
5973935819 ps |
| T226 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/77.uart_fifo_reset.3460458376 |
|
|
Oct 09 05:54:19 AM UTC 24 |
Oct 09 05:55:22 AM UTC 24 |
55208207187 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/85.uart_fifo_reset.2795695097 |
|
|
Oct 09 05:54:59 AM UTC 24 |
Oct 09 05:55:23 AM UTC 24 |
10584580610 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/81.uart_fifo_reset.1656550202 |
|
|
Oct 09 05:54:39 AM UTC 24 |
Oct 09 05:55:24 AM UTC 24 |
19197382287 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/49.uart_stress_all.201646288 |
|
|
Oct 09 05:51:46 AM UTC 24 |
Oct 09 05:55:26 AM UTC 24 |
183634948535 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/72.uart_fifo_reset.1213853644 |
|
|
Oct 09 05:53:50 AM UTC 24 |
Oct 09 05:55:29 AM UTC 24 |
46367355338 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/78.uart_stress_all_with_rand_reset.1114176971 |
|
|
Oct 09 05:54:22 AM UTC 24 |
Oct 09 05:55:29 AM UTC 24 |
4456407003 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/83.uart_fifo_reset.1121534308 |
|
|
Oct 09 05:54:50 AM UTC 24 |
Oct 09 05:55:30 AM UTC 24 |
18282336082 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/48.uart_perf.225888606 |
|
|
Oct 09 05:51:11 AM UTC 24 |
Oct 09 05:55:31 AM UTC 24 |
34111259021 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/75.uart_fifo_reset.3984338061 |
|
|
Oct 09 05:54:06 AM UTC 24 |
Oct 09 05:55:31 AM UTC 24 |
43999472937 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/47.uart_perf.109612877 |
|
|
Oct 09 05:50:50 AM UTC 24 |
Oct 09 05:55:31 AM UTC 24 |
21551984687 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/70.uart_fifo_reset.695626413 |
|
|
Oct 09 05:53:46 AM UTC 24 |
Oct 09 05:55:34 AM UTC 24 |
288762055723 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/85.uart_stress_all_with_rand_reset.4093311959 |
|
|
Oct 09 05:54:59 AM UTC 24 |
Oct 09 05:55:34 AM UTC 24 |
10006016354 ps |
| T207 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/64.uart_fifo_reset.1460874283 |
|
|
Oct 09 05:53:06 AM UTC 24 |
Oct 09 05:55:34 AM UTC 24 |
131440126315 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/80.uart_fifo_reset.1995112545 |
|
|
Oct 09 05:54:28 AM UTC 24 |
Oct 09 05:55:36 AM UTC 24 |
21384337343 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/86.uart_fifo_reset.276567722 |
|
|
Oct 09 05:55:05 AM UTC 24 |
Oct 09 05:55:37 AM UTC 24 |
26332741146 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/81.uart_stress_all_with_rand_reset.952707353 |
|
|
Oct 09 05:54:42 AM UTC 24 |
Oct 09 05:55:38 AM UTC 24 |
7850226773 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/89.uart_fifo_reset.2848905587 |
|
|
Oct 09 05:55:13 AM UTC 24 |
Oct 09 05:55:39 AM UTC 24 |
161777662883 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/90.uart_stress_all_with_rand_reset.4054561893 |
|
|
Oct 09 05:55:19 AM UTC 24 |
Oct 09 05:55:41 AM UTC 24 |
1808192695 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/75.uart_stress_all_with_rand_reset.3939135879 |
|
|
Oct 09 05:54:06 AM UTC 24 |
Oct 09 05:55:42 AM UTC 24 |
51331565072 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/94.uart_fifo_reset.3235926310 |
|
|
Oct 09 05:55:29 AM UTC 24 |
Oct 09 05:55:50 AM UTC 24 |
23084637201 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/93.uart_stress_all_with_rand_reset.2858125512 |
|
|
Oct 09 05:55:26 AM UTC 24 |
Oct 09 05:55:53 AM UTC 24 |
3856781662 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/74.uart_fifo_reset.1246195523 |
|
|
Oct 09 05:53:55 AM UTC 24 |
Oct 09 05:55:53 AM UTC 24 |
23369628690 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/97.uart_fifo_reset.3701746266 |
|
|
Oct 09 05:55:35 AM UTC 24 |
Oct 09 05:55:57 AM UTC 24 |
21240274050 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/92.uart_stress_all_with_rand_reset.2220074656 |
|
|
Oct 09 05:55:25 AM UTC 24 |
Oct 09 05:56:00 AM UTC 24 |
8255485199 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/49.uart_noise_filter.939159450 |
|
|
Oct 09 05:51:34 AM UTC 24 |
Oct 09 05:56:02 AM UTC 24 |
81868312051 ps |
| T269 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/91.uart_fifo_reset.790168847 |
|
|
Oct 09 05:55:23 AM UTC 24 |
Oct 09 05:56:02 AM UTC 24 |
48320250248 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/94.uart_stress_all_with_rand_reset.509170005 |
|
|
Oct 09 05:55:30 AM UTC 24 |
Oct 09 05:56:06 AM UTC 24 |
4330820945 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/86.uart_stress_all_with_rand_reset.930430658 |
|
|
Oct 09 05:55:06 AM UTC 24 |
Oct 09 05:56:08 AM UTC 24 |
1233992725 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/49.uart_perf.2677937218 |
|
|
Oct 09 05:51:44 AM UTC 24 |
Oct 09 05:56:10 AM UTC 24 |
21553260571 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/95.uart_stress_all_with_rand_reset.1371390430 |
|
|
Oct 09 05:55:31 AM UTC 24 |
Oct 09 05:56:11 AM UTC 24 |
6062414945 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/48.uart_long_xfer_wo_dly.238164360 |
|
|
Oct 09 05:51:13 AM UTC 24 |
Oct 09 05:56:12 AM UTC 24 |
129978219208 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/101.uart_fifo_reset.4185997030 |
|
|
Oct 09 05:55:41 AM UTC 24 |
Oct 09 05:56:12 AM UTC 24 |
14886262125 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/47.uart_stress_all.96264223 |
|
|
Oct 09 05:50:56 AM UTC 24 |
Oct 09 05:56:14 AM UTC 24 |
183832598965 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/96.uart_stress_all_with_rand_reset.3212904165 |
|
|
Oct 09 05:55:33 AM UTC 24 |
Oct 09 05:56:15 AM UTC 24 |
16262280512 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/103.uart_fifo_reset.1116746236 |
|
|
Oct 09 05:55:51 AM UTC 24 |
Oct 09 05:56:16 AM UTC 24 |
21211316439 ps |
| T208 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/95.uart_fifo_reset.619242046 |
|
|
Oct 09 05:55:30 AM UTC 24 |
Oct 09 05:56:17 AM UTC 24 |
25732939156 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/89.uart_stress_all_with_rand_reset.1152568025 |
|
|
Oct 09 05:55:16 AM UTC 24 |
Oct 09 05:56:19 AM UTC 24 |
7645432961 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/84.uart_stress_all_with_rand_reset.2151776692 |
|
|
Oct 09 05:54:57 AM UTC 24 |
Oct 09 05:56:23 AM UTC 24 |
12223792258 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/91.uart_stress_all_with_rand_reset.2500395431 |
|
|
Oct 09 05:55:23 AM UTC 24 |
Oct 09 05:56:27 AM UTC 24 |
4672692509 ps |
| T1001 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/37.uart_long_xfer_wo_dly.1325392999 |
|
|
Oct 09 05:45:27 AM UTC 24 |
Oct 09 05:56:27 AM UTC 24 |
81921290348 ps |
| T1002 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/92.uart_fifo_reset.488858747 |
|
|
Oct 09 05:55:24 AM UTC 24 |
Oct 09 05:56:28 AM UTC 24 |
88255150546 ps |
| T249 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/106.uart_fifo_reset.2632237185 |
|
|
Oct 09 05:55:58 AM UTC 24 |
Oct 09 05:56:28 AM UTC 24 |
54611126077 ps |
| T283 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/112.uart_fifo_reset.2076063638 |
|
|
Oct 09 05:56:09 AM UTC 24 |
Oct 09 05:56:29 AM UTC 24 |
94819072712 ps |
| T1003 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/87.uart_stress_all_with_rand_reset.3309213485 |
|
|
Oct 09 05:55:10 AM UTC 24 |
Oct 09 05:56:29 AM UTC 24 |
23733198636 ps |
| T1004 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/98.uart_fifo_reset.2118627986 |
|
|
Oct 09 05:55:36 AM UTC 24 |
Oct 09 05:56:36 AM UTC 24 |
89014289885 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/73.uart_fifo_reset.2804567609 |
|
|
Oct 09 05:53:53 AM UTC 24 |
Oct 09 05:56:38 AM UTC 24 |
62904369614 ps |
| T1005 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/105.uart_fifo_reset.1655161696 |
|
|
Oct 09 05:55:55 AM UTC 24 |
Oct 09 05:56:38 AM UTC 24 |
75978312420 ps |
| T214 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/115.uart_fifo_reset.2525324900 |
|
|
Oct 09 05:56:13 AM UTC 24 |
Oct 09 05:56:39 AM UTC 24 |
38050996610 ps |
| T241 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/117.uart_fifo_reset.80788831 |
|
|
Oct 09 05:56:16 AM UTC 24 |
Oct 09 05:56:41 AM UTC 24 |
47495364291 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/96.uart_fifo_reset.4173625889 |
|
|
Oct 09 05:55:31 AM UTC 24 |
Oct 09 05:56:44 AM UTC 24 |
137856645630 ps |
| T227 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/110.uart_fifo_reset.1289015679 |
|
|
Oct 09 05:56:07 AM UTC 24 |
Oct 09 05:56:44 AM UTC 24 |
60857987105 ps |
| T1006 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/122.uart_fifo_reset.1108177165 |
|
|
Oct 09 05:56:23 AM UTC 24 |
Oct 09 05:56:50 AM UTC 24 |
143966500492 ps |
| T1007 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/88.uart_stress_all_with_rand_reset.1094142285 |
|
|
Oct 09 05:55:12 AM UTC 24 |
Oct 09 05:56:50 AM UTC 24 |
3783899270 ps |
| T1008 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/39.uart_long_xfer_wo_dly.158477455 |
|
|
Oct 09 05:46:36 AM UTC 24 |
Oct 09 05:56:50 AM UTC 24 |
90099326818 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/107.uart_fifo_reset.2564691268 |
|
|
Oct 09 05:56:01 AM UTC 24 |
Oct 09 05:56:52 AM UTC 24 |
28897941637 ps |
| T1009 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/42.uart_stress_all.991009740 |
|
|
Oct 09 05:48:10 AM UTC 24 |
Oct 09 05:56:53 AM UTC 24 |
95929689544 ps |
| T267 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/116.uart_fifo_reset.3591975164 |
|
|
Oct 09 05:56:14 AM UTC 24 |
Oct 09 05:56:54 AM UTC 24 |
48458293931 ps |
| T1010 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/82.uart_fifo_reset.507906765 |
|
|
Oct 09 05:54:45 AM UTC 24 |
Oct 09 05:56:55 AM UTC 24 |
65795676902 ps |
| T1011 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/125.uart_fifo_reset.276718307 |
|
|
Oct 09 05:56:30 AM UTC 24 |
Oct 09 05:56:55 AM UTC 24 |
17198964926 ps |
| T1012 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/128.uart_fifo_reset.3334095102 |
|
|
Oct 09 05:56:31 AM UTC 24 |
Oct 09 05:56:55 AM UTC 24 |
16695155072 ps |
| T1013 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/119.uart_fifo_reset.3529385218 |
|
|
Oct 09 05:56:17 AM UTC 24 |
Oct 09 05:56:59 AM UTC 24 |
19149630817 ps |
| T1014 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/123.uart_fifo_reset.4072986305 |
|
|
Oct 09 05:56:28 AM UTC 24 |
Oct 09 05:57:05 AM UTC 24 |
246008067324 ps |
| T1015 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/97.uart_stress_all_with_rand_reset.2237754780 |
|
|
Oct 09 05:55:36 AM UTC 24 |
Oct 09 05:57:05 AM UTC 24 |
3144222223 ps |
| T1016 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/135.uart_fifo_reset.3425946384 |
|
|
Oct 09 05:56:45 AM UTC 24 |
Oct 09 05:57:17 AM UTC 24 |
78017396924 ps |
| T1017 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/143.uart_fifo_reset.3886152656 |
|
|
Oct 09 05:56:56 AM UTC 24 |
Oct 09 05:57:20 AM UTC 24 |
26472175597 ps |
| T1018 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/109.uart_fifo_reset.2878504210 |
|
|
Oct 09 05:56:03 AM UTC 24 |
Oct 09 05:57:21 AM UTC 24 |
170212206756 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/124.uart_fifo_reset.1092775115 |
|
|
Oct 09 05:56:28 AM UTC 24 |
Oct 09 05:57:21 AM UTC 24 |
172641712908 ps |
| T215 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/118.uart_fifo_reset.4001238424 |
|
|
Oct 09 05:56:17 AM UTC 24 |
Oct 09 05:57:23 AM UTC 24 |
38175871907 ps |
| T1019 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/127.uart_fifo_reset.3705962407 |
|
|
Oct 09 05:56:30 AM UTC 24 |
Oct 09 05:57:24 AM UTC 24 |
81078256161 ps |
| T1020 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/30.uart_perf.98274551 |
|
|
Oct 09 05:40:54 AM UTC 24 |
Oct 09 05:57:24 AM UTC 24 |
15218290186 ps |
| T258 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/137.uart_fifo_reset.62536768 |
|
|
Oct 09 05:56:51 AM UTC 24 |
Oct 09 05:57:25 AM UTC 24 |
40210080988 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/149.uart_fifo_reset.4114386727 |
|
|
Oct 09 05:57:18 AM UTC 24 |
Oct 09 05:57:27 AM UTC 24 |
15809211597 ps |
| T1021 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/132.uart_fifo_reset.1534729022 |
|
|
Oct 09 05:56:40 AM UTC 24 |
Oct 09 05:57:28 AM UTC 24 |
17847395409 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/111.uart_fifo_reset.318581357 |
|
|
Oct 09 05:56:07 AM UTC 24 |
Oct 09 05:57:29 AM UTC 24 |
24865913681 ps |
| T1022 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/121.uart_fifo_reset.371037709 |
|
|
Oct 09 05:56:20 AM UTC 24 |
Oct 09 05:57:31 AM UTC 24 |
85874054707 ps |
| T1023 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/141.uart_fifo_reset.1379490954 |
|
|
Oct 09 05:56:55 AM UTC 24 |
Oct 09 05:57:33 AM UTC 24 |
15793374658 ps |
| T1024 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/131.uart_fifo_reset.455717639 |
|
|
Oct 09 05:56:39 AM UTC 24 |
Oct 09 05:57:35 AM UTC 24 |
45269041057 ps |
| T1025 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/98.uart_stress_all_with_rand_reset.1068061793 |
|
|
Oct 09 05:55:37 AM UTC 24 |
Oct 09 05:57:35 AM UTC 24 |
2389048819 ps |
| T1026 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/48.uart_stress_all.1430964472 |
|
|
Oct 09 05:51:15 AM UTC 24 |
Oct 09 05:57:36 AM UTC 24 |
155448607308 ps |
| T256 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/136.uart_fifo_reset.2942245000 |
|
|
Oct 09 05:56:50 AM UTC 24 |
Oct 09 05:57:36 AM UTC 24 |
61027531229 ps |
| T1027 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/100.uart_fifo_reset.3446090197 |
|
|
Oct 09 05:55:40 AM UTC 24 |
Oct 09 05:57:39 AM UTC 24 |
84911022893 ps |
| T1028 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/44.uart_long_xfer_wo_dly.2836350074 |
|
|
Oct 09 05:49:12 AM UTC 24 |
Oct 09 05:57:39 AM UTC 24 |
58920308518 ps |
| T1029 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/130.uart_fifo_reset.552308280 |
|
|
Oct 09 05:56:38 AM UTC 24 |
Oct 09 05:57:39 AM UTC 24 |
18839466782 ps |
| T1030 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/22.uart_perf.1280638985 |
|
|
Oct 09 05:36:21 AM UTC 24 |
Oct 09 05:57:41 AM UTC 24 |
16329899151 ps |
| T1031 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/146.uart_fifo_reset.1774934971 |
|
|
Oct 09 05:57:05 AM UTC 24 |
Oct 09 05:57:42 AM UTC 24 |
86243049168 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/140.uart_fifo_reset.2214341543 |
|
|
Oct 09 05:56:54 AM UTC 24 |
Oct 09 05:57:43 AM UTC 24 |
48681046780 ps |
| T1032 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/114.uart_fifo_reset.2667411395 |
|
|
Oct 09 05:56:12 AM UTC 24 |
Oct 09 05:57:44 AM UTC 24 |
134492900105 ps |
| T266 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/142.uart_fifo_reset.1241464877 |
|
|
Oct 09 05:56:56 AM UTC 24 |
Oct 09 05:57:52 AM UTC 24 |
19540372888 ps |
| T1033 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/129.uart_fifo_reset.1091206903 |
|
|
Oct 09 05:56:37 AM UTC 24 |
Oct 09 05:57:58 AM UTC 24 |
36133286790 ps |
| T242 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/172.uart_fifo_reset.3546376410 |
|
|
Oct 09 05:57:45 AM UTC 24 |
Oct 09 05:58:00 AM UTC 24 |
36412697127 ps |
| T216 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/161.uart_fifo_reset.1288014857 |
|
|
Oct 09 05:57:34 AM UTC 24 |
Oct 09 05:58:02 AM UTC 24 |
14732756655 ps |
| T1034 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/154.uart_fifo_reset.166245991 |
|
|
Oct 09 05:57:24 AM UTC 24 |
Oct 09 05:58:03 AM UTC 24 |
61372498925 ps |
| T1035 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/164.uart_fifo_reset.1150654403 |
|
|
Oct 09 05:57:37 AM UTC 24 |
Oct 09 05:58:04 AM UTC 24 |
48770456727 ps |
| T1036 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/163.uart_fifo_reset.409470300 |
|
|
Oct 09 05:57:36 AM UTC 24 |
Oct 09 05:58:04 AM UTC 24 |
176921776734 ps |
| T1037 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/108.uart_fifo_reset.1454842840 |
|
|
Oct 09 05:56:03 AM UTC 24 |
Oct 09 05:58:05 AM UTC 24 |
102320249762 ps |
| T1038 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/144.uart_fifo_reset.4145573638 |
|
|
Oct 09 05:56:56 AM UTC 24 |
Oct 09 05:58:06 AM UTC 24 |
25087567284 ps |
| T1039 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/147.uart_fifo_reset.1432403746 |
|
|
Oct 09 05:57:05 AM UTC 24 |
Oct 09 05:58:07 AM UTC 24 |
232633798852 ps |
| T1040 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/126.uart_fifo_reset.3669054871 |
|
|
Oct 09 05:56:30 AM UTC 24 |
Oct 09 05:58:07 AM UTC 24 |
164882599700 ps |
| T1041 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/155.uart_fifo_reset.4068384664 |
|
|
Oct 09 05:57:25 AM UTC 24 |
Oct 09 05:58:08 AM UTC 24 |
106637837049 ps |
| T1042 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/60.uart_fifo_reset.1861980962 |
|
|
Oct 09 05:52:52 AM UTC 24 |
Oct 09 05:58:09 AM UTC 24 |
52922149429 ps |
| T1043 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/46.uart_perf.3634672942 |
|
|
Oct 09 05:50:29 AM UTC 24 |
Oct 09 05:58:12 AM UTC 24 |
8557501943 ps |
| T1044 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/134.uart_fifo_reset.1527271331 |
|
|
Oct 09 05:56:44 AM UTC 24 |
Oct 09 05:58:14 AM UTC 24 |
82470353197 ps |
| T1045 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/167.uart_fifo_reset.3038713923 |
|
|
Oct 09 05:57:39 AM UTC 24 |
Oct 09 05:58:14 AM UTC 24 |
117716647435 ps |
| T1046 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/79.uart_fifo_reset.4054422385 |
|
|
Oct 09 05:54:27 AM UTC 24 |
Oct 09 05:58:14 AM UTC 24 |
140370808527 ps |
| T1047 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/148.uart_fifo_reset.1030620772 |
|
|
Oct 09 05:57:14 AM UTC 24 |
Oct 09 05:58:14 AM UTC 24 |
19768431110 ps |
| T1048 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/152.uart_fifo_reset.3718682447 |
|
|
Oct 09 05:57:23 AM UTC 24 |
Oct 09 05:58:15 AM UTC 24 |
113018786865 ps |
| T1049 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/168.uart_fifo_reset.1507573101 |
|
|
Oct 09 05:57:40 AM UTC 24 |
Oct 09 05:58:16 AM UTC 24 |
44525045498 ps |
| T1050 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/99.uart_fifo_reset.2004589370 |
|
|
Oct 09 05:55:38 AM UTC 24 |
Oct 09 05:58:17 AM UTC 24 |
101827747712 ps |
| T1051 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/48.uart_fifo_full.206522279 |
|
|
Oct 09 05:51:01 AM UTC 24 |
Oct 09 05:58:18 AM UTC 24 |
152518513189 ps |
| T1052 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/159.uart_fifo_reset.2970344000 |
|
|
Oct 09 05:57:30 AM UTC 24 |
Oct 09 05:58:18 AM UTC 24 |
19181947733 ps |
| T1053 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/139.uart_fifo_reset.2579704725 |
|
|
Oct 09 05:56:53 AM UTC 24 |
Oct 09 05:58:21 AM UTC 24 |
69129019321 ps |
| T1054 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/190.uart_fifo_reset.1294600145 |
|
|
Oct 09 05:58:15 AM UTC 24 |
Oct 09 05:58:24 AM UTC 24 |
18394299539 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/170.uart_fifo_reset.585459298 |
|
|
Oct 09 05:57:43 AM UTC 24 |
Oct 09 05:58:26 AM UTC 24 |
18627815706 ps |
| T1055 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/185.uart_fifo_reset.1755667496 |
|
|
Oct 09 05:58:10 AM UTC 24 |
Oct 09 05:58:28 AM UTC 24 |
5188009790 ps |
| T1056 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/180.uart_fifo_reset.1602382882 |
|
|
Oct 09 05:58:05 AM UTC 24 |
Oct 09 05:58:28 AM UTC 24 |
11814476096 ps |
| T1057 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/160.uart_fifo_reset.4041562065 |
|
|
Oct 09 05:57:32 AM UTC 24 |
Oct 09 05:58:30 AM UTC 24 |
119419139908 ps |
| T1058 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/104.uart_fifo_reset.3309480342 |
|
|
Oct 09 05:55:55 AM UTC 24 |
Oct 09 05:58:33 AM UTC 24 |
86704652642 ps |
| T1059 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/173.uart_fifo_reset.2625261389 |
|
|
Oct 09 05:57:54 AM UTC 24 |
Oct 09 05:58:33 AM UTC 24 |
18542445191 ps |
| T1060 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/93.uart_fifo_reset.1685060597 |
|
|
Oct 09 05:55:26 AM UTC 24 |
Oct 09 05:58:34 AM UTC 24 |
123134599518 ps |
| T1061 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/90.uart_fifo_reset.4135571516 |
|
|
Oct 09 05:55:17 AM UTC 24 |
Oct 09 05:58:37 AM UTC 24 |
94953600404 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/183.uart_fifo_reset.604618412 |
|
|
Oct 09 05:58:08 AM UTC 24 |
Oct 09 05:58:37 AM UTC 24 |
17597629537 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/189.uart_fifo_reset.1383057915 |
|
|
Oct 09 05:58:15 AM UTC 24 |
Oct 09 05:58:41 AM UTC 24 |
125113085262 ps |
| T270 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/178.uart_fifo_reset.596149330 |
|
|
Oct 09 05:58:04 AM UTC 24 |
Oct 09 05:58:44 AM UTC 24 |
79814121142 ps |
| T229 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/162.uart_fifo_reset.2705015214 |
|
|
Oct 09 05:57:36 AM UTC 24 |
Oct 09 05:58:46 AM UTC 24 |
34284191276 ps |
| T1062 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/165.uart_fifo_reset.2071946507 |
|
|
Oct 09 05:57:37 AM UTC 24 |
Oct 09 05:58:47 AM UTC 24 |
29322825889 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/193.uart_fifo_reset.3063736294 |
|
|
Oct 09 05:58:17 AM UTC 24 |
Oct 09 05:58:49 AM UTC 24 |
15578224226 ps |
| T1063 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/205.uart_fifo_reset.1141214116 |
|
|
Oct 09 05:58:38 AM UTC 24 |
Oct 09 05:58:53 AM UTC 24 |
22950767838 ps |
| T1064 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/187.uart_fifo_reset.2732593831 |
|
|
Oct 09 05:58:15 AM UTC 24 |
Oct 09 05:58:56 AM UTC 24 |
135248421845 ps |
| T1065 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/186.uart_fifo_reset.2134021402 |
|
|
Oct 09 05:58:13 AM UTC 24 |
Oct 09 05:58:58 AM UTC 24 |
12070077627 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/199.uart_fifo_reset.1108518738 |
|
|
Oct 09 05:58:29 AM UTC 24 |
Oct 09 05:58:58 AM UTC 24 |
37727674560 ps |
| T1066 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/184.uart_fifo_reset.4208286972 |
|
|
Oct 09 05:58:10 AM UTC 24 |
Oct 09 05:58:59 AM UTC 24 |
15158846323 ps |
| T1067 |
/workspaces/repo/scratch/os_regression_2024_10_08/uart-sim-vcs/coverage/default/182.uart_fifo_reset.1960127362 |
|
|
Oct 09 05:58:07 AM UTC 24 |
Oct 09 05:59:00 AM UTC 24 |
35175798723 ps |