USBDEV Simulation Results

Wednesday August 28 2024 16:26:26 UTC

GitHub Revision: a861deb3de

Branch: os_regression_2024_08_28

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 1071354200461384473511155521960728188378582408849032283874664554749864050652

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke usbdev_smoke 1.900s 271.458us 50 50 100.00
V1 csr_hw_reset usbdev_csr_hw_reset 1.220s 72.719us 5 5 100.00
V1 csr_rw usbdev_csr_rw 1.520s 89.713us 20 20 100.00
V1 csr_bit_bash usbdev_csr_bit_bash 10.630s 2.871ms 5 5 100.00
V1 csr_aliasing usbdev_csr_aliasing 3.720s 342.545us 5 5 100.00
V1 csr_mem_rw_with_rand_reset usbdev_csr_mem_rw_with_rand_reset 3.080s 99.617us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr usbdev_csr_rw 1.520s 89.713us 20 20 100.00
usbdev_csr_aliasing 3.720s 342.545us 5 5 100.00
V1 mem_walk usbdev_mem_walk 3.680s 168.327us 5 5 100.00
V1 mem_partial_access usbdev_mem_partial_access 2.260s 191.060us 5 5 100.00
V1 TOTAL 115 115 100.00
V2 in_trans usbdev_in_trans 1.860s 237.341us 50 50 100.00
V2 data_toggle_clear usbdev_data_toggle_clear 3.040s 593.834us 50 50 100.00
V2 phy_pins_sense usbdev_phy_pins_sense 1.200s 93.202us 50 50 100.00
V2 av_buffer usbdev_av_buffer 1.600s 213.720us 50 50 100.00
V2 rx_fifo usbdev_pkt_buffer 1.581m 22.848ms 50 50 100.00
V2 phy_config_tx_osc_test_mode usbdev_phy_config_tx_osc_test_mode 1.970s 334.792us 1 1 100.00
V2 phy_config_eop_single_bit_handling usbdev_phy_config_eop_single_bit_handling 1.710s 246.855us 1 1 100.00
V2 phy_config_pinflip usbdev_phy_config_pinflip 1.960s 237.647us 50 50 100.00
V2 phy_config_rand_bus_type usbdev_phy_config_rand_bus_type 1.800s 236.789us 5 5 100.00
V2 phy_config_rx_dp_dn usbdev_phy_config_rx_dp_dn 1.660s 201.695us 1 1 100.00
V2 phy_config_tx_use_d_se0 usbdev_phy_config_tx_use_d_se0 1.910s 219.774us 1 1 100.00
V2 phy_config_usb_ref_disable usbdev_phy_config_usb_ref_disable 1.490s 187.849us 50 50 100.00
V2 max_length_out_transaction usbdev_max_length_out_transaction 1.790s 243.995us 50 50 100.00
usbdev_stream_len_max 6.170s 1.349ms 50 50 100.00
V2 max_length_in_transaction usbdev_max_length_in_transaction 1.970s 289.773us 50 50 100.00
V2 min_length_out_transaction usbdev_min_length_out_transaction 1.610s 185.385us 50 50 100.00
V2 min_length_in_transaction usbdev_min_length_in_transaction 1.670s 222.628us 50 50 100.00
V2 random_length_out_transaction usbdev_random_length_out_transaction 1.670s 239.116us 50 50 100.00
V2 random_length_in_transaction usbdev_random_length_in_transaction 1.820s 248.618us 50 50 100.00
V2 out_stall usbdev_out_stall 1.670s 223.280us 50 50 100.00
V2 in_stall usbdev_in_stall 1.540s 199.658us 50 50 100.00
V2 out_iso usbdev_out_iso 1.660s 234.510us 50 50 100.00
V2 in_iso usbdev_in_iso 2.090s 232.848us 50 50 100.00
V2 pkt_received usbdev_pkt_received 1.710s 205.304us 50 50 100.00
V2 pkt_sent usbdev_pkt_sent 1.850s 267.893us 50 50 100.00
V2 disconnected usbdev_disconnected 1.550s 195.052us 50 50 100.00
V2 host_lost usbdev_host_lost 21.620s 4.197ms 1 1 100.00
V2 link_reset usbdev_link_reset 1.400s 205.739us 1 1 100.00
V2 link_suspend usbdev_link_suspend 37.760s 11.153ms 50 50 100.00
V2 link_resume usbdev_link_resume 55.530s 24.797ms 50 50 100.00
V2 av_empty usbdev_av_empty 1.540s 160.864us 5 5 100.00
V2 rx_full usbdev_rx_full 2.630s 377.811us 50 50 100.00
V2 av_overflow usbdev_av_overflow 1.720s 183.104us 5 5 100.00
V2 link_in_err usbdev_link_in_err 1.890s 284.513us 50 50 100.00
V2 rx_crc_err usbdev_rx_crc_err 1.690s 209.097us 50 50 100.00
V2 rx_pid_err usbdev_rx_pid_err 1.630s 183.175us 5 5 100.00
V2 rx_bitstuff_err usbdev_bitstuff_err 1.480s 155.633us 50 50 100.00
V2 link_out_err usbdev_link_out_err 2.420s 541.333us 1 1 100.00
V2 enable usbdev_enable 1.200s 85.795us 50 50 100.00
V2 resume_link_active usbdev_resume_link_active 51.130s 20.162ms 20 20 100.00
V2 device_address usbdev_device_address 2.021m 46.309ms 50 50 100.00
V2 invalid_data1_data0_toggle_test usbdev_invalid_data1_data0_toggle_test 2.880s 482.348us 1 1 100.00
V2 setup_stage usbdev_setup_stage 1.530s 163.265us 50 50 100.00
V2 endpoint_access usbdev_endpoint_access 4.900s 958.524us 50 50 100.00
V2 disable_endpoint usbdev_disable_endpoint 5.460s 1.377ms 50 50 100.00
V2 endpoint_types usbdev_endpoint_types 2.870s 566.047us 200 200 100.00
V2 out_trans_nak usbdev_out_trans_nak 1.740s 244.153us 50 50 100.00
V2 setup_trans_ignored usbdev_setup_trans_ignored 1.540s 168.049us 50 50 100.00
V2 nak_trans usbdev_nak_trans 1.780s 299.905us 50 50 100.00
V2 stall_trans usbdev_stall_trans 1.550s 212.317us 50 50 100.00
V2 setup_priority_over_stall_response usbdev_setup_priority_over_stall_response 1.700s 221.098us 5 5 100.00
V2 stall_priority_over_nak usbdev_stall_priority_over_nak 1.620s 239.289us 50 50 100.00
V2 pending_in_trans usbdev_pending_in_trans 1.550s 214.546us 50 50 100.00
V2 streaming_test usbdev_streaming_out 1.984m 3.511ms 50 50 100.00
V2 max_clock_error_untracked usbdev_freq_hiclk 4.842m 117.196ms 5 5 100.00
usbdev_freq_loclk 4.082m 107.137ms 5 5 100.00
V2 max_clock_error_tracking usbdev_freq_hiclk_max 4.163m 91.287ms 5 5 100.00
usbdev_freq_loclk_max 4.294m 107.193ms 5 5 100.00
V2 max_phase_error usbdev_freq_phase 4.007m 111.141ms 5 5 100.00
V2 min_inter_pkt_delay usbdev_min_inter_pkt_delay 1.721m 3.219ms 50 50 100.00
V2 max_inter_pkt_delay usbdev_max_inter_pkt_delay 1.766m 4.163ms 50 50 100.00
V2 device_timeout_missing_host_handshake usbdev_timeout_missing_host_handshake 54.930s 1.716ms 50 50 100.00
V2 device_timeout usbdev_device_timeout 1.221m 7.761ms 50 50 100.00
V2 packet_buffer usbdev_pkt_buffer 1.581m 22.848ms 50 50 100.00
V2 nak_to_out_trans_when_avbuffer_empty_rxfifo_full usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full 2.860s 499.559us 1 1 100.00
V2 aon_wake_resume usbdev_aon_wake_resume 1.537m 31.133ms 50 50 100.00
V2 aon_wake_reset usbdev_aon_wake_reset 46.340s 15.461ms 50 50 100.00
V2 aon_wake_disconnect usbdev_aon_wake_disconnect 21.210s 10.360ms 50 50 100.00
V2 invalid_sync usbdev_invalid_sync 2.484m 4.386ms 50 50 100.00
V2 spurious_pids_ignored usbdev_spurious_pids_ignored 1.654m 2.921ms 50 50 100.00
V2 low_speed_traffic usbdev_low_speed_traffic 2.141m 5.043ms 50 50 100.00
V2 rand_bus_resets usbdev_rand_bus_resets 3.022m 6.938ms 10 10 100.00
V2 rand_disconnects usbdev_rand_bus_disconnects 2.842m 6.891ms 10 10 100.00
V2 rand_suspends usbdev_rand_suspends 1.635m 6.568ms 10 10 100.00
V2 max_usb_traffic usbdev_max_non_iso_usb_traffic 1.710m 2.801ms 25 25 100.00
usbdev_max_usb_traffic 1.555m 2.633ms 15 15 100.00
V2 stress_usb_traffic usbdev_stress_usb_traffic 4.774m 12.209ms 10 10 100.00
V2 in_packet_retraction usbdev_iso_retraction 2.623m 14.055ms 50 50 100.00
V2 data_toggle_restore usbdev_data_toggle_restore 5.570s 1.140ms 50 50 100.00
V2 setup_priority usbdev_setup_priority 2.470s 437.164us 5 5 100.00
V2 fifo_resets usbdev_fifo_rst 5.030s 505.391us 50 50 100.00
V2 tx_rx_disruption usbdev_tx_rx_disruption 3.130s 640.185us 500 500 100.00
V2 fifo_levels usbdev_fifo_levels 2.080s 312.053us 160 160 100.00
V2 intr_test usbdev_intr_test 1.200s 83.986us 50 50 100.00
V2 alert_test usbdev_alert_test 1.090s 60.745us 50 50 100.00
V2 tl_d_oob_addr_access usbdev_tl_errors 3.670s 328.337us 20 20 100.00
V2 tl_d_illegal_access usbdev_tl_errors 3.670s 328.337us 20 20 100.00
V2 tl_d_outstanding_access usbdev_csr_hw_reset 1.220s 72.719us 5 5 100.00
usbdev_csr_rw 1.520s 89.713us 20 20 100.00
usbdev_csr_aliasing 3.720s 342.545us 5 5 100.00
usbdev_same_csr_outstanding 2.310s 493.969us 20 20 100.00
V2 tl_d_partial_access usbdev_csr_hw_reset 1.220s 72.719us 5 5 100.00
usbdev_csr_rw 1.520s 89.713us 20 20 100.00
usbdev_csr_aliasing 3.720s 342.545us 5 5 100.00
usbdev_same_csr_outstanding 2.310s 493.969us 20 20 100.00
V2 TOTAL 3764 3764 100.00
V2S tl_intg_err usbdev_sec_cm 3.460s 983.045us 5 5 100.00
usbdev_tl_intg_err 6.120s 2.283ms 20 20 100.00
V2S sec_cm_bus_integrity usbdev_tl_intg_err 6.120s 2.283ms 20 20 100.00
V2S TOTAL 25 25 100.00
V3 dpi_config_host usbdev_dpi_config_host 55.700s 5.128ms 1 1 100.00
V3 TOTAL 1 1 100.00
Unmapped tests usbdev_stress_all_with_rand_reset 1.110s 72.512us 0 10 0.00
usbdev_stress_all 0.880s 0 50 0.00
TOTAL 3905 3965 98.49

Testplan Progress

Items Total Written Passing Progress
N.A. 2 2 0 0.00
V1 8 8 8 100.00
V2 86 86 86 100.00
V2S 2 2 2 100.00
V3 1 1 1 100.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
97.40 98.22 96.03 97.44 94.92 98.38 98.17 98.64

Failure Buckets

Past Results